From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> To: David Laight <David.Laight@ACULAB.COM>, Marc Kleine-Budde <mkl@pengutronix.de>, Geert Uytterhoeven <geert@linux-m68k.org> Cc: "netdev@vger.kernel.org" <netdev@vger.kernel.org>, "wg@grandegger.com" <wg@grandegger.com>, "linux-can@vger.kernel.org" <linux-can@vger.kernel.org>, Linux-sh list <linux-sh@vger.kernel.org>, Pavel Kiryukhin <vksavl@gmail.com> Subject: Re: [PATCH v5] can: add Renesas R-Car CAN driver Date: Fri, 28 Feb 2014 12:34:06 +0000 [thread overview] Message-ID: <5310823E.1020104@cogentembedded.com> (raw) In-Reply-To: <063D6719AE5E284EB5DD2968C1650D6D0F6CDC95@AcuExch.aculab.com> Hello. On 28-02-2014 16:17, David Laight wrote: >> This is not a 32-bit register but 24- and 8-bit one. I'm afraid we won't >> be able to test on BE soon as the machine we're debugging on is LE only. >> Anyway, for the big-endian configured Superhyway bus the big-endian HPB bus >> the CAN controller resides on shouldn't swap bytes. > Except that you aren't going to get any cpu I know about to do a bus > access with only three of the four byte enables asserted (except as part > of a misaligned 32 bit transfer). > So you either have four 8-bit registers, or one 32-bit one. I have what is described in the manual, 24-bit register allowing 8-, 16-, and 32-bit access. > I'd suggest keeping both parts in the driver data area Well, I'm keeping CLKR value in the platform data. But there is absolutely no need to keep BCR anywhere because I'd never use the saved value. > and oring them together before writing to the device. That's what I'm doing. > David WBR, Sergei
WARNING: multiple messages have this Message-ID (diff)
From: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com> To: David Laight <David.Laight@ACULAB.COM>, Marc Kleine-Budde <mkl@pengutronix.de>, Geert Uytterhoeven <geert@linux-m68k.org> Cc: "netdev@vger.kernel.org" <netdev@vger.kernel.org>, "wg@grandegger.com" <wg@grandegger.com>, "linux-can@vger.kernel.org" <linux-can@vger.kernel.org>, Linux-sh list <linux-sh@vger.kernel.org>, Pavel Kiryukhin <vksavl@gmail.com> Subject: Re: [PATCH v5] can: add Renesas R-Car CAN driver Date: Fri, 28 Feb 2014 16:34:06 +0400 [thread overview] Message-ID: <5310823E.1020104@cogentembedded.com> (raw) In-Reply-To: <063D6719AE5E284EB5DD2968C1650D6D0F6CDC95@AcuExch.aculab.com> Hello. On 28-02-2014 16:17, David Laight wrote: >> This is not a 32-bit register but 24- and 8-bit one. I'm afraid we won't >> be able to test on BE soon as the machine we're debugging on is LE only. >> Anyway, for the big-endian configured Superhyway bus the big-endian HPB bus >> the CAN controller resides on shouldn't swap bytes. > Except that you aren't going to get any cpu I know about to do a bus > access with only three of the four byte enables asserted (except as part > of a misaligned 32 bit transfer). > So you either have four 8-bit registers, or one 32-bit one. I have what is described in the manual, 24-bit register allowing 8-, 16-, and 32-bit access. > I'd suggest keeping both parts in the driver data area Well, I'm keeping CLKR value in the platform data. But there is absolutely no need to keep BCR anywhere because I'd never use the saved value. > and oring them together before writing to the device. That's what I'm doing. > David WBR, Sergei
next prev parent reply other threads:[~2014-02-28 12:34 UTC|newest] Thread overview: 66+ messages / expand[flat|nested] mbox.gz Atom feed top 2013-12-26 20:37 [PATCH v5] can: add Renesas R-Car CAN driver Sergei Shtylyov 2013-12-26 21:37 ` Sergei Shtylyov 2014-01-13 13:46 ` Sergei Shtylyov 2014-01-13 13:46 ` Sergei Shtylyov 2014-01-20 9:18 ` Marc Kleine-Budde 2014-01-20 9:18 ` Marc Kleine-Budde 2014-01-25 0:34 ` Sergei Shtylyov 2014-01-25 1:34 ` Sergei Shtylyov 2014-02-13 12:12 ` Marc Kleine-Budde 2014-02-13 12:12 ` Marc Kleine-Budde 2014-02-20 22:48 ` Sergei Shtylyov 2014-02-20 23:48 ` Sergei Shtylyov 2014-02-28 9:08 ` Marc Kleine-Budde 2014-02-28 9:08 ` Marc Kleine-Budde 2014-02-28 11:16 ` Sergei Shtylyov 2014-02-28 11:16 ` Sergei Shtylyov 2014-02-28 11:37 ` Marc Kleine-Budde 2014-02-28 11:37 ` Marc Kleine-Budde 2014-02-28 11:41 ` Geert Uytterhoeven 2014-02-28 11:41 ` Geert Uytterhoeven 2014-02-28 11:47 ` David Laight 2014-02-28 11:47 ` David Laight 2014-02-28 11:50 ` Marc Kleine-Budde 2014-02-28 11:50 ` Marc Kleine-Budde 2014-02-28 12:02 ` David Laight 2014-02-28 12:02 ` David Laight 2014-02-28 11:49 ` Marc Kleine-Budde 2014-02-28 11:49 ` Marc Kleine-Budde 2014-02-28 12:05 ` Sergei Shtylyov 2014-02-28 12:05 ` Sergei Shtylyov 2014-02-28 12:17 ` David Laight 2014-02-28 12:17 ` David Laight 2014-02-28 12:34 ` Sergei Shtylyov [this message] 2014-02-28 12:34 ` Sergei Shtylyov 2014-01-20 11:43 ` Geert Uytterhoeven 2014-01-20 11:43 ` Geert Uytterhoeven 2014-01-20 11:47 ` Marc Kleine-Budde 2014-01-20 11:47 ` Marc Kleine-Budde 2014-01-20 11:52 ` Geert Uytterhoeven 2014-01-20 11:52 ` Geert Uytterhoeven 2014-01-20 11:58 ` Marc Kleine-Budde 2014-01-20 11:58 ` Marc Kleine-Budde 2014-01-20 12:02 ` Ben Dooks 2014-01-20 12:05 ` Geert Uytterhoeven 2014-01-20 12:05 ` Geert Uytterhoeven 2014-01-20 12:08 ` Marc Kleine-Budde 2014-01-20 12:08 ` Marc Kleine-Budde 2014-01-20 12:05 ` Marc Kleine-Budde 2014-01-20 12:05 ` Marc Kleine-Budde 2014-01-20 12:13 ` David Laight 2014-01-20 12:13 ` David Laight 2014-01-20 12:35 ` Marc Kleine-Budde 2014-01-20 12:35 ` Marc Kleine-Budde 2014-01-20 19:16 ` David Miller 2014-01-20 19:16 ` David Miller 2014-01-20 21:12 ` Sergei Shtylyov 2014-01-20 22:12 ` Sergei Shtylyov 2014-01-20 21:17 ` Marc Kleine-Budde 2014-01-20 21:17 ` Marc Kleine-Budde 2014-01-22 11:52 ` Ben Dooks 2014-01-22 11:54 ` Geert Uytterhoeven 2014-01-22 11:54 ` Geert Uytterhoeven 2014-01-22 11:58 ` David Laight 2014-01-22 11:58 ` David Laight 2014-01-20 12:12 ` Sergei Shtylyov 2014-01-20 12:12 ` Sergei Shtylyov
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