From: Hans Rosenfeld <hans.rosenfeld@amd.com>
To: <hpa@zytor.com>, <tglx@linutronix.de>, <mingo@elte.hu>
Cc: <andreas.herrmann3@amd.com>, <linux-kernel@vger.kernel.org>,
<x86@kernel.org>, Hans Rosenfeld <hans.rosenfeld@amd.com>
Subject: [PATCH 0/4] x86, amd: family 0x15 L3 cache features
Date: Mon, 24 Jan 2011 16:05:39 +0100 [thread overview]
Message-ID: <1295881543-572552-1-git-send-email-hans.rosenfeld@amd.com> (raw)
This patch set enables L3 cache index disable and adds support for L3
cache partitioning on AMD family 0x15 CPUs.
This stuff applies against tip/master 3ff6dcac735704824c1dff64dc6863c390d364cc.
Andreas Herrmann (1):
x86, amd: Normalize compute unit IDs on multi-node processors
Hans Rosenfeld (3):
x86, amd: Enable L3 cache index disable on family 0x15
x86, amd: Extend AMD northbridge caching code to support "Link
Control" devices
x86, amd: Support L3 Cache Partitioning on AMD family 0x15 CPUs
arch/x86/include/asm/amd_nb.h | 4 ++
arch/x86/kernel/amd_nb.c | 69 ++++++++++++++++++++++++++++++-
arch/x86/kernel/cpu/amd.c | 8 +++-
arch/x86/kernel/cpu/intel_cacheinfo.c | 73 +++++++++++++++++++++++++++-----
arch/x86/kernel/smpboot.c | 1 +
include/linux/pci_ids.h | 1 +
6 files changed, 140 insertions(+), 16 deletions(-)
next reply other threads:[~2011-01-24 15:05 UTC|newest]
Thread overview: 22+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-24 15:05 Hans Rosenfeld [this message]
2011-01-24 15:05 ` [PATCH 1/4] x86, amd: Normalize compute unit IDs on multi-node processors Hans Rosenfeld
2011-01-26 10:57 ` [tip:x86/amd-nb] " tip-bot for Andreas Herrmann
2011-02-14 14:30 ` Ingo Molnar
2011-02-14 17:14 ` [PATCH] x86, amd: Fix uninitialized variable warning Borislav Petkov
2011-02-15 3:10 ` [tip:x86/amd-nb] x86, amd: Initialize variable properly tip-bot for Borislav Petkov
2011-02-04 22:07 ` [PATCH 1/4] x86, amd: Normalize compute unit IDs on multi-node processors Andrew Morton
2011-01-24 15:05 ` [PATCH 2/4] x86, amd: Enable L3 cache index disable on family 0x15 Hans Rosenfeld
2011-01-26 10:58 ` [tip:x86/amd-nb] " tip-bot for Hans Rosenfeld
2011-01-24 15:05 ` [PATCH 3/4] x86, amd: Extend AMD northbridge caching code to support "Link Control" devices Hans Rosenfeld
2011-01-26 10:58 ` [tip:x86/amd-nb] " tip-bot for Hans Rosenfeld
2011-01-24 15:05 ` [PATCH 4/4] x86, amd: Support L3 Cache Partitioning on AMD family 0x15 CPUs Hans Rosenfeld
2011-01-26 10:56 ` Ingo Molnar
2011-01-26 17:05 ` Hans Rosenfeld
2011-01-26 17:08 ` Hans Rosenfeld
2011-01-26 20:56 ` Ingo Molnar
2011-01-27 11:50 ` Hans Rosenfeld
2011-01-27 12:47 ` Ingo Molnar
2011-02-01 15:14 ` Hans Rosenfeld
2011-02-07 17:10 ` Hans Rosenfeld
2011-02-08 12:03 ` [tip:x86/amd-nb] " tip-bot for Hans Rosenfeld
-- strict thread matches above, loose matches on Subject: below --
2010-12-20 17:13 [PATCH 0/4] x86, amd: family 0x15 L3 cache features Hans Rosenfeld
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