From: tip-bot for Hans Rosenfeld <hans.rosenfeld@amd.com>
To: linux-tip-commits@vger.kernel.org
Cc: linux-kernel@vger.kernel.org, hans.rosenfeld@amd.com,
hpa@zytor.com, mingo@redhat.com, andreas.herrmann3@amd.com,
tglx@linutronix.de, mingo@elte.hu
Subject: [tip:x86/amd-nb] x86, amd: Enable L3 cache index disable on family 0x15
Date: Wed, 26 Jan 2011 10:58:19 GMT [thread overview]
Message-ID: <tip-b453de02b786c63b8928ec822401468131db0a9b@git.kernel.org> (raw)
In-Reply-To: <1295881543-572552-3-git-send-email-hans.rosenfeld@amd.com>
Commit-ID: b453de02b786c63b8928ec822401468131db0a9b
Gitweb: http://git.kernel.org/tip/b453de02b786c63b8928ec822401468131db0a9b
Author: Hans Rosenfeld <hans.rosenfeld@amd.com>
AuthorDate: Mon, 24 Jan 2011 16:05:41 +0100
Committer: Ingo Molnar <mingo@elte.hu>
CommitDate: Wed, 26 Jan 2011 08:28:23 +0100
x86, amd: Enable L3 cache index disable on family 0x15
AMD family 0x15 CPUs support L3 cache index disable, so enable
it on them.
Signed-off-by: Hans Rosenfeld <hans.rosenfeld@amd.com>
Cc: <andreas.herrmann3@amd.com>
LKML-Reference: <1295881543-572552-3-git-send-email-hans.rosenfeld@amd.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
---
arch/x86/kernel/amd_nb.c | 3 +++
1 files changed, 3 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/amd_nb.c b/arch/x86/kernel/amd_nb.c
index 0a99f71..a4f394c 100644
--- a/arch/x86/kernel/amd_nb.c
+++ b/arch/x86/kernel/amd_nb.c
@@ -85,6 +85,9 @@ int amd_cache_northbridges(void)
boot_cpu_data.x86_mask >= 0x1))
amd_northbridges.flags |= AMD_NB_L3_INDEX_DISABLE;
+ if (boot_cpu_data.x86 == 0x15)
+ amd_northbridges.flags |= AMD_NB_L3_INDEX_DISABLE;
+
return 0;
}
EXPORT_SYMBOL_GPL(amd_cache_northbridges);
next prev parent reply other threads:[~2011-01-26 10:58 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-24 15:05 [PATCH 0/4] x86, amd: family 0x15 L3 cache features Hans Rosenfeld
2011-01-24 15:05 ` [PATCH 1/4] x86, amd: Normalize compute unit IDs on multi-node processors Hans Rosenfeld
2011-01-26 10:57 ` [tip:x86/amd-nb] " tip-bot for Andreas Herrmann
2011-02-14 14:30 ` Ingo Molnar
2011-02-14 17:14 ` [PATCH] x86, amd: Fix uninitialized variable warning Borislav Petkov
2011-02-15 3:10 ` [tip:x86/amd-nb] x86, amd: Initialize variable properly tip-bot for Borislav Petkov
2011-02-04 22:07 ` [PATCH 1/4] x86, amd: Normalize compute unit IDs on multi-node processors Andrew Morton
2011-01-24 15:05 ` [PATCH 2/4] x86, amd: Enable L3 cache index disable on family 0x15 Hans Rosenfeld
2011-01-26 10:58 ` tip-bot for Hans Rosenfeld [this message]
2011-01-24 15:05 ` [PATCH 3/4] x86, amd: Extend AMD northbridge caching code to support "Link Control" devices Hans Rosenfeld
2011-01-26 10:58 ` [tip:x86/amd-nb] " tip-bot for Hans Rosenfeld
2011-01-24 15:05 ` [PATCH 4/4] x86, amd: Support L3 Cache Partitioning on AMD family 0x15 CPUs Hans Rosenfeld
2011-01-26 10:56 ` Ingo Molnar
2011-01-26 17:05 ` Hans Rosenfeld
2011-01-26 17:08 ` Hans Rosenfeld
2011-01-26 20:56 ` Ingo Molnar
2011-01-27 11:50 ` Hans Rosenfeld
2011-01-27 12:47 ` Ingo Molnar
2011-02-01 15:14 ` Hans Rosenfeld
2011-02-07 17:10 ` Hans Rosenfeld
2011-02-08 12:03 ` [tip:x86/amd-nb] " tip-bot for Hans Rosenfeld
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