* [U-Boot] [0/5]devkit8000 nand_spl support
@ 2011-06-28 14:14 simonschwarzcor at googlemail.com
2011-06-28 14:14 ` [U-Boot] [1/5]devkit8000 nand_spl: armv7 support nand_spl boot simonschwarzcor at googlemail.com
` (5 more replies)
0 siblings, 6 replies; 134+ messages in thread
From: simonschwarzcor at googlemail.com @ 2011-06-28 14:14 UTC (permalink / raw)
To: u-boot
This RFC-patch adds nand_spl support to devkit8000(OMAP3). This is a quick adaption to the nand_spl structure - it is not very consistent because it was initaly written for the spl-structure defined by Aneesh in his OMAP4 SPL patches. I will switch to the new SPL structure as soon as there is a consensus found.
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [1/5]devkit8000 nand_spl: armv7 support nand_spl boot
2011-06-28 14:14 [U-Boot] [0/5]devkit8000 nand_spl support simonschwarzcor at googlemail.com
@ 2011-06-28 14:14 ` simonschwarzcor at googlemail.com
2011-06-29 8:27 ` Andreas Bießmann
2011-06-28 14:14 ` [U-Boot] [2/5]devkit8000 nand_spl: omap3 " simonschwarzcor at googlemail.com
` (4 subsequent siblings)
5 siblings, 1 reply; 134+ messages in thread
From: simonschwarzcor at googlemail.com @ 2011-06-28 14:14 UTC (permalink / raw)
To: u-boot
This adds changes to armv7 files to support NAND_SPL. The execution of lowlevel init is prevented in normal u-boot. No Exeception code in SPL. board_init_f/r are replaced by board_init_spl. Much code is deactivated by defines for the SPL case.
Signed-off-by: Simon Schwarz <schwarz@corscience.de>
--
diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
index d91ae12..ebbfce4 100644
--- a/arch/arm/cpu/armv7/start.S
+++ b/arch/arm/cpu/armv7/start.S
@@ -33,6 +33,11 @@
#include <config.h>
#include <version.h>
+/* prevent lowlevel init if this is not the preloader*/
+#if defined(CONFIG_SPL) && !defined(CONFIG_PRELOADER)
+#define CONFIG_SKIP_LOWLEVEL_INIT
+#endif
+
.globl _start
_start: b reset
ldr pc, _undefined_instruction
@@ -43,6 +48,17 @@ _start: b reset
ldr pc, _irq
ldr pc, _fiq
+#ifdef CONFIG_PRELOADER
+/* If in Preloader don't use interrupts...*/
+_undefined_instruction: .word undefined_instruction
+_software_interrupt: .word _software_interrupt
+_prefetch_abort: .word _prefetch_abort
+_data_abort: .word data_abort
+_not_used: .word _not_used
+_irq: .word _irq
+_fiq: .word _fiq
+_pad: .word 0x12345678 /* now 16*4=64 */
+#else
_undefined_instruction: .word undefined_instruction
_software_interrupt: .word software_interrupt
_prefetch_abort: .word prefetch_abort
@@ -51,6 +67,7 @@ _not_used: .word not_used
_irq: .word irq
_fiq: .word fiq
_pad: .word 0x12345678 /* now 16*4=64 */
+#endif /* CONFIG_PRELOADER */
.global _end_vect
_end_vect:
@@ -85,6 +102,7 @@ _armboot_start:
/*
* These are defined in the board-specific linker script.
*/
+#ifndef CONFIG_PRELOADER
.globl _bss_start_ofs
_bss_start_ofs:
.word __bss_start - _start
@@ -96,6 +114,16 @@ _bss_end_ofs:
.globl _end_ofs
_end_ofs:
.word _end - _start
+#else
+/* preserved the _ofs because although there is no offset */
+.globl _bss_start_ofs
+_bss_start_ofs:
+ .word __bss_start
+
+.globl _bss_end_ofs
+_bss_end_ofs:
+ .word __bss_end__
+#endif
#ifdef CONFIG_USE_IRQ
/* IRQ stack memory (calculated at run-time) */
@@ -153,8 +181,15 @@ next:
/* the mask ROM code should have PLL and others stable */
#ifndef CONFIG_SKIP_LOWLEVEL_INIT
bl cpu_init_crit
-#endif
-
+#endif /* #ifdef CONFIG_PRELOADER */
+
+#ifdef CONFIG_PRELOADER
+call_board_init_spl:
+ ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
+ bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
+ ldr r0,=0x00000000
+ bl board_init_spl
+#else
/* Set stackpointer in internal RAM to call board_init_f */
call_board_init_f:
ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
@@ -182,10 +217,8 @@ stack_setup:
mov sp, r4
adr r0, _start
-#ifndef CONFIG_PRELOADER
cmp r0, r6
beq clear_bss /* skip relocation */
-#endif
mov r1, r6 /* r1 <- scratch for copy_loop */
ldr r3, _bss_start_ofs
add r2, r0, r3 /* r2 <- source end address */
@@ -196,7 +229,6 @@ copy_loop:
cmp r0, r2 /* until source end address [r2] */
blo copy_loop
-#ifndef CONFIG_PRELOADER
/*
* fix .rel.dyn relocations
*/
@@ -248,7 +280,6 @@ clbss_l:str r2, [r0] /* clear loop... */
add r0, r0, #4
cmp r0, r1
bne clbss_l
-#endif /* #ifndef CONFIG_PRELOADER */
/*
* We are done. Do not return, instead branch to second part of board
@@ -265,16 +296,18 @@ jump_2_ram:
/* jump to it ... */
mov pc, lr
-_board_init_r_ofs:
- .word board_init_r - _start
-
_rel_dyn_start_ofs:
- .word __rel_dyn_start - _start
+ .word __rel_dyn_start - _start
_rel_dyn_end_ofs:
- .word __rel_dyn_end - _start
+ .word __rel_dyn_end - _start
_dynsym_start_ofs:
- .word __dynsym_start - _start
+ .word __dynsym_start - _start
+_board_init_r_ofs:
+ .word board_init_r - _start
+#endif /* #ifndef CONFIG_PRELOADER */
+
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
/*************************************************************************
*
* CPU_init_critical registers
@@ -311,6 +344,8 @@ cpu_init_crit:
bl lowlevel_init @ go setup pll,mux,memory
mov lr, ip @ restore link
mov pc, lr @ back to my caller
+#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
+
/*
*************************************************************************
*
@@ -437,6 +472,7 @@ cpu_init_crit:
/*
* exception handlers
*/
+#ifndef CONFIG_PRELOADER
.align 5
undefined_instruction:
get_bad_stack
@@ -499,3 +535,14 @@ fiq:
bl do_fiq
#endif
+#endif /* CONFIG_PRELOADER */
+
+#ifdef CONFIG_PRELOADER
+ .align 5
+undefined_instruction:
+ b undefined_instruction
+
+ .align 5
+data_abort:
+ b data_abort
+#endif
diff --git a/arch/arm/lib/reset.c b/arch/arm/lib/reset.c
index 08e6acb..ad444cb 100644
--- a/arch/arm/lib/reset.c
+++ b/arch/arm/lib/reset.c
@@ -44,8 +44,9 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
puts ("resetting ...\n");
udelay (50000); /* wait 50 ms */
-
+#ifndef CONFIG_PRELOADER
disable_interrupts();
+#endif
reset_cpu(0);
/*NOTREACHED*/
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [2/5]devkit8000 nand_spl: omap3 support nand_spl boot
2011-06-28 14:14 [U-Boot] [0/5]devkit8000 nand_spl support simonschwarzcor at googlemail.com
2011-06-28 14:14 ` [U-Boot] [1/5]devkit8000 nand_spl: armv7 support nand_spl boot simonschwarzcor at googlemail.com
@ 2011-06-28 14:14 ` simonschwarzcor at googlemail.com
2011-06-29 8:43 ` Andreas Bießmann
2011-06-30 10:38 ` Aneesh V
2011-06-28 14:14 ` [U-Boot] [3/5]devkit8000 nand_spl: Add RAM configuration independent of x-loader or CH simonschwarzcor at googlemail.com
` (3 subsequent siblings)
5 siblings, 2 replies; 134+ messages in thread
From: simonschwarzcor at googlemail.com @ 2011-06-28 14:14 UTC (permalink / raw)
To: u-boot
Deactivates caching in SPL. Add call to preloader_console_init for early console output.
Signed-off-by: Simon Schwarz <schwarz@corscience.de>
--
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 6c2a132..bb38289 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -37,6 +37,7 @@
#include <asm/arch/sys_proto.h>
#include <asm/arch/mem.h>
#include <asm/cache.h>
+#include <asm/omap_common.h>
extern omap3_sysinfo sysinfo;
@@ -166,10 +167,15 @@ void s_init(void)
try_unlock_memory();
+#ifdef CONFIG_PRELOADER
+ v7_flush_cache_all();
+#endif
+
/*
* Right now flushing at low MPU speed.
* Need to move after clock init
*/
+#ifndef CONFIG_PRELOADER
invalidate_dcache(get_device_type());
#ifndef CONFIG_ICACHE_OFF
icache_enable();
@@ -187,13 +193,15 @@ void s_init(void)
*/
if (get_device_type() == GP_DEVICE)
setup_auxcr();
-
+#endif /*CONFIG_PRELOADER*/
set_muxconf_regs();
delay(100);
prcm_init();
-
per_clocks_enable();
+#ifdef CONFIG_PRELOADER
+ preloader_console_init();
+#endif
if (!in_sdram)
mem_init();
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
new file mode 100644
index 0000000..375938b
--- /dev/null
+++ b/arch/arm/include/asm/omap_common.h
@@ -0,0 +1,30 @@
+/*
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ *
+ * Aneesh V <aneesh@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#ifndef _OMAP_COMMON_H_
+#define _OMAP_COMMON_H_
+
+void preloader_console_init(void);
+
+#endif /* _OMAP_COMMON_H_ */
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [3/5]devkit8000 nand_spl: Add RAM configuration independent of x-loader or CH
2011-06-28 14:14 [U-Boot] [0/5]devkit8000 nand_spl support simonschwarzcor at googlemail.com
2011-06-28 14:14 ` [U-Boot] [1/5]devkit8000 nand_spl: armv7 support nand_spl boot simonschwarzcor at googlemail.com
2011-06-28 14:14 ` [U-Boot] [2/5]devkit8000 nand_spl: omap3 " simonschwarzcor at googlemail.com
@ 2011-06-28 14:14 ` simonschwarzcor at googlemail.com
2011-06-28 14:14 ` [U-Boot] [4/5]devkit8000 nand_spl: Add SPL NAND support to omap_gpmc driver simonschwarzcor at googlemail.com
` (2 subsequent siblings)
5 siblings, 0 replies; 134+ messages in thread
From: simonschwarzcor at googlemail.com @ 2011-06-28 14:14 UTC (permalink / raw)
To: u-boot
OMAP3 relied on the memory config done by X-loader or Configuration Header. This has to be reworked for the implementation of a SPL. This patch configures RAM bank 0 if CONFIG_PRELOADER is set. Settings for Micron-RAM used by devkit8000 are added to mem.h
Signed-off-by: Simon Schwarz <schwarz@corscience.de>
--
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index 2a7970b..d9e7313 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -8,6 +8,9 @@
* Copyright (C) 2004-2010
* Texas Instruments Incorporated - http://www.ti.com/
*
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
+ *
* Author :
* Vaibhav Hiremath <hvaibhav@ti.com>
*
@@ -36,6 +39,7 @@
#include <asm/io.h>
#include <asm/arch/mem.h>
#include <asm/arch/sys_proto.h>
+#include <asm/utils.h>
DECLARE_GLOBAL_DATA_PTR;
extern omap3_sysinfo sysinfo;
@@ -133,13 +137,38 @@ void do_sdrc_init(u32 cs, u32 early)
sdelay(0x20000);
}
+#ifdef CONFIG_PRELOADER
+ /* If we use a SPL there is no x-loader nor config header so we have
+ * to do the job ourselfs
+ */
+ if (cs == CS0) {
+ sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
+
+ /* General SDRC config */
+ writel(V_MCFG, &sdrc_base->cs[cs].mcfg);
+ writel(V_RFR_CTRL, &sdrc_base->cs[cs].rfr_ctrl);
+
+ /* AC timings */
+ writel(V_ACTIMA_165, &sdrc_actim_base0->ctrla);
+ writel(V_ACTIMB_165, &sdrc_actim_base0->ctrlb);
+
+ /* Initialize */
+ writel(CMD_NOP, &sdrc_base->cs[cs].manual);
+ writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+
+ writel(V_MR, &sdrc_base->cs[cs].mr);
+ }
+#endif
+
/*
* SDRC timings are set up by x-load or config header
* We don't need to redo them here.
* Older x-loads configure only CS0
* configure CS1 to handle this ommission
*/
- if (cs) {
+ if (cs == CS1) {
sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
writel(readl(&sdrc_base->cs[CS0].mcfg),
@@ -163,8 +192,11 @@ void do_sdrc_init(u32 cs, u32 early)
* Test ram in this bank
* Disable if bad or not present
*/
- if (!mem_ok(cs))
+ if (!mem_ok(cs)) {
+ spl_debug("RAM test: FAILED!\n");
writel(0, &sdrc_base->cs[cs].mcfg);
+ }
+ spl_debug("RAM test: PASSED!\n");
}
/*
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
index f165949..8b39745 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -128,6 +128,33 @@ enum {
(MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) | \
(MICRON_TWTR_165 << 16))
+#define MICRON_RAMTYPE 0x1
+#define MICRON_DDRTYPE 0x0
+#define MICRON_DEEPPD 0x1
+#define MICRON_B32NOT16 0x1
+#define MICRON_BANKALLOCATION 0x2
+#define MICRON_RAMSIZE ((PHYS_SDRAM_1_SIZE/(1024*1024))/2)
+#define MICRON_ADDRMUXLEGACY 0x1
+#define MICRON_CASWIDTH 0x5
+#define MICRON_RASWIDTH 0x2
+#define MICRON_LOCKSTATUS 0x0
+#define MICRON_V_MCFG ((MICRON_LOCKSTATUS << 30) | (MICRON_RASWIDTH << 24) | \
+ (MICRON_CASWIDTH << 20) | (MICRON_ADDRMUXLEGACY << 19) | \
+ (MICRON_RAMSIZE << 8) | (MICRON_BANKALLOCATION << 6) | \
+ (MICRON_B32NOT16 << 4) | (MICRON_DEEPPD << 3) | \
+ (MICRON_DDRTYPE << 2) | (MICRON_RAMTYPE))
+
+#define MICRON_ARCV 2030
+#define MICRON_ARE 0x1
+#define MICRON_V_RFR_CTRL ((MICRON_ARCV << 8) | (MICRON_ARE))
+
+#define MICRON_BL 0x2
+#define MICRON_SIL 0x0
+#define MICRON_CASL 0x3
+#define MICRON_WBST 0x0
+#define MICRON_V_MR ((MICRON_WBST << 9) | (MICRON_CASL << 4) | \
+ (MICRON_SIL << 3) | (MICRON_BL))
+
/*
* NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns
* ACTIMA
@@ -171,10 +198,15 @@ enum {
#define V_ACTIMA_165 INFINEON_V_ACTIMA_165
#define V_ACTIMB_165 INFINEON_V_ACTIMB_165
#endif
+
#ifdef CONFIG_OMAP3_MICRON_DDR
-#define V_ACTIMA_165 MICRON_V_ACTIMA_165
-#define V_ACTIMB_165 MICRON_V_ACTIMB_165
+#define V_ACTIMA_165 MICRON_V_ACTIMA_165
+#define V_ACTIMB_165 MICRON_V_ACTIMB_165
+#define V_MCFG MICRON_V_MCFG
+#define V_RFR_CTRL MICRON_V_RFR_CTRL
+#define V_MR MICRON_V_MR
#endif
+
#ifdef CONFIG_OMAP3_NUMONYX_DDR
#define V_ACTIMA_165 NUMONYX_V_ACTIMA_165
#define V_ACTIMB_165 NUMONYX_V_ACTIMB_165
@@ -184,6 +216,10 @@ enum {
#error "Please choose the right DDR type in config header"
#endif
+#if defined(CONFIG_PRELOADER) && (!defined(V_MCFG) || !defined(V_RFR_CTRL))
+#error "Please choose the right DDR type in config header"
+#endif
+
/*
* GPMC settings -
* Definitions is as per the following format
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [4/5]devkit8000 nand_spl: Add SPL NAND support to omap_gpmc driver
2011-06-28 14:14 [U-Boot] [0/5]devkit8000 nand_spl support simonschwarzcor at googlemail.com
` (2 preceding siblings ...)
2011-06-28 14:14 ` [U-Boot] [3/5]devkit8000 nand_spl: Add RAM configuration independent of x-loader or CH simonschwarzcor at googlemail.com
@ 2011-06-28 14:14 ` simonschwarzcor at googlemail.com
2011-06-29 8:58 ` Andreas Bießmann
2011-06-28 14:14 ` [U-Boot] [5/5]devkit8000 nand_spl: add nand_spl support simonschwarzcor at googlemail.com
2011-07-25 18:05 ` [U-Boot] [PATCH V2 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
5 siblings, 1 reply; 134+ messages in thread
From: simonschwarzcor at googlemail.com @ 2011-06-28 14:14 UTC (permalink / raw)
To: u-boot
Add support for NAND_SPL to omap gpmc driver. This means adding nand_read_buf16 to read from GPMC 32bit buffer (16 here means 16bit bus!) and adding omap_dev_ready as indicator if the GPMC is ready.
Signed-off-by: Simon Schwarz <schwarz@corscience.de>
--
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 99b9cef..7dfb05d 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -29,6 +29,9 @@
#include <linux/mtd/nand_ecc.h>
#include <nand.h>
+
+#define GPMC_WAIT0_PIN_ACTIVE (1 << 8)
+
static uint8_t cs;
static struct nand_ecclayout hw_nand_oob = GPMC_NAND_HW_ECC_LAYOUT;
@@ -61,6 +64,37 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
writeb(cmd, this->IO_ADDR_W);
}
+/* Check wait pin as dev ready indicator */
+int omap_dev_ready(struct mtd_info *mtd)
+{
+ return gpmc_cfg->status & GPMC_WAIT0_PIN_ACTIVE;
+}
+
+#ifdef CONFIG_PRELOADER
+
+/**
+ * nand_read_buf16 - [DEFAULT] read chip data into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ * Default read function for 16bit buswith
+ *
+ * This function is based on nand_read_buf16 from nand_base.c. This version
+ * reads 32bit not 16bit although the bus only has 16bit.
+ */
+static void gpmc_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+ int i;
+ struct nand_chip *chip = mtd->priv;
+ u32 *p = (u32 *) buf;
+ len >>= 2;
+
+ for (i = 0; i < len; i++)
+ p[i] = readl(chip->IO_ADDR_R);
+}
+#endif
+
/*
* omap_hwecc_init - Initialize the Hardware ECC for NAND flash in
* GPMC controller
@@ -278,7 +312,9 @@ void omap_nand_switch_ecc(int32_t hardware)
/* Update NAND handling after ECC mode switch */
nand_scan_tail(mtd);
+ #ifndef CONFIG_SPL
nand->options &= ~NAND_OWN_BUFFERS;
+ #endif
}
/*
@@ -337,8 +373,23 @@ int board_nand_init(struct nand_chip *nand)
nand->options |= NAND_BUSWIDTH_16;
nand->chip_delay = 100;
+ nand->dev_ready = omap_dev_ready;
/* Default ECC mode */
+#ifndef CONFIG_PRELOADER
nand->ecc.mode = NAND_ECC_SOFT;
+#else
+ nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.layout = &hw_nand_oob;
+ nand->ecc.size = 512;
+ nand->ecc.bytes = 24;
+ nand->ecc.hwctl = omap_enable_hwecc;
+ nand->ecc.correct = omap_correct_data;
+ nand->ecc.calculate = omap_calculate_ecc;
+ nand->read_buf = gpmc_read_buf16;
+ omap_hwecc_init(nand);
+#endif
return 0;
}
+
+
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [5/5]devkit8000 nand_spl: add nand_spl support
2011-06-28 14:14 [U-Boot] [0/5]devkit8000 nand_spl support simonschwarzcor at googlemail.com
` (3 preceding siblings ...)
2011-06-28 14:14 ` [U-Boot] [4/5]devkit8000 nand_spl: Add SPL NAND support to omap_gpmc driver simonschwarzcor at googlemail.com
@ 2011-06-28 14:14 ` simonschwarzcor at googlemail.com
2011-06-28 15:01 ` Andreas Bießmann
2011-07-25 18:05 ` [U-Boot] [PATCH V2 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
5 siblings, 1 reply; 134+ messages in thread
From: simonschwarzcor at googlemail.com @ 2011-06-28 14:14 UTC (permalink / raw)
To: u-boot
Adds the board config for devkit8000 nand_spl. Adds SPL specific defines to board configuration. Adds the nand_spl Makefile for devkit8000. Adds the main spl implementation to nand_spl including early console init. Adds nand_spl linker script.
Signed-off-by: Simon Schwarz <schwarz@corscience.de>
--
diff --git a/boards.cfg b/boards.cfg
index dfefc3f..bdc4136 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -74,15 +74,6 @@ omap1510inn arm arm925t - ti
aspenite arm arm926ejs - Marvell armada100
afeb9260 arm arm926ejs - - at91
at91cap9adk arm arm926ejs - atmel at91
-at91sam9260ek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_NANDFLASH
-at91sam9260ek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS0
-at91sam9260ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS1
-at91sam9g20ek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_NANDFLASH
-at91sam9g20ek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS0
-at91sam9g20ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS1
-at91sam9xeek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH
-at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0
-at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1
snapper9260 arm arm926ejs - bluewater at91 snapper9260:AT91SAM9260
snapper9g20 arm arm926ejs snapper9260 bluewater at91 snapper9260:AT91SAM9G20
cpu9260 arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260
@@ -117,7 +108,7 @@ davinci_sffsdr arm arm926ejs sffsdr davinci
davinci_sonata arm arm926ejs sonata davinci davinci
suen3 arm arm926ejs km_arm keymile kirkwood
suen8 arm arm926ejs km_arm keymile kirkwood
-mgcoge3un arm arm926ejs km_arm keymile kirkwood
+mgcoge2un arm arm926ejs km_arm keymile kirkwood
guruplug arm arm926ejs - Marvell kirkwood
mv88f6281gtw_ge arm arm926ejs - Marvell kirkwood
openrd_base arm arm926ejs openrd Marvell kirkwood openrd:BOARD_IS_OPENRD_BASE
@@ -135,12 +126,10 @@ omap5912osk arm arm926ejs - ti
edminiv2 arm arm926ejs - LaCie orion5x
dkb arm arm926ejs - Marvell pantheon
ca9x4_ct_vxp arm armv7 vexpress armltd
-efikamx arm armv7 efikamx - mx5 mx51evk:IMX_CONFIG=board/efikamx/imximage.cfg
+efikamx arm armv7 efikamx - mx5
mx51evk arm armv7 mx51evk freescale mx5 mx51evk:IMX_CONFIG=board/freescale/mx51evk/imximage.cfg
mx53evk arm armv7 mx53evk freescale mx5 mx53evk:IMX_CONFIG=board/freescale/mx53evk/imximage.cfg
-mx53loco arm armv7 mx53loco freescale mx5 mx53loco:IMX_CONFIG=board/freescale/mx53loco/imximage.cfg
-mx53smd arm armv7 mx53smd freescale mx5 mx53smd:IMX_CONFIG=board/freescale/mx53smd/imximage.cfg
-vision2 arm armv7 vision2 ttcontrol mx5 vision2:IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg
+vision2 arm armv7 vision2 ttcontrol mx5
cm_t35 arm armv7 cm_t35 - omap3
omap3_overo arm armv7 overo - omap3
omap3_pandora arm armv7 pandora - omap3
@@ -155,25 +144,20 @@ omap3_beagle arm armv7 beagle ti
omap3_evm arm armv7 evm ti omap3
omap3_sdp3430 arm armv7 sdp3430 ti omap3
devkit8000 arm armv7 devkit8000 timll omap3
+devkit8000_nand arm armv7 devkit8000 timll omap3 devkit8000:NAND_U_BOOT
omap4_panda arm armv7 panda ti omap4
omap4_sdp4430 arm armv7 sdp4430 ti omap4
s5p_goni arm armv7 goni samsung s5pc1xx
smdkc100 arm armv7 smdkc100 samsung s5pc1xx
s5pc210_universal arm armv7 universal_c210 samsung s5pc2xx
-smdkv310 arm armv7 smdkv310 samsung s5pc2xx
harmony arm armv7 harmony nvidia tegra2
seaboard arm armv7 seaboard nvidia tegra2
-u8500_href arm armv7 u8500 st-ericsson u8500
-actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2
-actux1_8_16 arm ixp actux1 - - actux1:FLASH1X8
-actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB
-actux1_8_32 arm ixp actux1 - - actux1:FLASH1X8,RAM_32MB
+actux1 arm ixp
actux2 arm ixp
actux3 arm ixp
actux4 arm ixp
-dvlhost arm ixp
ixdp425 arm ixp
-ixdpg425 arm ixp ixdp425
+ixdpg425 arm ixp
lpd7a400 arm lh7a40x lpd7a40x
lpd7a404 arm lh7a40x lpd7a40x
balloon3 arm pxa
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 125c690..b3e8d6e 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -44,7 +44,6 @@
#include <asm/arch/cpu.h> /* get chip and board defs */
#include <asm/arch/omap3.h>
-
/* Display CPU and Board information */
#define CONFIG_DISPLAY_CPUINFO 1
#define CONFIG_DISPLAY_BOARDINFO 1
@@ -68,6 +67,16 @@
/* Sector */
#define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SYS_SPL_TEXT_BASE CONFIG_SYS_SRAM_START
+#define CONFIG_SYS_SPL_MAX_SIZE 0x7800 /* 30 K */
+#define CONFIG_SYS_SPL_STACK LOW_LEVEL_SRAM_STACK
+
+/* SRAM config */
+#define CONFIG_SYS_SRAM_START 0x40200000
+#define CONFIG_SYS_SRAM_SIZE 0xFFFF /*64 kB*/
+
/* Hardware drivers */
/* DDR - I use Micron DDR */
@@ -132,6 +141,7 @@
#define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
/* to access nand@*/
/* CS0 */
+
#define GPMC_NAND_ECC_LP_x16_LAYOUT 1
#define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
@@ -144,6 +154,29 @@
#define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
/* partition */
+/* NAND boot config */
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+ 10, 11, 12, 13}
+
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 3
+
+#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
+ CONFIG_SYS_NAND_ECCSIZE)
+#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
+ CONFIG_SYS_NAND_ECCSTEPS)
+
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000 /* Adjust for speed */
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+
/* commands to include */
#include <config_cmd_default.h>
@@ -282,9 +315,9 @@
#endif
/* Physical Memory Map */
-#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
+#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
#define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_1_SIZE (128 << 20) /* at least 128 MiB */
+#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) /* at least 128 MiB */
#define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
/* SDRAM Bank Allocation method */
diff --git a/nand_spl/board/timll/devkit8000/Makefile b/nand_spl/board/timll/devkit8000/Makefile
new file mode 100644
index 0000000..981038b
--- /dev/null
+++ b/nand_spl/board/timll/devkit8000/Makefile
@@ -0,0 +1,274 @@
+# (C) Copyright 2000, 2001, 2002
+# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
+#
+# (C) Copyright 2009
+# Frederik Kriewitz <frederik@kriewitz.eu>
+#
+# (C) Copyright 2011
+# Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+
+include $(TOPDIR)/config.mk
+
+splobj = $(OBJTREE)/nand_spl/
+
+#This replaces the variables with defines from the config file
+LDSCRIPT_SOURCE = $(TOPDIR)/nand_spl/board/$(BOARDDIR)/u-boot.lds
+LDSCRIPT = $(splobj)u-boot-spl-generated.lds
+LDPPFLAGS += -include $(TOPDIR)/include/config.h
+${LDSCRIPT}: ${LDSCRIPT_SOURCE}
+ $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
+
+LDFLAGS += -Bstatic -T $(LDSCRIPT) $(PLATFORM_LDFLAGS) --gc-sections
+
+SOBJS := start.o lowlevel_init.o cache.o reset.o
+
+COBJS := ns16550.o devkit8000.o clock.o mem.o sdrc.o \
+ syslib.o eabi_compat.o vsprintf.o \
+ stdio.o dlmalloc.o string.o console.o ctype.o div64.o \
+ div0.o gpio.o serial.o \
+ spl-devkit8000.o sys_info.o time.o omap24xx_i2c.o \
+ timer.o board.o nand_util.o nand.o omap_gpmc.o \
+ lib_reset.o nand_boot.o nand_base.o
+
+AFLAGS += -DCONFIG_PRELOADER -DDEBUG
+CFLAGS += -DCONFIG_PRELOADER -ffunction-sections -fdata-sections \
+ -march=armv5 -DDEBUG -fno-short-enums
+
+PLATFORM_LIBGCC = -L $(shell dirname `$(CC) $(CFLAGS) \
+ -print-libgcc-file-name`) -lgcc
+
+SRCS := $(COBJS:.o=.c)
+OBJS := $(addprefix $(obj),$(COBJS)) $(addprefix $(obj), $(SOBJS))
+__OBJS := $(COBJS) $(SOBJS)
+LNDIR := $(splobj)board/$(BOARDDIR)
+
+#ALL = $(splobj)u-boot-nand $(splobj)u-boot-nand.bin
+
+### targets
+ALL = $(splobj)u-boot-spl $(splobj)u-boot-spl.bin $(splobj)u-boot-spl-16k.bin
+all: $(obj).depend $(ALL)
+
+$(splobj)u-boot-spl: $(OBJS) $(LDSCRIPT)
+ cd $(LNDIR) && $(LD) $(LDFLAGS) $(OBJS) \
+ $(PLATFORM_LIBGCC) \
+ -Map $(splobj)u-boot-spl.map \
+ -o $(splobj)u-boot-spl
+
+#XXX: not really needed for devkit
+$(splobj)u-boot-spl-16k.bin: $(splobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} --pad-to=$(PAD_TO) -O binary $< $@
+
+$(splobj)u-boot-spl.bin: $(splobj)u-boot-spl
+ $(OBJCOPY) ${OBJCFLAGS} -O binary $< $@
+
+$(splobj)u-boot.lds: $(LDSCRIPT)
+ $(CPP) $(CPPFLAGS) $(LDPPFLAGS) -ansi -D__ASSEMBLY__ -P - <$^ >$@
+
+$(obj)%.o: $(obj)%.S
+ $(CC) $(AFLAGS) -c -o $@ $<
+
+$(obj)%.o: $(obj)%.c
+ $(CC) $(CFLAGS) -c -o $@ $<
+
+clean:
+ rm -f $(OBJS)
+
+distclean: clean
+ rm -f $(LIB) core *.bak $(obj).depend
+
+### Link-in targets
+$(obj)start.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/start.S $@
+
+$(obj)board.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/board.c $@
+
+$(obj)lowlevel_init.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/lowlevel_init.S $@
+
+$(obj)devkit8000.c: $(obj)devkit8000.h
+ @rm -f $@
+ ln -s $(SRCTREE)/board/timll/devkit8000/devkit8000.c $@
+
+$(obj)devkit8000.h:
+ @rm -f $@
+ ln -s $(SRCTREE)/board/timll/devkit8000/devkit8000.h $@
+
+$(obj)clock.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/clock.c $@
+
+$(obj)mem.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/mem.c $@
+
+$(obj)sdrc.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/sdrc.c $@
+
+$(obj)sys_info.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/sys_info.c $@
+
+$(obj)syslib.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/syslib.c $@
+
+$(obj)eabi_compat.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/lib/eabi_compat.c $@
+
+$(obj)stdio.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/common/stdio.c $@
+
+$(obj)dlmalloc.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/common/dlmalloc.c $@
+
+$(obj)string.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/lib/string.c $@
+
+$(obj)console.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/common/console.c $@
+
+$(obj)ctype.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/lib/ctype.c $@
+
+$(obj)div64.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/lib/div64.c $@
+
+$(obj)div0.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/lib/div0.c $@
+
+#$(obj)serial.c:
+# @rm -f $@
+# ln -s $(SRCTREE)/common/serial.c $@
+
+$(obj)_divsi3.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/lib/_divsi3.S $@
+
+$(obj)_lshrdi3.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/lib/_lshrdi3.S $@
+
+$(obj)_udivsi3.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/lib/_udivsi3.S $@
+
+$(obj)cache.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/cache.S $@
+
+$(obj)vsprintf.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/lib/vsprintf.c $@
+
+$(obj)gpio.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap3/gpio.c $@
+
+$(obj)ns16550.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/serial/ns16550.c $@
+
+$(obj)serial.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/serial/serial.c $@
+
+$(obj)time.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/lib/time.c $@
+
+$(obj)omap24xx_i2c.c:omap24xx_i2c.h
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/i2c/omap24xx_i2c.c $@
+
+$(obj)omap24xx_i2c.h:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/i2c/omap24xx_i2c.h $@
+
+$(obj)reset.S:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap-common/reset.S $@
+
+$(obj)timer.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/cpu/armv7/omap-common/timer.c $@
+
+$(obj)nand_util.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/nand/nand_util.c $@
+
+$(obj)nand.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/nand/nand.c $@
+
+$(obj)omap_gpmc.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/nand/omap_gpmc.c $@
+
+$(obj)nand_base.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/nand/nand_base.c $@
+
+$(obj)nand_ids.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/nand/nand_ids.c $@
+
+$(obj)nand_bbt.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/nand/nand_bbt.c $@
+
+$(obj)nand_ecc.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/nand/nand_ecc.c $@
+
+$(obj)mtdcore.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/drivers/mtd/mtdcore.c $@
+
+$(obj)lib_reset.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/arch/arm/lib/reset.c $@
+
+$(obj)nand_boot.c:
+ @rm -f $@
+ ln -s $(SRCTREE)/nand_spl/nand_boot.c $@
+
+#########################################################################
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#########################################################################
diff --git a/nand_spl/board/timll/devkit8000/spl-devkit8000.c b/nand_spl/board/timll/devkit8000/spl-devkit8000.c
new file mode 100644
index 0000000..8d386ea
--- /dev/null
+++ b/nand_spl/board/timll/devkit8000/spl-devkit8000.c
@@ -0,0 +1,97 @@
+/*
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ *
+ * Aneesh V <aneesh@ti.com>
+ *
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+/* This file is based on the spl-omap.c by Aneesh V
+ * Patch Message-ID: 1305472900-4004-2-git-send-email-aneesh at ti.com
+ * This is the implementation for the OMAP3 platform.
+ */
+
+#include <common.h>
+#include <asm/io.h>
+#include <asm/u-boot.h>
+#include <asm/utils.h>
+#include <asm/arch/sys_proto.h>
+#include <timestamp_autogenerated.h>
+#include <version_autogenerated.h>
+#include <asm/arch/mem.h>
+#include <image.h>
+#include <nand.h>
+
+/* Define global data structure pointer to it*/
+gd_t gdata __attribute__ ((section(".data")));
+bd_t bdata __attribute__ ((section(".data")));
+gd_t *gd = &gdata;
+
+typedef void (*u_boot_entry_t)(void)__attribute__ ((noreturn));
+
+/* C-Reimplementation of clear_bss of start.S. It initializes the
+ * bss section with 0x0 after the SDRAM was configured
+ */
+void clear_bss_spl(void)
+{
+ __u32 *i;
+ spl_debug(">>spl:clear_bss_spl()\n");
+ /* get bss linker symbols into C */
+ for (i = (__u32 *)(_bss_start_ofs); i <= (__u32 *)(_bss_end_ofs); i++)
+ *i = (__u32)0x00000000;
+ spl_debug("<<spl:clear_bss_spl()\n");
+}
+
+/* This replaces board_init_f/r for the SPL */
+void board_init_spl(ulong dummy)
+{
+ debug(">>board_init_f()\n");
+ clear_bss_spl(); /* SSBM XXX: if not necessary delete for speed */
+ gpmc_init();
+ nand_boot();
+ debug("<<board_init_f()\n");
+}
+
+inline void hang(void)
+{
+ puts("### ERROR ### Please RESET the board ###\n");
+ for (;;)
+ ;
+}
+
+void preloader_console_init(void)
+{
+ /* Set r8 to gd */
+ asm("ldr r8, [%0]" : : "r" (&gd) : "r8");
+ gd->bd = &bdata;
+ gd->flags |= GD_FLG_RELOC;
+ gd->baudrate = CONFIG_BAUDRATE;
+
+ serial_init(); /* serial communications setup */
+
+ printf("\nU-Boot SPL (compiled %s - %s)\n", U_BOOT_DATE,
+ U_BOOT_TIME);
+}
+
+
diff --git a/nand_spl/board/timll/devkit8000/u-boot.lds b/nand_spl/board/timll/devkit8000/u-boot.lds
new file mode 100644
index 0000000..24c9435
--- /dev/null
+++ b/nand_spl/board/timll/devkit8000/u-boot.lds
@@ -0,0 +1,60 @@
+/*
+ * (C) Copyright 2002
+ * Gary Jennejohn, DENX Software Engineering, <garyj@denx.de>
+ *
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ * Aneesh V <aneesh@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+MEMORY { .sram : ORIGIN = CONFIG_SYS_SRAM_START, LENGTH = CONFIG_SYS_SPL_MAX_SIZE }
+MEMORY { .sdram : ORIGIN = PHYS_SDRAM_1, LENGTH = PHYS_SDRAM_1_SIZE }
+
+OUTPUT_FORMAT("elf32-littlearm", "elf32-littlearm", "elf32-littlearm")
+OUTPUT_ARCH(arm)
+ENTRY(_start)
+SECTIONS
+{
+ .text :
+ {
+ __start = .;
+ start.o (.text)
+ *(.text*)
+ } >.sram
+
+ . = ALIGN(4);
+ .rodata : { *(SORT_BY_ALIGNMENT(.rodata*)) } >.sram
+
+ . = ALIGN(4);
+ .data : { *(SORT_BY_ALIGNMENT(.data*)) } >.sram
+ . = ALIGN(4);
+ __image_copy_end = .;
+ _end = .;
+
+ .bss :
+ {
+ . = ALIGN(4);
+ __bss_start = .;
+ *(.bss*)
+ . = ALIGN(4);
+ __bss_end__ = .;
+ } >.sdram
+}
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [5/5]devkit8000 nand_spl: add nand_spl support
2011-06-28 14:14 ` [U-Boot] [5/5]devkit8000 nand_spl: add nand_spl support simonschwarzcor at googlemail.com
@ 2011-06-28 15:01 ` Andreas Bießmann
0 siblings, 0 replies; 134+ messages in thread
From: Andreas Bießmann @ 2011-06-28 15:01 UTC (permalink / raw)
To: u-boot
Dear Simon Schwarz,
Am 28.06.2011 16:14, schrieb simonschwarzcor at googlemail.com:
<snip long line>
> Signed-off-by: Simon Schwarz <schwarz@corscience.de>
> --
>
> diff --git a/boards.cfg b/boards.cfg
> index dfefc3f..bdc4136 100644
> --- a/boards.cfg
> +++ b/boards.cfg
> @@ -74,15 +74,6 @@ omap1510inn arm arm925t - ti
> aspenite arm arm926ejs - Marvell armada100
> afeb9260 arm arm926ejs - - at91
> at91cap9adk arm arm926ejs - atmel at91
> -at91sam9260ek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_NANDFLASH
> -at91sam9260ek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS0
> -at91sam9260ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9260,SYS_USE_DATAFLASH_CS1
> -at91sam9g20ek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_NANDFLASH
> -at91sam9g20ek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS0
> -at91sam9g20ek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9G20,SYS_USE_DATAFLASH_CS1
> -at91sam9xeek_nandflash arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_NANDFLASH
> -at91sam9xeek_dataflash_cs0 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS0
> -at91sam9xeek_dataflash_cs1 arm arm926ejs at91sam9260ek atmel at91 at91sam9260ek:AT91SAM9XE,SYS_USE_DATAFLASH_CS1
don't touch this ..
> snapper9260 arm arm926ejs - bluewater at91 snapper9260:AT91SAM9260
> snapper9g20 arm arm926ejs snapper9260 bluewater at91 snapper9260:AT91SAM9G20
> cpu9260 arm arm926ejs cpu9260 eukrea at91 cpu9260:CPU9260
> @@ -117,7 +108,7 @@ davinci_sffsdr arm arm926ejs sffsdr davinci
> davinci_sonata arm arm926ejs sonata davinci davinci
> suen3 arm arm926ejs km_arm keymile kirkwood
> suen8 arm arm926ejs km_arm keymile kirkwood
> -mgcoge3un arm arm926ejs km_arm keymile kirkwood
> +mgcoge2un arm arm926ejs km_arm keymile kirkwood
and that .. and some more places
> guruplug arm arm926ejs - Marvell kirkwood
> mv88f6281gtw_ge arm arm926ejs - Marvell kirkwood
> openrd_base arm arm926ejs openrd Marvell kirkwood openrd:BOARD_IS_OPENRD_BASE
> @@ -135,12 +126,10 @@ omap5912osk arm arm926ejs - ti
> edminiv2 arm arm926ejs - LaCie orion5x
> dkb arm arm926ejs - Marvell pantheon
> ca9x4_ct_vxp arm armv7 vexpress armltd
> -efikamx arm armv7 efikamx - mx5 mx51evk:IMX_CONFIG=board/efikamx/imximage.cfg
> +efikamx arm armv7 efikamx - mx5
> mx51evk arm armv7 mx51evk freescale mx5 mx51evk:IMX_CONFIG=board/freescale/mx51evk/imximage.cfg
> mx53evk arm armv7 mx53evk freescale mx5 mx53evk:IMX_CONFIG=board/freescale/mx53evk/imximage.cfg
> -mx53loco arm armv7 mx53loco freescale mx5 mx53loco:IMX_CONFIG=board/freescale/mx53loco/imximage.cfg
> -mx53smd arm armv7 mx53smd freescale mx5 mx53smd:IMX_CONFIG=board/freescale/mx53smd/imximage.cfg
> -vision2 arm armv7 vision2 ttcontrol mx5 vision2:IMX_CONFIG=board/ttcontrol/vision2/imximage_hynix.cfg
> +vision2 arm armv7 vision2 ttcontrol mx5
> cm_t35 arm armv7 cm_t35 - omap3
> omap3_overo arm armv7 overo - omap3
> omap3_pandora arm armv7 pandora - omap3
> @@ -155,25 +144,20 @@ omap3_beagle arm armv7 beagle ti
> omap3_evm arm armv7 evm ti omap3
> omap3_sdp3430 arm armv7 sdp3430 ti omap3
> devkit8000 arm armv7 devkit8000 timll omap3
> +devkit8000_nand arm armv7 devkit8000 timll omap3 devkit8000:NAND_U_BOOT
> omap4_panda arm armv7 panda ti omap4
> omap4_sdp4430 arm armv7 sdp4430 ti omap4
> s5p_goni arm armv7 goni samsung s5pc1xx
> smdkc100 arm armv7 smdkc100 samsung s5pc1xx
> s5pc210_universal arm armv7 universal_c210 samsung s5pc2xx
> -smdkv310 arm armv7 smdkv310 samsung s5pc2xx
> harmony arm armv7 harmony nvidia tegra2
> seaboard arm armv7 seaboard nvidia tegra2
> -u8500_href arm armv7 u8500 st-ericsson u8500
> -actux1_4_16 arm ixp actux1 - - actux1:FLASH2X2
> -actux1_8_16 arm ixp actux1 - - actux1:FLASH1X8
> -actux1_4_32 arm ixp actux1 - - actux1:FLASH2X2,RAM_32MB
> -actux1_8_32 arm ixp actux1 - - actux1:FLASH1X8,RAM_32MB
> +actux1 arm ixp
> actux2 arm ixp
> actux3 arm ixp
> actux4 arm ixp
> -dvlhost arm ixp
> ixdp425 arm ixp
> -ixdpg425 arm ixp ixdp425
> +ixdpg425 arm ixp
> lpd7a400 arm lh7a40x lpd7a40x
> lpd7a404 arm lh7a40x lpd7a40x
> balloon3 arm pxa
> diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
> index 125c690..b3e8d6e 100644
> --- a/include/configs/devkit8000.h
> +++ b/include/configs/devkit8000.h
> @@ -44,7 +44,6 @@
>
> #include <asm/arch/cpu.h> /* get chip and board defs */
> #include <asm/arch/omap3.h>
> -
this line was intentionally there
> /* Display CPU and Board information */
> #define CONFIG_DISPLAY_CPUINFO 1
> #define CONFIG_DISPLAY_BOARDINFO 1
> @@ -68,6 +67,16 @@
> /* Sector */
> #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10))
>
don't you need some guards here, e.g. #ifdef CONFIG_NAND_U_BOOT?
> +/* Defines for SPL */
> +#define CONFIG_SPL
> +#define CONFIG_SYS_SPL_TEXT_BASE CONFIG_SYS_SRAM_START
> +#define CONFIG_SYS_SPL_MAX_SIZE 0x7800 /* 30 K */
> +#define CONFIG_SYS_SPL_STACK LOW_LEVEL_SRAM_STACK
> +
well, this is SoC dependent, isn't it? -> move to some SoC header?
> +/* SRAM config */
> +#define CONFIG_SYS_SRAM_START 0x40200000
> +#define CONFIG_SYS_SRAM_SIZE 0xFFFF /*64 kB*/
> +
> /* Hardware drivers */
>
> /* DDR - I use Micron DDR */
> @@ -132,6 +141,7 @@
> #define CONFIG_SYS_NAND_BASE NAND_BASE /* physical address */
> /* to access nand at */
> /* CS0 */
> +
don't add empty lines
> #define GPMC_NAND_ECC_LP_x16_LAYOUT 1
>
> #define CONFIG_SYS_MAX_NAND_DEVICE 1 /* Max number of NAND */
> @@ -144,6 +154,29 @@
> #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */
> /* partition */
>
don't you need some guards here, e.g. #ifdef CONFIG_NAND_U_BOOT?
> +/* NAND boot config */
> +#define CONFIG_SYS_NAND_PAGE_COUNT 64
> +#define CONFIG_SYS_NAND_PAGE_SIZE 2048
> +#define CONFIG_SYS_NAND_OOBSIZE 64
> +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
> +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
> +#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
> + 10, 11, 12, 13}
> +
> +#define CONFIG_SYS_NAND_ECCSIZE 512
> +#define CONFIG_SYS_NAND_ECCBYTES 3
> +
> +#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
> + CONFIG_SYS_NAND_ECCSIZE)
> +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
> + CONFIG_SYS_NAND_ECCSTEPS)
> +
> +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
> +
> +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
> +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000 /* Adjust for speed */
> +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
> +
> /* commands to include */
> #include <config_cmd_default.h>
>
> @@ -282,9 +315,9 @@
> #endif
>
> /* Physical Memory Map */
> -#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
> +#define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */
> #define PHYS_SDRAM_1 OMAP34XX_SDRC_CS0
why this next change?
> -#define PHYS_SDRAM_1_SIZE (128 << 20) /*@least 128 MiB */
> +#define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) /* at least 128 MiB */
> #define PHYS_SDRAM_2 OMAP34XX_SDRC_CS1
>
> /* SDRAM Bank Allocation method */
> diff --git a/nand_spl/board/timll/devkit8000/Makefile b/nand_spl/board/timll/devkit8000/Makefile
<snip nand_spl/board/timll/devkit8000/Makefile>
nand_spl Makefile seemed ok to me; there is an ongoing discussion, it
would be fine if (when the discussion comes to an conclusion soon) you
use the new structure here.
> diff --git a/nand_spl/board/timll/devkit8000/spl-devkit8000.c b/nand_spl/board/timll/devkit8000/spl-devkit8000.c
> new file mode 100644
> index 0000000..8d386ea
> --- /dev/null
> +++ b/nand_spl/board/timll/devkit8000/spl-devkit8000.c
> @@ -0,0 +1,97 @@
> +/*
> + *
> + * (C) Copyright 2010
> + * Texas Instruments, <www.ti.com>
> + *
> + * Aneesh V <aneesh@ti.com>
> + *
> + * Copyright (C) 2011
> + * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
> + *
> + * See file CREDITS for list of people who contributed to this
> + * project.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License as
> + * published by the Free Software Foundation; either version 2 of
> + * the License, or (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + *
> + * You should have received a copy of the GNU General Public License
> + * along with this program; if not, write to the Free Software
> + * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
> + * MA 02111-1307 USA
> + */
> +
> +/* This file is based on the spl-omap.c by Aneesh V
> + * Patch Message-ID: 1305472900-4004-2-git-send-email-aneesh at ti.com
> + * This is the implementation for the OMAP3 platform.
> + */
> +
> +#include <common.h>
> +#include <asm/io.h>
> +#include <asm/u-boot.h>
> +#include <asm/utils.h>
> +#include <asm/arch/sys_proto.h>
> +#include <timestamp_autogenerated.h>
> +#include <version_autogenerated.h>
> +#include <asm/arch/mem.h>
> +#include <image.h>
> +#include <nand.h>
> +
> +/* Define global data structure pointer to it*/
> +gd_t gdata __attribute__ ((section(".data")));
> +bd_t bdata __attribute__ ((section(".data")));
> +gd_t *gd = &gdata;
> +
> +typedef void (*u_boot_entry_t)(void)__attribute__ ((noreturn));
> +
> +/* C-Reimplementation of clear_bss of start.S. It initializes the
> + * bss section with 0x0 after the SDRAM was configured
> + */
> +void clear_bss_spl(void)
> +{
> + __u32 *i;
> + spl_debug(">>spl:clear_bss_spl()\n");
> + /* get bss linker symbols into C */
> + for (i = (__u32 *)(_bss_start_ofs); i <= (__u32 *)(_bss_end_ofs); i++)
> + *i = (__u32)0x00000000;
> + spl_debug("<<spl:clear_bss_spl()\n");
> +}
clear_bss_spl could/should be done in start.S, this will be required for
all omap3 devices using spl. (BTW: it is already implemented as void
clear_bss(void), just call that function later on could be another
solution).
> +/* This replaces board_init_f/r for the SPL */
> +void board_init_spl(ulong dummy)
> +{
> + debug(">>board_init_f()\n");
> + clear_bss_spl(); /* SSBM XXX: if not necessary delete for speed */
It _is_ required (if one of your drivers uses objects in .bss).
> + gpmc_init();
> + nand_boot();
> + debug("<<board_init_f()\n");
> +}
This whole function could be moved to an library for omap3 spl (or even
arm spl?).
> +inline void hang(void)
> +{
> + puts("### ERROR ### Please RESET the board ###\n");
> + for (;;)
> + ;
> +}
this also
> +void preloader_console_init(void)
> +{
> + /* Set r8 to gd */
> + asm("ldr r8, [%0]" : : "r" (&gd) : "r8");
> + gd->bd = &bdata;
> + gd->flags |= GD_FLG_RELOC;
> + gd->baudrate = CONFIG_BAUDRATE;
> +
> + serial_init(); /* serial communications setup */
> +
> + printf("\nU-Boot SPL (compiled %s - %s)\n", U_BOOT_DATE,
> + U_BOOT_TIME);
> +}
and this too ...
<snip linker script, seems ok>
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [1/5]devkit8000 nand_spl: armv7 support nand_spl boot
2011-06-28 14:14 ` [U-Boot] [1/5]devkit8000 nand_spl: armv7 support nand_spl boot simonschwarzcor at googlemail.com
@ 2011-06-29 8:27 ` Andreas Bießmann
2011-06-30 11:10 ` Aneesh V
0 siblings, 1 reply; 134+ messages in thread
From: Andreas Bießmann @ 2011-06-29 8:27 UTC (permalink / raw)
To: u-boot
Dear Simon Schwarz,
(this is a review of RFC for omap3 nand spl Simon does for his bachelor
thesis, there is one question in regarding the current 'SPL framework
redesign' discussion -> entry point for spl code).
Am 28.06.2011 16:14, schrieb simonschwarzcor at googlemail.com:
<snip long line>
> --
>
> diff --git a/arch/arm/cpu/armv7/start.S b/arch/arm/cpu/armv7/start.S
> index d91ae12..ebbfce4 100644
> --- a/arch/arm/cpu/armv7/start.S
> +++ b/arch/arm/cpu/armv7/start.S
> @@ -33,6 +33,11 @@
> #include <config.h>
> #include <version.h>
>
> +/* prevent lowlevel init if this is not the preloader*/
> +#if defined(CONFIG_SPL) && !defined(CONFIG_PRELOADER)
> +#define CONFIG_SKIP_LOWLEVEL_INIT
> +#endif
> +
not here, use your board configuration header for this.
> .globl _start
> _start: b reset
> ldr pc, _undefined_instruction
> @@ -43,6 +48,17 @@ _start: b reset
> ldr pc, _irq
> ldr pc, _fiq
>
> +#ifdef CONFIG_PRELOADER
> +/* If in Preloader don't use interrupts...*/
> +_undefined_instruction: .word undefined_instruction
> +_software_interrupt: .word _software_interrupt
> +_prefetch_abort: .word _prefetch_abort
> +_data_abort: .word data_abort
> +_not_used: .word _not_used
> +_irq: .word _irq
> +_fiq: .word _fiq
> +_pad: .word 0x12345678 /* now 16*4=64 */
> +#else
> _undefined_instruction: .word undefined_instruction
> _software_interrupt: .word software_interrupt
> _prefetch_abort: .word prefetch_abort
> @@ -51,6 +67,7 @@ _not_used: .word not_used
> _irq: .word irq
> _fiq: .word fiq
> _pad: .word 0x12345678 /* now 16*4=64 */
> +#endif /* CONFIG_PRELOADER */
why resetting the vector table? just do not enable irq at all should
also do the job, isn't it?
> .global _end_vect
> _end_vect:
>
> @@ -85,6 +102,7 @@ _armboot_start:
> /*
> * These are defined in the board-specific linker script.
> */
> +#ifndef CONFIG_PRELOADER
isn't that SPL specific?
> .globl _bss_start_ofs
> _bss_start_ofs:
> .word __bss_start - _start
> @@ -96,6 +114,16 @@ _bss_end_ofs:
> .globl _end_ofs
> _end_ofs:
> .word _end - _start
> +#else
> +/* preserved the _ofs because although there is no offset */
> +.globl _bss_start_ofs
> +_bss_start_ofs:
> + .word __bss_start
> +
> +.globl _bss_end_ofs
> +_bss_end_ofs:
> + .word __bss_end__
> +#endif
>
> #ifdef CONFIG_USE_IRQ
> /* IRQ stack memory (calculated at run-time) */
> @@ -153,8 +181,15 @@ next:
> /* the mask ROM code should have PLL and others stable */
> #ifndef CONFIG_SKIP_LOWLEVEL_INIT
> bl cpu_init_crit
> -#endif
> -
> +#endif /* #ifdef CONFIG_PRELOADER */
ok to mark this #endif, but do not use '/* #ifdef', it looks like
commented out ifdef.
> +
> +#ifdef CONFIG_PRELOADER
> +call_board_init_spl:
> + ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
> + bic sp, sp, #7 /* 8-byte alignment for ABI compliance */
> + ldr r0,=0x00000000
> + bl board_init_spl
why a new interface for entry point? You could just use
call_board_init_f() even for spl (just do not compile lib/board.c and
provide another one for spl). -> this should be discussed in 'SPL
framework redesign'.
> +#else
> /* Set stackpointer in internal RAM to call board_init_f */
> call_board_init_f:
> ldr sp, =(CONFIG_SYS_INIT_SP_ADDR)
> @@ -182,10 +217,8 @@ stack_setup:
> mov sp, r4
>
> adr r0, _start
> -#ifndef CONFIG_PRELOADER
hmm ... that ifndef was intentionally there
> cmp r0, r6
> beq clear_bss /* skip relocation */
> -#endif
> mov r1, r6 /* r1 <- scratch for copy_loop */
> ldr r3, _bss_start_ofs
> add r2, r0, r3 /* r2 <- source end address */
> @@ -196,7 +229,6 @@ copy_loop:
> cmp r0, r2 /* until source end address [r2] */
> blo copy_loop
>
> -#ifndef CONFIG_PRELOADER
> /*
> * fix .rel.dyn relocations
> */
> @@ -248,7 +280,6 @@ clbss_l:str r2, [r0] /* clear loop... */
> add r0, r0, #4
> cmp r0, r1
> bne clbss_l
> -#endif /* #ifndef CONFIG_PRELOADER */
>
> /*
> * We are done. Do not return, instead branch to second part of board
> @@ -265,16 +296,18 @@ jump_2_ram:
> /* jump to it ... */
> mov pc, lr
>
> -_board_init_r_ofs:
> - .word board_init_r - _start
> -
> _rel_dyn_start_ofs:
> - .word __rel_dyn_start - _start
> + .word __rel_dyn_start - _start
> _rel_dyn_end_ofs:
> - .word __rel_dyn_end - _start
> + .word __rel_dyn_end - _start
> _dynsym_start_ofs:
> - .word __dynsym_start - _start
> + .word __dynsym_start - _start
>
> +_board_init_r_ofs:
> + .word board_init_r - _start
these changes are not necessary!
> +#endif /* #ifndef CONFIG_PRELOADER */
> +
> +#ifndef CONFIG_SKIP_LOWLEVEL_INIT
this shouldn't be required here. If there is an error in start.S please
provide another patch fixing the error.
> /*************************************************************************
> *
> * CPU_init_critical registers
> @@ -311,6 +344,8 @@ cpu_init_crit:
> bl lowlevel_init @ go setup pll,mux,memory
> mov lr, ip @ restore link
> mov pc, lr @ back to my caller
> +#endif /* CONFIG_SKIP_LOWLEVEL_INIT */
> +
> /*
> *************************************************************************
> *
> @@ -437,6 +472,7 @@ cpu_init_crit:
> /*
> * exception handlers
> */
> +#ifndef CONFIG_PRELOADER
> .align 5
> undefined_instruction:
> get_bad_stack
> @@ -499,3 +535,14 @@ fiq:
> bl do_fiq
>
> #endif
> +#endif /* CONFIG_PRELOADER */
#endif /* CONFIG_PRELOADER */ followed by #ifdef CONFIG_PRELOADER? ...
how about #else?
> +
no empty line then
> +#ifdef CONFIG_PRELOADER
> + .align 5
> +undefined_instruction:
> + b undefined_instruction
> +
> + .align 5
> +data_abort:
> + b data_abort
> +#endif
I guess you want to save space by reducing the irq vector overhead. But
shouldn't this be some #ifdef CONFIG_USE_IRQ instead of CONFIG_PRELOADER?
> diff --git a/arch/arm/lib/reset.c b/arch/arm/lib/reset.c
> index 08e6acb..ad444cb 100644
> --- a/arch/arm/lib/reset.c
> +++ b/arch/arm/lib/reset.c
> @@ -44,8 +44,9 @@ int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
> puts ("resetting ...\n");
>
> udelay (50000); /* wait 50 ms */
> -
> +#ifndef CONFIG_PRELOADER
> disable_interrupts();
> +#endif
again, use CONFIG_USE_IRQ here would be better. But providing an empty
disable_interrupts() in either case you can drop these #ifndef here too.
> reset_cpu(0);
>
> /*NOTREACHED*/
regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [2/5]devkit8000 nand_spl: omap3 support nand_spl boot
2011-06-28 14:14 ` [U-Boot] [2/5]devkit8000 nand_spl: omap3 " simonschwarzcor at googlemail.com
@ 2011-06-29 8:43 ` Andreas Bießmann
2011-06-30 9:06 ` Simon Schwarz
2011-06-30 10:38 ` Aneesh V
1 sibling, 1 reply; 134+ messages in thread
From: Andreas Bießmann @ 2011-06-29 8:43 UTC (permalink / raw)
To: u-boot
Dear Simon Schwarz,
Am 28.06.2011 16:14, schrieb simonschwarzcor at googlemail.com:
> Deactivates caching in SPL. Add call to preloader_console_init for early console output.
well, deactivating caches make the process much slower. I recommend
don't disabeling it!
BTW, this patch also add preloader_console_init() to s_init() .. please
honor this in commit message (or split off in two patches)
regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [4/5]devkit8000 nand_spl: Add SPL NAND support to omap_gpmc driver
2011-06-28 14:14 ` [U-Boot] [4/5]devkit8000 nand_spl: Add SPL NAND support to omap_gpmc driver simonschwarzcor at googlemail.com
@ 2011-06-29 8:58 ` Andreas Bießmann
2011-06-30 11:01 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Andreas Bießmann @ 2011-06-29 8:58 UTC (permalink / raw)
To: u-boot
Dear Simon Schwarz,
Am 28.06.2011 16:14, schrieb simonschwarzcor at googlemail.com:
> Add support for NAND_SPL to omap gpmc driver. This means adding nand_read_buf16 to read from GPMC 32bit buffer (16 here means 16bit bus!) and adding omap_dev_ready as indicator if the GPMC is ready.
You also set some special ECC handling in this patch, please honour this
in your commit message!
>
> Signed-off-by: Simon Schwarz <schwarz@corscience.de>
> --
>
> diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
> index 99b9cef..7dfb05d 100644
> --- a/drivers/mtd/nand/omap_gpmc.c
> +++ b/drivers/mtd/nand/omap_gpmc.c
> @@ -29,6 +29,9 @@
> #include <linux/mtd/nand_ecc.h>
> #include <nand.h>
>
> +
no additional empty line
> +#define GPMC_WAIT0_PIN_ACTIVE (1 << 8)
this is only used once, why don't you use just (1<<8) where needed? Is
there some special meaning with 8 bit shift, can you use a register name
instead? Should it be configurable in any way for other omap3 devices?
> +
> static uint8_t cs;
> static struct nand_ecclayout hw_nand_oob = GPMC_NAND_HW_ECC_LAYOUT;
>
> @@ -61,6 +64,37 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
> writeb(cmd, this->IO_ADDR_W);
> }
>
> +/* Check wait pin as dev ready indicator */
> +int omap_dev_ready(struct mtd_info *mtd)
> +{
> + return gpmc_cfg->status & GPMC_WAIT0_PIN_ACTIVE;
> +}
> +
> +#ifdef CONFIG_PRELOADER
Isn't that SPL related? Why is it required for SPL and not for standard
U-Boot?
> +
> +/**
> + * nand_read_buf16 - [DEFAULT] read chip data into buffer
> + * @mtd: MTD device structure
> + * @buf: buffer to store date
> + * @len: number of bytes to read
> + *
> + * Default read function for 16bit buswith
> + *
> + * This function is based on nand_read_buf16 from nand_base.c. This version
> + * reads 32bit not 16bit although the bus only has 16bit.
> + */
> +static void gpmc_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
> +{
> + int i;
> + struct nand_chip *chip = mtd->priv;
> + u32 *p = (u32 *) buf;
> + len >>= 2;
> +
> + for (i = 0; i < len; i++)
> + p[i] = readl(chip->IO_ADDR_R);
> +}
> +#endif
> +
> /*
> * omap_hwecc_init - Initialize the Hardware ECC for NAND flash in
> * GPMC controller
> @@ -278,7 +312,9 @@ void omap_nand_switch_ecc(int32_t hardware)
> /* Update NAND handling after ECC mode switch */
> nand_scan_tail(mtd);
>
> + #ifndef CONFIG_SPL
> nand->options &= ~NAND_OWN_BUFFERS;
> + #endif
> }
>
> /*
> @@ -337,8 +373,23 @@ int board_nand_init(struct nand_chip *nand)
> nand->options |= NAND_BUSWIDTH_16;
>
> nand->chip_delay = 100;
> + nand->dev_ready = omap_dev_ready;
> /* Default ECC mode */
> +#ifndef CONFIG_PRELOADER
should't this some CONFIG_USE_SOFT_ECC (or whatever config variable
define that behaviour)?
> nand->ecc.mode = NAND_ECC_SOFT;
> +#else
> + nand->ecc.mode = NAND_ECC_HW;
> + nand->ecc.layout = &hw_nand_oob;
> + nand->ecc.size = 512;
> + nand->ecc.bytes = 24;
Ouch, these two values are extremely HW spwcific and need to be
configurable then.
> + nand->ecc.hwctl = omap_enable_hwecc;
> + nand->ecc.correct = omap_correct_data;
> + nand->ecc.calculate = omap_calculate_ecc;
Isn't that some kind of CONFIG_NAND_BUSWDITH (or whatever config
variable define that behaviour) related setting?
> + nand->read_buf = gpmc_read_buf16;
> + omap_hwecc_init(nand);
> +#endif
>
> return 0;
> }
> +
> +
please remove these two additional empty lines
regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [2/5]devkit8000 nand_spl: omap3 support nand_spl boot
2011-06-29 8:43 ` Andreas Bießmann
@ 2011-06-30 9:06 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-06-30 9:06 UTC (permalink / raw)
To: u-boot
Dear Andreas,
thanks for the input!
> well, deactivating caches make the process much slower. I recommend
> don't disabeling it!
Sure, this was for debugging puposes - just forgot to undo. will change
> BTW, this patch also add preloader_console_init() to s_init() .. please
> honor this in commit message (or split off in two patches)
will do.
Regards
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [2/5]devkit8000 nand_spl: omap3 support nand_spl boot
2011-06-28 14:14 ` [U-Boot] [2/5]devkit8000 nand_spl: omap3 " simonschwarzcor at googlemail.com
2011-06-29 8:43 ` Andreas Bießmann
@ 2011-06-30 10:38 ` Aneesh V
1 sibling, 0 replies; 134+ messages in thread
From: Aneesh V @ 2011-06-30 10:38 UTC (permalink / raw)
To: u-boot
On Tuesday 28 June 2011 07:44 PM, simonschwarzcor at googlemail.com wrote:
> Deactivates caching in SPL. Add call to preloader_console_init for early console output.
>
> Signed-off-by: Simon Schwarz<schwarz@corscience.de>
> --
>
> diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
> index 6c2a132..bb38289 100644
> --- a/arch/arm/cpu/armv7/omap3/board.c
> +++ b/arch/arm/cpu/armv7/omap3/board.c
> @@ -37,6 +37,7 @@
> #include<asm/arch/sys_proto.h>
> #include<asm/arch/mem.h>
> #include<asm/cache.h>
> +#include<asm/omap_common.h>
>
> extern omap3_sysinfo sysinfo;
>
> @@ -166,10 +167,15 @@ void s_init(void)
>
> try_unlock_memory();
>
> +#ifdef CONFIG_PRELOADER
> + v7_flush_cache_all();
> +#endif
> +
Flush is not needed for initialization. Invalidation is enough. Indeed
flush could be dangerous.
> /*
> * Right now flushing at low MPU speed.
> * Need to move after clock init
> */
> +#ifndef CONFIG_PRELOADER
> invalidate_dcache(get_device_type());
> #ifndef CONFIG_ICACHE_OFF
Unless you are enabling d-cache invalidate is also not needed. Please
note that enabling d-cache in SPL has some complexities.
Please see this thread for details:
http://lists.denx.de/pipermail/u-boot/2011-May/092865.html
> icache_enable();
With my armv7 cache maintenance series that is now available at u-boot-
arm/master, I-cache will be invalidated and enabled in start.S itself
unless CONFIG_SYS_I_CACHE_OFF is set.
best regards,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [4/5]devkit8000 nand_spl: Add SPL NAND support to omap_gpmc driver
2011-06-29 8:58 ` Andreas Bießmann
@ 2011-06-30 11:01 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-06-30 11:01 UTC (permalink / raw)
To: u-boot
Dear Andreas,
> You also set some special ECC handling in this patch, please honour this
> in your commit message!
will do.
>> +
>> +/**
>> + * nand_read_buf16 - [DEFAULT] read chip data into buffer
>> + * @mtd: ? ?MTD device structure
>> + * @buf: ? ?buffer to store date
>> + * @len: ? ?number of bytes to read
>> + *
>> + * Default read function for 16bit buswith
>> + *
>> + * This function is based on nand_read_buf16 from nand_base.c. This version
>> + * reads 32bit not 16bit although the bus only has 16bit.
>> + */
>> +static void gpmc_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
>> +{
>> + ? ? int i;
>> + ? ? struct nand_chip *chip = mtd->priv;
>> + ? ? u32 *p = (u32 *) buf;
>> + ? ? len >>= 2;
>> +
>> + ? ? for (i = 0; i < len; i++)
>> + ? ? ? ? ? ? p[i] = readl(chip->IO_ADDR_R);
>> +}
>> +#endif
>> +
>> ?/*
>> ? * omap_hwecc_init - Initialize the Hardware ECC for NAND flash in
>> ? * ? ? ? ? ? ? ? ? ? GPMC controller
>> @@ -278,7 +312,9 @@ void omap_nand_switch_ecc(int32_t hardware)
>> ? ? ? /* Update NAND handling after ECC mode switch */
>> ? ? ? nand_scan_tail(mtd);
>>
>> + ? ? #ifndef CONFIG_SPL
>> ? ? ? nand->options &= ~NAND_OWN_BUFFERS;
>> + ? ? #endif
>> ?}
>>
>> ?/*
>> @@ -337,8 +373,23 @@ int board_nand_init(struct nand_chip *nand)
>> ? ? ? ? ? ? ? nand->options |= NAND_BUSWIDTH_16;
>>
>> ? ? ? nand->chip_delay = 100;
>> + ? ? nand->dev_ready = omap_dev_ready;
>> ? ? ? /* Default ECC mode */
>> +#ifndef CONFIG_PRELOADER
>
> should't this some CONFIG_USE_SOFT_ECC (or whatever config variable
> define that behaviour)?
Its the default ECC setting this is software for standard U-Boot. Just
for the Preloader it is HW. So i think using CONFIG_PRELOADER is ok
here.
>> + ? ? nand->ecc.size = 512;
>> + ? ? nand->ecc.bytes = 24;
>
> Ouch, these two values are extremely HW spwcific and need to be
> configurable then.
will change.
>
>> + ? ? nand->ecc.hwctl = omap_enable_hwecc;
>> + ? ? nand->ecc.correct = omap_correct_data;
>> + ? ? nand->ecc.calculate = omap_calculate_ecc;
>
> Isn't that some kind of CONFIG_NAND_BUSWDITH (or whatever config
> variable define that behaviour) related setting?
Sorry don't understand that. These three functions are not related to
the bus width IMHO.
Thank you for the feedback!
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [1/5]devkit8000 nand_spl: armv7 support nand_spl boot
2011-06-29 8:27 ` Andreas Bießmann
@ 2011-06-30 11:10 ` Aneesh V
0 siblings, 0 replies; 134+ messages in thread
From: Aneesh V @ 2011-06-30 11:10 UTC (permalink / raw)
To: u-boot
This seems to be an extension of the work I did for OMAP4. So, I shall
respond for the code I had added.
On Wednesday 29 June 2011 01:57 PM, Andreas Bie?mann wrote:
> Dear Simon Schwarz,
[snip ..]
>> +#ifdef CONFIG_PRELOADER
>> +/* If in Preloader don't use interrupts...*/
>> +_undefined_instruction: .word undefined_instruction
>> +_software_interrupt: .word _software_interrupt
>> +_prefetch_abort: .word _prefetch_abort
>> +_data_abort: .word data_abort
>> +_not_used: .word _not_used
>> +_irq: .word _irq
>> +_fiq: .word _fiq
>> +_pad: .word 0x12345678 /* now 16*4=64 */
>> +#else
>> _undefined_instruction: .word undefined_instruction
>> _software_interrupt: .word software_interrupt
>> _prefetch_abort: .word prefetch_abort
>> @@ -51,6 +67,7 @@ _not_used: .word not_used
>> _irq: .word irq
>> _fiq: .word fiq
>> _pad: .word 0x12345678 /* now 16*4=64 */
>> +#endif /* CONFIG_PRELOADER */
>
> why resetting the vector table? just do not enable irq at all should
> also do the job, isn't it?
The main purpose was to compile out the exception handlers and related
code down below, that would not be much needed in SPL. In the absence
of these handlers I wanted spin-loops in the vector so that we get
some debugging hints with JTAG debuggers.
>
>> .global _end_vect
>> _end_vect:
[snip ..]
>> +#endif /* #ifdef CONFIG_PRELOADER */
>
> ok to mark this #endif, but do not use '/* #ifdef', it looks like
> commented out ifdef.
Ok.
>
>> +
[snip ..]
>> adr r0, _start
>> -#ifndef CONFIG_PRELOADER
>
> hmm ... that ifndef was intentionally there
I wanted to skip relocation but allow clear_bss() for SPL.
>
>> cmp r0, r6
>> beq clear_bss /* skip relocation */
[snip ..]
>> +#ifdef CONFIG_PRELOADER
>> + .align 5
>> +undefined_instruction:
>> + b undefined_instruction
>> +
>> + .align 5
>> +data_abort:
>> + b data_abort
>> +#endif
>
> I guess you want to save space by reducing the irq vector overhead. But
> shouldn't this be some #ifdef CONFIG_USE_IRQ instead of CONFIG_PRELOADER?
Not just IRQ but all exception handelrs.
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V2 0/5] OMAP3 and devkit8000 SPL support
2011-06-28 14:14 [U-Boot] [0/5]devkit8000 nand_spl support simonschwarzcor at googlemail.com
` (4 preceding siblings ...)
2011-06-28 14:14 ` [U-Boot] [5/5]devkit8000 nand_spl: add nand_spl support simonschwarzcor at googlemail.com
@ 2011-07-25 18:05 ` Simon Schwarz
2011-07-25 18:05 ` [U-Boot] [PATCH V2 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
` (5 more replies)
5 siblings, 6 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-25 18:05 UTC (permalink / raw)
To: u-boot
This patch series adds a NAND SPL to OMAP3 and the devkit8000 board.
I tried to clean-up the mess of the former patches as good as possible.
Note that rebasing this patch on the patches mentioned below renders Patch 1/5
of the old series obsolete. Most other patches have heavy changes.
I noted in the commit messages to which V1-patches the new ones are close.
I was not able to send these patches in reply-to because there is no anccesstor
in V2 for every patch in V1 - I hope the solution I used is ok.
This is based on the following patches:
- New SPL framework
- OMAP4 SPL
Both are already in u-boot-ti repo.
Simon Schwarz (5):
omap3: Configure RAM bank 0 if in SPL
omap-common: add nand spl support
nand spl: add NAND Library to new SPL
omap3: new SPL structure support
devkit8000: Add nand-spl support for new SPL
arch/arm/cpu/armv7/omap-common/spl.c | 43 +++++++++++++++++
arch/arm/cpu/armv7/omap3/board.c | 36 +++++++++++++-
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 ++
arch/arm/cpu/armv7/omap3/sdrc.c | 30 +++++++++++-
arch/arm/include/asm/arch-omap3/mem.h | 36 ++++++++++++++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
arch/arm/include/asm/omap_common.h | 1 +
board/timll/devkit8000/devkit8000.c | 2 +-
doc/README.SPL | 2 +
drivers/mtd/nand/Makefile | 6 ++-
drivers/mtd/nand/omap_gpmc.c | 69 +++++++++++++++++++++++++++
include/configs/devkit8000.h | 46 ++++++++++++++++++
include/nand.h | 3 +
spl/Makefile | 2 +
14 files changed, 277 insertions(+), 5 deletions(-)
--
1.7.4.1
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V2 1/5] omap3: Configure RAM bank 0 if in SPL
2011-07-25 18:05 ` [U-Boot] [PATCH V2 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
@ 2011-07-25 18:05 ` Simon Schwarz
2011-07-25 18:05 ` [U-Boot] [PATCH V2 2/5] omap-common: add nand spl support Simon Schwarz
` (4 subsequent siblings)
5 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-25 18:05 UTC (permalink / raw)
To: u-boot
OMAP3 relied on the memory config done by X-loader or Configuration Header. This
has to be reworked for the implementation of a SPL. This patch configures RAM
bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000
are added to mem.h
---
V1 changes:
ADD Settings for Micron RAM
V2 changes:
DEL spl_debug outputs if mem test fails/passes
CHG CONFIG_PRELOADER to CONFIG_SPL_BUILD
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,3/5] devkit8000 nand_spl: Add RAM
configuration independent of x-loader or CH"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114)
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
arch/arm/cpu/armv7/omap3/sdrc.c | 30 ++++++++++++++++++++++++++-
arch/arm/include/asm/arch-omap3/mem.h | 36 +++++++++++++++++++++++++++++++++
2 files changed, 65 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index 2a7970b..dac14d0 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -8,6 +8,9 @@
* Copyright (C) 2004-2010
* Texas Instruments Incorporated - http://www.ti.com/
*
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
+ *
* Author :
* Vaibhav Hiremath <hvaibhav@ti.com>
*
@@ -133,13 +136,38 @@ void do_sdrc_init(u32 cs, u32 early)
sdelay(0x20000);
}
+#ifdef CONFIG_SPL_BUILD
+ /* If we use a SPL there is no x-loader nor config header so we have
+ * to do the job ourselfs
+ */
+ if (cs == CS0) {
+ sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
+
+ /* General SDRC config */
+ writel(V_MCFG, &sdrc_base->cs[cs].mcfg);
+ writel(V_RFR_CTRL, &sdrc_base->cs[cs].rfr_ctrl);
+
+ /* AC timings */
+ writel(V_ACTIMA_165, &sdrc_actim_base0->ctrla);
+ writel(V_ACTIMB_165, &sdrc_actim_base0->ctrlb);
+
+ /* Initialize */
+ writel(CMD_NOP, &sdrc_base->cs[cs].manual);
+ writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+
+ writel(V_MR, &sdrc_base->cs[cs].mr);
+ }
+#endif /* CONFIG_SPL_BUILD */
+
/*
* SDRC timings are set up by x-load or config header
* We don't need to redo them here.
* Older x-loads configure only CS0
* configure CS1 to handle this ommission
*/
- if (cs) {
+ if (cs == CS1) {
sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
writel(readl(&sdrc_base->cs[CS0].mcfg),
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
index f165949..8e28f77 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -128,6 +128,33 @@ enum {
(MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) | \
(MICRON_TWTR_165 << 16))
+#define MICRON_RAMTYPE 0x1
+#define MICRON_DDRTYPE 0x0
+#define MICRON_DEEPPD 0x1
+#define MICRON_B32NOT16 0x1
+#define MICRON_BANKALLOCATION 0x2
+#define MICRON_RAMSIZE ((PHYS_SDRAM_1_SIZE/(1024*1024))/2)
+#define MICRON_ADDRMUXLEGACY 0x1
+#define MICRON_CASWIDTH 0x5
+#define MICRON_RASWIDTH 0x2
+#define MICRON_LOCKSTATUS 0x0
+#define MICRON_V_MCFG ((MICRON_LOCKSTATUS << 30) | (MICRON_RASWIDTH << 24) | \
+ (MICRON_CASWIDTH << 20) | (MICRON_ADDRMUXLEGACY << 19) | \
+ (MICRON_RAMSIZE << 8) | (MICRON_BANKALLOCATION << 6) | \
+ (MICRON_B32NOT16 << 4) | (MICRON_DEEPPD << 3) | \
+ (MICRON_DDRTYPE << 2) | (MICRON_RAMTYPE))
+
+#define MICRON_ARCV 2030
+#define MICRON_ARE 0x1
+#define MICRON_V_RFR_CTRL ((MICRON_ARCV << 8) | (MICRON_ARE))
+
+#define MICRON_BL 0x2
+#define MICRON_SIL 0x0
+#define MICRON_CASL 0x3
+#define MICRON_WBST 0x0
+#define MICRON_V_MR ((MICRON_WBST << 9) | (MICRON_CASL << 4) | \
+ (MICRON_SIL << 3) | (MICRON_BL))
+
/*
* NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns
* ACTIMA
@@ -171,10 +198,15 @@ enum {
#define V_ACTIMA_165 INFINEON_V_ACTIMA_165
#define V_ACTIMB_165 INFINEON_V_ACTIMB_165
#endif
+
#ifdef CONFIG_OMAP3_MICRON_DDR
#define V_ACTIMA_165 MICRON_V_ACTIMA_165
#define V_ACTIMB_165 MICRON_V_ACTIMB_165
+#define V_MCFG MICRON_V_MCFG
+#define V_RFR_CTRL MICRON_V_RFR_CTRL
+#define V_MR MICRON_V_MR
#endif
+
#ifdef CONFIG_OMAP3_NUMONYX_DDR
#define V_ACTIMA_165 NUMONYX_V_ACTIMA_165
#define V_ACTIMB_165 NUMONYX_V_ACTIMB_165
@@ -184,6 +216,10 @@ enum {
#error "Please choose the right DDR type in config header"
#endif
+#if defined(CONFIG_SPL_BUILD) && (!defined(V_MCFG) || !defined(V_RFR_CTRL))
+#error "Please choose the right DDR type in config header"
+#endif
+
/*
* GPMC settings -
* Definitions is as per the following format
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V2 2/5] omap-common: add nand spl support
2011-07-25 18:05 ` [U-Boot] [PATCH V2 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-07-25 18:05 ` [U-Boot] [PATCH V2 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
@ 2011-07-25 18:05 ` Simon Schwarz
2011-07-26 6:07 ` Andreas Bießmann
2011-07-25 18:05 ` [U-Boot] [PATCH V2 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
` (3 subsequent siblings)
5 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-25 18:05 UTC (permalink / raw)
To: u-boot
Add NAND support for the new SPL structure.
---
This patch didn't exist before V2!
V2 changes:
ADD Some define-barriers for OMAP3 to only use NAND
ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
header
CHG cosmetic
ADD do_reset() implementation for omap-common spl
ADD nand_copy_image to nand.h
ADD CPP barriers for mmc and nand support. The parts depending on library
support are only compiled if the respective library is included.
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
arch/arm/cpu/armv7/omap-common/spl.c | 43 ++++++++++++++++++++++++++++++++++
arch/arm/include/asm/omap_common.h | 2 +
include/nand.h | 3 ++
3 files changed, 48 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
index d177652..3a0093d 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -26,6 +26,7 @@
#include <asm/u-boot.h>
#include <asm/utils.h>
#include <asm/arch/sys_proto.h>
+#include <nand.h>
#include <mmc.h>
#include <fat.h>
#include <timestamp_autogenerated.h>
@@ -107,6 +108,7 @@ static void parse_image_header(const struct image_header *header)
}
}
+#ifdef CONFIG_SPL_MMC_SUPPORT
static void mmc_load_image_raw(struct mmc *mmc)
{
u32 image_size_sectors, err;
@@ -140,7 +142,9 @@ end:
hang();
}
}
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+#ifdef CONFIG_SPL_MMC_SUPPORT
static void mmc_load_image_fat(struct mmc *mmc)
{
s32 err;
@@ -173,7 +177,9 @@ end:
hang();
}
}
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+#ifdef CONFIG_SPL_MMC_SUPPORT
static void mmc_load_image(void)
{
struct mmc *mmc;
@@ -206,6 +212,26 @@ static void mmc_load_image(void)
hang();
}
}
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+
+#ifdef CONFIG_SPL_NAND_SUPPORT
+static void nand_load_image(void)
+{
+ gpmc_init();
+ nand_init();
+ nand_copy_image(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
+ (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
+#ifdef CONFIG_NAND_ENV_DST
+ nand_copy_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_NAND_ENV_DST);
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ nand_copy_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
+#endif
+#endif
+ parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
+}
+#endif /* CONFIG_SPL_NAND_SUPPORT */
void jump_to_image_no_args(void)
{
@@ -228,10 +254,17 @@ void board_init_r(gd_t *id, ulong dummy)
boot_device = omap_boot_device();
debug("boot device - %d\n", boot_device);
switch (boot_device) {
+#ifdef CONFIG_SPL_MMC_SUPPORT
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
mmc_load_image();
break;
+#endif
+#ifdef CONFIG_SPL_NAND_SUPPORT
+ case BOOT_DEVICE_NAND:
+ nand_load_image();
+ break;
+#endif
default:
printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
hang();
@@ -259,7 +292,9 @@ void preloader_console_init(void)
gd->flags |= GD_FLG_RELOC;
gd->baudrate = CONFIG_BAUDRATE;
+#ifndef CONFIG_OMAP34XX
setup_clocks_for_console();
+#endif
serial_init(); /* serial communications setup */
/* Avoid a second "U-Boot" coming from this string */
@@ -270,3 +305,11 @@ void preloader_console_init(void)
omap_rev_string(rev_string_buffer);
printf("Texas Instruments %s\n", rev_string_buffer);
}
+
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ debug("resetting cpu...");
+ reset_cpu(0);
+
+ return 0;
+}
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index d3cb857..ee45a33 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -49,6 +49,8 @@ void preloader_console_init(void);
#define MMCSD_MODE_UNDEFINED 0
#define MMCSD_MODE_RAW 1
#define MMCSD_MODE_FAT 2
+#define NAND_MODE_HW 3
+#define NAND_MODE_SW 4
u32 omap_boot_device(void);
u32 omap_boot_mode(void);
diff --git a/include/nand.h b/include/nand.h
index 8d94b5c..084c017 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -132,6 +132,8 @@ int nand_lock( nand_info_t *meminfo, int tight );
int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
+void nand_copy_image(unsigned int offs, unsigned int size, uchar *dst);
+
#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
void board_nand_select_device(struct nand_chip *nand, int chip);
#endif
@@ -148,3 +150,4 @@ __attribute__((noreturn)) void nand_boot(void);
#define ENV_OFFSET_SIZE 8
int get_nand_env_oob(nand_info_t *nand, unsigned long *result);
#endif
+
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V2 3/5] nand spl: add NAND Library to new SPL
2011-07-25 18:05 ` [U-Boot] [PATCH V2 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-07-25 18:05 ` [U-Boot] [PATCH V2 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
2011-07-25 18:05 ` [U-Boot] [PATCH V2 2/5] omap-common: add nand spl support Simon Schwarz
@ 2011-07-25 18:05 ` Simon Schwarz
2011-07-26 5:59 ` Andreas Bießmann
2011-07-25 18:05 ` [U-Boot] [PATCH V2 4/5] omap3: new SPL structure support Simon Schwarz
` (2 subsequent siblings)
5 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-25 18:05 UTC (permalink / raw)
To: u-boot
Insert some NAND driver sources into NAND SPL library.
---
V1 changes:
CHG Default to HW ecc in SPL build
ADD nand_read_buf16 function, read buffer
ADD omap_dev_ready function, indicte if chip is ready
V2 changes:
DEL GPMC_WAIT0_PIN_ACTIVE define
CHG omap_dev_ready() renamed to omap_spl_dev_ready(), does not use the
GPMC_WAIT0_PIN_ACTIVE-define anymore
CHG ogpmc_read_buf16 renamed omap_spl_read_buf16
ADD omap_spl_read_buf, 8x buf read function
ADD CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to SPL
CHG cosmetic
CHG nand_base and nand_bbt aren't needed for SPL anymore
CHG omap_nand_switch_ecc is not compiled for SPL
ADD entry for CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to README.SPL
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND support
to omap_gpmc driver"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
doc/README.SPL | 2 +
drivers/mtd/nand/Makefile | 6 +++-
drivers/mtd/nand/omap_gpmc.c | 69 ++++++++++++++++++++++++++++++++++++++++++
spl/Makefile | 2 +
4 files changed, 78 insertions(+), 1 deletions(-)
diff --git a/doc/README.SPL b/doc/README.SPL
index ce8e19f..2987f43 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -60,3 +60,5 @@ CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
CONFIG_SPL_SPI_SUPPORT (drivers/spi/libspi.o)
CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
+CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
+CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 8b598f6..cdc9a14 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -26,12 +26,16 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libnand.o
ifdef CONFIG_CMD_NAND
+ifdef CONFIG_SPL_BUILD
+COBJS-y += nand_spl.o
+else
COBJS-y += nand.o
COBJS-y += nand_base.o
COBJS-y += nand_bbt.o
-COBJS-y += nand_ecc.o
COBJS-y += nand_ids.o
COBJS-y += nand_util.o
+endif
+COBJS-y += nand_ecc.o
COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 99b9cef..ee4d13e 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -61,6 +61,55 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
writeb(cmd, this->IO_ADDR_W);
}
+#ifdef CONFIG_SPL_BUILD
+/* Check wait pin as dev ready indicator */
+int omap_spl_dev_ready(struct mtd_info *mtd)
+{
+ return gpmc_cfg->status & (1 << 8);
+}
+
+/*
+ * omap_spl_read_buf16 - [DEFAULT] read chip data into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ * Default read function for 16bit buswith
+ *
+ * This function is based on nand_read_buf16 from nand_base.c. This version
+ * reads 32bit not 16bit although the bus only has 16bit.
+ */
+static void omap_spl_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+ int i;
+ struct nand_chip *chip = mtd->priv;
+ u32 *p = (u32 *) buf;
+ len >>= 2;
+
+ for (i = 0; i < len; i++)
+ p[i] = readl(chip->IO_ADDR_R);
+}
+
+/*
+ * omap_spl_read_buf - [DEFAULT] read chip data into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ * Default read function for 8bit buswith
+ *
+ * This is the same function as this from nand_base.c nand_read_buf
+ */
+static void omap_spl_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+ int i;
+ struct nand_chip *chip = mtd->priv;
+
+ for (i = 0; i < len; i++)
+ buf[i] = readb(chip->IO_ADDR_R);
+}
+#endif
+
/*
* omap_hwecc_init - Initialize the Hardware ECC for NAND flash in
* GPMC controller
@@ -224,6 +273,8 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
}
}
+
+#ifndef CONFIG_SPL_BUILD
/*
* omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc.
* The default is to come up on s/w ecc
@@ -280,6 +331,7 @@ void omap_nand_switch_ecc(int32_t hardware)
nand->options &= ~NAND_OWN_BUFFERS;
}
+#endif /* CONFIG_SPL_BUILD */
/*
* Board-specific NAND initialization. The following members of the
@@ -338,7 +390,24 @@ int board_nand_init(struct nand_chip *nand)
nand->chip_delay = 100;
/* Default ECC mode */
+#ifndef CONFIG_SPL_BUILD
nand->ecc.mode = NAND_ECC_SOFT;
+#else
+ nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.layout = &hw_nand_oob;
+ nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
+ nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
+ nand->ecc.hwctl = omap_enable_hwecc;
+ nand->ecc.correct = omap_correct_data;
+ nand->ecc.calculate = omap_calculate_ecc;
+ omap_hwecc_init(nand);
+
+ if (nand->options & NAND_BUSWIDTH_16)
+ nand->read_buf = omap_spl_read_buf16;
+ else
+ nand->read_buf = omap_spl_read_buf;
+ nand->dev_ready = omap_spl_dev_ready;
+#endif
return 0;
}
diff --git a/spl/Makefile b/spl/Makefile
index 87f13f6..0c0d3c4 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -46,6 +46,8 @@ LIBS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/libspi_flash.o
LIBS-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/libspi.o
LIBS-$(CONFIG_SPL_FAT_SUPPORT) += fs/fat/libfat.o
LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o
+LIBS-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/libpower.o
+LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/libnand.o
ifeq ($(SOC),omap3)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V2 4/5] omap3: new SPL structure support
2011-07-25 18:05 ` [U-Boot] [PATCH V2 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
` (2 preceding siblings ...)
2011-07-25 18:05 ` [U-Boot] [PATCH V2 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
@ 2011-07-25 18:05 ` Simon Schwarz
2011-07-26 6:11 ` Andreas Bießmann
2011-07-25 18:05 ` [U-Boot] [PATCH V2 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
2011-07-26 10:22 ` [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
5 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-25 18:05 UTC (permalink / raw)
To: u-boot
Support for the new spl structure. Using the interface defined by Aneesh V for
OMAP4
---
V1 changes:
ADD support for early console output in SPL
V2 changes:
ADD include omap_common.h in board.c
ADD implement new omap common interface omap_boot_device, omap_boot_mode and
omap_rev_string (very basic)
CHG cosmetic
CHG Don't add ecc switch command in SPL
ADD save_boot_params stump with warning to implement it
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is in some parts a anccesstor of "[U-Boot,2/5] devkit8000 nand_spl: omap3
support nand_spl boot"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114) in V1
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
arch/arm/cpu/armv7/omap3/board.c | 36 +++++++++++++++++++++++++-
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 +++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
arch/arm/include/asm/omap_common.h | 3 +-
4 files changed, 41 insertions(+), 4 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 4aaf97b..2f6d01c 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -39,6 +39,7 @@
#include <asm/cache.h>
#include <asm/armv7.h>
#include <asm/omap_gpio.h>
+#include <asm/omap_common.h>
/* Declarations */
extern omap3_sysinfo sysinfo;
@@ -56,6 +57,28 @@ static const struct gpio_bank gpio_bank_34xx[6] = {
const struct gpio_bank *const omap_gpio_bank = gpio_bank_34xx;
+#ifdef CONFIG_SPL_BUILD
+/*
+* We use static variables because global data is not ready yet.
+* Initialized data is available in SPL right from the beginning.
+* We would not typically need to save these parameters in regular
+* U-Boot. This is needed only in SPL at the moment.
+*/
+u32 omap3_boot_device = BOOT_DEVICE_NAND;
+u32 omap3_boot_mode = NAND_MODE_HW_ECC;
+
+u32 omap_boot_device(void)
+{
+ return omap3_boot_device;
+}
+
+u32 omap_boot_mode(void)
+{
+ return omap3_boot_mode;
+}
+#endif /* CONFIG_SPL_BUILD */
+
+
/******************************************************************************
* Routine: delay
* Description: spinning delay to use before udelay works
@@ -197,6 +220,10 @@ void s_init(void)
per_clocks_enable();
+#ifdef CONFIG_SPL_BUILD
+ preloader_console_init();
+#endif
+
if (!in_sdram)
mem_init();
}
@@ -245,7 +272,7 @@ void abort(void)
{
}
-#ifdef CONFIG_NAND_OMAP_GPMC
+#if defined(CONFIG_NAND_OMAP_GPMC) & !defined(CONFIG_SPL_BUILD)
/******************************************************************************
* OMAP3 specific command to switch between NAND HW and SW ecc
*****************************************************************************/
@@ -273,7 +300,7 @@ U_BOOT_CMD(
"[hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc algorithm"
);
-#endif /* CONFIG_NAND_OMAP_GPMC */
+#endif /* CONFIG_NAND_OMAP_GPMC & !CONFIG_SPL_BUILD */
#ifdef CONFIG_DISPLAY_BOARDINFO
/**
@@ -402,3 +429,8 @@ void v7_outer_cache_disable(void)
omap3_update_aux_cr(0, 0x2);
}
#endif
+
+void omap_rev_string(char *omap_rev_string)
+{
+ sprintf(omap_rev_string, "OMAP3, sorry revision detection unimplemented");
+}
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index 67e8ceb..48a7ec6 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -35,6 +35,11 @@
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
+.global save_boot_params
+save_boot_params:
+ #warning "Please implement save_boot_params for OMAP3"
+ bx lr
+
.global omap3_gp_romcode_call
omap3_gp_romcode_call:
PUSH {r4-r12, lr} @ Save all registers from ROM code!
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h
index 995e7cb..7b60051 100644
--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
@@ -71,4 +71,5 @@ void power_init_r(void);
void dieid_num_r(void);
void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
void omap3_gp_romcode_call(u32 service_id, u32 parameter);
+void omap_rev_string(char *omap_rev_string);
#endif
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index ee45a33..13f6884 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -49,8 +49,7 @@ void preloader_console_init(void);
#define MMCSD_MODE_UNDEFINED 0
#define MMCSD_MODE_RAW 1
#define MMCSD_MODE_FAT 2
-#define NAND_MODE_HW 3
-#define NAND_MODE_SW 4
+#define NAND_MODE_HW_ECC 3
u32 omap_boot_device(void);
u32 omap_boot_mode(void);
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V2 5/5] devkit8000: Add nand-spl support for new SPL
2011-07-25 18:05 ` [U-Boot] [PATCH V2 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
` (3 preceding siblings ...)
2011-07-25 18:05 ` [U-Boot] [PATCH V2 4/5] omap3: new SPL structure support Simon Schwarz
@ 2011-07-25 18:05 ` Simon Schwarz
2011-07-26 6:17 ` Andreas Bießmann
2011-07-26 10:22 ` [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
5 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-25 18:05 UTC (permalink / raw)
To: u-boot
Add NAND SPL support to the devkit8000 config
---
V1 changes:
ADD devkit8000_nand to board.cfg
ADD nand_spl Makefile, llinker script, spl-devkit8000.c
ADD config ecc, SRAM, SPL to board config
ADD CONFIG_SYS_SRAM_START and _SIZE to board config
ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config
V2 changes:
ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER, NAND and
CONFIG_SPL_LDSCRIPT to board config
CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_*
ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config: Where to
expect u-boot and where to load it.
ADD some barrier to not build board_eth_init in SPL
DEL no changes to board.cfg
DEL everything used the old nand_spl layout (Makefile, linker script,
spl-devkit8000.c)
CHG cosmetic
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl
support"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
board/timll/devkit8000/devkit8000.c | 2 +-
include/configs/devkit8000.h | 46 +++++++++++++++++++++++++++++++++++
2 files changed, 47 insertions(+), 1 deletions(-)
diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
index 95afaaa..9b53742 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -119,7 +119,7 @@ void set_muxconf_regs(void)
MUX_DEVKIT8000();
}
-#ifdef CONFIG_DRIVER_DM9000
+#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
/*
* Routine: board_eth_init
* Description: Setting up the Ethernet hardware.
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 125c690..46c1e3d 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -307,4 +307,50 @@
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
+/* SRAM config */
+#define CONFIG_SYS_SRAM_START 0x40200000
+#define CONFIG_SYS_SRAM_SIZE 0xFFFF /*64 kB*/
+
+/* Defines for SPL */
+#define CONFIG_SPL
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_LDSCRIPT $(CPUDIR)/omap-common/u-boot-spl.lds
+
+#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
+#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */
+#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
+
+#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
+#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+ 10, 11, 12, 13}
+
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 3
+
+#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
+ CONFIG_SYS_NAND_ECCSIZE)
+#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
+ CONFIG_SYS_NAND_ECCSTEPS)
+
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+
#endif /* __CONFIG_H */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V2 3/5] nand spl: add NAND Library to new SPL
2011-07-25 18:05 ` [U-Boot] [PATCH V2 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
@ 2011-07-26 5:59 ` Andreas Bießmann
2011-07-26 8:47 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Andreas Bießmann @ 2011-07-26 5:59 UTC (permalink / raw)
To: u-boot
Dear Simon,
Am 25.07.2011 um 20:05 schrieb Simon Schwarz:
> Insert some NAND driver sources into NAND SPL library.
>
> ---
> V1 changes:
> CHG Default to HW ecc in SPL build
> ADD nand_read_buf16 function, read buffer
> ADD omap_dev_ready function, indicte if chip is ready
>
> V2 changes:
> DEL GPMC_WAIT0_PIN_ACTIVE define
> CHG omap_dev_ready() renamed to omap_spl_dev_ready(), does not use the
> GPMC_WAIT0_PIN_ACTIVE-define anymore
> CHG ogpmc_read_buf16 renamed omap_spl_read_buf16
> ADD omap_spl_read_buf, 8x buf read function
> ADD CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to SPL
> CHG cosmetic
> CHG nand_base and nand_bbt aren't needed for SPL anymore
> CHG omap_nand_switch_ecc is not compiled for SPL
> ADD entry for CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to README.SPL
>
> Transition from V1 to V2 also includes that this patch is now based on
> - the new SPL layout by Aneesh V and Daniel Schwierzeck
> - the OMAP4 SPL patches by Aneesh V
>
> This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND support
> to omap_gpmc driver"
> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1
>
> Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
> ---
> doc/README.SPL | 2 +
> drivers/mtd/nand/Makefile | 6 +++-
> drivers/mtd/nand/omap_gpmc.c | 69 ++++++++++++++++++++++++++++++++++++++++++
> spl/Makefile | 2 +
> 4 files changed, 78 insertions(+), 1 deletions(-)
<snip>
> --- a/drivers/mtd/nand/omap_gpmc.c
> +++ b/drivers/mtd/nand/omap_gpmc.c
> @@ -61,6 +61,55 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
> writeb(cmd, this->IO_ADDR_W);
> }
<snip>
> @@ -224,6 +273,8 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
> }
> }
>
> +
This single line is unnecessary.
> +#ifndef CONFIG_SPL_BUILD
> /*
> * omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc.
> * The default is to come up on s/w ecc
> @@ -280,6 +331,7 @@ void omap_nand_switch_ecc(int32_t hardware)
>
regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V2 2/5] omap-common: add nand spl support
2011-07-25 18:05 ` [U-Boot] [PATCH V2 2/5] omap-common: add nand spl support Simon Schwarz
@ 2011-07-26 6:07 ` Andreas Bießmann
2011-07-26 8:42 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Andreas Bießmann @ 2011-07-26 6:07 UTC (permalink / raw)
To: u-boot
Dear Simon,
Am 25.07.2011 um 20:05 schrieb Simon Schwarz:
> Add NAND support for the new SPL structure.
>
> ---
> This patch didn't exist before V2!
>
> V2 changes:
> ADD Some define-barriers for OMAP3 to only use NAND
> ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
> header
> CHG cosmetic
> ADD do_reset() implementation for omap-common spl
> ADD nand_copy_image to nand.h
> ADD CPP barriers for mmc and nand support. The parts depending on library
> support are only compiled if the respective library is included.
>
> Transition from V1 to V2 also includes that this patch is now based on
> - the new SPL layout by Aneesh V and Daniel Schwierzeck
> - the OMAP4 SPL patches by Aneesh V
>
> Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
> ---
> arch/arm/cpu/armv7/omap-common/spl.c | 43 ++++++++++++++++++++++++++++++++++
> arch/arm/include/asm/omap_common.h | 2 +
> include/nand.h | 3 ++
> 3 files changed, 48 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
> index d177652..3a0093d 100644
> --- a/arch/arm/cpu/armv7/omap-common/spl.c
> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
> @@ -26,6 +26,7 @@
> #include <asm/u-boot.h>
> #include <asm/utils.h>
> #include <asm/arch/sys_proto.h>
> +#include <nand.h>
> #include <mmc.h>
> #include <fat.h>
> #include <timestamp_autogenerated.h>
> @@ -107,6 +108,7 @@ static void parse_image_header(const struct image_header *header)
> }
> }
>
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> static void mmc_load_image_raw(struct mmc *mmc)
> {
> u32 image_size_sectors, err;
> @@ -140,7 +142,9 @@ end:
> hang();
> }
> }
> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> static void mmc_load_image_fat(struct mmc *mmc)
> {
> s32 err;
> @@ -173,7 +177,9 @@ end:
> hang();
> }
> }
> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> static void mmc_load_image(void)
> {
> struct mmc *mmc;
> @@ -206,6 +212,26 @@ static void mmc_load_image(void)
> hang();
> }
> }
> +#endif /* CONFIG_SPL_MMC_SUPPORT */
> +
> +#ifdef CONFIG_SPL_NAND_SUPPORT
> +static void nand_load_image(void)
> +{
> + gpmc_init();
> + nand_init();
> + nand_copy_image(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
> + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
> +#ifdef CONFIG_NAND_ENV_DST
> + nand_copy_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
> + (uchar *)CONFIG_NAND_ENV_DST);
> +#ifdef CONFIG_ENV_OFFSET_REDUND
> + nand_copy_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
> + (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
> +#endif
> +#endif
> + parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
> +}
> +#endif /* CONFIG_SPL_NAND_SUPPORT */
>
> void jump_to_image_no_args(void)
> {
> @@ -228,10 +254,17 @@ void board_init_r(gd_t *id, ulong dummy)
> boot_device = omap_boot_device();
> debug("boot device - %d\n", boot_device);
> switch (boot_device) {
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> case BOOT_DEVICE_MMC1:
> case BOOT_DEVICE_MMC2:
> mmc_load_image();
> break;
> +#endif
> +#ifdef CONFIG_SPL_NAND_SUPPORT
> + case BOOT_DEVICE_NAND:
> + nand_load_image();
> + break;
> +#endif
> default:
> printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
> hang();
> @@ -259,7 +292,9 @@ void preloader_console_init(void)
> gd->flags |= GD_FLG_RELOC;
> gd->baudrate = CONFIG_BAUDRATE;
>
> +#ifndef CONFIG_OMAP34XX
Well .. that was discussed with Aneesh in another mail. I prefer Aneesh decides how the interface should be:
a) OMAP3 provides setup_clocks_for_console() and remove the UART stuff from per_clocks_enable()
b) remove setup_clocks_for_console() here and require preloader_console_init() to have the clocks enabled before
> setup_clocks_for_console();
> +#endif
> serial_init(); /* serial communications setup */
>
> /* Avoid a second "U-Boot" coming from this string */
> @@ -270,3 +305,11 @@ void preloader_console_init(void)
> omap_rev_string(rev_string_buffer);
> printf("Texas Instruments %s\n", rev_string_buffer);
> }
Some comment would be useful why this is here ..
> +
> +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
> +{
> + debug("resetting cpu...");
> + reset_cpu(0);
> +
> + return 0;
> +}
> diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
> index d3cb857..ee45a33 100644
> --- a/arch/arm/include/asm/omap_common.h
> +++ b/arch/arm/include/asm/omap_common.h
> @@ -49,6 +49,8 @@ void preloader_console_init(void);
> #define MMCSD_MODE_UNDEFINED 0
> #define MMCSD_MODE_RAW 1
> #define MMCSD_MODE_FAT 2
> +#define NAND_MODE_HW 3
> +#define NAND_MODE_SW 4
Shouldn't that name NAND_ECC_MODE_(HW|SW) or something?
> u32 omap_boot_device(void);
> u32 omap_boot_mode(void);
> diff --git a/include/nand.h b/include/nand.h
> index 8d94b5c..084c017 100644
> --- a/include/nand.h
> +++ b/include/nand.h
> @@ -132,6 +132,8 @@ int nand_lock( nand_info_t *meminfo, int tight );
> int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
> int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
>
> +void nand_copy_image(unsigned int offs, unsigned int size, uchar *dst);
> +
> #ifdef CONFIG_SYS_NAND_SELECT_DEVICE
> void board_nand_select_device(struct nand_chip *nand, int chip);
> #endif
> @@ -148,3 +150,4 @@ __attribute__((noreturn)) void nand_boot(void);
> #define ENV_OFFSET_SIZE 8
> int get_nand_env_oob(nand_info_t *nand, unsigned long *result);
> #endif
> +
This single line is useless.
> --
> 1.7.4.1
regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V2 4/5] omap3: new SPL structure support
2011-07-25 18:05 ` [U-Boot] [PATCH V2 4/5] omap3: new SPL structure support Simon Schwarz
@ 2011-07-26 6:11 ` Andreas Bießmann
0 siblings, 0 replies; 134+ messages in thread
From: Andreas Bießmann @ 2011-07-26 6:11 UTC (permalink / raw)
To: u-boot
Dear Simon,
Am 25.07.2011 um 20:05 schrieb Simon Schwarz:
> Support for the new spl structure. Using the interface defined by Aneesh V for
> OMAP4
> ---
> V1 changes:
> ADD support for early console output in SPL
>
> V2 changes:
> ADD include omap_common.h in board.c
> ADD implement new omap common interface omap_boot_device, omap_boot_mode and
> omap_rev_string (very basic)
> CHG cosmetic
> CHG Don't add ecc switch command in SPL
> ADD save_boot_params stump with warning to implement it
>
> Transition from V1 to V2 also includes that this patch is now based on
> - the new SPL layout by Aneesh V and Daniel Schwierzeck
> - the OMAP4 SPL patches by Aneesh V
>
> This is in some parts a anccesstor of "[U-Boot,2/5] devkit8000 nand_spl: omap3
> support nand_spl boot"
> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114) in V1
>
> Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
> ---
> arch/arm/cpu/armv7/omap3/board.c | 36 +++++++++++++++++++++++++-
> arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 +++
> arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
> arch/arm/include/asm/omap_common.h | 3 +-
> 4 files changed, 41 insertions(+), 4 deletions(-)
<snip>
> --- a/arch/arm/include/asm/omap_common.h
> +++ b/arch/arm/include/asm/omap_common.h
> @@ -49,8 +49,7 @@ void preloader_console_init(void);
> #define MMCSD_MODE_UNDEFINED 0
> #define MMCSD_MODE_RAW 1
> #define MMCSD_MODE_FAT 2
> -#define NAND_MODE_HW 3
> -#define NAND_MODE_SW 4
> +#define NAND_MODE_HW_ECC 3
Well ... just choose this naming in Patch 2/5 ... and also change NAND_MODE_SW
> u32 omap_boot_device(void);
> u32 omap_boot_mode(void);
> --
> 1.7.4.1
regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V2 5/5] devkit8000: Add nand-spl support for new SPL
2011-07-25 18:05 ` [U-Boot] [PATCH V2 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
@ 2011-07-26 6:17 ` Andreas Bießmann
2011-07-26 9:09 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Andreas Bießmann @ 2011-07-26 6:17 UTC (permalink / raw)
To: u-boot
Dear Simon,
Am 25.07.2011 um 20:05 schrieb Simon Schwarz:
> Add NAND SPL support to the devkit8000 config
>
> ---
> V1 changes:
> ADD devkit8000_nand to board.cfg
> ADD nand_spl Makefile, llinker script, spl-devkit8000.c
> ADD config ecc, SRAM, SPL to board config
> ADD CONFIG_SYS_SRAM_START and _SIZE to board config
> ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config
>
> V2 changes:
> ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER, NAND and
> CONFIG_SPL_LDSCRIPT to board config
> CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_*
> ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config: Where to
> expect u-boot and where to load it.
> ADD some barrier to not build board_eth_init in SPL
> DEL no changes to board.cfg
> DEL everything used the old nand_spl layout (Makefile, linker script,
> spl-devkit8000.c)
> CHG cosmetic
>
> Transition from V1 to V2 also includes that this patch is now based on
> - the new SPL layout by Aneesh V and Daniel Schwierzeck
> - the OMAP4 SPL patches by Aneesh V
>
> This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl
> support"
> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)
>
> Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
Put your SoB before the first '---'!
> ---
> board/timll/devkit8000/devkit8000.c | 2 +-
> include/configs/devkit8000.h | 46 +++++++++++++++++++++++++++++++++++
> 2 files changed, 47 insertions(+), 1 deletions(-)
>
> diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
> index 95afaaa..9b53742 100644
> --- a/board/timll/devkit8000/devkit8000.c
> +++ b/board/timll/devkit8000/devkit8000.c
> @@ -119,7 +119,7 @@ void set_muxconf_regs(void)
> MUX_DEVKIT8000();
> }
>
> -#ifdef CONFIG_DRIVER_DM9000
> +#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
> /*
> * Routine: board_eth_init
> * Description: Setting up the Ethernet hardware.
> diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
> index 125c690..46c1e3d 100644
> --- a/include/configs/devkit8000.h
> +++ b/include/configs/devkit8000.h
> @@ -307,4 +307,50 @@
> CONFIG_SYS_INIT_RAM_SIZE - \
> GENERATED_GBL_DATA_SIZE)
>
> +/* SRAM config */
> +#define CONFIG_SYS_SRAM_START 0x40200000
> +#define CONFIG_SYS_SRAM_SIZE 0xFFFF /*64 kB*/
64 kB is (64 << 10) which is 0x10000!
0xFFFF is 64 kB - 1
> +
> +/* Defines for SPL */
> +#define CONFIG_SPL
> +
> +#define CONFIG_SPL_LIBCOMMON_SUPPORT
> +#define CONFIG_SPL_LIBDISK_SUPPORT
> +#define CONFIG_SPL_I2C_SUPPORT
> +#define CONFIG_SPL_LIBGENERIC_SUPPORT
> +#define CONFIG_SPL_SERIAL_SUPPORT
> +#define CONFIG_SPL_POWER_SUPPORT
> +#define CONFIG_SPL_NAND_SUPPORT
> +#define CONFIG_SPL_LDSCRIPT $(CPUDIR)/omap-common/u-boot-spl.lds
> +
> +#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
> +#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */
This is correct
> +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
> +
> +#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
> +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
> +
> +/* NAND boot config */
> +#define CONFIG_SYS_NAND_PAGE_COUNT 64
> +#define CONFIG_SYS_NAND_PAGE_SIZE 2048
> +#define CONFIG_SYS_NAND_OOBSIZE 64
> +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
> +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
> +#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
> + 10, 11, 12, 13}
> +
> +#define CONFIG_SYS_NAND_ECCSIZE 512
> +#define CONFIG_SYS_NAND_ECCBYTES 3
> +
> +#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
> + CONFIG_SYS_NAND_ECCSIZE)
> +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
> + CONFIG_SYS_NAND_ECCSTEPS)
> +
> +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
> +
> +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
> +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
> +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
> +
> #endif /* __CONFIG_H */
> --
> 1.7.4.1
regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V2 2/5] omap-common: add nand spl support
2011-07-26 6:07 ` Andreas Bießmann
@ 2011-07-26 8:42 ` Simon Schwarz
2011-07-28 6:20 ` Aneesh V
0 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 8:42 UTC (permalink / raw)
To: u-boot
Dear Andreas,
On 07/26/2011 08:07 AM, Andreas Bie?mann wrote:
> Dear Simon,
>
> Am 25.07.2011 um 20:05 schrieb Simon Schwarz:
>
>> Add NAND support for the new SPL structure.
>>
>> ---
>> This patch didn't exist before V2!
>>
>> V2 changes:
>> ADD Some define-barriers for OMAP3 to only use NAND
>> ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
>> header
>> CHG cosmetic
>> ADD do_reset() implementation for omap-common spl
>> ADD nand_copy_image to nand.h
>> ADD CPP barriers for mmc and nand support. The parts depending on library
>> support are only compiled if the respective library is included.
>>
>> Transition from V1 to V2 also includes that this patch is now based on
>> - the new SPL layout by Aneesh V and Daniel Schwierzeck
>> - the OMAP4 SPL patches by Aneesh V
>>
>> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
>> ---
>> arch/arm/cpu/armv7/omap-common/spl.c | 43 ++++++++++++++++++++++++++++++++++
>> arch/arm/include/asm/omap_common.h | 2 +
>> include/nand.h | 3 ++
>> 3 files changed, 48 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
>> index d177652..3a0093d 100644
>> --- a/arch/arm/cpu/armv7/omap-common/spl.c
>> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
>> @@ -26,6 +26,7 @@
>> #include<asm/u-boot.h>
>> #include<asm/utils.h>
>> #include<asm/arch/sys_proto.h>
>> +#include<nand.h>
>> #include<mmc.h>
>> #include<fat.h>
>> #include<timestamp_autogenerated.h>
>> @@ -107,6 +108,7 @@ static void parse_image_header(const struct image_header *header)
>> }
>> }
>>
>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>> static void mmc_load_image_raw(struct mmc *mmc)
>> {
>> u32 image_size_sectors, err;
>> @@ -140,7 +142,9 @@ end:
>> hang();
>> }
>> }
>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>>
>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>> static void mmc_load_image_fat(struct mmc *mmc)
>> {
>> s32 err;
>> @@ -173,7 +177,9 @@ end:
>> hang();
>> }
>> }
>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>>
>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>> static void mmc_load_image(void)
>> {
>> struct mmc *mmc;
>> @@ -206,6 +212,26 @@ static void mmc_load_image(void)
>> hang();
>> }
>> }
>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>> +
>> +#ifdef CONFIG_SPL_NAND_SUPPORT
>> +static void nand_load_image(void)
>> +{
>> + gpmc_init();
>> + nand_init();
>> + nand_copy_image(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
>> + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
>> +#ifdef CONFIG_NAND_ENV_DST
>> + nand_copy_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
>> + (uchar *)CONFIG_NAND_ENV_DST);
>> +#ifdef CONFIG_ENV_OFFSET_REDUND
>> + nand_copy_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
>> + (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
>> +#endif
>> +#endif
>> + parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
>> +}
>> +#endif /* CONFIG_SPL_NAND_SUPPORT */
>>
>> void jump_to_image_no_args(void)
>> {
>> @@ -228,10 +254,17 @@ void board_init_r(gd_t *id, ulong dummy)
>> boot_device = omap_boot_device();
>> debug("boot device - %d\n", boot_device);
>> switch (boot_device) {
>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>> case BOOT_DEVICE_MMC1:
>> case BOOT_DEVICE_MMC2:
>> mmc_load_image();
>> break;
>> +#endif
>> +#ifdef CONFIG_SPL_NAND_SUPPORT
>> + case BOOT_DEVICE_NAND:
>> + nand_load_image();
>> + break;
>> +#endif
>> default:
>> printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
>> hang();
>> @@ -259,7 +292,9 @@ void preloader_console_init(void)
>> gd->flags |= GD_FLG_RELOC;
>> gd->baudrate = CONFIG_BAUDRATE;
>>
>> +#ifndef CONFIG_OMAP34XX
>
> Well .. that was discussed with Aneesh in another mail. I prefer Aneesh decides how the interface should be:
> a) OMAP3 provides setup_clocks_for_console() and remove the UART stuff from per_clocks_enable()
> b) remove setup_clocks_for_console() here and require preloader_console_init() to have the clocks enabled before
>
Totally agree. I just wait for a reply by Aneesh and will change it.
>> setup_clocks_for_console();
>> +#endif
>> serial_init(); /* serial communications setup */
>>
>> /* Avoid a second "U-Boot" coming from this string */
>> @@ -270,3 +305,11 @@ void preloader_console_init(void)
>> omap_rev_string(rev_string_buffer);
>> printf("Texas Instruments %s\n", rev_string_buffer);
>> }
>
> Some comment would be useful why this is here ..
will add this
>
>> +
>> +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
>> +{
>> + debug("resetting cpu...");
>> + reset_cpu(0);
>> +
>> + return 0;
>> +}
>> diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
>> index d3cb857..ee45a33 100644
>> --- a/arch/arm/include/asm/omap_common.h
>> +++ b/arch/arm/include/asm/omap_common.h
>> @@ -49,6 +49,8 @@ void preloader_console_init(void);
>> #define MMCSD_MODE_UNDEFINED 0
>> #define MMCSD_MODE_RAW 1
>> #define MMCSD_MODE_FAT 2
>> +#define NAND_MODE_HW 3
>> +#define NAND_MODE_SW 4
>
> Shouldn't that name NAND_ECC_MODE_(HW|SW) or something?
Will change
>
>> u32 omap_boot_device(void);
>> u32 omap_boot_mode(void);
>> diff --git a/include/nand.h b/include/nand.h
>> index 8d94b5c..084c017 100644
>> --- a/include/nand.h
>> +++ b/include/nand.h
>> @@ -132,6 +132,8 @@ int nand_lock( nand_info_t *meminfo, int tight );
>> int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
>> int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
>>
>> +void nand_copy_image(unsigned int offs, unsigned int size, uchar *dst);
>> +
>> #ifdef CONFIG_SYS_NAND_SELECT_DEVICE
>> void board_nand_select_device(struct nand_chip *nand, int chip);
>> #endif
>> @@ -148,3 +150,4 @@ __attribute__((noreturn)) void nand_boot(void);
>> #define ENV_OFFSET_SIZE 8
>> int get_nand_env_oob(nand_info_t *nand, unsigned long *result);
>> #endif
>> +
>
> This single line is useless.
Done.
>> --
>> 1.7.4.1
>
> regards
>
> Andreas Bie?mann
>
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V2 3/5] nand spl: add NAND Library to new SPL
2011-07-26 5:59 ` Andreas Bießmann
@ 2011-07-26 8:47 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 8:47 UTC (permalink / raw)
To: u-boot
Dear Andreas,
On 07/26/2011 07:59 AM, Andreas Bie?mann wrote:
> Dear Simon,
>
> Am 25.07.2011 um 20:05 schrieb Simon Schwarz:
>
>> Insert some NAND driver sources into NAND SPL library.
>>
>> ---
>> V1 changes:
>> CHG Default to HW ecc in SPL build
>> ADD nand_read_buf16 function, read buffer
>> ADD omap_dev_ready function, indicte if chip is ready
>>
>> V2 changes:
>> DEL GPMC_WAIT0_PIN_ACTIVE define
>> CHG omap_dev_ready() renamed to omap_spl_dev_ready(), does not use the
>> GPMC_WAIT0_PIN_ACTIVE-define anymore
>> CHG ogpmc_read_buf16 renamed omap_spl_read_buf16
>> ADD omap_spl_read_buf, 8x buf read function
>> ADD CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to SPL
>> CHG cosmetic
>> CHG nand_base and nand_bbt aren't needed for SPL anymore
>> CHG omap_nand_switch_ecc is not compiled for SPL
>> ADD entry for CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to README.SPL
>>
>> Transition from V1 to V2 also includes that this patch is now based on
>> - the new SPL layout by Aneesh V and Daniel Schwierzeck
>> - the OMAP4 SPL patches by Aneesh V
>>
>> This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND support
>> to omap_gpmc driver"
>> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1
>>
>> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
>> ---
>> doc/README.SPL | 2 +
>> drivers/mtd/nand/Makefile | 6 +++-
>> drivers/mtd/nand/omap_gpmc.c | 69 ++++++++++++++++++++++++++++++++++++++++++
>> spl/Makefile | 2 +
>> 4 files changed, 78 insertions(+), 1 deletions(-)
>
> <snip>
>
>> --- a/drivers/mtd/nand/omap_gpmc.c
>> +++ b/drivers/mtd/nand/omap_gpmc.c
>> @@ -61,6 +61,55 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
>> writeb(cmd, this->IO_ADDR_W);
>> }
>
> <snip>
>
>> @@ -224,6 +273,8 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
>> }
>> }
>>
>> +
>
> This single line is unnecessary.
deleted...
>
>> +#ifndef CONFIG_SPL_BUILD
>> /*
>> * omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc.
>> * The default is to come up on s/w ecc
>> @@ -280,6 +331,7 @@ void omap_nand_switch_ecc(int32_t hardware)
>>
>
> regards
>
> Andreas Bie?mann
regards
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V2 5/5] devkit8000: Add nand-spl support for new SPL
2011-07-26 6:17 ` Andreas Bießmann
@ 2011-07-26 9:09 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 9:09 UTC (permalink / raw)
To: u-boot
Dear Andreas,
On 07/26/2011 08:17 AM, Andreas Bie?mann wrote:
> Dear Simon,
>
> Am 25.07.2011 um 20:05 schrieb Simon Schwarz:
>
>> Add NAND SPL support to the devkit8000 config
>>
>> ---
>> V1 changes:
>> ADD devkit8000_nand to board.cfg
>> ADD nand_spl Makefile, llinker script, spl-devkit8000.c
>> ADD config ecc, SRAM, SPL to board config
>> ADD CONFIG_SYS_SRAM_START and _SIZE to board config
>> ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config
>>
>> V2 changes:
>> ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER, NAND and
>> CONFIG_SPL_LDSCRIPT to board config
>> CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_*
>> ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config: Where to
>> expect u-boot and where to load it.
>> ADD some barrier to not build board_eth_init in SPL
>> DEL no changes to board.cfg
>> DEL everything used the old nand_spl layout (Makefile, linker script,
>> spl-devkit8000.c)
>> CHG cosmetic
>>
>> Transition from V1 to V2 also includes that this patch is now based on
>> - the new SPL layout by Aneesh V and Daniel Schwierzeck
>> - the OMAP4 SPL patches by Aneesh V
>>
>> This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl
>> support"
>> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)
>>
>> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
>
> Put your SoB before the first '---'!
Changed.
>> ---
>> board/timll/devkit8000/devkit8000.c | 2 +-
>> include/configs/devkit8000.h | 46 +++++++++++++++++++++++++++++++++++
>> 2 files changed, 47 insertions(+), 1 deletions(-)
>>
>> diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
>> index 95afaaa..9b53742 100644
>> --- a/board/timll/devkit8000/devkit8000.c
>> +++ b/board/timll/devkit8000/devkit8000.c
>> @@ -119,7 +119,7 @@ void set_muxconf_regs(void)
>> MUX_DEVKIT8000();
>> }
>>
>> -#ifdef CONFIG_DRIVER_DM9000
>> +#if defined(CONFIG_DRIVER_DM9000)& !defined(CONFIG_SPL_BUILD)
>> /*
>> * Routine: board_eth_init
>> * Description: Setting up the Ethernet hardware.
>> diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
>> index 125c690..46c1e3d 100644
>> --- a/include/configs/devkit8000.h
>> +++ b/include/configs/devkit8000.h
>> @@ -307,4 +307,50 @@
>> CONFIG_SYS_INIT_RAM_SIZE - \
>> GENERATED_GBL_DATA_SIZE)
>>
>> +/* SRAM config */
>> +#define CONFIG_SYS_SRAM_START 0x40200000
>> +#define CONFIG_SYS_SRAM_SIZE 0xFFFF /*64 kB*/
>
> 64 kB is (64<< 10) which is 0x10000!
> 0xFFFF is 64 kB - 1
Changed.
>> +
>> +/* Defines for SPL */
>> +#define CONFIG_SPL
>> +
>> +#define CONFIG_SPL_LIBCOMMON_SUPPORT
>> +#define CONFIG_SPL_LIBDISK_SUPPORT
>> +#define CONFIG_SPL_I2C_SUPPORT
>> +#define CONFIG_SPL_LIBGENERIC_SUPPORT
>> +#define CONFIG_SPL_SERIAL_SUPPORT
>> +#define CONFIG_SPL_POWER_SUPPORT
>> +#define CONFIG_SPL_NAND_SUPPORT
>> +#define CONFIG_SPL_LDSCRIPT $(CPUDIR)/omap-common/u-boot-spl.lds
>> +
>> +#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
>> +#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */
>
> This is correct
>
>> +#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
>> +
>> +#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
>> +#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
>> +
>> +/* NAND boot config */
>> +#define CONFIG_SYS_NAND_PAGE_COUNT 64
>> +#define CONFIG_SYS_NAND_PAGE_SIZE 2048
>> +#define CONFIG_SYS_NAND_OOBSIZE 64
>> +#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
>> +#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
>> +#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
>> + 10, 11, 12, 13}
>> +
>> +#define CONFIG_SYS_NAND_ECCSIZE 512
>> +#define CONFIG_SYS_NAND_ECCBYTES 3
>> +
>> +#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
>> + CONFIG_SYS_NAND_ECCSIZE)
>> +#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
>> + CONFIG_SYS_NAND_ECCSTEPS)
>> +
>> +#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
>> +
>> +#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
>> +#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
>> +#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
>> +
>> #endif /* __CONFIG_H */
>> --
>> 1.7.4.1
>
> regards
>
> Andreas Bie?mann
>
Regards
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support
2011-07-25 18:05 ` [U-Boot] [PATCH V2 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
` (4 preceding siblings ...)
2011-07-25 18:05 ` [U-Boot] [PATCH V2 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
@ 2011-07-26 10:22 ` Simon Schwarz
2011-07-26 10:22 ` [U-Boot] [PATCH V3 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
` (6 more replies)
5 siblings, 7 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 10:22 UTC (permalink / raw)
To: u-boot
V1 Initial SPL support for OMAP3 was based on the old SPL
V2 Introduced major changes. It is based on the OMAP4-SPL patch by Aneesh V
and the new SPL Framework by Daniel Schwierzeck and Aneesh V
V3 Some small bug fixes and correct placed SOB.
This is based on the following patches:
- New SPL framework
- OMAP4 SPL
Both are already in u-boot-ti repo.
Simon Schwarz (5):
omap3: Configure RAM bank 0 if in SPL
omap-common: add nand spl support
nand spl: add NAND Library to new SPL
omap3: new SPL structure support
devkit8000: Add nand-spl support for new SPL
arch/arm/cpu/armv7/omap-common/spl.c | 45 ++++++++++++++++++
arch/arm/cpu/armv7/omap3/board.c | 36 +++++++++++++-
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 ++
arch/arm/cpu/armv7/omap3/sdrc.c | 30 +++++++++++-
arch/arm/include/asm/arch-omap3/mem.h | 36 ++++++++++++++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
arch/arm/include/asm/omap_common.h | 1 +
board/timll/devkit8000/devkit8000.c | 2 +-
doc/README.SPL | 2 +
drivers/mtd/nand/Makefile | 6 ++-
drivers/mtd/nand/omap_gpmc.c | 68 +++++++++++++++++++++++++++
include/configs/devkit8000.h | 46 ++++++++++++++++++
include/nand.h | 2 +
spl/Makefile | 2 +
14 files changed, 277 insertions(+), 5 deletions(-)
--
1.7.4.1
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V3 1/5] omap3: Configure RAM bank 0 if in SPL
2011-07-26 10:22 ` [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
@ 2011-07-26 10:22 ` Simon Schwarz
2011-07-26 10:22 ` [U-Boot] [PATCH V3 2/5] omap-common: add nand spl support Simon Schwarz
` (5 subsequent siblings)
6 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 10:22 UTC (permalink / raw)
To: u-boot
OMAP3 relied on the memory config done by X-loader or Configuration Header. This
has to be reworked for the implementation of a SPL. This patch configures RAM
bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000
are added to mem.h
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD Settings for Micron RAM
V2 changes:
DEL spl_debug outputs if mem test fails/passes
CHG CONFIG_PRELOADER to CONFIG_SPL_BUILD
V3 changes:
none
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,3/5] devkit8000 nand_spl: Add RAM
configuration independent of x-loader or CH"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114)
---
arch/arm/cpu/armv7/omap3/sdrc.c | 30 ++++++++++++++++++++++++++-
arch/arm/include/asm/arch-omap3/mem.h | 36 +++++++++++++++++++++++++++++++++
2 files changed, 65 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index 2a7970b..dac14d0 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -8,6 +8,9 @@
* Copyright (C) 2004-2010
* Texas Instruments Incorporated - http://www.ti.com/
*
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
+ *
* Author :
* Vaibhav Hiremath <hvaibhav@ti.com>
*
@@ -133,13 +136,38 @@ void do_sdrc_init(u32 cs, u32 early)
sdelay(0x20000);
}
+#ifdef CONFIG_SPL_BUILD
+ /* If we use a SPL there is no x-loader nor config header so we have
+ * to do the job ourselfs
+ */
+ if (cs == CS0) {
+ sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
+
+ /* General SDRC config */
+ writel(V_MCFG, &sdrc_base->cs[cs].mcfg);
+ writel(V_RFR_CTRL, &sdrc_base->cs[cs].rfr_ctrl);
+
+ /* AC timings */
+ writel(V_ACTIMA_165, &sdrc_actim_base0->ctrla);
+ writel(V_ACTIMB_165, &sdrc_actim_base0->ctrlb);
+
+ /* Initialize */
+ writel(CMD_NOP, &sdrc_base->cs[cs].manual);
+ writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+
+ writel(V_MR, &sdrc_base->cs[cs].mr);
+ }
+#endif /* CONFIG_SPL_BUILD */
+
/*
* SDRC timings are set up by x-load or config header
* We don't need to redo them here.
* Older x-loads configure only CS0
* configure CS1 to handle this ommission
*/
- if (cs) {
+ if (cs == CS1) {
sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
writel(readl(&sdrc_base->cs[CS0].mcfg),
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
index f165949..8e28f77 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -128,6 +128,33 @@ enum {
(MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) | \
(MICRON_TWTR_165 << 16))
+#define MICRON_RAMTYPE 0x1
+#define MICRON_DDRTYPE 0x0
+#define MICRON_DEEPPD 0x1
+#define MICRON_B32NOT16 0x1
+#define MICRON_BANKALLOCATION 0x2
+#define MICRON_RAMSIZE ((PHYS_SDRAM_1_SIZE/(1024*1024))/2)
+#define MICRON_ADDRMUXLEGACY 0x1
+#define MICRON_CASWIDTH 0x5
+#define MICRON_RASWIDTH 0x2
+#define MICRON_LOCKSTATUS 0x0
+#define MICRON_V_MCFG ((MICRON_LOCKSTATUS << 30) | (MICRON_RASWIDTH << 24) | \
+ (MICRON_CASWIDTH << 20) | (MICRON_ADDRMUXLEGACY << 19) | \
+ (MICRON_RAMSIZE << 8) | (MICRON_BANKALLOCATION << 6) | \
+ (MICRON_B32NOT16 << 4) | (MICRON_DEEPPD << 3) | \
+ (MICRON_DDRTYPE << 2) | (MICRON_RAMTYPE))
+
+#define MICRON_ARCV 2030
+#define MICRON_ARE 0x1
+#define MICRON_V_RFR_CTRL ((MICRON_ARCV << 8) | (MICRON_ARE))
+
+#define MICRON_BL 0x2
+#define MICRON_SIL 0x0
+#define MICRON_CASL 0x3
+#define MICRON_WBST 0x0
+#define MICRON_V_MR ((MICRON_WBST << 9) | (MICRON_CASL << 4) | \
+ (MICRON_SIL << 3) | (MICRON_BL))
+
/*
* NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns
* ACTIMA
@@ -171,10 +198,15 @@ enum {
#define V_ACTIMA_165 INFINEON_V_ACTIMA_165
#define V_ACTIMB_165 INFINEON_V_ACTIMB_165
#endif
+
#ifdef CONFIG_OMAP3_MICRON_DDR
#define V_ACTIMA_165 MICRON_V_ACTIMA_165
#define V_ACTIMB_165 MICRON_V_ACTIMB_165
+#define V_MCFG MICRON_V_MCFG
+#define V_RFR_CTRL MICRON_V_RFR_CTRL
+#define V_MR MICRON_V_MR
#endif
+
#ifdef CONFIG_OMAP3_NUMONYX_DDR
#define V_ACTIMA_165 NUMONYX_V_ACTIMA_165
#define V_ACTIMB_165 NUMONYX_V_ACTIMB_165
@@ -184,6 +216,10 @@ enum {
#error "Please choose the right DDR type in config header"
#endif
+#if defined(CONFIG_SPL_BUILD) && (!defined(V_MCFG) || !defined(V_RFR_CTRL))
+#error "Please choose the right DDR type in config header"
+#endif
+
/*
* GPMC settings -
* Definitions is as per the following format
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V3 2/5] omap-common: add nand spl support
2011-07-26 10:22 ` [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-07-26 10:22 ` [U-Boot] [PATCH V3 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
@ 2011-07-26 10:22 ` Simon Schwarz
2011-07-26 10:22 ` [U-Boot] [PATCH V3 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
` (4 subsequent siblings)
6 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 10:22 UTC (permalink / raw)
To: u-boot
Add NAND support for the new SPL structure.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
This patch didn't exist before V2!
V2 changes:
ADD Some define-barriers for OMAP3 to only use NAND
ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
header
CHG cosmetic
ADD do_reset() implementation for omap-common spl
ADD nand_copy_image to nand.h
ADD CPP barriers for mmc and nand support. The parts depending on library
support are only compiled if the respective library is included.
V3 changes:
ADD Comment why setup_clocks_for_console() isn't called for OMAP3
CHG cosmetic (deleted empty line)
CHG rename of NAND_MODE_HW to NAND_MODE_HW_ECC
DEL NAND_MODE_SW. Not used.
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
---
arch/arm/cpu/armv7/omap-common/spl.c | 45 ++++++++++++++++++++++++++++++++++
arch/arm/include/asm/omap_common.h | 1 +
include/nand.h | 2 +
3 files changed, 48 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
index d177652..591348f 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -26,6 +26,7 @@
#include <asm/u-boot.h>
#include <asm/utils.h>
#include <asm/arch/sys_proto.h>
+#include <nand.h>
#include <mmc.h>
#include <fat.h>
#include <timestamp_autogenerated.h>
@@ -107,6 +108,7 @@ static void parse_image_header(const struct image_header *header)
}
}
+#ifdef CONFIG_SPL_MMC_SUPPORT
static void mmc_load_image_raw(struct mmc *mmc)
{
u32 image_size_sectors, err;
@@ -140,7 +142,9 @@ end:
hang();
}
}
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+#ifdef CONFIG_SPL_MMC_SUPPORT
static void mmc_load_image_fat(struct mmc *mmc)
{
s32 err;
@@ -173,7 +177,9 @@ end:
hang();
}
}
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+#ifdef CONFIG_SPL_MMC_SUPPORT
static void mmc_load_image(void)
{
struct mmc *mmc;
@@ -206,6 +212,26 @@ static void mmc_load_image(void)
hang();
}
}
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+
+#ifdef CONFIG_SPL_NAND_SUPPORT
+static void nand_load_image(void)
+{
+ gpmc_init();
+ nand_init();
+ nand_copy_image(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
+ (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
+#ifdef CONFIG_NAND_ENV_DST
+ nand_copy_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_NAND_ENV_DST);
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ nand_copy_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
+#endif
+#endif
+ parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
+}
+#endif /* CONFIG_SPL_NAND_SUPPORT */
void jump_to_image_no_args(void)
{
@@ -228,10 +254,17 @@ void board_init_r(gd_t *id, ulong dummy)
boot_device = omap_boot_device();
debug("boot device - %d\n", boot_device);
switch (boot_device) {
+#ifdef CONFIG_SPL_MMC_SUPPORT
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
mmc_load_image();
break;
+#endif
+#ifdef CONFIG_SPL_NAND_SUPPORT
+ case BOOT_DEVICE_NAND:
+ nand_load_image();
+ break;
+#endif
default:
printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
hang();
@@ -259,7 +292,11 @@ void preloader_console_init(void)
gd->flags |= GD_FLG_RELOC;
gd->baudrate = CONFIG_BAUDRATE;
+/* Console clock for OMAP3 is already initialized by per_clocks_enable()
+ * called in board.c by s_init() */
+#ifndef CONFIG_OMAP34XX
setup_clocks_for_console();
+#endif
serial_init(); /* serial communications setup */
/* Avoid a second "U-Boot" coming from this string */
@@ -270,3 +307,11 @@ void preloader_console_init(void)
omap_rev_string(rev_string_buffer);
printf("Texas Instruments %s\n", rev_string_buffer);
}
+
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ debug("resetting cpu...");
+ reset_cpu(0);
+
+ return 0;
+}
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index d3cb857..13f6884 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -49,6 +49,7 @@ void preloader_console_init(void);
#define MMCSD_MODE_UNDEFINED 0
#define MMCSD_MODE_RAW 1
#define MMCSD_MODE_FAT 2
+#define NAND_MODE_HW_ECC 3
u32 omap_boot_device(void);
u32 omap_boot_mode(void);
diff --git a/include/nand.h b/include/nand.h
index 8d94b5c..e0f20f6 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -132,6 +132,8 @@ int nand_lock( nand_info_t *meminfo, int tight );
int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
+void nand_copy_image(unsigned int offs, unsigned int size, uchar *dst);
+
#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
void board_nand_select_device(struct nand_chip *nand, int chip);
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V3 3/5] nand spl: add NAND Library to new SPL
2011-07-26 10:22 ` [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-07-26 10:22 ` [U-Boot] [PATCH V3 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
2011-07-26 10:22 ` [U-Boot] [PATCH V3 2/5] omap-common: add nand spl support Simon Schwarz
@ 2011-07-26 10:22 ` Simon Schwarz
2011-07-26 10:22 ` [U-Boot] [PATCH V3 4/5] omap3: new SPL structure support Simon Schwarz
` (3 subsequent siblings)
6 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 10:22 UTC (permalink / raw)
To: u-boot
Insert some NAND driver sources into NAND SPL library.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
CHG Default to HW ecc in SPL build
ADD nand_read_buf16 function, read buffer
ADD omap_dev_ready function, indicte if chip is ready
V2 changes:
DEL GPMC_WAIT0_PIN_ACTIVE define
CHG omap_dev_ready() renamed to omap_spl_dev_ready(), does not use the
GPMC_WAIT0_PIN_ACTIVE-define anymore
CHG ogpmc_read_buf16 renamed omap_spl_read_buf16
ADD omap_spl_read_buf, 8x buf read function
ADD CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to SPL
CHG cosmetic
CHG nand_base and nand_bbt aren't needed for SPL anymore
CHG omap_nand_switch_ecc is not compiled for SPL
ADD entry for CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to README.SPL
V3 changes:
DEL cosmetic (empty line)
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND support
to omap_gpmc driver"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1
---
doc/README.SPL | 2 +
drivers/mtd/nand/Makefile | 6 +++-
drivers/mtd/nand/omap_gpmc.c | 68 ++++++++++++++++++++++++++++++++++++++++++
spl/Makefile | 2 +
4 files changed, 77 insertions(+), 1 deletions(-)
diff --git a/doc/README.SPL b/doc/README.SPL
index ce8e19f..2987f43 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -60,3 +60,5 @@ CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
CONFIG_SPL_SPI_SUPPORT (drivers/spi/libspi.o)
CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
+CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
+CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 8b598f6..cdc9a14 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -26,12 +26,16 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libnand.o
ifdef CONFIG_CMD_NAND
+ifdef CONFIG_SPL_BUILD
+COBJS-y += nand_spl.o
+else
COBJS-y += nand.o
COBJS-y += nand_base.o
COBJS-y += nand_bbt.o
-COBJS-y += nand_ecc.o
COBJS-y += nand_ids.o
COBJS-y += nand_util.o
+endif
+COBJS-y += nand_ecc.o
COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 99b9cef..61eac35 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -61,6 +61,55 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
writeb(cmd, this->IO_ADDR_W);
}
+#ifdef CONFIG_SPL_BUILD
+/* Check wait pin as dev ready indicator */
+int omap_spl_dev_ready(struct mtd_info *mtd)
+{
+ return gpmc_cfg->status & (1 << 8);
+}
+
+/*
+ * omap_spl_read_buf16 - [DEFAULT] read chip data into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ * Default read function for 16bit buswith
+ *
+ * This function is based on nand_read_buf16 from nand_base.c. This version
+ * reads 32bit not 16bit although the bus only has 16bit.
+ */
+static void omap_spl_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+ int i;
+ struct nand_chip *chip = mtd->priv;
+ u32 *p = (u32 *) buf;
+ len >>= 2;
+
+ for (i = 0; i < len; i++)
+ p[i] = readl(chip->IO_ADDR_R);
+}
+
+/*
+ * omap_spl_read_buf - [DEFAULT] read chip data into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ * Default read function for 8bit buswith
+ *
+ * This is the same function as this from nand_base.c nand_read_buf
+ */
+static void omap_spl_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+ int i;
+ struct nand_chip *chip = mtd->priv;
+
+ for (i = 0; i < len; i++)
+ buf[i] = readb(chip->IO_ADDR_R);
+}
+#endif
+
/*
* omap_hwecc_init - Initialize the Hardware ECC for NAND flash in
* GPMC controller
@@ -224,6 +273,7 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
}
}
+#ifndef CONFIG_SPL_BUILD
/*
* omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc.
* The default is to come up on s/w ecc
@@ -280,6 +330,7 @@ void omap_nand_switch_ecc(int32_t hardware)
nand->options &= ~NAND_OWN_BUFFERS;
}
+#endif /* CONFIG_SPL_BUILD */
/*
* Board-specific NAND initialization. The following members of the
@@ -338,7 +389,24 @@ int board_nand_init(struct nand_chip *nand)
nand->chip_delay = 100;
/* Default ECC mode */
+#ifndef CONFIG_SPL_BUILD
nand->ecc.mode = NAND_ECC_SOFT;
+#else
+ nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.layout = &hw_nand_oob;
+ nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
+ nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
+ nand->ecc.hwctl = omap_enable_hwecc;
+ nand->ecc.correct = omap_correct_data;
+ nand->ecc.calculate = omap_calculate_ecc;
+ omap_hwecc_init(nand);
+
+ if (nand->options & NAND_BUSWIDTH_16)
+ nand->read_buf = omap_spl_read_buf16;
+ else
+ nand->read_buf = omap_spl_read_buf;
+ nand->dev_ready = omap_spl_dev_ready;
+#endif
return 0;
}
diff --git a/spl/Makefile b/spl/Makefile
index 87f13f6..0c0d3c4 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -46,6 +46,8 @@ LIBS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/libspi_flash.o
LIBS-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/libspi.o
LIBS-$(CONFIG_SPL_FAT_SUPPORT) += fs/fat/libfat.o
LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o
+LIBS-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/libpower.o
+LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/libnand.o
ifeq ($(SOC),omap3)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V3 4/5] omap3: new SPL structure support
2011-07-26 10:22 ` [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
` (2 preceding siblings ...)
2011-07-26 10:22 ` [U-Boot] [PATCH V3 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
@ 2011-07-26 10:22 ` Simon Schwarz
2011-07-26 10:22 ` [U-Boot] [PATCH V3 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
` (2 subsequent siblings)
6 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 10:22 UTC (permalink / raw)
To: u-boot
Support for the new spl structure. Using the interface defined by Aneesh V for
OMAP4
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD support for early console output in SPL
V2 changes:
ADD include omap_common.h in board.c
ADD implement new omap common interface omap_boot_device, omap_boot_mode and
omap_rev_string (very basic)
CHG cosmetic
CHG Don't add ecc switch command in SPL
ADD save_boot_params stump with warning to implement it
V3 changes:
none
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is in some parts a anccesstor of "[U-Boot,2/5] devkit8000 nand_spl: omap3
support nand_spl boot"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114) in V1
---
arch/arm/cpu/armv7/omap3/board.c | 36 +++++++++++++++++++++++++-
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 +++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
3 files changed, 40 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 4aaf97b..2f6d01c 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -39,6 +39,7 @@
#include <asm/cache.h>
#include <asm/armv7.h>
#include <asm/omap_gpio.h>
+#include <asm/omap_common.h>
/* Declarations */
extern omap3_sysinfo sysinfo;
@@ -56,6 +57,28 @@ static const struct gpio_bank gpio_bank_34xx[6] = {
const struct gpio_bank *const omap_gpio_bank = gpio_bank_34xx;
+#ifdef CONFIG_SPL_BUILD
+/*
+* We use static variables because global data is not ready yet.
+* Initialized data is available in SPL right from the beginning.
+* We would not typically need to save these parameters in regular
+* U-Boot. This is needed only in SPL at the moment.
+*/
+u32 omap3_boot_device = BOOT_DEVICE_NAND;
+u32 omap3_boot_mode = NAND_MODE_HW_ECC;
+
+u32 omap_boot_device(void)
+{
+ return omap3_boot_device;
+}
+
+u32 omap_boot_mode(void)
+{
+ return omap3_boot_mode;
+}
+#endif /* CONFIG_SPL_BUILD */
+
+
/******************************************************************************
* Routine: delay
* Description: spinning delay to use before udelay works
@@ -197,6 +220,10 @@ void s_init(void)
per_clocks_enable();
+#ifdef CONFIG_SPL_BUILD
+ preloader_console_init();
+#endif
+
if (!in_sdram)
mem_init();
}
@@ -245,7 +272,7 @@ void abort(void)
{
}
-#ifdef CONFIG_NAND_OMAP_GPMC
+#if defined(CONFIG_NAND_OMAP_GPMC) & !defined(CONFIG_SPL_BUILD)
/******************************************************************************
* OMAP3 specific command to switch between NAND HW and SW ecc
*****************************************************************************/
@@ -273,7 +300,7 @@ U_BOOT_CMD(
"[hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc algorithm"
);
-#endif /* CONFIG_NAND_OMAP_GPMC */
+#endif /* CONFIG_NAND_OMAP_GPMC & !CONFIG_SPL_BUILD */
#ifdef CONFIG_DISPLAY_BOARDINFO
/**
@@ -402,3 +429,8 @@ void v7_outer_cache_disable(void)
omap3_update_aux_cr(0, 0x2);
}
#endif
+
+void omap_rev_string(char *omap_rev_string)
+{
+ sprintf(omap_rev_string, "OMAP3, sorry revision detection unimplemented");
+}
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index 67e8ceb..48a7ec6 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -35,6 +35,11 @@
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
+.global save_boot_params
+save_boot_params:
+ #warning "Please implement save_boot_params for OMAP3"
+ bx lr
+
.global omap3_gp_romcode_call
omap3_gp_romcode_call:
PUSH {r4-r12, lr} @ Save all registers from ROM code!
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h
index 995e7cb..7b60051 100644
--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
@@ -71,4 +71,5 @@ void power_init_r(void);
void dieid_num_r(void);
void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
void omap3_gp_romcode_call(u32 service_id, u32 parameter);
+void omap_rev_string(char *omap_rev_string);
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V3 5/5] devkit8000: Add nand-spl support for new SPL
2011-07-26 10:22 ` [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
` (3 preceding siblings ...)
2011-07-26 10:22 ` [U-Boot] [PATCH V3 4/5] omap3: new SPL structure support Simon Schwarz
@ 2011-07-26 10:22 ` Simon Schwarz
2011-07-26 10:42 ` Andreas Bießmann
2011-07-26 11:04 ` Wolfgang Denk
2011-07-26 11:06 ` [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support Wolfgang Denk
2011-07-26 12:09 ` [U-Boot] [PATCH V4 " Simon Schwarz
6 siblings, 2 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 10:22 UTC (permalink / raw)
To: u-boot
Add NAND SPL support to the devkit8000 config
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD devkit8000_nand to board.cfg
ADD nand_spl Makefile, llinker script, spl-devkit8000.c
ADD config ecc, SRAM, SPL to board config
ADD CONFIG_SYS_SRAM_START and _SIZE to board config
ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config
V2 changes:
ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER, NAND and
CONFIG_SPL_LDSCRIPT to board config
CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_*
ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config: Where to
expect u-boot and where to load it.
ADD some barrier to not build board_eth_init in SPL
DEL no changes to board.cfg
DEL everything used the old nand_spl layout (Makefile, linker script,
spl-devkit8000.c)
CHG cosmetic
V3 changes:
CHG Deleted wrong comment
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl
support"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)
---
board/timll/devkit8000/devkit8000.c | 2 +-
include/configs/devkit8000.h | 46 +++++++++++++++++++++++++++++++++++
2 files changed, 47 insertions(+), 1 deletions(-)
diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
index 95afaaa..9b53742 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -119,7 +119,7 @@ void set_muxconf_regs(void)
MUX_DEVKIT8000();
}
-#ifdef CONFIG_DRIVER_DM9000
+#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
/*
* Routine: board_eth_init
* Description: Setting up the Ethernet hardware.
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 125c690..22c9b8e 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -307,4 +307,50 @@
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
+/* SRAM config */
+#define CONFIG_SYS_SRAM_START 0x40200000
+#define CONFIG_SYS_SRAM_SIZE 0xFFFF
+
+/* Defines for SPL */
+#define CONFIG_SPL
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_LDSCRIPT $(CPUDIR)/omap-common/u-boot-spl.lds
+
+#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
+#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */
+#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
+
+#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
+#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+ 10, 11, 12, 13}
+
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 3
+
+#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
+ CONFIG_SYS_NAND_ECCSIZE)
+#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
+ CONFIG_SYS_NAND_ECCSTEPS)
+
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+
#endif /* __CONFIG_H */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V3 5/5] devkit8000: Add nand-spl support for new SPL
2011-07-26 10:22 ` [U-Boot] [PATCH V3 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
@ 2011-07-26 10:42 ` Andreas Bießmann
2011-07-26 12:34 ` Simon Schwarz
2011-07-26 11:04 ` Wolfgang Denk
1 sibling, 1 reply; 134+ messages in thread
From: Andreas Bießmann @ 2011-07-26 10:42 UTC (permalink / raw)
To: u-boot
Dear Simon,
Am 26.07.2011 12:22, schrieb Simon Schwarz:
> Add NAND SPL support to the devkit8000 config
>
> Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
> ---
> V1 changes:
> ADD devkit8000_nand to board.cfg
> ADD nand_spl Makefile, llinker script, spl-devkit8000.c
> ADD config ecc, SRAM, SPL to board config
> ADD CONFIG_SYS_SRAM_START and _SIZE to board config
> ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config
>
> V2 changes:
> ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER, NAND and
> CONFIG_SPL_LDSCRIPT to board config
> CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_*
> ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config: Where to
> expect u-boot and where to load it.
> ADD some barrier to not build board_eth_init in SPL
> DEL no changes to board.cfg
> DEL everything used the old nand_spl layout (Makefile, linker script,
> spl-devkit8000.c)
> CHG cosmetic
>
> V3 changes:
> CHG Deleted wrong comment
>
> Transition from V1 to V2 also includes that this patch is now based on
> - the new SPL layout by Aneesh V and Daniel Schwierzeck
> - the OMAP4 SPL patches by Aneesh V
>
> This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl
> support"
> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)
> ---
> board/timll/devkit8000/devkit8000.c | 2 +-
> include/configs/devkit8000.h | 46 +++++++++++++++++++++++++++++++++++
> 2 files changed, 47 insertions(+), 1 deletions(-)
>
> diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
> index 95afaaa..9b53742 100644
> --- a/board/timll/devkit8000/devkit8000.c
> +++ b/board/timll/devkit8000/devkit8000.c
> @@ -119,7 +119,7 @@ void set_muxconf_regs(void)
> MUX_DEVKIT8000();
> }
>
> -#ifdef CONFIG_DRIVER_DM9000
> +#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
> /*
> * Routine: board_eth_init
> * Description: Setting up the Ethernet hardware.
> diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
> index 125c690..22c9b8e 100644
> --- a/include/configs/devkit8000.h
> +++ b/include/configs/devkit8000.h
> @@ -307,4 +307,50 @@
> CONFIG_SYS_INIT_RAM_SIZE - \
> GENERATED_GBL_DATA_SIZE)
>
> +/* SRAM config */
> +#define CONFIG_SYS_SRAM_START 0x40200000
> +#define CONFIG_SYS_SRAM_SIZE 0xFFFF
you mentioned this as 'Changed' in your reply to my last review. It is
still unchanged (but comment about 64kB removed, so is the size not 64kB?).
regards
Andreas Bie?mann
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V3 5/5] devkit8000: Add nand-spl support for new SPL
2011-07-26 10:22 ` [U-Boot] [PATCH V3 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
2011-07-26 10:42 ` Andreas Bießmann
@ 2011-07-26 11:04 ` Wolfgang Denk
1 sibling, 0 replies; 134+ messages in thread
From: Wolfgang Denk @ 2011-07-26 11:04 UTC (permalink / raw)
To: u-boot
Dear Simon Schwarz,
In message <1311675739-10966-6-git-send-email-simonschwarzcor@gmail.com> you wrote:
> Add NAND SPL support to the devkit8000 config
...
> +#define CONFIG_SYS_SRAM_START 0x40200000
> +#define CONFIG_SYS_SRAM_SIZE 0xFFFF
As Andreas pointed out before this is wrong and needs to be fixed.
Please us a size that allows for proper alignment (like 0x10000).
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
The price one pays for pursuing any profession, or calling, is an
intimate knowledge of its ugly side. - James Baldwin
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support
2011-07-26 10:22 ` [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
` (4 preceding siblings ...)
2011-07-26 10:22 ` [U-Boot] [PATCH V3 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
@ 2011-07-26 11:06 ` Wolfgang Denk
2011-07-26 12:31 ` Simon Schwarz
2011-07-26 12:09 ` [U-Boot] [PATCH V4 " Simon Schwarz
6 siblings, 1 reply; 134+ messages in thread
From: Wolfgang Denk @ 2011-07-26 11:06 UTC (permalink / raw)
To: u-boot
Dear Simon Schwarz,
In message <1311675739-10966-1-git-send-email-simonschwarzcor@gmail.com> you wrote:
> V1 Initial SPL support for OMAP3 was based on the old SPL
> V2 Introduced major changes. It is based on the OMAP4-SPL patch by Aneesh V
> and the new SPL Framework by Daniel Schwierzeck and Aneesh V
> V3 Some small bug fixes and correct placed SOB.
>
> This is based on the following patches:
> - New SPL framework
> - OMAP4 SPL
> Both are already in u-boot-ti repo.
Please run all your patches through checkpatch BEFORE submitting.
For example, checkpatch reports a number of "line over 80 characters"
coding style violations distibuted all over your patches.
Please fix these globally.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
IMPORTANT NOTICE TO PURCHASERS: The Entire Physical Universe, Inclu-
ding This Product, May One Day Collapse Back into an Infinitesimally
Small Space. Should Another Universe Subsequently Re-emerge, the
Existence of This Product in That Universe Cannot Be Guaranteed.
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 0/5] OMAP3 and devkit8000 SPL support
2011-07-26 10:22 ` [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
` (5 preceding siblings ...)
2011-07-26 11:06 ` [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support Wolfgang Denk
@ 2011-07-26 12:09 ` Simon Schwarz
2011-07-26 12:09 ` [U-Boot] [PATCH V4 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
` (5 more replies)
6 siblings, 6 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 12:09 UTC (permalink / raw)
To: u-boot
V1 Initial SPL support for OMAP3 was based on the old SPL
V2 Introduced major changes. It is based on the OMAP4-SPL patch by
Aneesh V and the new SPL Framework by Daniel Schwierzeck and Aneesh V
V3 Some small bug fixes and correct placed SOB.
V4 Corrected one bugfix and some style problems
This is based on the following patches:
- New SPL framework
- OMAP4 SPL
Both are already in u-boot-ti repo.
Simon Schwarz (5):
omap3: Configure RAM bank 0 if in SPL
omap-common: add nand spl support
nand spl: add NAND Library to new SPL
omap3: new SPL structure support
devkit8000: Add nand-spl support for new SPL
arch/arm/cpu/armv7/omap-common/spl.c | 46 ++++++++++++++++++
arch/arm/cpu/armv7/omap3/board.c | 37 ++++++++++++++-
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 ++
arch/arm/cpu/armv7/omap3/sdrc.c | 30 +++++++++++-
arch/arm/include/asm/arch-omap3/mem.h | 36 ++++++++++++++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
arch/arm/include/asm/omap_common.h | 1 +
board/timll/devkit8000/devkit8000.c | 2 +-
doc/README.SPL | 2 +
drivers/mtd/nand/Makefile | 6 ++-
drivers/mtd/nand/omap_gpmc.c | 68 +++++++++++++++++++++++++++
include/configs/devkit8000.h | 46 ++++++++++++++++++
include/nand.h | 2 +
spl/Makefile | 2 +
14 files changed, 279 insertions(+), 5 deletions(-)
--
1.7.4.1
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 1/5] omap3: Configure RAM bank 0 if in SPL
2011-07-26 12:09 ` [U-Boot] [PATCH V4 " Simon Schwarz
@ 2011-07-26 12:09 ` Simon Schwarz
2011-07-26 12:09 ` [U-Boot] [PATCH V4 2/5] omap-common: add nand spl support Simon Schwarz
` (4 subsequent siblings)
5 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 12:09 UTC (permalink / raw)
To: u-boot
OMAP3 relied on the memory config done by X-loader or Configuration Header. This
has to be reworked for the implementation of a SPL. This patch configures RAM
bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000
are added to mem.h
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD Settings for Micron RAM
V2 changes:
DEL spl_debug outputs if mem test fails/passes
CHG CONFIG_PRELOADER to CONFIG_SPL_BUILD
V3 changes:
none
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,3/5] devkit8000 nand_spl: Add RAM
configuration independent of x-loader or CH"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114)
---
arch/arm/cpu/armv7/omap3/sdrc.c | 30 ++++++++++++++++++++++++++-
arch/arm/include/asm/arch-omap3/mem.h | 36 +++++++++++++++++++++++++++++++++
2 files changed, 65 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index 2a7970b..dac14d0 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -8,6 +8,9 @@
* Copyright (C) 2004-2010
* Texas Instruments Incorporated - http://www.ti.com/
*
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
+ *
* Author :
* Vaibhav Hiremath <hvaibhav@ti.com>
*
@@ -133,13 +136,38 @@ void do_sdrc_init(u32 cs, u32 early)
sdelay(0x20000);
}
+#ifdef CONFIG_SPL_BUILD
+ /* If we use a SPL there is no x-loader nor config header so we have
+ * to do the job ourselfs
+ */
+ if (cs == CS0) {
+ sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
+
+ /* General SDRC config */
+ writel(V_MCFG, &sdrc_base->cs[cs].mcfg);
+ writel(V_RFR_CTRL, &sdrc_base->cs[cs].rfr_ctrl);
+
+ /* AC timings */
+ writel(V_ACTIMA_165, &sdrc_actim_base0->ctrla);
+ writel(V_ACTIMB_165, &sdrc_actim_base0->ctrlb);
+
+ /* Initialize */
+ writel(CMD_NOP, &sdrc_base->cs[cs].manual);
+ writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+
+ writel(V_MR, &sdrc_base->cs[cs].mr);
+ }
+#endif /* CONFIG_SPL_BUILD */
+
/*
* SDRC timings are set up by x-load or config header
* We don't need to redo them here.
* Older x-loads configure only CS0
* configure CS1 to handle this ommission
*/
- if (cs) {
+ if (cs == CS1) {
sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
writel(readl(&sdrc_base->cs[CS0].mcfg),
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
index f165949..8e28f77 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -128,6 +128,33 @@ enum {
(MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) | \
(MICRON_TWTR_165 << 16))
+#define MICRON_RAMTYPE 0x1
+#define MICRON_DDRTYPE 0x0
+#define MICRON_DEEPPD 0x1
+#define MICRON_B32NOT16 0x1
+#define MICRON_BANKALLOCATION 0x2
+#define MICRON_RAMSIZE ((PHYS_SDRAM_1_SIZE/(1024*1024))/2)
+#define MICRON_ADDRMUXLEGACY 0x1
+#define MICRON_CASWIDTH 0x5
+#define MICRON_RASWIDTH 0x2
+#define MICRON_LOCKSTATUS 0x0
+#define MICRON_V_MCFG ((MICRON_LOCKSTATUS << 30) | (MICRON_RASWIDTH << 24) | \
+ (MICRON_CASWIDTH << 20) | (MICRON_ADDRMUXLEGACY << 19) | \
+ (MICRON_RAMSIZE << 8) | (MICRON_BANKALLOCATION << 6) | \
+ (MICRON_B32NOT16 << 4) | (MICRON_DEEPPD << 3) | \
+ (MICRON_DDRTYPE << 2) | (MICRON_RAMTYPE))
+
+#define MICRON_ARCV 2030
+#define MICRON_ARE 0x1
+#define MICRON_V_RFR_CTRL ((MICRON_ARCV << 8) | (MICRON_ARE))
+
+#define MICRON_BL 0x2
+#define MICRON_SIL 0x0
+#define MICRON_CASL 0x3
+#define MICRON_WBST 0x0
+#define MICRON_V_MR ((MICRON_WBST << 9) | (MICRON_CASL << 4) | \
+ (MICRON_SIL << 3) | (MICRON_BL))
+
/*
* NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns
* ACTIMA
@@ -171,10 +198,15 @@ enum {
#define V_ACTIMA_165 INFINEON_V_ACTIMA_165
#define V_ACTIMB_165 INFINEON_V_ACTIMB_165
#endif
+
#ifdef CONFIG_OMAP3_MICRON_DDR
#define V_ACTIMA_165 MICRON_V_ACTIMA_165
#define V_ACTIMB_165 MICRON_V_ACTIMB_165
+#define V_MCFG MICRON_V_MCFG
+#define V_RFR_CTRL MICRON_V_RFR_CTRL
+#define V_MR MICRON_V_MR
#endif
+
#ifdef CONFIG_OMAP3_NUMONYX_DDR
#define V_ACTIMA_165 NUMONYX_V_ACTIMA_165
#define V_ACTIMB_165 NUMONYX_V_ACTIMB_165
@@ -184,6 +216,10 @@ enum {
#error "Please choose the right DDR type in config header"
#endif
+#if defined(CONFIG_SPL_BUILD) && (!defined(V_MCFG) || !defined(V_RFR_CTRL))
+#error "Please choose the right DDR type in config header"
+#endif
+
/*
* GPMC settings -
* Definitions is as per the following format
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 2/5] omap-common: add nand spl support
2011-07-26 12:09 ` [U-Boot] [PATCH V4 " Simon Schwarz
2011-07-26 12:09 ` [U-Boot] [PATCH V4 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
@ 2011-07-26 12:09 ` Simon Schwarz
2011-07-26 18:06 ` Scott Wood
2011-07-26 12:09 ` [U-Boot] [PATCH V4 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
` (3 subsequent siblings)
5 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 12:09 UTC (permalink / raw)
To: u-boot
Add NAND support for the new SPL structure.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
This patch didn't exist before V2!
V2 changes:
ADD Some define-barriers for OMAP3 to only use NAND
ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
header
CHG cosmetic
ADD do_reset() implementation for omap-common spl
ADD nand_copy_image to nand.h
ADD CPP barriers for mmc and nand support. The parts depending on library
support are only compiled if the respective library is included.
V3 changes:
ADD Comment why setup_clocks_for_console() isn't called for OMAP3
CHG cosmetic (deleted empty line)
CHG rename of NAND_MODE_HW to NAND_MODE_HW_ECC
DEL NAND_MODE_SW. Not used.
V4 changes:
CHG cosmetic - style problems
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
---
arch/arm/cpu/armv7/omap-common/spl.c | 46 ++++++++++++++++++++++++++++++++++
arch/arm/include/asm/omap_common.h | 1 +
include/nand.h | 2 +
3 files changed, 49 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
index d177652..468699d 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -26,6 +26,7 @@
#include <asm/u-boot.h>
#include <asm/utils.h>
#include <asm/arch/sys_proto.h>
+#include <nand.h>
#include <mmc.h>
#include <fat.h>
#include <timestamp_autogenerated.h>
@@ -107,6 +108,7 @@ static void parse_image_header(const struct image_header *header)
}
}
+#ifdef CONFIG_SPL_MMC_SUPPORT
static void mmc_load_image_raw(struct mmc *mmc)
{
u32 image_size_sectors, err;
@@ -140,7 +142,9 @@ end:
hang();
}
}
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+#ifdef CONFIG_SPL_MMC_SUPPORT
static void mmc_load_image_fat(struct mmc *mmc)
{
s32 err;
@@ -173,7 +177,9 @@ end:
hang();
}
}
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+#ifdef CONFIG_SPL_MMC_SUPPORT
static void mmc_load_image(void)
{
struct mmc *mmc;
@@ -206,6 +212,27 @@ static void mmc_load_image(void)
hang();
}
}
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+
+#ifdef CONFIG_SPL_NAND_SUPPORT
+static void nand_load_image(void)
+{
+ gpmc_init();
+ nand_init();
+ nand_copy_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+ CONFIG_SYS_NAND_U_BOOT_SIZE,
+ (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
+#ifdef CONFIG_NAND_ENV_DST
+ nand_copy_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_NAND_ENV_DST);
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ nand_copy_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
+#endif
+#endif
+ parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
+}
+#endif /* CONFIG_SPL_NAND_SUPPORT */
void jump_to_image_no_args(void)
{
@@ -228,10 +255,17 @@ void board_init_r(gd_t *id, ulong dummy)
boot_device = omap_boot_device();
debug("boot device - %d\n", boot_device);
switch (boot_device) {
+#ifdef CONFIG_SPL_MMC_SUPPORT
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
mmc_load_image();
break;
+#endif
+#ifdef CONFIG_SPL_NAND_SUPPORT
+ case BOOT_DEVICE_NAND:
+ nand_load_image();
+ break;
+#endif
default:
printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
hang();
@@ -259,7 +293,11 @@ void preloader_console_init(void)
gd->flags |= GD_FLG_RELOC;
gd->baudrate = CONFIG_BAUDRATE;
+/* Console clock for OMAP3 is already initialized by per_clocks_enable()
+ * called in board.c by s_init() */
+#ifndef CONFIG_OMAP34XX
setup_clocks_for_console();
+#endif
serial_init(); /* serial communications setup */
/* Avoid a second "U-Boot" coming from this string */
@@ -270,3 +308,11 @@ void preloader_console_init(void)
omap_rev_string(rev_string_buffer);
printf("Texas Instruments %s\n", rev_string_buffer);
}
+
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ debug("resetting cpu...");
+ reset_cpu(0);
+
+ return 0;
+}
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index d3cb857..13f6884 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -49,6 +49,7 @@ void preloader_console_init(void);
#define MMCSD_MODE_UNDEFINED 0
#define MMCSD_MODE_RAW 1
#define MMCSD_MODE_FAT 2
+#define NAND_MODE_HW_ECC 3
u32 omap_boot_device(void);
u32 omap_boot_mode(void);
diff --git a/include/nand.h b/include/nand.h
index 8d94b5c..e0f20f6 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -132,6 +132,8 @@ int nand_lock( nand_info_t *meminfo, int tight );
int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
+void nand_copy_image(unsigned int offs, unsigned int size, uchar *dst);
+
#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
void board_nand_select_device(struct nand_chip *nand, int chip);
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 3/5] nand spl: add NAND Library to new SPL
2011-07-26 12:09 ` [U-Boot] [PATCH V4 " Simon Schwarz
2011-07-26 12:09 ` [U-Boot] [PATCH V4 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
2011-07-26 12:09 ` [U-Boot] [PATCH V4 2/5] omap-common: add nand spl support Simon Schwarz
@ 2011-07-26 12:09 ` Simon Schwarz
2011-07-26 18:04 ` Scott Wood
2011-07-26 12:09 ` [U-Boot] [PATCH V4 4/5] omap3: new SPL structure support Simon Schwarz
` (2 subsequent siblings)
5 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 12:09 UTC (permalink / raw)
To: u-boot
Insert some NAND driver sources into NAND SPL library.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
CHG Default to HW ecc in SPL build
ADD nand_read_buf16 function, read buffer
ADD omap_dev_ready function, indicte if chip is ready
V2 changes:
DEL GPMC_WAIT0_PIN_ACTIVE define
CHG omap_dev_ready() renamed to omap_spl_dev_ready(), does not use the
GPMC_WAIT0_PIN_ACTIVE-define anymore
CHG ogpmc_read_buf16 renamed omap_spl_read_buf16
ADD omap_spl_read_buf, 8x buf read function
ADD CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to SPL
CHG cosmetic
CHG nand_base and nand_bbt aren't needed for SPL anymore
CHG omap_nand_switch_ecc is not compiled for SPL
ADD entry for CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to README.SPL
V3 changes:
DEL cosmetic (empty line)
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND support
to omap_gpmc driver"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1
---
doc/README.SPL | 2 +
drivers/mtd/nand/Makefile | 6 +++-
drivers/mtd/nand/omap_gpmc.c | 68 ++++++++++++++++++++++++++++++++++++++++++
spl/Makefile | 2 +
4 files changed, 77 insertions(+), 1 deletions(-)
diff --git a/doc/README.SPL b/doc/README.SPL
index ce8e19f..2987f43 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -60,3 +60,5 @@ CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
CONFIG_SPL_SPI_SUPPORT (drivers/spi/libspi.o)
CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
+CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
+CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 8b598f6..cdc9a14 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -26,12 +26,16 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libnand.o
ifdef CONFIG_CMD_NAND
+ifdef CONFIG_SPL_BUILD
+COBJS-y += nand_spl.o
+else
COBJS-y += nand.o
COBJS-y += nand_base.o
COBJS-y += nand_bbt.o
-COBJS-y += nand_ecc.o
COBJS-y += nand_ids.o
COBJS-y += nand_util.o
+endif
+COBJS-y += nand_ecc.o
COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 99b9cef..61eac35 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -61,6 +61,55 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
writeb(cmd, this->IO_ADDR_W);
}
+#ifdef CONFIG_SPL_BUILD
+/* Check wait pin as dev ready indicator */
+int omap_spl_dev_ready(struct mtd_info *mtd)
+{
+ return gpmc_cfg->status & (1 << 8);
+}
+
+/*
+ * omap_spl_read_buf16 - [DEFAULT] read chip data into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ * Default read function for 16bit buswith
+ *
+ * This function is based on nand_read_buf16 from nand_base.c. This version
+ * reads 32bit not 16bit although the bus only has 16bit.
+ */
+static void omap_spl_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+ int i;
+ struct nand_chip *chip = mtd->priv;
+ u32 *p = (u32 *) buf;
+ len >>= 2;
+
+ for (i = 0; i < len; i++)
+ p[i] = readl(chip->IO_ADDR_R);
+}
+
+/*
+ * omap_spl_read_buf - [DEFAULT] read chip data into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ * Default read function for 8bit buswith
+ *
+ * This is the same function as this from nand_base.c nand_read_buf
+ */
+static void omap_spl_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+ int i;
+ struct nand_chip *chip = mtd->priv;
+
+ for (i = 0; i < len; i++)
+ buf[i] = readb(chip->IO_ADDR_R);
+}
+#endif
+
/*
* omap_hwecc_init - Initialize the Hardware ECC for NAND flash in
* GPMC controller
@@ -224,6 +273,7 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
}
}
+#ifndef CONFIG_SPL_BUILD
/*
* omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc.
* The default is to come up on s/w ecc
@@ -280,6 +330,7 @@ void omap_nand_switch_ecc(int32_t hardware)
nand->options &= ~NAND_OWN_BUFFERS;
}
+#endif /* CONFIG_SPL_BUILD */
/*
* Board-specific NAND initialization. The following members of the
@@ -338,7 +389,24 @@ int board_nand_init(struct nand_chip *nand)
nand->chip_delay = 100;
/* Default ECC mode */
+#ifndef CONFIG_SPL_BUILD
nand->ecc.mode = NAND_ECC_SOFT;
+#else
+ nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.layout = &hw_nand_oob;
+ nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
+ nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
+ nand->ecc.hwctl = omap_enable_hwecc;
+ nand->ecc.correct = omap_correct_data;
+ nand->ecc.calculate = omap_calculate_ecc;
+ omap_hwecc_init(nand);
+
+ if (nand->options & NAND_BUSWIDTH_16)
+ nand->read_buf = omap_spl_read_buf16;
+ else
+ nand->read_buf = omap_spl_read_buf;
+ nand->dev_ready = omap_spl_dev_ready;
+#endif
return 0;
}
diff --git a/spl/Makefile b/spl/Makefile
index 87f13f6..0c0d3c4 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -46,6 +46,8 @@ LIBS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/libspi_flash.o
LIBS-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/libspi.o
LIBS-$(CONFIG_SPL_FAT_SUPPORT) += fs/fat/libfat.o
LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o
+LIBS-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/libpower.o
+LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/libnand.o
ifeq ($(SOC),omap3)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 4/5] omap3: new SPL structure support
2011-07-26 12:09 ` [U-Boot] [PATCH V4 " Simon Schwarz
` (2 preceding siblings ...)
2011-07-26 12:09 ` [U-Boot] [PATCH V4 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
@ 2011-07-26 12:09 ` Simon Schwarz
2011-07-26 12:09 ` [U-Boot] [PATCH V4 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
5 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 12:09 UTC (permalink / raw)
To: u-boot
Support for the new spl structure. Using the interface defined by Aneesh V for
OMAP4
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD support for early console output in SPL
V2 changes:
ADD include omap_common.h in board.c
ADD implement new omap common interface omap_boot_device, omap_boot_mode and
omap_rev_string (very basic)
CHG cosmetic
CHG Don't add ecc switch command in SPL
ADD save_boot_params stump with warning to implement it
V3 changes:
none
V4 changes:
CHG cosmetic - corrected style problem
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is in some parts a anccesstor of "[U-Boot,2/5] devkit8000 nand_spl: omap3
support nand_spl boot"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114) in V1
---
arch/arm/cpu/armv7/omap3/board.c | 37 +++++++++++++++++++++++++-
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 +++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
3 files changed, 41 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 4aaf97b..0070fc2 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -39,6 +39,7 @@
#include <asm/cache.h>
#include <asm/armv7.h>
#include <asm/omap_gpio.h>
+#include <asm/omap_common.h>
/* Declarations */
extern omap3_sysinfo sysinfo;
@@ -56,6 +57,28 @@ static const struct gpio_bank gpio_bank_34xx[6] = {
const struct gpio_bank *const omap_gpio_bank = gpio_bank_34xx;
+#ifdef CONFIG_SPL_BUILD
+/*
+* We use static variables because global data is not ready yet.
+* Initialized data is available in SPL right from the beginning.
+* We would not typically need to save these parameters in regular
+* U-Boot. This is needed only in SPL at the moment.
+*/
+u32 omap3_boot_device = BOOT_DEVICE_NAND;
+u32 omap3_boot_mode = NAND_MODE_HW_ECC;
+
+u32 omap_boot_device(void)
+{
+ return omap3_boot_device;
+}
+
+u32 omap_boot_mode(void)
+{
+ return omap3_boot_mode;
+}
+#endif /* CONFIG_SPL_BUILD */
+
+
/******************************************************************************
* Routine: delay
* Description: spinning delay to use before udelay works
@@ -197,6 +220,10 @@ void s_init(void)
per_clocks_enable();
+#ifdef CONFIG_SPL_BUILD
+ preloader_console_init();
+#endif
+
if (!in_sdram)
mem_init();
}
@@ -245,7 +272,7 @@ void abort(void)
{
}
-#ifdef CONFIG_NAND_OMAP_GPMC
+#if defined(CONFIG_NAND_OMAP_GPMC) & !defined(CONFIG_SPL_BUILD)
/******************************************************************************
* OMAP3 specific command to switch between NAND HW and SW ecc
*****************************************************************************/
@@ -273,7 +300,7 @@ U_BOOT_CMD(
"[hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc algorithm"
);
-#endif /* CONFIG_NAND_OMAP_GPMC */
+#endif /* CONFIG_NAND_OMAP_GPMC & !CONFIG_SPL_BUILD */
#ifdef CONFIG_DISPLAY_BOARDINFO
/**
@@ -402,3 +429,9 @@ void v7_outer_cache_disable(void)
omap3_update_aux_cr(0, 0x2);
}
#endif
+
+void omap_rev_string(char *omap_rev_string)
+{
+ sprintf(omap_rev_string, "OMAP3, sorry revision detection \
+ unimplemented");
+}
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index 67e8ceb..48a7ec6 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -35,6 +35,11 @@
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
+.global save_boot_params
+save_boot_params:
+ #warning "Please implement save_boot_params for OMAP3"
+ bx lr
+
.global omap3_gp_romcode_call
omap3_gp_romcode_call:
PUSH {r4-r12, lr} @ Save all registers from ROM code!
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h
index 995e7cb..7b60051 100644
--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
@@ -71,4 +71,5 @@ void power_init_r(void);
void dieid_num_r(void);
void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
void omap3_gp_romcode_call(u32 service_id, u32 parameter);
+void omap_rev_string(char *omap_rev_string);
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 5/5] devkit8000: Add nand-spl support for new SPL
2011-07-26 12:09 ` [U-Boot] [PATCH V4 " Simon Schwarz
` (3 preceding siblings ...)
2011-07-26 12:09 ` [U-Boot] [PATCH V4 4/5] omap3: new SPL structure support Simon Schwarz
@ 2011-07-26 12:09 ` Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
5 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 12:09 UTC (permalink / raw)
To: u-boot
Add NAND SPL support to the devkit8000 config
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD devkit8000_nand to board.cfg
ADD nand_spl Makefile, llinker script, spl-devkit8000.c
ADD config ecc, SRAM, SPL to board config
ADD CONFIG_SYS_SRAM_START and _SIZE to board config
ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config
V2 changes:
ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER, NAND and
CONFIG_SPL_LDSCRIPT to board config
CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_*
ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config: Where to
expect u-boot and where to load it.
ADD some barrier to not build board_eth_init in SPL
DEL no changes to board.cfg
DEL everything used the old nand_spl layout (Makefile, linker script,
spl-devkit8000.c)
CHG cosmetic
V3 changes:
CHG Deleted wrong comment
V4 changes:
CHG CONFIG_SYS_SRAM_SIZE NOW has the right value
CHG cosmetic - corrected style problems
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl
support"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)
---
board/timll/devkit8000/devkit8000.c | 2 +-
include/configs/devkit8000.h | 46 +++++++++++++++++++++++++++++++++++
2 files changed, 47 insertions(+), 1 deletions(-)
diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
index 95afaaa..9b53742 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -119,7 +119,7 @@ void set_muxconf_regs(void)
MUX_DEVKIT8000();
}
-#ifdef CONFIG_DRIVER_DM9000
+#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
/*
* Routine: board_eth_init
* Description: Setting up the Ethernet hardware.
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 125c690..022069d 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -307,4 +307,50 @@
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
+/* SRAM config */
+#define CONFIG_SYS_SRAM_START 0x40200000
+#define CONFIG_SYS_SRAM_SIZE 0x10000
+
+/* Defines for SPL */
+#define CONFIG_SPL
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
+#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */
+#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
+
+#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
+#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+ 10, 11, 12, 13}
+
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 3
+
+#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
+ CONFIG_SYS_NAND_ECCSIZE)
+#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
+ CONFIG_SYS_NAND_ECCSTEPS)
+
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+
#endif /* __CONFIG_H */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support
2011-07-26 11:06 ` [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support Wolfgang Denk
@ 2011-07-26 12:31 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 12:31 UTC (permalink / raw)
To: u-boot
Dear Wolfgang Denk,
On 07/26/2011 01:06 PM, Wolfgang Denk wrote:
> Dear Simon Schwarz,
>
> In message<1311675739-10966-1-git-send-email-simonschwarzcor@gmail.com> you wrote:
>> V1 Initial SPL support for OMAP3 was based on the old SPL
>> V2 Introduced major changes. It is based on the OMAP4-SPL patch by Aneesh V
>> and the new SPL Framework by Daniel Schwierzeck and Aneesh V
>> V3 Some small bug fixes and correct placed SOB.
>>
>> This is based on the following patches:
>> - New SPL framework
>> - OMAP4 SPL
>> Both are already in u-boot-ti repo.
>
> Please run all your patches through checkpatch BEFORE submitting.
>
>
> For example, checkpatch reports a number of "line over 80 characters"
> coding style violations distibuted all over your patches.
>
> Please fix these globally.
sorry - wrong tab width. Changed in V4.
> Best regards,
>
> Wolfgang Denk
>
Regards
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V3 5/5] devkit8000: Add nand-spl support for new SPL
2011-07-26 10:42 ` Andreas Bießmann
@ 2011-07-26 12:34 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-26 12:34 UTC (permalink / raw)
To: u-boot
Dear Andreas,
On 07/26/2011 12:42 PM, Andreas Bie?mann wrote:
> Dear Simon,
>
<snip>
>> diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
>> index 95afaaa..9b53742 100644
>> --- a/board/timll/devkit8000/devkit8000.c
>> +++ b/board/timll/devkit8000/devkit8000.c
>> @@ -119,7 +119,7 @@ void set_muxconf_regs(void)
>> MUX_DEVKIT8000();
>> }
>>
>> -#ifdef CONFIG_DRIVER_DM9000
>> +#if defined(CONFIG_DRIVER_DM9000)& !defined(CONFIG_SPL_BUILD)
>> /*
>> * Routine: board_eth_init
>> * Description: Setting up the Ethernet hardware.
>> diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
>> index 125c690..22c9b8e 100644
>> --- a/include/configs/devkit8000.h
>> +++ b/include/configs/devkit8000.h
>> @@ -307,4 +307,50 @@
>> CONFIG_SYS_INIT_RAM_SIZE - \
>> GENERATED_GBL_DATA_SIZE)
>>
>> +/* SRAM config */
>> +#define CONFIG_SYS_SRAM_START 0x40200000
>> +#define CONFIG_SYS_SRAM_SIZE 0xFFFF
>
> you mentioned this as 'Changed' in your reply to my last review. It is
> still unchanged (but comment about 64kB removed, so is the size not 64kB?).
Sorry, my mistake. NOW corrected in V4.
> regards
>
> Andreas Bie?mann
Regards
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 3/5] nand spl: add NAND Library to new SPL
2011-07-26 12:09 ` [U-Boot] [PATCH V4 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
@ 2011-07-26 18:04 ` Scott Wood
2011-07-26 18:12 ` Scott Wood
2011-07-27 9:22 ` Simon Schwarz
0 siblings, 2 replies; 134+ messages in thread
From: Scott Wood @ 2011-07-26 18:04 UTC (permalink / raw)
To: u-boot
On Tue, 26 Jul 2011 14:09:16 +0200
Simon Schwarz <simonschwarzcor@googlemail.com> wrote:
> diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
> index 8b598f6..cdc9a14 100644
> --- a/drivers/mtd/nand/Makefile
> +++ b/drivers/mtd/nand/Makefile
> @@ -26,12 +26,16 @@ include $(TOPDIR)/config.mk
> LIB := $(obj)libnand.o
>
> ifdef CONFIG_CMD_NAND
> +ifdef CONFIG_SPL_BUILD
> +COBJS-y += nand_spl.o
> +else
> COBJS-y += nand.o
> COBJS-y += nand_base.o
> COBJS-y += nand_bbt.o
> -COBJS-y += nand_ecc.o
> COBJS-y += nand_ids.o
> COBJS-y += nand_util.o
> +endif
> +COBJS-y += nand_ecc.o
You're assuming all NAND SPLs will want nand_ecc -- this will not fit in
most current ones.
Where is nand_spl.c, and what is in it that is appropriate for all targets?
-Scott
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 2/5] omap-common: add nand spl support
2011-07-26 12:09 ` [U-Boot] [PATCH V4 2/5] omap-common: add nand spl support Simon Schwarz
@ 2011-07-26 18:06 ` Scott Wood
[not found] ` <4E2FCF6E.10701@gmail.com>
0 siblings, 1 reply; 134+ messages in thread
From: Scott Wood @ 2011-07-26 18:06 UTC (permalink / raw)
To: u-boot
On Tue, 26 Jul 2011 14:09:15 +0200
Simon Schwarz <simonschwarzcor@googlemail.com> wrote:
> +#ifdef CONFIG_SPL_NAND_SUPPORT
> +static void nand_load_image(void)
> +{
> + gpmc_init();
> + nand_init();
> + nand_copy_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
> + CONFIG_SYS_NAND_U_BOOT_SIZE,
> + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
> +#ifdef CONFIG_NAND_ENV_DST
> + nand_copy_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
> + (uchar *)CONFIG_NAND_ENV_DST);
> +#ifdef CONFIG_ENV_OFFSET_REDUND
> + nand_copy_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
> + (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
> +#endif
> +#endif
> + parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
> +}
> +#endif /* CONFIG_SPL_NAND_SUPPORT */
I'm not sure that "load" versus "copy" conveys the difference between this
function and the low-level nand_copy_image.
Where is nand_copy_image() defined?
> diff --git a/include/nand.h b/include/nand.h
> index 8d94b5c..e0f20f6 100644
> --- a/include/nand.h
> +++ b/include/nand.h
> @@ -132,6 +132,8 @@ int nand_lock( nand_info_t *meminfo, int tight );
> int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
> int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
>
> +void nand_copy_image(unsigned int offs, unsigned int size, uchar *dst);
Use loff_t for offset. Maybe call it "nand_spl_copy_image" or
"nand_spl_load_image".
-Scott
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 3/5] nand spl: add NAND Library to new SPL
2011-07-26 18:04 ` Scott Wood
@ 2011-07-26 18:12 ` Scott Wood
2011-07-27 9:22 ` Simon Schwarz
1 sibling, 0 replies; 134+ messages in thread
From: Scott Wood @ 2011-07-26 18:12 UTC (permalink / raw)
To: u-boot
On Tue, 26 Jul 2011 13:04:01 -0500
Scott Wood <scottwood@freescale.com> wrote:
> On Tue, 26 Jul 2011 14:09:16 +0200
> Simon Schwarz <simonschwarzcor@googlemail.com> wrote:
>
> > diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
> > index 8b598f6..cdc9a14 100644
> > --- a/drivers/mtd/nand/Makefile
> > +++ b/drivers/mtd/nand/Makefile
> > @@ -26,12 +26,16 @@ include $(TOPDIR)/config.mk
> > LIB := $(obj)libnand.o
> >
> > ifdef CONFIG_CMD_NAND
> > +ifdef CONFIG_SPL_BUILD
> > +COBJS-y += nand_spl.o
> > +else
> > COBJS-y += nand.o
> > COBJS-y += nand_base.o
> > COBJS-y += nand_bbt.o
> > -COBJS-y += nand_ecc.o
> > COBJS-y += nand_ids.o
> > COBJS-y += nand_util.o
> > +endif
> > +COBJS-y += nand_ecc.o
>
> You're assuming all NAND SPLs will want nand_ecc -- this will not fit in
> most current ones.
Well, nand_correct_data is used by some of the SPLs, but the ifdef
CONFIG_NAND_SPL would have to be updated so the rest doesn't get included.
And some SPLs (FSL drivers) don't use anything from that file.
-Scott
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 3/5] nand spl: add NAND Library to new SPL
2011-07-26 18:04 ` Scott Wood
2011-07-26 18:12 ` Scott Wood
@ 2011-07-27 9:22 ` Simon Schwarz
2011-07-27 14:55 ` V, Aneesh
1 sibling, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-27 9:22 UTC (permalink / raw)
To: u-boot
Dear Scott Wood,
On 07/26/2011 08:04 PM, Scott Wood wrote:
> On Tue, 26 Jul 2011 14:09:16 +0200
> Simon Schwarz<simonschwarzcor@googlemail.com> wrote:
>
>> diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
>> index 8b598f6..cdc9a14 100644
>> --- a/drivers/mtd/nand/Makefile
>> +++ b/drivers/mtd/nand/Makefile
>> @@ -26,12 +26,16 @@ include $(TOPDIR)/config.mk
>> LIB := $(obj)libnand.o
>>
>> ifdef CONFIG_CMD_NAND
>> +ifdef CONFIG_SPL_BUILD
>> +COBJS-y += nand_spl.o
>> +else
>> COBJS-y += nand.o
>> COBJS-y += nand_base.o
>> COBJS-y += nand_bbt.o
>> -COBJS-y += nand_ecc.o
>> COBJS-y += nand_ids.o
>> COBJS-y += nand_util.o
>> +endif
>> +COBJS-y += nand_ecc.o
>
> You're assuming all NAND SPLs will want nand_ecc -- this will not fit in
> most current ones.
True. I changed it to:
ifdef CONFIG_SPL_BUILD
COBJS-y += nand_spl.o
ifdef CONFIG_OMAP34XX
COBJS-y += nand_ecc.o
endif
else
COBJS-y += nand.o
COBJS-y += nand_base.o
COBJS-y += nand_bbt.o
COBJS-y += nand_ids.o
COBJS-y += nand_util.o
COBJS-y += nand_ecc.o
endif
Is there a simple way to write that without duplication of nand_ecc?
>
> Where is nand_spl.c, and what is in it that is appropriate for all targets?
It is essentially the old nand_boot.c from nand_spl. It is added with
this patch to drivers/mtd/nand/nand_spl.c
So IMHO all boards which are activating the nand library for SPL need
this one. There are some alternative implementations in the nand_spl -
when they are added to the new SPL the devs may add switches as needed.
>
> -Scott
>
Regards & Thanks for your feedback!
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V5 0/5] OMAP3 and devkit8000 SPL support
2011-07-26 12:09 ` [U-Boot] [PATCH V4 " Simon Schwarz
` (4 preceding siblings ...)
2011-07-26 12:09 ` [U-Boot] [PATCH V4 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
@ 2011-07-27 12:50 ` Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
` (5 more replies)
5 siblings, 6 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-27 12:50 UTC (permalink / raw)
To: u-boot
V1 Initial SPL support for OMAP3 was based on the old SPL
V2 Introduced major changes. It is based on the OMAP4-SPL patch by
Aneesh V and the new SPL Framework by Daniel Schwierzeck and Aneesh V
V3 Some small bug fixes and correct placed SOB.
V4 Corrected one bugfix and some style problems
V5 Exclude some nand objects from SPL, interface change for nand_spl
Simon Schwarz (5):
omap3: Configure RAM bank 0 if in SPL
omap-common: add nand spl support
nand spl: add NAND Library to new SPL
omap3: new SPL structure support
devkit8000: Add nand-spl support for new SPL
arch/arm/cpu/armv7/omap-common/spl.c | 46 ++++++++++++++++++
arch/arm/cpu/armv7/omap3/board.c | 37 ++++++++++++++-
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 ++
arch/arm/cpu/armv7/omap3/sdrc.c | 30 +++++++++++-
arch/arm/include/asm/arch-omap3/mem.h | 36 ++++++++++++++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
arch/arm/include/asm/omap_common.h | 1 +
board/timll/devkit8000/devkit8000.c | 2 +-
doc/README.SPL | 2 +
drivers/mtd/nand/Makefile | 9 +++-
drivers/mtd/nand/omap_gpmc.c | 68 +++++++++++++++++++++++++++
include/configs/devkit8000.h | 46 ++++++++++++++++++
include/nand.h | 2 +
spl/Makefile | 2 +
14 files changed, 282 insertions(+), 5 deletions(-)
--
1.7.4.1
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V5 1/5] omap3: Configure RAM bank 0 if in SPL
2011-07-27 12:50 ` [U-Boot] [PATCH V5 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
@ 2011-07-27 12:50 ` Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 2/5] omap-common: add nand spl support Simon Schwarz
` (4 subsequent siblings)
5 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-27 12:50 UTC (permalink / raw)
To: u-boot
OMAP3 relied on the memory config done by X-loader or Configuration Header. This
has to be reworked for the implementation of a SPL. This patch configures RAM
bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000
are added to mem.h
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD Settings for Micron RAM
V2 changes:
DEL spl_debug outputs if mem test fails/passes
CHG CONFIG_PRELOADER to CONFIG_SPL_BUILD
V3 changes:
nothing
V4 changes:
nothing
V5 changes:
nothing
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,3/5] devkit8000 nand_spl: Add RAM
configuration independent of x-loader or CH"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114)
---
arch/arm/cpu/armv7/omap3/sdrc.c | 30 ++++++++++++++++++++++++++-
arch/arm/include/asm/arch-omap3/mem.h | 36 +++++++++++++++++++++++++++++++++
2 files changed, 65 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index 2a7970b..dac14d0 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -8,6 +8,9 @@
* Copyright (C) 2004-2010
* Texas Instruments Incorporated - http://www.ti.com/
*
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
+ *
* Author :
* Vaibhav Hiremath <hvaibhav@ti.com>
*
@@ -133,13 +136,38 @@ void do_sdrc_init(u32 cs, u32 early)
sdelay(0x20000);
}
+#ifdef CONFIG_SPL_BUILD
+ /* If we use a SPL there is no x-loader nor config header so we have
+ * to do the job ourselfs
+ */
+ if (cs == CS0) {
+ sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
+
+ /* General SDRC config */
+ writel(V_MCFG, &sdrc_base->cs[cs].mcfg);
+ writel(V_RFR_CTRL, &sdrc_base->cs[cs].rfr_ctrl);
+
+ /* AC timings */
+ writel(V_ACTIMA_165, &sdrc_actim_base0->ctrla);
+ writel(V_ACTIMB_165, &sdrc_actim_base0->ctrlb);
+
+ /* Initialize */
+ writel(CMD_NOP, &sdrc_base->cs[cs].manual);
+ writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+
+ writel(V_MR, &sdrc_base->cs[cs].mr);
+ }
+#endif /* CONFIG_SPL_BUILD */
+
/*
* SDRC timings are set up by x-load or config header
* We don't need to redo them here.
* Older x-loads configure only CS0
* configure CS1 to handle this ommission
*/
- if (cs) {
+ if (cs == CS1) {
sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
writel(readl(&sdrc_base->cs[CS0].mcfg),
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
index f165949..8e28f77 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -128,6 +128,33 @@ enum {
(MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) | \
(MICRON_TWTR_165 << 16))
+#define MICRON_RAMTYPE 0x1
+#define MICRON_DDRTYPE 0x0
+#define MICRON_DEEPPD 0x1
+#define MICRON_B32NOT16 0x1
+#define MICRON_BANKALLOCATION 0x2
+#define MICRON_RAMSIZE ((PHYS_SDRAM_1_SIZE/(1024*1024))/2)
+#define MICRON_ADDRMUXLEGACY 0x1
+#define MICRON_CASWIDTH 0x5
+#define MICRON_RASWIDTH 0x2
+#define MICRON_LOCKSTATUS 0x0
+#define MICRON_V_MCFG ((MICRON_LOCKSTATUS << 30) | (MICRON_RASWIDTH << 24) | \
+ (MICRON_CASWIDTH << 20) | (MICRON_ADDRMUXLEGACY << 19) | \
+ (MICRON_RAMSIZE << 8) | (MICRON_BANKALLOCATION << 6) | \
+ (MICRON_B32NOT16 << 4) | (MICRON_DEEPPD << 3) | \
+ (MICRON_DDRTYPE << 2) | (MICRON_RAMTYPE))
+
+#define MICRON_ARCV 2030
+#define MICRON_ARE 0x1
+#define MICRON_V_RFR_CTRL ((MICRON_ARCV << 8) | (MICRON_ARE))
+
+#define MICRON_BL 0x2
+#define MICRON_SIL 0x0
+#define MICRON_CASL 0x3
+#define MICRON_WBST 0x0
+#define MICRON_V_MR ((MICRON_WBST << 9) | (MICRON_CASL << 4) | \
+ (MICRON_SIL << 3) | (MICRON_BL))
+
/*
* NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns
* ACTIMA
@@ -171,10 +198,15 @@ enum {
#define V_ACTIMA_165 INFINEON_V_ACTIMA_165
#define V_ACTIMB_165 INFINEON_V_ACTIMB_165
#endif
+
#ifdef CONFIG_OMAP3_MICRON_DDR
#define V_ACTIMA_165 MICRON_V_ACTIMA_165
#define V_ACTIMB_165 MICRON_V_ACTIMB_165
+#define V_MCFG MICRON_V_MCFG
+#define V_RFR_CTRL MICRON_V_RFR_CTRL
+#define V_MR MICRON_V_MR
#endif
+
#ifdef CONFIG_OMAP3_NUMONYX_DDR
#define V_ACTIMA_165 NUMONYX_V_ACTIMA_165
#define V_ACTIMB_165 NUMONYX_V_ACTIMB_165
@@ -184,6 +216,10 @@ enum {
#error "Please choose the right DDR type in config header"
#endif
+#if defined(CONFIG_SPL_BUILD) && (!defined(V_MCFG) || !defined(V_RFR_CTRL))
+#error "Please choose the right DDR type in config header"
+#endif
+
/*
* GPMC settings -
* Definitions is as per the following format
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V5 2/5] omap-common: add nand spl support
2011-07-27 12:50 ` [U-Boot] [PATCH V5 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
@ 2011-07-27 12:50 ` Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
` (3 subsequent siblings)
5 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-27 12:50 UTC (permalink / raw)
To: u-boot
Add NAND support for the new SPL structure.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
This patch didn't exist before V2!
V2 changes:
ADD Some define-barriers for OMAP3 to only use NAND
ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
header
CHG cosmetic
ADD do_reset() implementation for omap-common spl
ADD nand_copy_image to nand.h
ADD CPP barriers for mmc and nand support. The parts depending on library
support are only compiled if the respective library is included.
V3 changes:
ADD Comment why setup_clocks_for_console() isn't called for OMAP3
CHG cosmetic (deleted empty line)
CHG rename of NAND_MODE_HW to NAND_MODE_HW_ECC
DEL NAND_MODE_SW. Not used.
V4 changes:
CHG cosmetic - style problems
V5 changes:
CHG renamed nand_copy_image to nand_spl_load_image
CHG offs paramter of nand_spl_load_image is of type loff_t now
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
---
arch/arm/cpu/armv7/omap-common/spl.c | 46 ++++++++++++++++++++++++++++++++++
arch/arm/include/asm/omap_common.h | 1 +
include/nand.h | 2 +
3 files changed, 49 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
index d177652..6503c8a 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -26,6 +26,7 @@
#include <asm/u-boot.h>
#include <asm/utils.h>
#include <asm/arch/sys_proto.h>
+#include <nand.h>
#include <mmc.h>
#include <fat.h>
#include <timestamp_autogenerated.h>
@@ -107,6 +108,7 @@ static void parse_image_header(const struct image_header *header)
}
}
+#ifdef CONFIG_SPL_MMC_SUPPORT
static void mmc_load_image_raw(struct mmc *mmc)
{
u32 image_size_sectors, err;
@@ -140,7 +142,9 @@ end:
hang();
}
}
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+#ifdef CONFIG_SPL_MMC_SUPPORT
static void mmc_load_image_fat(struct mmc *mmc)
{
s32 err;
@@ -173,7 +177,9 @@ end:
hang();
}
}
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+#ifdef CONFIG_SPL_MMC_SUPPORT
static void mmc_load_image(void)
{
struct mmc *mmc;
@@ -206,6 +212,27 @@ static void mmc_load_image(void)
hang();
}
}
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+
+#ifdef CONFIG_SPL_NAND_SUPPORT
+static void nand_load_image(void)
+{
+ gpmc_init();
+ nand_init();
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+ CONFIG_SYS_NAND_U_BOOT_SIZE,
+ (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
+#ifdef CONFIG_NAND_ENV_DST
+ nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_NAND_ENV_DST);
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
+#endif
+#endif
+ parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
+}
+#endif /* CONFIG_SPL_NAND_SUPPORT */
void jump_to_image_no_args(void)
{
@@ -228,10 +255,17 @@ void board_init_r(gd_t *id, ulong dummy)
boot_device = omap_boot_device();
debug("boot device - %d\n", boot_device);
switch (boot_device) {
+#ifdef CONFIG_SPL_MMC_SUPPORT
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
mmc_load_image();
break;
+#endif
+#ifdef CONFIG_SPL_NAND_SUPPORT
+ case BOOT_DEVICE_NAND:
+ nand_load_image();
+ break;
+#endif
default:
printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
hang();
@@ -259,7 +293,11 @@ void preloader_console_init(void)
gd->flags |= GD_FLG_RELOC;
gd->baudrate = CONFIG_BAUDRATE;
+/* Console clock for OMAP3 is already initialized by per_clocks_enable()
+ * called in board.c by s_init() */
+#ifndef CONFIG_OMAP34XX
setup_clocks_for_console();
+#endif
serial_init(); /* serial communications setup */
/* Avoid a second "U-Boot" coming from this string */
@@ -270,3 +308,11 @@ void preloader_console_init(void)
omap_rev_string(rev_string_buffer);
printf("Texas Instruments %s\n", rev_string_buffer);
}
+
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ debug("resetting cpu...");
+ reset_cpu(0);
+
+ return 0;
+}
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index d3cb857..13f6884 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -49,6 +49,7 @@ void preloader_console_init(void);
#define MMCSD_MODE_UNDEFINED 0
#define MMCSD_MODE_RAW 1
#define MMCSD_MODE_FAT 2
+#define NAND_MODE_HW_ECC 3
u32 omap_boot_device(void);
u32 omap_boot_mode(void);
diff --git a/include/nand.h b/include/nand.h
index 8d94b5c..fdb9f9f 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -132,6 +132,8 @@ int nand_lock( nand_info_t *meminfo, int tight );
int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
+void nand_spl_load_image(loff_t offs, unsigned int size, uchar *dst);
+
#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
void board_nand_select_device(struct nand_chip *nand, int chip);
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V5 3/5] nand spl: add NAND Library to new SPL
2011-07-27 12:50 ` [U-Boot] [PATCH V5 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 2/5] omap-common: add nand spl support Simon Schwarz
@ 2011-07-27 12:50 ` Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 4/5] omap3: new SPL structure support Simon Schwarz
` (2 subsequent siblings)
5 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-27 12:50 UTC (permalink / raw)
To: u-boot
Insert some NAND driver sources into NAND SPL library.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
CHG Default to HW ecc in SPL build
ADD nand_read_buf16 function, read buffer
ADD omap_dev_ready function, indicte if chip is ready
V2 changes:
DEL GPMC_WAIT0_PIN_ACTIVE define
CHG omap_dev_ready() renamed to omap_spl_dev_ready(), does not use the
GPMC_WAIT0_PIN_ACTIVE-define anymore
CHG ogpmc_read_buf16 renamed omap_spl_read_buf16
ADD omap_spl_read_buf, 8x buf read function
ADD CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to SPL
CHG cosmetic
CHG nand_base and nand_bbt aren't needed for SPL anymore
CHG omap_nand_switch_ecc is not compiled for SPL
ADD entry for CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to README.SPL
V3 changes:
DEL cosmetic (empty line)
V4 changes:
nothing
V5 changes:
CHG nand_ecc.o is only compiled for SPL if CONFIG_OMAP34XX is set
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND support
to omap_gpmc driver"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1
---
doc/README.SPL | 2 +
drivers/mtd/nand/Makefile | 9 +++++-
drivers/mtd/nand/omap_gpmc.c | 68 ++++++++++++++++++++++++++++++++++++++++++
spl/Makefile | 2 +
4 files changed, 80 insertions(+), 1 deletions(-)
diff --git a/doc/README.SPL b/doc/README.SPL
index ce8e19f..2987f43 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -60,3 +60,5 @@ CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
CONFIG_SPL_SPI_SUPPORT (drivers/spi/libspi.o)
CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
+CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
+CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 8b598f6..5e706c3 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -26,12 +26,19 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libnand.o
ifdef CONFIG_CMD_NAND
+ifdef CONFIG_SPL_BUILD
+COBJS-y += nand_spl.o
+ifdef CONFIG_OMAP34XX
+COBJS-y += nand_ecc.o
+endif
+else
COBJS-y += nand.o
COBJS-y += nand_base.o
COBJS-y += nand_bbt.o
-COBJS-y += nand_ecc.o
COBJS-y += nand_ids.o
COBJS-y += nand_util.o
+COBJS-y += nand_ecc.o
+endif
COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 99b9cef..61eac35 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -61,6 +61,55 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
writeb(cmd, this->IO_ADDR_W);
}
+#ifdef CONFIG_SPL_BUILD
+/* Check wait pin as dev ready indicator */
+int omap_spl_dev_ready(struct mtd_info *mtd)
+{
+ return gpmc_cfg->status & (1 << 8);
+}
+
+/*
+ * omap_spl_read_buf16 - [DEFAULT] read chip data into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ * Default read function for 16bit buswith
+ *
+ * This function is based on nand_read_buf16 from nand_base.c. This version
+ * reads 32bit not 16bit although the bus only has 16bit.
+ */
+static void omap_spl_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+ int i;
+ struct nand_chip *chip = mtd->priv;
+ u32 *p = (u32 *) buf;
+ len >>= 2;
+
+ for (i = 0; i < len; i++)
+ p[i] = readl(chip->IO_ADDR_R);
+}
+
+/*
+ * omap_spl_read_buf - [DEFAULT] read chip data into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ * Default read function for 8bit buswith
+ *
+ * This is the same function as this from nand_base.c nand_read_buf
+ */
+static void omap_spl_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+ int i;
+ struct nand_chip *chip = mtd->priv;
+
+ for (i = 0; i < len; i++)
+ buf[i] = readb(chip->IO_ADDR_R);
+}
+#endif
+
/*
* omap_hwecc_init - Initialize the Hardware ECC for NAND flash in
* GPMC controller
@@ -224,6 +273,7 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
}
}
+#ifndef CONFIG_SPL_BUILD
/*
* omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc.
* The default is to come up on s/w ecc
@@ -280,6 +330,7 @@ void omap_nand_switch_ecc(int32_t hardware)
nand->options &= ~NAND_OWN_BUFFERS;
}
+#endif /* CONFIG_SPL_BUILD */
/*
* Board-specific NAND initialization. The following members of the
@@ -338,7 +389,24 @@ int board_nand_init(struct nand_chip *nand)
nand->chip_delay = 100;
/* Default ECC mode */
+#ifndef CONFIG_SPL_BUILD
nand->ecc.mode = NAND_ECC_SOFT;
+#else
+ nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.layout = &hw_nand_oob;
+ nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
+ nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
+ nand->ecc.hwctl = omap_enable_hwecc;
+ nand->ecc.correct = omap_correct_data;
+ nand->ecc.calculate = omap_calculate_ecc;
+ omap_hwecc_init(nand);
+
+ if (nand->options & NAND_BUSWIDTH_16)
+ nand->read_buf = omap_spl_read_buf16;
+ else
+ nand->read_buf = omap_spl_read_buf;
+ nand->dev_ready = omap_spl_dev_ready;
+#endif
return 0;
}
diff --git a/spl/Makefile b/spl/Makefile
index 87f13f6..0c0d3c4 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -46,6 +46,8 @@ LIBS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/libspi_flash.o
LIBS-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/libspi.o
LIBS-$(CONFIG_SPL_FAT_SUPPORT) += fs/fat/libfat.o
LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o
+LIBS-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/libpower.o
+LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/libnand.o
ifeq ($(SOC),omap3)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V5 4/5] omap3: new SPL structure support
2011-07-27 12:50 ` [U-Boot] [PATCH V5 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
` (2 preceding siblings ...)
2011-07-27 12:50 ` [U-Boot] [PATCH V5 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
@ 2011-07-27 12:50 ` Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
2011-07-28 8:38 ` [U-Boot] [PATCH V6 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
5 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-27 12:50 UTC (permalink / raw)
To: u-boot
Support for the new spl structure. Using the interface defined by Aneesh V for
OMAP4
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD support for early console output in SPL
V2 changes:
ADD include omap_common.h in board.c
ADD implement new omap common interface omap_boot_device, omap_boot_mode and
omap_rev_string (very basic)
CHG cosmetic
CHG Don't add ecc switch command in SPL
ADD save_boot_params stump with warning to implement it
V3 changes:
none
V4 changes:
CHG cosmetic - corrected style problem
V5 changes:
nothing
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is in some parts a anccesstor of "[U-Boot,2/5] devkit8000 nand_spl: omap3
support nand_spl boot"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114) in V1
---
arch/arm/cpu/armv7/omap3/board.c | 37 +++++++++++++++++++++++++-
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 +++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
3 files changed, 41 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 4aaf97b..ee3285f 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -39,6 +39,7 @@
#include <asm/cache.h>
#include <asm/armv7.h>
#include <asm/omap_gpio.h>
+#include <asm/omap_common.h>
/* Declarations */
extern omap3_sysinfo sysinfo;
@@ -56,6 +57,28 @@ static const struct gpio_bank gpio_bank_34xx[6] = {
const struct gpio_bank *const omap_gpio_bank = gpio_bank_34xx;
+#ifdef CONFIG_SPL_BUILD
+/*
+* We use static variables because global data is not ready yet.
+* Initialized data is available in SPL right from the beginning.
+* We would not typically need to save these parameters in regular
+* U-Boot. This is needed only in SPL at the moment.
+*/
+u32 omap3_boot_device = BOOT_DEVICE_NAND;
+u32 omap3_boot_mode = NAND_MODE_HW_ECC;
+
+u32 omap_boot_device(void)
+{
+ return omap3_boot_device;
+}
+
+u32 omap_boot_mode(void)
+{
+ return omap3_boot_mode;
+}
+#endif /* CONFIG_SPL_BUILD */
+
+
/******************************************************************************
* Routine: delay
* Description: spinning delay to use before udelay works
@@ -197,6 +220,10 @@ void s_init(void)
per_clocks_enable();
+#ifdef CONFIG_SPL_BUILD
+ preloader_console_init();
+#endif
+
if (!in_sdram)
mem_init();
}
@@ -245,7 +272,7 @@ void abort(void)
{
}
-#ifdef CONFIG_NAND_OMAP_GPMC
+#if defined(CONFIG_NAND_OMAP_GPMC) & !defined(CONFIG_SPL_BUILD)
/******************************************************************************
* OMAP3 specific command to switch between NAND HW and SW ecc
*****************************************************************************/
@@ -273,7 +300,7 @@ U_BOOT_CMD(
"[hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc algorithm"
);
-#endif /* CONFIG_NAND_OMAP_GPMC */
+#endif /* CONFIG_NAND_OMAP_GPMC & !CONFIG_SPL_BUILD */
#ifdef CONFIG_DISPLAY_BOARDINFO
/**
@@ -402,3 +429,9 @@ void v7_outer_cache_disable(void)
omap3_update_aux_cr(0, 0x2);
}
#endif
+
+void omap_rev_string(char *omap_rev_string)
+{
+ sprintf(omap_rev_string, "OMAP3, sorry revision detection" \
+ " unimplemented");
+}
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index 67e8ceb..48a7ec6 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -35,6 +35,11 @@
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
+.global save_boot_params
+save_boot_params:
+ #warning "Please implement save_boot_params for OMAP3"
+ bx lr
+
.global omap3_gp_romcode_call
omap3_gp_romcode_call:
PUSH {r4-r12, lr} @ Save all registers from ROM code!
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h
index 995e7cb..7b60051 100644
--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
@@ -71,4 +71,5 @@ void power_init_r(void);
void dieid_num_r(void);
void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
void omap3_gp_romcode_call(u32 service_id, u32 parameter);
+void omap_rev_string(char *omap_rev_string);
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V5 5/5] devkit8000: Add nand-spl support for new SPL
2011-07-27 12:50 ` [U-Boot] [PATCH V5 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
` (3 preceding siblings ...)
2011-07-27 12:50 ` [U-Boot] [PATCH V5 4/5] omap3: new SPL structure support Simon Schwarz
@ 2011-07-27 12:50 ` Simon Schwarz
2011-07-28 8:38 ` [U-Boot] [PATCH V6 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
5 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-27 12:50 UTC (permalink / raw)
To: u-boot
Add NAND SPL support to the devkit8000 config
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD devkit8000_nand to board.cfg
ADD nand_spl Makefile, llinker script, spl-devkit8000.c
ADD config ecc, SRAM, SPL to board config
ADD CONFIG_SYS_SRAM_START and _SIZE to board config
ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config
V2 changes:
ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER, NAND and
CONFIG_SPL_LDSCRIPT to board config
CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_*
ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config: Where to
expect u-boot and where to load it.
ADD some barrier to not build board_eth_init in SPL
DEL no changes to board.cfg
DEL everything used the old nand_spl layout (Makefile, linker script,
spl-devkit8000.c)
CHG cosmetic
V3 changes:
CHG Deleted wrong comment
V4 changes:
CHG CONFIG_SYS_SRAM_SIZE NOW has the right value
CHG cosmetic - corrected style problems
V5 changes:
nothing
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl
support"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)
---
board/timll/devkit8000/devkit8000.c | 2 +-
include/configs/devkit8000.h | 46 +++++++++++++++++++++++++++++++++++
2 files changed, 47 insertions(+), 1 deletions(-)
diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
index 95afaaa..9b53742 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -119,7 +119,7 @@ void set_muxconf_regs(void)
MUX_DEVKIT8000();
}
-#ifdef CONFIG_DRIVER_DM9000
+#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
/*
* Routine: board_eth_init
* Description: Setting up the Ethernet hardware.
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 125c690..022069d 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -307,4 +307,50 @@
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
+/* SRAM config */
+#define CONFIG_SYS_SRAM_START 0x40200000
+#define CONFIG_SYS_SRAM_SIZE 0x10000
+
+/* Defines for SPL */
+#define CONFIG_SPL
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
+#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */
+#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
+
+#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
+#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+ 10, 11, 12, 13}
+
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 3
+
+#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
+ CONFIG_SYS_NAND_ECCSIZE)
+#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
+ CONFIG_SYS_NAND_ECCSTEPS)
+
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+
#endif /* __CONFIG_H */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 3/5] nand spl: add NAND Library to new SPL
2011-07-27 9:22 ` Simon Schwarz
@ 2011-07-27 14:55 ` V, Aneesh
2011-07-27 22:01 ` Scott Wood
0 siblings, 1 reply; 134+ messages in thread
From: V, Aneesh @ 2011-07-27 14:55 UTC (permalink / raw)
To: u-boot
Hi Simon, Scott,
On Wed, Jul 27, 2011 at 2:52 PM, Simon Schwarz
<simonschwarzcor@googlemail.com> wrote:
> Dear Scott Wood,
>
> On 07/26/2011 08:04 PM, Scott Wood wrote:
>> On Tue, 26 Jul 2011 14:09:16 +0200
>> Simon Schwarz<simonschwarzcor@googlemail.com> ?wrote:
>>
>>> diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
>>> index 8b598f6..cdc9a14 100644
>>> --- a/drivers/mtd/nand/Makefile
>>> +++ b/drivers/mtd/nand/Makefile
>>> @@ -26,12 +26,16 @@ include $(TOPDIR)/config.mk
>>> ? LIB ? ? ? ?:= $(obj)libnand.o
>>>
>>> ? ifdef CONFIG_CMD_NAND
>>> +ifdef CONFIG_SPL_BUILD
>>> +COBJS-y += nand_spl.o
>>> +else
>>> ? COBJS-y += nand.o
>>> ? COBJS-y += nand_base.o
>>> ? COBJS-y += nand_bbt.o
>>> -COBJS-y += nand_ecc.o
>>> ? COBJS-y += nand_ids.o
>>> ? COBJS-y += nand_util.o
>>> +endif
>>> +COBJS-y += nand_ecc.o
>>
>> You're assuming all NAND SPLs will want nand_ecc -- this will not fit in
>> most current ones.
>
> True. I changed it to:
> ifdef CONFIG_SPL_BUILD
> COBJS-y += nand_spl.o
> ifdef CONFIG_OMAP34XX
-ffunction-sections, -fdata-sections and --gc-sections are enabled globally
for SPL. Source files are #ifdef'ed out in Makefile's for SPL primarily to
reduce build time.
I would suggest to enable the super set of all files needed for all SPL's
in these Makefile's and not clutter it with any more #ifdef's
best regards,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 3/5] nand spl: add NAND Library to new SPL
2011-07-27 14:55 ` V, Aneesh
@ 2011-07-27 22:01 ` Scott Wood
2011-07-28 7:27 ` Aneesh V
0 siblings, 1 reply; 134+ messages in thread
From: Scott Wood @ 2011-07-27 22:01 UTC (permalink / raw)
To: u-boot
On Wed, 27 Jul 2011 20:25:44 +0530
"V, Aneesh" <aneesh@ti.com> wrote:
> Hi Simon, Scott,
>
> On Wed, Jul 27, 2011 at 2:52 PM, Simon Schwarz
> <simonschwarzcor@googlemail.com> wrote:
> > Dear Scott Wood,
> >
> > On 07/26/2011 08:04 PM, Scott Wood wrote:
> >> You're assuming all NAND SPLs will want nand_ecc -- this will not fit in
> >> most current ones.
> >
> > True. I changed it to:
> > ifdef CONFIG_SPL_BUILD
> > COBJS-y += nand_spl.o
> > ifdef CONFIG_OMAP34XX
>
> -ffunction-sections, -fdata-sections and --gc-sections are enabled globally
> for SPL. Source files are #ifdef'ed out in Makefile's for SPL primarily to
> reduce build time.
Ah, right.
> I would suggest to enable the super set of all files needed for all SPL's
> in these Makefile's and not clutter it with any more #ifdef's
It's not relevant for nand_ecc, but there will still be a cases where
we'll want to select particular object files because we're selecting from
alternatives that provide the same symbols, or where an object file has
dependencies that are not met for this target.
-Scott
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V2 2/5] omap-common: add nand spl support
2011-07-26 8:42 ` Simon Schwarz
@ 2011-07-28 6:20 ` Aneesh V
0 siblings, 0 replies; 134+ messages in thread
From: Aneesh V @ 2011-07-28 6:20 UTC (permalink / raw)
To: u-boot
Dear Simon, Andreas,
On Tuesday 26 July 2011 02:12 PM, Simon Schwarz wrote:
> Dear Andreas,
>
> On 07/26/2011 08:07 AM, Andreas Bie?mann wrote:
>> Dear Simon,
>>
>> Am 25.07.2011 um 20:05 schrieb Simon Schwarz:
>>
>>> Add NAND support for the new SPL structure.
>>>
>>> ---
>>> This patch didn't exist before V2!
>>>
>>> V2 changes:
>>> ADD Some define-barriers for OMAP3 to only use NAND
>>> ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
>>> header
>>> CHG cosmetic
>>> ADD do_reset() implementation for omap-common spl
>>> ADD nand_copy_image to nand.h
>>> ADD CPP barriers for mmc and nand support. The parts depending on library
>>> support are only compiled if the respective library is included.
>>>
>>> Transition from V1 to V2 also includes that this patch is now based on
>>> - the new SPL layout by Aneesh V and Daniel Schwierzeck
>>> - the OMAP4 SPL patches by Aneesh V
>>>
>>> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
>>> ---
>>> arch/arm/cpu/armv7/omap-common/spl.c | 43 ++++++++++++++++++++++++++++++++++
>>> arch/arm/include/asm/omap_common.h | 2 +
>>> include/nand.h | 3 ++
>>> 3 files changed, 48 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
>>> index d177652..3a0093d 100644
>>> --- a/arch/arm/cpu/armv7/omap-common/spl.c
>>> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
>>> @@ -26,6 +26,7 @@
>>> #include<asm/u-boot.h>
>>> #include<asm/utils.h>
>>> #include<asm/arch/sys_proto.h>
>>> +#include<nand.h>
>>> #include<mmc.h>
>>> #include<fat.h>
>>> #include<timestamp_autogenerated.h>
>>> @@ -107,6 +108,7 @@ static void parse_image_header(const struct image_header *header)
>>> }
>>> }
>>>
>>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>>> static void mmc_load_image_raw(struct mmc *mmc)
>>> {
>>> u32 image_size_sectors, err;
>>> @@ -140,7 +142,9 @@ end:
>>> hang();
>>> }
>>> }
>>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>>>
>>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>>> static void mmc_load_image_fat(struct mmc *mmc)
>>> {
>>> s32 err;
>>> @@ -173,7 +177,9 @@ end:
>>> hang();
>>> }
>>> }
>>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>>>
>>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>>> static void mmc_load_image(void)
>>> {
>>> struct mmc *mmc;
>>> @@ -206,6 +212,26 @@ static void mmc_load_image(void)
>>> hang();
>>> }
>>> }
>>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>>> +
>>> +#ifdef CONFIG_SPL_NAND_SUPPORT
>>> +static void nand_load_image(void)
>>> +{
>>> + gpmc_init();
>>> + nand_init();
>>> + nand_copy_image(CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE,
>>> + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
>>> +#ifdef CONFIG_NAND_ENV_DST
>>> + nand_copy_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
>>> + (uchar *)CONFIG_NAND_ENV_DST);
>>> +#ifdef CONFIG_ENV_OFFSET_REDUND
>>> + nand_copy_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
>>> + (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
>>> +#endif
>>> +#endif
>>> + parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
>>> +}
>>> +#endif /* CONFIG_SPL_NAND_SUPPORT */
>>>
>>> void jump_to_image_no_args(void)
>>> {
>>> @@ -228,10 +254,17 @@ void board_init_r(gd_t *id, ulong dummy)
>>> boot_device = omap_boot_device();
>>> debug("boot device - %d\n", boot_device);
>>> switch (boot_device) {
>>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>>> case BOOT_DEVICE_MMC1:
>>> case BOOT_DEVICE_MMC2:
>>> mmc_load_image();
>>> break;
>>> +#endif
>>> +#ifdef CONFIG_SPL_NAND_SUPPORT
>>> + case BOOT_DEVICE_NAND:
>>> + nand_load_image();
>>> + break;
>>> +#endif
>>> default:
>>> printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
>>> hang();
>>> @@ -259,7 +292,9 @@ void preloader_console_init(void)
>>> gd->flags |= GD_FLG_RELOC;
>>> gd->baudrate = CONFIG_BAUDRATE;
>>>
>>> +#ifndef CONFIG_OMAP34XX
>>
>> Well .. that was discussed with Aneesh in another mail. I prefer Aneesh decides how the interface should be:
>> a) OMAP3 provides setup_clocks_for_console() and remove the UART stuff from per_clocks_enable()
>> b) remove setup_clocks_for_console() here and require preloader_console_init() to have the clocks enabled before
>>
> Totally agree. I just wait for a reply by Aneesh and will change it.
I am fine with either. (a) will allow us to have a debug traces in
prcm_init()(only for SPL) and also print SPL banner a little earlier.
I leave it to active OMAP3 users to decide this.
If you want to go with (b) please do it as below (my patches are
already in u-boot-arm, it will be good if you could do this in your
patch).
---
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
b/arch/arm/cpu/armv7/omap-common/spl.c
index d177652..d380b3e 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -259,7 +259,6 @@ void preloader_console_init(void)
gd->flags |= GD_FLG_RELOC;
gd->baudrate = CONFIG_BAUDRATE;
- setup_clocks_for_console();
serial_init(); /* serial communications setup */
/* Avoid a second "U-Boot" coming from this string */
diff --git a/arch/arm/cpu/armv7/omap4/board.c
b/arch/arm/cpu/armv7/omap4/board.c
index 5943d61..a9e90de 100644
--- a/arch/arm/cpu/armv7/omap4/board.c
+++ b/arch/arm/cpu/armv7/omap4/board.c
@@ -196,6 +196,7 @@ void s_init(void)
watchdog_init();
set_mux_conf_regs();
#ifdef CONFIG_SPL_BUILD
+ setup_clocks_for_console();
preloader_console_init();
#endif
prcm_init();
---
br,
Aneesh
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 3/5] nand spl: add NAND Library to new SPL
2011-07-27 22:01 ` Scott Wood
@ 2011-07-28 7:27 ` Aneesh V
0 siblings, 0 replies; 134+ messages in thread
From: Aneesh V @ 2011-07-28 7:27 UTC (permalink / raw)
To: u-boot
Hi Scott,
On Thursday 28 July 2011 03:31 AM, Scott Wood wrote:
> On Wed, 27 Jul 2011 20:25:44 +0530
> "V, Aneesh"<aneesh@ti.com> wrote:
>
>> Hi Simon, Scott,
>>
>> On Wed, Jul 27, 2011 at 2:52 PM, Simon Schwarz
>> <simonschwarzcor@googlemail.com> wrote:
>>> Dear Scott Wood,
>>>
>>> On 07/26/2011 08:04 PM, Scott Wood wrote:
>>>> You're assuming all NAND SPLs will want nand_ecc -- this will not fit in
>>>> most current ones.
>>>
>>> True. I changed it to:
>>> ifdef CONFIG_SPL_BUILD
>>> COBJS-y += nand_spl.o
>>> ifdef CONFIG_OMAP34XX
>>
>> -ffunction-sections, -fdata-sections and --gc-sections are enabled globally
>> for SPL. Source files are #ifdef'ed out in Makefile's for SPL primarily to
>> reduce build time.
>
> Ah, right.
>
>> I would suggest to enable the super set of all files needed for all SPL's
>> in these Makefile's and not clutter it with any more #ifdef's
>
> It's not relevant for nand_ecc, but there will still be a cases where
> we'll want to select particular object files because we're selecting from
> alternatives that provide the same symbols, or where an object file has
> dependencies that are not met for this target.
Agree. Perhaps those should only be the cases where we need additional
'ifdef's
br,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 2/5] omap-common: add nand spl support
[not found] ` <20110727163839.736d5bed@schlenkerla.am.freescale.net>
@ 2011-07-28 7:51 ` Simon Schwarz
2011-07-28 18:56 ` Scott Wood
0 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-28 7:51 UTC (permalink / raw)
To: u-boot
Dear Scott Wood,
On 07/27/2011 11:38 PM, Scott Wood wrote:
> On Wed, 27 Jul 2011 10:42:22 +0200
> Simon Schwarz<simonschwarzcor@googlemail.com> wrote:
>
>> Dear Scott Wood,
>>
>> On 07/26/2011 08:06 PM, Scott Wood wrote:
>>> On Tue, 26 Jul 2011 14:09:15 +0200
>>> Simon Schwarz<simonschwarzcor@googlemail.com> wrote:
>>>
>>>> +#ifdef CONFIG_SPL_NAND_SUPPORT
>>>> +static void nand_load_image(void)
>>>> +{
>>>> + gpmc_init();
>>>> + nand_init();
>>>> + nand_copy_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
>>>> + CONFIG_SYS_NAND_U_BOOT_SIZE,
>>>> + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
>>>> +#ifdef CONFIG_NAND_ENV_DST
>>>> + nand_copy_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
>>>> + (uchar *)CONFIG_NAND_ENV_DST);
>>>> +#ifdef CONFIG_ENV_OFFSET_REDUND
>>>> + nand_copy_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
>>>> + (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
>>>> +#endif
>>>> +#endif
>>>> + parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
>>>> +}
>>>> +#endif /* CONFIG_SPL_NAND_SUPPORT */
>>>
>>> I'm not sure that "load" versus "copy" conveys the difference between this
>>> function and the low-level nand_copy_image.
>>
>> The actual difference is that nand_load has an mtd_info struct as
>> additional paramter.
>
> Hmm? nand_load_image() takes no arguments. I don't see a nand_load().
>
> The actual difference is that one is a low-level "move this from here to
> there" function, and the other is driving hardware init and then performing
> a series of calls to the low-level function, supplying the information
> about what is to be loaded where.
We have different code - sorry for the confusion. see below.
>
>> The device to use is selected in nand_init and I
>> don't see a reason why this should be passed around in the interface -
>> in the spl all data is typically loaded from one chip - this also was
>> the implementation before.
>
> Sure.
>
>>> Where is nand_copy_image() defined?
>> It's in drivers/mtd/nand/nand_spl.c
>
> Where is drivers/mtd/nand/nand_spl.c? It's not in Wolfgang's
> current tree, nor in u-boot-ti, and I didn't see it in these patches. Did
> you forget to "git add"?
arrghh. You are right. I forgot a git add. V6 will change this...
>
> Note that there will not be one implementation of nand_copy_image suitable
> for all hardware, just as currently nand_spl/nand_boot.c is not used for
> all NAND SPL targets.
Hm. I know that. I just adapated the old nand_boot.c.
AFAIK the other implementations use prefixes for the function names -
therefore we can just add them to the nand-spl-library and gcc will do
the rest.
Regards & thx for the review!
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 0/5] OMAP3 and devkit8000 SPL support
2011-07-27 12:50 ` [U-Boot] [PATCH V5 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
` (4 preceding siblings ...)
2011-07-27 12:50 ` [U-Boot] [PATCH V5 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
@ 2011-07-28 8:38 ` Simon Schwarz
2011-07-28 8:38 ` [U-Boot] [PATCH V6 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
` (5 more replies)
5 siblings, 6 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-28 8:38 UTC (permalink / raw)
To: u-boot
V1 Initial SPL support for OMAP3 was based on the old SPL
V2 Introduced major changes. It is based on the OMAP4-SPL patch by
Aneesh V and the new SPL Framework by Daniel Schwierzeck and Aneesh V
V3 Some small bug fixes and correct placed SOB.
V4 Corrected one bugfix and some style problems
V5 Exclude some nand objects from SPL, interface change for nand_spl
V6 Added nand_spl.c - git add mistake, some small changes
Simon Schwarz (5):
omap3: Configure RAM bank 0 if in SPL
omap-common: add nand spl support
nand spl: add NAND Library to new SPL
omap3: new SPL structure support
devkit8000: Add nand-spl support for new SPL
arch/arm/cpu/armv7/omap-common/spl.c | 47 +++++
arch/arm/cpu/armv7/omap3/board.c | 37 ++++-
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 +
arch/arm/cpu/armv7/omap3/sdrc.c | 30 +++-
arch/arm/include/asm/arch-omap3/mem.h | 36 ++++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
arch/arm/include/asm/omap_common.h | 1 +
board/timll/devkit8000/devkit8000.c | 2 +-
doc/README.SPL | 2 +
drivers/mtd/nand/Makefile | 6 +-
drivers/mtd/nand/nand_spl.c | 268 +++++++++++++++++++++++++++
drivers/mtd/nand/omap_gpmc.c | 68 +++++++
include/configs/devkit8000.h | 46 +++++
include/nand.h | 3 +
spl/Makefile | 2 +
15 files changed, 549 insertions(+), 5 deletions(-)
create mode 100644 drivers/mtd/nand/nand_spl.c
--
1.7.4.1
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 1/5] omap3: Configure RAM bank 0 if in SPL
2011-07-28 8:38 ` [U-Boot] [PATCH V6 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
@ 2011-07-28 8:38 ` Simon Schwarz
2011-07-28 8:50 ` Aneesh V
2011-07-28 8:38 ` [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support Simon Schwarz
` (4 subsequent siblings)
5 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-28 8:38 UTC (permalink / raw)
To: u-boot
OMAP3 relied on the memory config done by X-loader or Configuration Header. This
has to be reworked for the implementation of a SPL. This patch configures RAM
bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000
are added to mem.h
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD Settings for Micron RAM
V2 changes:
DEL spl_debug outputs if mem test fails/passes
CHG CONFIG_PRELOADER to CONFIG_SPL_BUILD
V3 changes:
nothing
V4 changes:
nothing
V5 changes:
nothing
V6 changes:
nothing
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,3/5] devkit8000 nand_spl: Add RAM
configuration independent of x-loader or CH"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114)
---
arch/arm/cpu/armv7/omap3/sdrc.c | 30 ++++++++++++++++++++++++++-
arch/arm/include/asm/arch-omap3/mem.h | 36 +++++++++++++++++++++++++++++++++
2 files changed, 65 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index 2a7970b..dac14d0 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -8,6 +8,9 @@
* Copyright (C) 2004-2010
* Texas Instruments Incorporated - http://www.ti.com/
*
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
+ *
* Author :
* Vaibhav Hiremath <hvaibhav@ti.com>
*
@@ -133,13 +136,38 @@ void do_sdrc_init(u32 cs, u32 early)
sdelay(0x20000);
}
+#ifdef CONFIG_SPL_BUILD
+ /* If we use a SPL there is no x-loader nor config header so we have
+ * to do the job ourselfs
+ */
+ if (cs == CS0) {
+ sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
+
+ /* General SDRC config */
+ writel(V_MCFG, &sdrc_base->cs[cs].mcfg);
+ writel(V_RFR_CTRL, &sdrc_base->cs[cs].rfr_ctrl);
+
+ /* AC timings */
+ writel(V_ACTIMA_165, &sdrc_actim_base0->ctrla);
+ writel(V_ACTIMB_165, &sdrc_actim_base0->ctrlb);
+
+ /* Initialize */
+ writel(CMD_NOP, &sdrc_base->cs[cs].manual);
+ writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+
+ writel(V_MR, &sdrc_base->cs[cs].mr);
+ }
+#endif /* CONFIG_SPL_BUILD */
+
/*
* SDRC timings are set up by x-load or config header
* We don't need to redo them here.
* Older x-loads configure only CS0
* configure CS1 to handle this ommission
*/
- if (cs) {
+ if (cs == CS1) {
sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
writel(readl(&sdrc_base->cs[CS0].mcfg),
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
index f165949..8e28f77 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -128,6 +128,33 @@ enum {
(MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) | \
(MICRON_TWTR_165 << 16))
+#define MICRON_RAMTYPE 0x1
+#define MICRON_DDRTYPE 0x0
+#define MICRON_DEEPPD 0x1
+#define MICRON_B32NOT16 0x1
+#define MICRON_BANKALLOCATION 0x2
+#define MICRON_RAMSIZE ((PHYS_SDRAM_1_SIZE/(1024*1024))/2)
+#define MICRON_ADDRMUXLEGACY 0x1
+#define MICRON_CASWIDTH 0x5
+#define MICRON_RASWIDTH 0x2
+#define MICRON_LOCKSTATUS 0x0
+#define MICRON_V_MCFG ((MICRON_LOCKSTATUS << 30) | (MICRON_RASWIDTH << 24) | \
+ (MICRON_CASWIDTH << 20) | (MICRON_ADDRMUXLEGACY << 19) | \
+ (MICRON_RAMSIZE << 8) | (MICRON_BANKALLOCATION << 6) | \
+ (MICRON_B32NOT16 << 4) | (MICRON_DEEPPD << 3) | \
+ (MICRON_DDRTYPE << 2) | (MICRON_RAMTYPE))
+
+#define MICRON_ARCV 2030
+#define MICRON_ARE 0x1
+#define MICRON_V_RFR_CTRL ((MICRON_ARCV << 8) | (MICRON_ARE))
+
+#define MICRON_BL 0x2
+#define MICRON_SIL 0x0
+#define MICRON_CASL 0x3
+#define MICRON_WBST 0x0
+#define MICRON_V_MR ((MICRON_WBST << 9) | (MICRON_CASL << 4) | \
+ (MICRON_SIL << 3) | (MICRON_BL))
+
/*
* NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns
* ACTIMA
@@ -171,10 +198,15 @@ enum {
#define V_ACTIMA_165 INFINEON_V_ACTIMA_165
#define V_ACTIMB_165 INFINEON_V_ACTIMB_165
#endif
+
#ifdef CONFIG_OMAP3_MICRON_DDR
#define V_ACTIMA_165 MICRON_V_ACTIMA_165
#define V_ACTIMB_165 MICRON_V_ACTIMB_165
+#define V_MCFG MICRON_V_MCFG
+#define V_RFR_CTRL MICRON_V_RFR_CTRL
+#define V_MR MICRON_V_MR
#endif
+
#ifdef CONFIG_OMAP3_NUMONYX_DDR
#define V_ACTIMA_165 NUMONYX_V_ACTIMA_165
#define V_ACTIMB_165 NUMONYX_V_ACTIMB_165
@@ -184,6 +216,10 @@ enum {
#error "Please choose the right DDR type in config header"
#endif
+#if defined(CONFIG_SPL_BUILD) && (!defined(V_MCFG) || !defined(V_RFR_CTRL))
+#error "Please choose the right DDR type in config header"
+#endif
+
/*
* GPMC settings -
* Definitions is as per the following format
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support
2011-07-28 8:38 ` [U-Boot] [PATCH V6 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-07-28 8:38 ` [U-Boot] [PATCH V6 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
@ 2011-07-28 8:38 ` Simon Schwarz
2011-07-28 9:42 ` Aneesh V
` (2 more replies)
2011-07-28 8:38 ` [U-Boot] [PATCH V6 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
` (3 subsequent siblings)
5 siblings, 3 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-28 8:38 UTC (permalink / raw)
To: u-boot
Add NAND support for the new SPL structure.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
This patch didn't exist before V2!
V2 changes:
ADD Some define-barriers for OMAP3 to only use NAND
ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
header
CHG cosmetic
ADD do_reset() implementation for omap-common spl
ADD nand_copy_image to nand.h
ADD CPP barriers for mmc and nand support. The parts depending on library
support are only compiled if the respective library is included.
V3 changes:
ADD Comment why setup_clocks_for_console() isn't called for OMAP3
CHG cosmetic (deleted empty line)
CHG rename of NAND_MODE_HW to NAND_MODE_HW_ECC
DEL NAND_MODE_SW. Not used.
V4 changes:
CHG cosmetic - style problems
V5 changes:
CHG renamed nand_copy_image to nand_spl_load_image
CHG offs paramter of nand_spl_load_image is of type loff_t now
V6 changes:
ADD call to nand_deselect after loading the images
ADD nand_deselect to nand.h
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
---
arch/arm/cpu/armv7/omap-common/spl.c | 47 ++++++++++++++++++++++++++++++++++
arch/arm/include/asm/omap_common.h | 1 +
include/nand.h | 3 ++
3 files changed, 51 insertions(+), 0 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
index d177652..7ec5c7c 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -26,6 +26,7 @@
#include <asm/u-boot.h>
#include <asm/utils.h>
#include <asm/arch/sys_proto.h>
+#include <nand.h>
#include <mmc.h>
#include <fat.h>
#include <timestamp_autogenerated.h>
@@ -107,6 +108,7 @@ static void parse_image_header(const struct image_header *header)
}
}
+#ifdef CONFIG_SPL_MMC_SUPPORT
static void mmc_load_image_raw(struct mmc *mmc)
{
u32 image_size_sectors, err;
@@ -140,7 +142,9 @@ end:
hang();
}
}
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+#ifdef CONFIG_SPL_MMC_SUPPORT
static void mmc_load_image_fat(struct mmc *mmc)
{
s32 err;
@@ -173,7 +177,9 @@ end:
hang();
}
}
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+#ifdef CONFIG_SPL_MMC_SUPPORT
static void mmc_load_image(void)
{
struct mmc *mmc;
@@ -206,6 +212,28 @@ static void mmc_load_image(void)
hang();
}
}
+#endif /* CONFIG_SPL_MMC_SUPPORT */
+
+#ifdef CONFIG_SPL_NAND_SUPPORT
+static void nand_load_image(void)
+{
+ gpmc_init();
+ nand_init();
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+ CONFIG_SYS_NAND_U_BOOT_SIZE,
+ (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
+#ifdef CONFIG_NAND_ENV_DST
+ nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_NAND_ENV_DST);
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
+ (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
+#endif
+#endif
+ nand_deselect();
+ parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
+}
+#endif /* CONFIG_SPL_NAND_SUPPORT */
void jump_to_image_no_args(void)
{
@@ -228,10 +256,17 @@ void board_init_r(gd_t *id, ulong dummy)
boot_device = omap_boot_device();
debug("boot device - %d\n", boot_device);
switch (boot_device) {
+#ifdef CONFIG_SPL_MMC_SUPPORT
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
mmc_load_image();
break;
+#endif
+#ifdef CONFIG_SPL_NAND_SUPPORT
+ case BOOT_DEVICE_NAND:
+ nand_load_image();
+ break;
+#endif
default:
printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
hang();
@@ -259,7 +294,11 @@ void preloader_console_init(void)
gd->flags |= GD_FLG_RELOC;
gd->baudrate = CONFIG_BAUDRATE;
+/* Console clock for OMAP3 is already initialized by per_clocks_enable()
+ * called in board.c by s_init() */
+#ifndef CONFIG_OMAP34XX
setup_clocks_for_console();
+#endif
serial_init(); /* serial communications setup */
/* Avoid a second "U-Boot" coming from this string */
@@ -270,3 +309,11 @@ void preloader_console_init(void)
omap_rev_string(rev_string_buffer);
printf("Texas Instruments %s\n", rev_string_buffer);
}
+
+int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
+{
+ debug("resetting cpu...");
+ reset_cpu(0);
+
+ return 0;
+}
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index d3cb857..13f6884 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -49,6 +49,7 @@ void preloader_console_init(void);
#define MMCSD_MODE_UNDEFINED 0
#define MMCSD_MODE_RAW 1
#define MMCSD_MODE_FAT 2
+#define NAND_MODE_HW_ECC 3
u32 omap_boot_device(void);
u32 omap_boot_mode(void);
diff --git a/include/nand.h b/include/nand.h
index 8d94b5c..3c5ef4e 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -132,6 +132,9 @@ int nand_lock( nand_info_t *meminfo, int tight );
int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
+void nand_spl_load_image(loff_t offs, unsigned int size, uchar *dst);
+void nand_deselect(void);
+
#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
void board_nand_select_device(struct nand_chip *nand, int chip);
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 3/5] nand spl: add NAND Library to new SPL
2011-07-28 8:38 ` [U-Boot] [PATCH V6 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-07-28 8:38 ` [U-Boot] [PATCH V6 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
2011-07-28 8:38 ` [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support Simon Schwarz
@ 2011-07-28 8:38 ` Simon Schwarz
2011-07-28 11:54 ` Aneesh V
2011-07-28 19:16 ` Scott Wood
2011-07-28 8:38 ` [U-Boot] [PATCH V6 4/5] omap3: new SPL structure support Simon Schwarz
` (2 subsequent siblings)
5 siblings, 2 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-28 8:38 UTC (permalink / raw)
To: u-boot
Insert some NAND driver sources into NAND SPL library.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
CHG Default to HW ecc in SPL build
ADD nand_read_buf16 function, read buffer
ADD omap_dev_ready function, indicte if chip is ready
V2 changes:
DEL GPMC_WAIT0_PIN_ACTIVE define
CHG omap_dev_ready() renamed to omap_spl_dev_ready(), does not use the
GPMC_WAIT0_PIN_ACTIVE-define anymore
CHG ogpmc_read_buf16 renamed omap_spl_read_buf16
ADD omap_spl_read_buf, 8x buf read function
ADD CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to SPL
CHG cosmetic
CHG nand_base and nand_bbt aren't needed for SPL anymore
CHG omap_nand_switch_ecc is not compiled for SPL
ADD entry for CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to README.SPL
V3 changes:
DEL cosmetic (empty line)
V4 changes:
nothing
V5 changes:
CHG nand_ecc.o is only compiled for SPL if CONFIG_OMAP34XX is set
V6 changes:
ADD nand_spl.c - git add, finally
DEL nand_ecc barrier ifdef for OMAP3
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND support
to omap_gpmc driver"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1
---
doc/README.SPL | 2 +
drivers/mtd/nand/Makefile | 6 +-
drivers/mtd/nand/nand_spl.c | 268 ++++++++++++++++++++++++++++++++++++++++++
drivers/mtd/nand/omap_gpmc.c | 68 +++++++++++
spl/Makefile | 2 +
5 files changed, 345 insertions(+), 1 deletions(-)
create mode 100644 drivers/mtd/nand/nand_spl.c
diff --git a/doc/README.SPL b/doc/README.SPL
index ce8e19f..2987f43 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -60,3 +60,5 @@ CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
CONFIG_SPL_SPI_SUPPORT (drivers/spi/libspi.o)
CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
+CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
+CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 8b598f6..cdc9a14 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -26,12 +26,16 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libnand.o
ifdef CONFIG_CMD_NAND
+ifdef CONFIG_SPL_BUILD
+COBJS-y += nand_spl.o
+else
COBJS-y += nand.o
COBJS-y += nand_base.o
COBJS-y += nand_bbt.o
-COBJS-y += nand_ecc.o
COBJS-y += nand_ids.o
COBJS-y += nand_util.o
+endif
+COBJS-y += nand_ecc.o
COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
diff --git a/drivers/mtd/nand/nand_spl.c b/drivers/mtd/nand/nand_spl.c
new file mode 100644
index 0000000..fc78885
--- /dev/null
+++ b/drivers/mtd/nand/nand_spl.c
@@ -0,0 +1,268 @@
+/*
+ * (C) Copyright 2006-2008
+ * Stefan Roese, DENX Software Engineering, sr at denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <nand.h>
+#include <asm/io.h>
+
+int nand_curr_device = -1;
+static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
+static nand_info_t info;
+nand_info_t nand_info[CONFIG_SYS_MAX_NAND_DEVICE];
+static struct nand_chip nand_chip;
+
+#if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
+/*
+ * NAND command for small page NAND devices (512)
+ */
+static int nand_command(struct mtd_info *mtd, int block, int page, int offs,
+ u8 cmd)
+{
+ struct nand_chip *this = mtd->priv;
+ int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+
+ while (!this->dev_ready(mtd))
+ ;
+
+ /* Begin command latch cycle */
+ this->cmd_ctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
+ /* Set ALE and clear CLE to start address cycle */
+ /* Column address */
+ this->cmd_ctrl(mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
+ this->cmd_ctrl(mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
+ this->cmd_ctrl(mtd, (page_addr >> 8) & 0xff,
+ NAND_CTRL_ALE); /* A[24:17] */
+#ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
+ /* One more address cycle for devices > 32MiB */
+ this->cmd_ctrl(mtd, (page_addr >> 16) & 0x0f,
+ NAND_CTRL_ALE); /* A[28:25] */
+#endif
+ /* Latch in address */
+ this->cmd_ctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
+
+ /*
+ * Wait a while for the data to be ready
+ */
+ while (!this->dev_ready(mtd))
+ ;
+
+ return 0;
+}
+#else
+/*
+ * NAND command for large page NAND devices (2k)
+ */
+static int nand_command(struct mtd_info *mtd, int block, int page, int offs,
+ u8 cmd)
+{
+ struct nand_chip *this = mtd->priv;
+ int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+ void (*hwctrl)(struct mtd_info *mtd, int cmd,
+ unsigned int ctrl) = this->cmd_ctrl;
+
+ while (!this->dev_ready(mtd))
+ ;
+
+ /* Emulate NAND_CMD_READOOB */
+ if (cmd == NAND_CMD_READOOB) {
+ offs += CONFIG_SYS_NAND_PAGE_SIZE;
+ cmd = NAND_CMD_READ0;
+ }
+
+ /* Shift the offset from byte addressing to word addressing. */
+ if (this->options & NAND_BUSWIDTH_16)
+ offs >>= 1;
+
+ /* Begin command latch cycle */
+ hwctrl(mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
+ /* Set ALE and clear CLE to start address cycle */
+ /* Column address */
+ hwctrl(mtd, offs & 0xff,
+ NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
+ hwctrl(mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
+ /* Row address */
+ hwctrl(mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
+ hwctrl(mtd, ((page_addr >> 8) & 0xff),
+ NAND_CTRL_ALE); /* A[27:20] */
+#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
+ /* One more address cycle for devices > 128MiB */
+ hwctrl(mtd, (page_addr >> 16) & 0x0f,
+ NAND_CTRL_ALE); /* A[31:28] */
+#endif
+ /* Latch in address */
+ hwctrl(mtd, NAND_CMD_READSTART,
+ NAND_CTRL_CLE | NAND_CTRL_CHANGE);
+ hwctrl(mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
+
+ /*
+ * Wait a while for the data to be ready
+ */
+ while (!this->dev_ready(mtd))
+ ;
+
+ return 0;
+}
+#endif
+
+static int nand_is_bad_block(struct mtd_info *mtd, int block)
+{
+ struct nand_chip *this = mtd->priv;
+
+ nand_command(mtd, block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS,
+ NAND_CMD_READOOB);
+
+ /*
+ * Read one byte (or two if it's a 16 bit chip).
+ */
+ if (this->options & NAND_BUSWIDTH_16) {
+ if (readw(this->IO_ADDR_R) != 0xffff)
+ return 1;
+ } else {
+ if (readb(this->IO_ADDR_R) != 0xff)
+ return 1;
+ }
+
+ return 0;
+}
+
+static int nand_read_page(struct mtd_info *mtd, int block, int page, uchar *dst)
+{
+ struct nand_chip *this = mtd->priv;
+ u_char *ecc_calc;
+ u_char *ecc_code;
+ u_char *oob_data;
+ int i;
+ int eccsize = CONFIG_SYS_NAND_ECCSIZE;
+ int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
+ int eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
+ uint8_t *p = dst;
+ int stat;
+
+ nand_command(mtd, block, page, 0, NAND_CMD_READ0);
+
+ /* No malloc available for now, just use some temporary locations
+ * in SDRAM
+ */
+ ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
+ ecc_code = ecc_calc + 0x100;
+ oob_data = ecc_calc + 0x200;
+
+ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+ this->ecc.hwctl(mtd, NAND_ECC_READ);
+ this->read_buf(mtd, p, eccsize);
+ this->ecc.calculate(mtd, p, &ecc_calc[i]);
+ }
+ this->read_buf(mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
+
+ /* Pick the ECC bytes out of the oob data */
+ for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++)
+ ecc_code[i] = oob_data[nand_ecc_pos[i]];
+
+ eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
+ p = dst;
+
+ for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+ /* No chance to do something with the possible error message
+ * from correct_data(). We just hope that all possible errors
+ * are corrected by this routine.
+ */
+ stat = this->ecc.correct(mtd, p, &ecc_code[i], &ecc_calc[i]);
+ }
+
+ return 0;
+}
+
+static int nand_load(struct mtd_info *mtd, unsigned int offs,
+ unsigned int uboot_size, uchar *dst)
+{
+ unsigned int block, lastblock;
+ unsigned int page;
+
+ /*
+ * offs has to be aligned to a page address!
+ */
+ block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
+ lastblock = (offs + uboot_size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
+ page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
+
+ while (block <= lastblock) {
+ if (!nand_is_bad_block(mtd, block)) {
+ /*
+ * Skip bad blocks
+ */
+ while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
+ nand_read_page(mtd, block, page, dst);
+ dst += CONFIG_SYS_NAND_PAGE_SIZE;
+ page++;
+ }
+
+ page = 0;
+ } else {
+ lastblock++;
+ }
+
+ block++;
+ }
+
+ return 0;
+}
+
+/* nand_boot()-function from the old nand_spl ripped apart into
+ * - nand_init()
+ * - nand_spl_load_image()
+ * - nand_deselect()
+ */
+void nand_init(void)
+{
+ struct nand_chip nand_chip;
+
+ /*
+ * Init board specific nand support
+ */
+ nand_chip.select_chip = NULL;
+ info.priv = &nand_chip;
+ nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
+ (void __iomem *)CONFIG_SYS_NAND_BASE;
+ nand_chip.dev_ready = NULL; /* preset to NULL */
+ nand_chip.options = 0;
+ board_nand_init(&nand_chip);
+
+ if (nand_chip.select_chip)
+ nand_chip.select_chip(&info, 0);
+}
+
+/* Copy image from NAND to RAM
+ * offs: Offset in NAND flash
+ * size: size of image
+ * dst: destination pointer to RAM
+ */
+void nand_spl_load_image(loff_t offs, unsigned int size, uchar *dst)
+{
+ nand_load(&info, offs, size, dst);
+}
+
+/* Unselect NAND chip after operation
+ */
+void nand_deselect(void)
+{
+ if (nand_chip.select_chip)
+ nand_chip.select_chip(&info, -1);
+
+}
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 99b9cef..61eac35 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -61,6 +61,55 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
writeb(cmd, this->IO_ADDR_W);
}
+#ifdef CONFIG_SPL_BUILD
+/* Check wait pin as dev ready indicator */
+int omap_spl_dev_ready(struct mtd_info *mtd)
+{
+ return gpmc_cfg->status & (1 << 8);
+}
+
+/*
+ * omap_spl_read_buf16 - [DEFAULT] read chip data into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ * Default read function for 16bit buswith
+ *
+ * This function is based on nand_read_buf16 from nand_base.c. This version
+ * reads 32bit not 16bit although the bus only has 16bit.
+ */
+static void omap_spl_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+ int i;
+ struct nand_chip *chip = mtd->priv;
+ u32 *p = (u32 *) buf;
+ len >>= 2;
+
+ for (i = 0; i < len; i++)
+ p[i] = readl(chip->IO_ADDR_R);
+}
+
+/*
+ * omap_spl_read_buf - [DEFAULT] read chip data into buffer
+ * @mtd: MTD device structure
+ * @buf: buffer to store date
+ * @len: number of bytes to read
+ *
+ * Default read function for 8bit buswith
+ *
+ * This is the same function as this from nand_base.c nand_read_buf
+ */
+static void omap_spl_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+{
+ int i;
+ struct nand_chip *chip = mtd->priv;
+
+ for (i = 0; i < len; i++)
+ buf[i] = readb(chip->IO_ADDR_R);
+}
+#endif
+
/*
* omap_hwecc_init - Initialize the Hardware ECC for NAND flash in
* GPMC controller
@@ -224,6 +273,7 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
}
}
+#ifndef CONFIG_SPL_BUILD
/*
* omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc.
* The default is to come up on s/w ecc
@@ -280,6 +330,7 @@ void omap_nand_switch_ecc(int32_t hardware)
nand->options &= ~NAND_OWN_BUFFERS;
}
+#endif /* CONFIG_SPL_BUILD */
/*
* Board-specific NAND initialization. The following members of the
@@ -338,7 +389,24 @@ int board_nand_init(struct nand_chip *nand)
nand->chip_delay = 100;
/* Default ECC mode */
+#ifndef CONFIG_SPL_BUILD
nand->ecc.mode = NAND_ECC_SOFT;
+#else
+ nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.layout = &hw_nand_oob;
+ nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
+ nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
+ nand->ecc.hwctl = omap_enable_hwecc;
+ nand->ecc.correct = omap_correct_data;
+ nand->ecc.calculate = omap_calculate_ecc;
+ omap_hwecc_init(nand);
+
+ if (nand->options & NAND_BUSWIDTH_16)
+ nand->read_buf = omap_spl_read_buf16;
+ else
+ nand->read_buf = omap_spl_read_buf;
+ nand->dev_ready = omap_spl_dev_ready;
+#endif
return 0;
}
diff --git a/spl/Makefile b/spl/Makefile
index 87f13f6..0c0d3c4 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -46,6 +46,8 @@ LIBS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/libspi_flash.o
LIBS-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/libspi.o
LIBS-$(CONFIG_SPL_FAT_SUPPORT) += fs/fat/libfat.o
LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o
+LIBS-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/libpower.o
+LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/libnand.o
ifeq ($(SOC),omap3)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 4/5] omap3: new SPL structure support
2011-07-28 8:38 ` [U-Boot] [PATCH V6 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
` (2 preceding siblings ...)
2011-07-28 8:38 ` [U-Boot] [PATCH V6 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
@ 2011-07-28 8:38 ` Simon Schwarz
2011-07-28 8:38 ` [U-Boot] [PATCH V6 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support Simon Schwarz
5 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-28 8:38 UTC (permalink / raw)
To: u-boot
Support for the new spl structure. Using the interface defined by Aneesh V for
OMAP4
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD support for early console output in SPL
V2 changes:
ADD include omap_common.h in board.c
ADD implement new omap common interface omap_boot_device, omap_boot_mode and
omap_rev_string (very basic)
CHG cosmetic
CHG Don't add ecc switch command in SPL
ADD save_boot_params stump with warning to implement it
V3 changes:
none
V4 changes:
CHG cosmetic - corrected style problem
V5 changes:
nothing
V6 changes:
nothing
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is in some parts a anccesstor of "[U-Boot,2/5] devkit8000 nand_spl: omap3
support nand_spl boot"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114) in V1
---
arch/arm/cpu/armv7/omap3/board.c | 37 +++++++++++++++++++++++++-
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 +++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
3 files changed, 41 insertions(+), 2 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 4aaf97b..ee3285f 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -39,6 +39,7 @@
#include <asm/cache.h>
#include <asm/armv7.h>
#include <asm/omap_gpio.h>
+#include <asm/omap_common.h>
/* Declarations */
extern omap3_sysinfo sysinfo;
@@ -56,6 +57,28 @@ static const struct gpio_bank gpio_bank_34xx[6] = {
const struct gpio_bank *const omap_gpio_bank = gpio_bank_34xx;
+#ifdef CONFIG_SPL_BUILD
+/*
+* We use static variables because global data is not ready yet.
+* Initialized data is available in SPL right from the beginning.
+* We would not typically need to save these parameters in regular
+* U-Boot. This is needed only in SPL at the moment.
+*/
+u32 omap3_boot_device = BOOT_DEVICE_NAND;
+u32 omap3_boot_mode = NAND_MODE_HW_ECC;
+
+u32 omap_boot_device(void)
+{
+ return omap3_boot_device;
+}
+
+u32 omap_boot_mode(void)
+{
+ return omap3_boot_mode;
+}
+#endif /* CONFIG_SPL_BUILD */
+
+
/******************************************************************************
* Routine: delay
* Description: spinning delay to use before udelay works
@@ -197,6 +220,10 @@ void s_init(void)
per_clocks_enable();
+#ifdef CONFIG_SPL_BUILD
+ preloader_console_init();
+#endif
+
if (!in_sdram)
mem_init();
}
@@ -245,7 +272,7 @@ void abort(void)
{
}
-#ifdef CONFIG_NAND_OMAP_GPMC
+#if defined(CONFIG_NAND_OMAP_GPMC) & !defined(CONFIG_SPL_BUILD)
/******************************************************************************
* OMAP3 specific command to switch between NAND HW and SW ecc
*****************************************************************************/
@@ -273,7 +300,7 @@ U_BOOT_CMD(
"[hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc algorithm"
);
-#endif /* CONFIG_NAND_OMAP_GPMC */
+#endif /* CONFIG_NAND_OMAP_GPMC & !CONFIG_SPL_BUILD */
#ifdef CONFIG_DISPLAY_BOARDINFO
/**
@@ -402,3 +429,9 @@ void v7_outer_cache_disable(void)
omap3_update_aux_cr(0, 0x2);
}
#endif
+
+void omap_rev_string(char *omap_rev_string)
+{
+ sprintf(omap_rev_string, "OMAP3, sorry revision detection" \
+ " unimplemented");
+}
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index 67e8ceb..48a7ec6 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -35,6 +35,11 @@
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
+.global save_boot_params
+save_boot_params:
+ #warning "Please implement save_boot_params for OMAP3"
+ bx lr
+
.global omap3_gp_romcode_call
omap3_gp_romcode_call:
PUSH {r4-r12, lr} @ Save all registers from ROM code!
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h
index 995e7cb..7b60051 100644
--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
@@ -71,4 +71,5 @@ void power_init_r(void);
void dieid_num_r(void);
void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
void omap3_gp_romcode_call(u32 service_id, u32 parameter);
+void omap_rev_string(char *omap_rev_string);
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 5/5] devkit8000: Add nand-spl support for new SPL
2011-07-28 8:38 ` [U-Boot] [PATCH V6 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
` (3 preceding siblings ...)
2011-07-28 8:38 ` [U-Boot] [PATCH V6 4/5] omap3: new SPL structure support Simon Schwarz
@ 2011-07-28 8:38 ` Simon Schwarz
2011-07-28 10:51 ` Aneesh V
2011-07-29 16:53 ` [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support Simon Schwarz
5 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-28 8:38 UTC (permalink / raw)
To: u-boot
Add NAND SPL support to the devkit8000 config
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD devkit8000_nand to board.cfg
ADD nand_spl Makefile, llinker script, spl-devkit8000.c
ADD config ecc, SRAM, SPL to board config
ADD CONFIG_SYS_SRAM_START and _SIZE to board config
ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config
V2 changes:
ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER, NAND and
CONFIG_SPL_LDSCRIPT to board config
CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_*
ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config: Where to
expect u-boot and where to load it.
ADD some barrier to not build board_eth_init in SPL
DEL no changes to board.cfg
DEL everything used the old nand_spl layout (Makefile, linker script,
spl-devkit8000.c)
CHG cosmetic
V3 changes:
CHG Deleted wrong comment
V4 changes:
CHG CONFIG_SYS_SRAM_SIZE NOW has the right value
CHG cosmetic - corrected style problems
V5 changes:
nothing
V6 changes:
nothing
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl
support"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)
---
board/timll/devkit8000/devkit8000.c | 2 +-
include/configs/devkit8000.h | 46 +++++++++++++++++++++++++++++++++++
2 files changed, 47 insertions(+), 1 deletions(-)
diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
index 95afaaa..9b53742 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -119,7 +119,7 @@ void set_muxconf_regs(void)
MUX_DEVKIT8000();
}
-#ifdef CONFIG_DRIVER_DM9000
+#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
/*
* Routine: board_eth_init
* Description: Setting up the Ethernet hardware.
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 125c690..022069d 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -307,4 +307,50 @@
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
+/* SRAM config */
+#define CONFIG_SYS_SRAM_START 0x40200000
+#define CONFIG_SYS_SRAM_SIZE 0x10000
+
+/* Defines for SPL */
+#define CONFIG_SPL
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
+#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */
+#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
+
+#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
+#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+ 10, 11, 12, 13}
+
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 3
+
+#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
+ CONFIG_SYS_NAND_ECCSIZE)
+#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
+ CONFIG_SYS_NAND_ECCSTEPS)
+
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_NAND_U_BOOT_DST
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
+#define CONFIG_SYS_NAND_U_BOOT_DST CONFIG_SYS_TEXT_BASE
+
#endif /* __CONFIG_H */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 1/5] omap3: Configure RAM bank 0 if in SPL
2011-07-28 8:38 ` [U-Boot] [PATCH V6 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
@ 2011-07-28 8:50 ` Aneesh V
2011-07-28 9:42 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Aneesh V @ 2011-07-28 8:50 UTC (permalink / raw)
To: u-boot
Hi Simon,
First of all sorry for giving my first comments on v6. But I didn't
have mail access for the last couple of days.
On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
> OMAP3 relied on the memory config done by X-loader or Configuration Header. This
> has to be reworked for the implementation of a SPL. This patch configures RAM
> bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000
> are added to mem.h
>
> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
> ---
> V1 changes:
> ADD Settings for Micron RAM
>
> V2 changes:
> DEL spl_debug outputs if mem test fails/passes
> CHG CONFIG_PRELOADER to CONFIG_SPL_BUILD
>
> V3 changes:
> nothing
>
> V4 changes:
> nothing
>
> V5 changes:
> nothing
>
> V6 changes:
> nothing
>
> Transition from V1 to V2 also includes that this patch is now based on
> - the new SPL layout by Aneesh V and Daniel Schwierzeck
> - the OMAP4 SPL patches by Aneesh V
>
> This is the successor of "[U-Boot,3/5] devkit8000 nand_spl: Add RAM
> configuration independent of x-loader or CH"
> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114)
> ---
> arch/arm/cpu/armv7/omap3/sdrc.c | 30 ++++++++++++++++++++++++++-
> arch/arm/include/asm/arch-omap3/mem.h | 36 +++++++++++++++++++++++++++++++++
> 2 files changed, 65 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
> index 2a7970b..dac14d0 100644
> --- a/arch/arm/cpu/armv7/omap3/sdrc.c
> +++ b/arch/arm/cpu/armv7/omap3/sdrc.c
> @@ -8,6 +8,9 @@
> * Copyright (C) 2004-2010
> * Texas Instruments Incorporated - http://www.ti.com/
> *
> + * Copyright (C) 2011
> + * Corscience GmbH& Co. KG - Simon Schwarz<schwarz@corscience.de>
> + *
> * Author :
> * Vaibhav Hiremath<hvaibhav@ti.com>
> *
> @@ -133,13 +136,38 @@ void do_sdrc_init(u32 cs, u32 early)
> sdelay(0x20000);
> }
>
> +#ifdef CONFIG_SPL_BUILD
Is this really specific to SPL. mem_init() should ideally be the same
for SPL and NOR u-boot, right? Maybe you could remove the #ifdef?
I think NOR boot is broken on OMAP3(somebody please correct me if I am
wrong). I think this may be one thing that helps to make it work again.
> + /* If we use a SPL there is no x-loader nor config header so we have
> + * to do the job ourselfs
> + */
> + if (cs == CS0) {
> + sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
> +
> + /* General SDRC config */
> + writel(V_MCFG,&sdrc_base->cs[cs].mcfg);
> + writel(V_RFR_CTRL,&sdrc_base->cs[cs].rfr_ctrl);
> +
> + /* AC timings */
> + writel(V_ACTIMA_165,&sdrc_actim_base0->ctrla);
> + writel(V_ACTIMB_165,&sdrc_actim_base0->ctrlb);
> +
> + /* Initialize */
> + writel(CMD_NOP,&sdrc_base->cs[cs].manual);
> + writel(CMD_PRECHARGE,&sdrc_base->cs[cs].manual);
> + writel(CMD_AUTOREFRESH,&sdrc_base->cs[cs].manual);
> + writel(CMD_AUTOREFRESH,&sdrc_base->cs[cs].manual);
> +
> + writel(V_MR,&sdrc_base->cs[cs].mr);
> + }
> +#endif /* CONFIG_SPL_BUILD */
best regards,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support
2011-07-28 8:38 ` [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support Simon Schwarz
@ 2011-07-28 9:42 ` Aneesh V
2011-07-28 12:44 ` Simon Schwarz
2011-08-02 12:03 ` Simon Schwarz
2011-07-28 9:58 ` Aneesh V
2011-07-28 14:16 ` Aneesh V
2 siblings, 2 replies; 134+ messages in thread
From: Aneesh V @ 2011-07-28 9:42 UTC (permalink / raw)
To: u-boot
Hi Simon,
On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
> Add NAND support for the new SPL structure.
>
> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
> ---
> This patch didn't exist before V2!
>
> V2 changes:
> ADD Some define-barriers for OMAP3 to only use NAND
> ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
> header
> CHG cosmetic
> ADD do_reset() implementation for omap-common spl
> ADD nand_copy_image to nand.h
> ADD CPP barriers for mmc and nand support. The parts depending on library
> support are only compiled if the respective library is included.
>
> V3 changes:
> ADD Comment why setup_clocks_for_console() isn't called for OMAP3
> CHG cosmetic (deleted empty line)
> CHG rename of NAND_MODE_HW to NAND_MODE_HW_ECC
> DEL NAND_MODE_SW. Not used.
>
> V4 changes:
> CHG cosmetic - style problems
>
> V5 changes:
> CHG renamed nand_copy_image to nand_spl_load_image
> CHG offs paramter of nand_spl_load_image is of type loff_t now
>
> V6 changes:
> ADD call to nand_deselect after loading the images
> ADD nand_deselect to nand.h
>
> Transition from V1 to V2 also includes that this patch is now based on
> - the new SPL layout by Aneesh V and Daniel Schwierzeck
> - the OMAP4 SPL patches by Aneesh V
> ---
> arch/arm/cpu/armv7/omap-common/spl.c | 47 ++++++++++++++++++++++++++++++++++
> arch/arm/include/asm/omap_common.h | 1 +
> include/nand.h | 3 ++
> 3 files changed, 51 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
> index d177652..7ec5c7c 100644
> --- a/arch/arm/cpu/armv7/omap-common/spl.c
> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
> @@ -26,6 +26,7 @@
> #include<asm/u-boot.h>
> #include<asm/utils.h>
> #include<asm/arch/sys_proto.h>
> +#include<nand.h>
> #include<mmc.h>
> #include<fat.h>
> #include<timestamp_autogenerated.h>
> @@ -107,6 +108,7 @@ static void parse_image_header(const struct image_header *header)
> }
> }
>
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> static void mmc_load_image_raw(struct mmc *mmc)
> {
> u32 image_size_sectors, err;
> @@ -140,7 +142,9 @@ end:
> hang();
> }
> }
> +#endif /* CONFIG_SPL_MMC_SUPPORT */
here..
>
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> static void mmc_load_image_fat(struct mmc *mmc)
> {
> s32 err;
> @@ -173,7 +177,9 @@ end:
> hang();
> }
> }
> +#endif /* CONFIG_SPL_MMC_SUPPORT */
and here..
You start the same the #ifdef again immediately after the #endif. Why
don't you club them together into just one #ifdef block.
Actually, since we have garbage collection of un-used functions, I
think doing the calls under #ifdef should be enough, which you have
taken care in board_init_r(). That may help to avoid some #ifdef
clutter.
>
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> static void mmc_load_image(void)
> {
> struct mmc *mmc;
> @@ -206,6 +212,28 @@ static void mmc_load_image(void)
> hang();
> }
> }
> +#endif /* CONFIG_SPL_MMC_SUPPORT */
> +
> +#ifdef CONFIG_SPL_NAND_SUPPORT
> +static void nand_load_image(void)
> +{
> + gpmc_init();
> + nand_init();
> + nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
> + CONFIG_SYS_NAND_U_BOOT_SIZE,
> + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
> +#ifdef CONFIG_NAND_ENV_DST
> + nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
> + (uchar *)CONFIG_NAND_ENV_DST);
> +#ifdef CONFIG_ENV_OFFSET_REDUND
> + nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
> + (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
> +#endif
> +#endif
> + nand_deselect();
> + parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
> +}
> +#endif /* CONFIG_SPL_NAND_SUPPORT */
>
> void jump_to_image_no_args(void)
> {
> @@ -228,10 +256,17 @@ void board_init_r(gd_t *id, ulong dummy)
> boot_device = omap_boot_device();
> debug("boot device - %d\n", boot_device);
> switch (boot_device) {
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> case BOOT_DEVICE_MMC1:
> case BOOT_DEVICE_MMC2:
> mmc_load_image();
> break;
> +#endif
> +#ifdef CONFIG_SPL_NAND_SUPPORT
> + case BOOT_DEVICE_NAND:
> + nand_load_image();
> + break;
> +#endif
> default:
> printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
> hang();
> @@ -259,7 +294,11 @@ void preloader_console_init(void)
> gd->flags |= GD_FLG_RELOC;
> gd->baudrate = CONFIG_BAUDRATE;
>
> +/* Console clock for OMAP3 is already initialized by per_clocks_enable()
> + * called in board.c by s_init() */
> +#ifndef CONFIG_OMAP34XX
> setup_clocks_for_console();
> +#endif
Please do one of the solutions Andreas suggested instead of having that
ifndef.
br,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 1/5] omap3: Configure RAM bank 0 if in SPL
2011-07-28 8:50 ` Aneesh V
@ 2011-07-28 9:42 ` Simon Schwarz
2011-07-29 16:53 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-28 9:42 UTC (permalink / raw)
To: u-boot
Hi Aneesh,
On 07/28/2011 10:50 AM, Aneesh V wrote:
> Hi Simon,
>
> First of all sorry for giving my first comments on v6. But I didn't
> have mail access for the last couple of days.
>
> On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
>> OMAP3 relied on the memory config done by X-loader or Configuration
>> Header. This
>> has to be reworked for the implementation of a SPL. This patch
>> configures RAM
>> bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by
>> devkit8000
>> are added to mem.h
>>
>> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
>> ---
>> V1 changes:
>> ADD Settings for Micron RAM
>>
>> V2 changes:
>> DEL spl_debug outputs if mem test fails/passes
>> CHG CONFIG_PRELOADER to CONFIG_SPL_BUILD
>>
>> V3 changes:
>> nothing
>>
>> V4 changes:
>> nothing
>>
>> V5 changes:
>> nothing
>>
>> V6 changes:
>> nothing
>>
>> Transition from V1 to V2 also includes that this patch is now based on
>> - the new SPL layout by Aneesh V and Daniel Schwierzeck
>> - the OMAP4 SPL patches by Aneesh V
>>
>> This is the successor of "[U-Boot,3/5] devkit8000 nand_spl: Add RAM
>> configuration independent of x-loader or CH"
>> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114)
>> ---
>> arch/arm/cpu/armv7/omap3/sdrc.c | 30 ++++++++++++++++++++++++++-
>> arch/arm/include/asm/arch-omap3/mem.h | 36
>> +++++++++++++++++++++++++++++++++
>> 2 files changed, 65 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c
>> b/arch/arm/cpu/armv7/omap3/sdrc.c
>> index 2a7970b..dac14d0 100644
>> --- a/arch/arm/cpu/armv7/omap3/sdrc.c
>> +++ b/arch/arm/cpu/armv7/omap3/sdrc.c
>> @@ -8,6 +8,9 @@
>> * Copyright (C) 2004-2010
>> * Texas Instruments Incorporated - http://www.ti.com/
>> *
>> + * Copyright (C) 2011
>> + * Corscience GmbH& Co. KG - Simon Schwarz<schwarz@corscience.de>
>> + *
>> * Author :
>> * Vaibhav Hiremath<hvaibhav@ti.com>
>> *
>> @@ -133,13 +136,38 @@ void do_sdrc_init(u32 cs, u32 early)
>> sdelay(0x20000);
>> }
>>
>> +#ifdef CONFIG_SPL_BUILD
>
> Is this really specific to SPL. mem_init() should ideally be the same
> for SPL and NOR u-boot, right? Maybe you could remove the #ifdef?
> I think NOR boot is broken on OMAP3(somebody please correct me if I am
> wrong). I think this may be one thing that helps to make it work again.
I did this to not influence non-SPL code. But you are right since
mem_init isn't called if it is already in RAM I can remove the #ifdefs
-> will do in V7.
>> + /* If we use a SPL there is no x-loader nor config header so we have
>> + * to do the job ourselfs
>> + */
>> + if (cs == CS0) {
>> + sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
>> +
>> + /* General SDRC config */
>> + writel(V_MCFG,&sdrc_base->cs[cs].mcfg);
>> + writel(V_RFR_CTRL,&sdrc_base->cs[cs].rfr_ctrl);
>> +
>> + /* AC timings */
>> + writel(V_ACTIMA_165,&sdrc_actim_base0->ctrla);
>> + writel(V_ACTIMB_165,&sdrc_actim_base0->ctrlb);
>> +
>> + /* Initialize */
>> + writel(CMD_NOP,&sdrc_base->cs[cs].manual);
>> + writel(CMD_PRECHARGE,&sdrc_base->cs[cs].manual);
>> + writel(CMD_AUTOREFRESH,&sdrc_base->cs[cs].manual);
>> + writel(CMD_AUTOREFRESH,&sdrc_base->cs[cs].manual);
>> +
>> + writel(V_MR,&sdrc_base->cs[cs].mr);
>> + }
>> +#endif /* CONFIG_SPL_BUILD */
>
>
> best regards,
> Aneesh
Regards, thanks for review!
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support
2011-07-28 8:38 ` [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support Simon Schwarz
2011-07-28 9:42 ` Aneesh V
@ 2011-07-28 9:58 ` Aneesh V
2011-07-28 12:54 ` Simon Schwarz
2011-07-28 14:16 ` Aneesh V
2 siblings, 1 reply; 134+ messages in thread
From: Aneesh V @ 2011-07-28 9:58 UTC (permalink / raw)
To: u-boot
Hi Simon,
On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
[snip ..]
> +
> +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
> +{
> + debug("resetting cpu...");
> + reset_cpu(0);
> +
> + return 0;
> +}
Can you explain the need of this do_reset()? I couldn't figure out
where it is used in SPL.
br,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 5/5] devkit8000: Add nand-spl support for new SPL
2011-07-28 8:38 ` [U-Boot] [PATCH V6 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
@ 2011-07-28 10:51 ` Aneesh V
2011-07-28 11:54 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Aneesh V @ 2011-07-28 10:51 UTC (permalink / raw)
To: u-boot
On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
> Add NAND SPL support to the devkit8000 config
>
> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
> ---
> V1 changes:
> ADD devkit8000_nand to board.cfg
> ADD nand_spl Makefile, llinker script, spl-devkit8000.c
> ADD config ecc, SRAM, SPL to board config
> ADD CONFIG_SYS_SRAM_START and _SIZE to board config
> ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config
>
> V2 changes:
> ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER, NAND and
> CONFIG_SPL_LDSCRIPT to board config
> CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_*
> ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config: Where to
> expect u-boot and where to load it.
> ADD some barrier to not build board_eth_init in SPL
> DEL no changes to board.cfg
> DEL everything used the old nand_spl layout (Makefile, linker script,
> spl-devkit8000.c)
> CHG cosmetic
>
> V3 changes:
> CHG Deleted wrong comment
>
> V4 changes:
> CHG CONFIG_SYS_SRAM_SIZE NOW has the right value
> CHG cosmetic - corrected style problems
>
> V5 changes:
> nothing
>
> V6 changes:
> nothing
>
> Transition from V1 to V2 also includes that this patch is now based on
> - the new SPL layout by Aneesh V and Daniel Schwierzeck
> - the OMAP4 SPL patches by Aneesh V
>
> This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl
> support"
> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)
> ---
> board/timll/devkit8000/devkit8000.c | 2 +-
> include/configs/devkit8000.h | 46 +++++++++++++++++++++++++++++++++++
> 2 files changed, 47 insertions(+), 1 deletions(-)
>
> diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
> index 95afaaa..9b53742 100644
> --- a/board/timll/devkit8000/devkit8000.c
> +++ b/board/timll/devkit8000/devkit8000.c
> @@ -119,7 +119,7 @@ void set_muxconf_regs(void)
> MUX_DEVKIT8000();
> }
>
> -#ifdef CONFIG_DRIVER_DM9000
> +#if defined(CONFIG_DRIVER_DM9000)& !defined(CONFIG_SPL_BUILD)
> /*
> * Routine: board_eth_init
> * Description: Setting up the Ethernet hardware.
> diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
> index 125c690..022069d 100644
> --- a/include/configs/devkit8000.h
> +++ b/include/configs/devkit8000.h
> @@ -307,4 +307,50 @@
> CONFIG_SYS_INIT_RAM_SIZE - \
> GENERATED_GBL_DATA_SIZE)
>
> +/* SRAM config */
> +#define CONFIG_SYS_SRAM_START 0x40200000
> +#define CONFIG_SYS_SRAM_SIZE 0x10000
OMAP3 secure devices do not have this much public SRAM. So, the above
values wouldn't work for it. I suggest the following values:
#define CONFIG_SYS_SRAM_START 0x40208000
#define CONFIG_SYS_SRAM_SIZE 0x8000 /* 32 KB */
#define CONFIG_SPL_TEXT_BASE CONFIG_SYS_SRAM_START
#define CONFIG_SPL_MAX_SIZE 0x7C00 /* 31 K - set aside at least 1K
for stack*/
best regards,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 5/5] devkit8000: Add nand-spl support for new SPL
2011-07-28 10:51 ` Aneesh V
@ 2011-07-28 11:54 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-28 11:54 UTC (permalink / raw)
To: u-boot
Hi Aneesh,
On 07/28/2011 12:51 PM, Aneesh V wrote:
> On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
>> Add NAND SPL support to the devkit8000 config
>>
>> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
>> ---
>> V1 changes:
>> ADD devkit8000_nand to board.cfg
>> ADD nand_spl Makefile, llinker script, spl-devkit8000.c
>> ADD config ecc, SRAM, SPL to board config
>> ADD CONFIG_SYS_SRAM_START and _SIZE to board config
>> ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config
>>
>> V2 changes:
>> ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER,
>> NAND and
>> CONFIG_SPL_LDSCRIPT to board config
>> CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_*
>> ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config:
>> Where to
>> expect u-boot and where to load it.
>> ADD some barrier to not build board_eth_init in SPL
>> DEL no changes to board.cfg
>> DEL everything used the old nand_spl layout (Makefile, linker script,
>> spl-devkit8000.c)
>> CHG cosmetic
>>
>> V3 changes:
>> CHG Deleted wrong comment
>>
>> V4 changes:
>> CHG CONFIG_SYS_SRAM_SIZE NOW has the right value
>> CHG cosmetic - corrected style problems
>>
>> V5 changes:
>> nothing
>>
>> V6 changes:
>> nothing
>>
>> Transition from V1 to V2 also includes that this patch is now based on
>> - the new SPL layout by Aneesh V and Daniel Schwierzeck
>> - the OMAP4 SPL patches by Aneesh V
>>
>> This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl
>> support"
>> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)
>> ---
>> board/timll/devkit8000/devkit8000.c | 2 +-
>> include/configs/devkit8000.h | 46 +++++++++++++++++++++++++++++++++++
>> 2 files changed, 47 insertions(+), 1 deletions(-)
>>
>> diff --git a/board/timll/devkit8000/devkit8000.c
>> b/board/timll/devkit8000/devkit8000.c
>> index 95afaaa..9b53742 100644
>> --- a/board/timll/devkit8000/devkit8000.c
>> +++ b/board/timll/devkit8000/devkit8000.c
>> @@ -119,7 +119,7 @@ void set_muxconf_regs(void)
>> MUX_DEVKIT8000();
>> }
>>
>> -#ifdef CONFIG_DRIVER_DM9000
>> +#if defined(CONFIG_DRIVER_DM9000)& !defined(CONFIG_SPL_BUILD)
>> /*
>> * Routine: board_eth_init
>> * Description: Setting up the Ethernet hardware.
>> diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
>> index 125c690..022069d 100644
>> --- a/include/configs/devkit8000.h
>> +++ b/include/configs/devkit8000.h
>> @@ -307,4 +307,50 @@
>> CONFIG_SYS_INIT_RAM_SIZE - \
>> GENERATED_GBL_DATA_SIZE)
>>
>> +/* SRAM config */
>> +#define CONFIG_SYS_SRAM_START 0x40200000
>> +#define CONFIG_SYS_SRAM_SIZE 0x10000
>
> OMAP3 secure devices do not have this much public SRAM. So, the above
> values wouldn't work for it. I suggest the following values:
> #define CONFIG_SYS_SRAM_START 0x40208000
> #define CONFIG_SYS_SRAM_SIZE 0x8000 /* 32 KB */
>
> #define CONFIG_SPL_TEXT_BASE CONFIG_SYS_SRAM_START
> #define CONFIG_SPL_MAX_SIZE 0x7C00 /* 31 K - set aside at least 1K for
> stack*/
What do you mean by secure devices? Custom processors? The datasheet i
have says 64K for OMAP35x devices.
Since this is the configuration for the devkit8000 and these devices
have 64K SRAM I would prefer to leave these settings as they are.
If the SPL is ported to other OMAP3 devs with just 32K they can change
the settings then. (At the moment the NAND SPL has 19K so this won't be
a problem)
>
> best regards,
> Aneesh
Regards & thanks for reviewing
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 3/5] nand spl: add NAND Library to new SPL
2011-07-28 8:38 ` [U-Boot] [PATCH V6 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
@ 2011-07-28 11:54 ` Aneesh V
2011-07-28 14:04 ` Simon Schwarz
2011-07-28 19:16 ` Scott Wood
1 sibling, 1 reply; 134+ messages in thread
From: Aneesh V @ 2011-07-28 11:54 UTC (permalink / raw)
To: u-boot
On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
> Insert some NAND driver sources into NAND SPL library.
>
> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
[snip ..]
> +
> +int nand_curr_device = -1;
Is nand_curr_device used anywhere?
> +static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
> +static nand_info_t info;
> +nand_info_t nand_info[CONFIG_SYS_MAX_NAND_DEVICE];
Is nand_info used anywhere?
> +static struct nand_chip nand_chip;
Is nand_chip used anywhere? I see that this definition is shadowed in
function nand_init().
> +
> +#if (CONFIG_SYS_NAND_PAGE_SIZE<= 512)
[snip ..]
> +/*
> + * omap_spl_read_buf16 - [DEFAULT] read chip data into buffer
> + * @mtd: MTD device structure
> + * @buf: buffer to store date
typo: date instead of data.
> + * @len: number of bytes to read
> + *
> + * Default read function for 16bit buswith
> + *
> + * This function is based on nand_read_buf16 from nand_base.c. This version
> + * reads 32bit not 16bit although the bus only has 16bit.
> + */
> +static void omap_spl_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
> +{
> + int i;
> + struct nand_chip *chip = mtd->priv;
> + u32 *p = (u32 *) buf;
Why this variable p?
> + len>>= 2;
> +
> + for (i = 0; i< len; i++)
> + p[i] = readl(chip->IO_ADDR_R);
> +}
Should this function be called omap_spl_read_buf32() ?
Or still better, should this be added as nand_read_buf32() in
nand_base.c itself?
> +
> +/*
> + * omap_spl_read_buf - [DEFAULT] read chip data into buffer
> + * @mtd: MTD device structure
> + * @buf: buffer to store date
> + * @len: number of bytes to read
> + *
> + * Default read function for 8bit buswith
> + *
> + * This is the same function as this from nand_base.c nand_read_buf
> + */
> +static void omap_spl_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
> +{
> + int i;
> + struct nand_chip *chip = mtd->priv;
> +
> + for (i = 0; i< len; i++)
> + buf[i] = readb(chip->IO_ADDR_R);
> +}
> +#endif
What is the difference between this function and nand_read_buf() in
nand_base.c ?
best regards,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support
2011-07-28 9:42 ` Aneesh V
@ 2011-07-28 12:44 ` Simon Schwarz
2011-07-28 14:24 ` Aneesh V
2011-08-02 12:03 ` Simon Schwarz
1 sibling, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-28 12:44 UTC (permalink / raw)
To: u-boot
On 07/28/2011 11:42 AM, Aneesh V wrote:
> Hi Simon,
>
> On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
>> Add NAND support for the new SPL structure.
>>
>> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
>> ---
>> This patch didn't exist before V2!
>>
>> V2 changes:
>> ADD Some define-barriers for OMAP3 to only use NAND
>> ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses
>> the
>> header
>> CHG cosmetic
>> ADD do_reset() implementation for omap-common spl
>> ADD nand_copy_image to nand.h
>> ADD CPP barriers for mmc and nand support. The parts depending on library
>> support are only compiled if the respective library is included.
>>
>> V3 changes:
>> ADD Comment why setup_clocks_for_console() isn't called for OMAP3
>> CHG cosmetic (deleted empty line)
>> CHG rename of NAND_MODE_HW to NAND_MODE_HW_ECC
>> DEL NAND_MODE_SW. Not used.
>>
>> V4 changes:
>> CHG cosmetic - style problems
>>
>> V5 changes:
>> CHG renamed nand_copy_image to nand_spl_load_image
>> CHG offs paramter of nand_spl_load_image is of type loff_t now
>>
>> V6 changes:
>> ADD call to nand_deselect after loading the images
>> ADD nand_deselect to nand.h
>>
>> Transition from V1 to V2 also includes that this patch is now based on
>> - the new SPL layout by Aneesh V and Daniel Schwierzeck
>> - the OMAP4 SPL patches by Aneesh V
>> ---
>> arch/arm/cpu/armv7/omap-common/spl.c | 47
>> ++++++++++++++++++++++++++++++++++
>> arch/arm/include/asm/omap_common.h | 1 +
>> include/nand.h | 3 ++
>> 3 files changed, 51 insertions(+), 0 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
>> b/arch/arm/cpu/armv7/omap-common/spl.c
>> index d177652..7ec5c7c 100644
>> --- a/arch/arm/cpu/armv7/omap-common/spl.c
>> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
>> @@ -26,6 +26,7 @@
>> #include<asm/u-boot.h>
>> #include<asm/utils.h>
>> #include<asm/arch/sys_proto.h>
>> +#include<nand.h>
>> #include<mmc.h>
>> #include<fat.h>
>> #include<timestamp_autogenerated.h>
>> @@ -107,6 +108,7 @@ static void parse_image_header(const struct
>> image_header *header)
>> }
>> }
>>
>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>> static void mmc_load_image_raw(struct mmc *mmc)
>> {
>> u32 image_size_sectors, err;
>> @@ -140,7 +142,9 @@ end:
>> hang();
>> }
>> }
>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>
> here..
>
>>
>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>> static void mmc_load_image_fat(struct mmc *mmc)
>> {
>> s32 err;
>> @@ -173,7 +177,9 @@ end:
>> hang();
>> }
>> }
>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>
> and here..
>
> You start the same the #ifdef again immediately after the #endif. Why
> don't you club them together into just one #ifdef block.
IMHO #ifdef each function makes it more readable but...
>
> Actually, since we have garbage collection of un-used functions, I
> think doing the calls under #ifdef should be enough, which you have
> taken care in board_init_r(). That may help to avoid some #ifdef
> clutter.
...I take this way :)
I had to define some MMC specific stuff in the board config (copied it
from OMAP4 - not tested) and added __attribute__((unused)) to
mmc_load_image to prevent the warning if the Library is not used.
Did this also for NAND.
-> next version
Maybe it is a good idea to have some dummy values for the unused libs in
SPL? With a compile-time warning that is emitted when no value is set
but the library is activated.
>>
>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>> static void mmc_load_image(void)
>> {
>> struct mmc *mmc;
>> @@ -206,6 +212,28 @@ static void mmc_load_image(void)
>> hang();
>> }
>> }
>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>> +
>> +#ifdef CONFIG_SPL_NAND_SUPPORT
>> +static void nand_load_image(void)
>> +{
>> + gpmc_init();
>> + nand_init();
>> + nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
>> + CONFIG_SYS_NAND_U_BOOT_SIZE,
>> + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
>> +#ifdef CONFIG_NAND_ENV_DST
>> + nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
>> + (uchar *)CONFIG_NAND_ENV_DST);
>> +#ifdef CONFIG_ENV_OFFSET_REDUND
>> + nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
>> + (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
>> +#endif
>> +#endif
>> + nand_deselect();
>> + parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
>> +}
>> +#endif /* CONFIG_SPL_NAND_SUPPORT */
>>
>> void jump_to_image_no_args(void)
>> {
>> @@ -228,10 +256,17 @@ void board_init_r(gd_t *id, ulong dummy)
>> boot_device = omap_boot_device();
>> debug("boot device - %d\n", boot_device);
>> switch (boot_device) {
>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>> case BOOT_DEVICE_MMC1:
>> case BOOT_DEVICE_MMC2:
>> mmc_load_image();
>> break;
>> +#endif
>> +#ifdef CONFIG_SPL_NAND_SUPPORT
>> + case BOOT_DEVICE_NAND:
>> + nand_load_image();
>> + break;
>> +#endif
>> default:
>> printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
>> hang();
>> @@ -259,7 +294,11 @@ void preloader_console_init(void)
>> gd->flags |= GD_FLG_RELOC;
>> gd->baudrate = CONFIG_BAUDRATE;
>>
>> +/* Console clock for OMAP3 is already initialized by per_clocks_enable()
>> + * called in board.c by s_init() */
>> +#ifndef CONFIG_OMAP34XX
>> setup_clocks_for_console();
>> +#endif
>
> Please do one of the solutions Andreas suggested instead of having that
> ifndef.
This is done in the next version.
>
> br,
> Aneesh
Regards & as always thanks for your review!
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support
2011-07-28 9:58 ` Aneesh V
@ 2011-07-28 12:54 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-28 12:54 UTC (permalink / raw)
To: u-boot
Hi Aneesh,
On 07/28/2011 11:58 AM, Aneesh V wrote:
> Hi Simon,
>
> On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
> [snip ..]
>> +
>> +int do_reset(cmd_tbl_t *cmdtp, int flag, int argc, char * const argv[])
>> +{
>> + debug("resetting cpu...");
>> + reset_cpu(0);
>> +
>> + return 0;
>> +}
>
> Can you explain the need of this do_reset()? I couldn't figure out
> where it is used in SPL.
Thats odd. I added this because of vsprintf - this calls do_reset()
which is not included in the SPL. This was in an early stage of SPL and
OMAP4 patches. Seems this is not needed anymore: will delete it for the
next version.
> br,
> Aneesh
Regards & thx for the review!
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 3/5] nand spl: add NAND Library to new SPL
2011-07-28 11:54 ` Aneesh V
@ 2011-07-28 14:04 ` Simon Schwarz
2011-07-28 16:18 ` Aneesh V
0 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-28 14:04 UTC (permalink / raw)
To: u-boot
Hi Aneesh,
On 07/28/2011 01:54 PM, Aneesh V wrote:
> On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
>> Insert some NAND driver sources into NAND SPL library.
>>
>> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
>
> [snip ..]
>
>> +
>> +int nand_curr_device = -1;
>
> Is nand_curr_device used anywhere?
Was used in nand.c - this isn't included anymore -> deleted
>
>> +static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
>> +static nand_info_t info;
>> +nand_info_t nand_info[CONFIG_SYS_MAX_NAND_DEVICE];
>
> Is nand_info used anywhere?
Same as above -> deleted.
>
>> +static struct nand_chip nand_chip;
>
> Is nand_chip used anywhere? I see that this definition is shadowed in
> function nand_init().
Deleted the double definition.
nand_chip is used in:
- nand_command
- nand_is_bad_block
- nand_read_page
- nand_init
- nand_deselect
>
>> +
>> +#if (CONFIG_SYS_NAND_PAGE_SIZE<= 512)
>
> [snip ..]
>
>> +/*
>> + * omap_spl_read_buf16 - [DEFAULT] read chip data into buffer
>> + * @mtd: MTD device structure
>> + * @buf: buffer to store date
>
> typo: date instead of data.
>
see below for solution (btw. this typo comes from nand_base.c)
>> + * @len: number of bytes to read
>> + *
>> + * Default read function for 16bit buswith
>> + *
>> + * This function is based on nand_read_buf16 from nand_base.c. This
>> version
>> + * reads 32bit not 16bit although the bus only has 16bit.
>> + */
>> +static void omap_spl_read_buf16(struct mtd_info *mtd, uint8_t *buf,
>> int len)
>> +{
>> + int i;
>> + struct nand_chip *chip = mtd->priv;
>> + u32 *p = (u32 *) buf;
>
> Why this variable p?
It is used to cast the 8-bit buffer variable into a 32bit one. Actually
the same is done for the 16bit implementation. (There it is the adaption
to the bus width - why 32bit here see below)
>
>> + len>>= 2;
>> +
>> + for (i = 0; i< len; i++)
>> + p[i] = readl(chip->IO_ADDR_R);
>> +}
>
> Should this function be called omap_spl_read_buf32() ?
> Or still better, should this be added as nand_read_buf32() in
> nand_base.c itself?
Oh. There I played around with the Access Size Adaptation of the GPMC -
It is still a x16 interface - this is what the 16 refers to IMHO. But
for sake of simplicity I will change this back to 16bit access - I don't
think that there is a big performance impact although I didn't measure it.
I cloned them because the functions in nand_base.c are static.
My solution: deleted the cloned functions - use these from nand_base by
removing the static modifier and add them to nand.h
This leaves nand_base.c inconsistent - some functions are static, some
not - maybe we should un-static all read/write functions as they are
normally used in SPL?
>> +
>> +/*
>> + * omap_spl_read_buf - [DEFAULT] read chip data into buffer
>> + * @mtd: MTD device structure
>> + * @buf: buffer to store date
>> + * @len: number of bytes to read
>> + *
>> + * Default read function for 8bit buswith
>> + *
>> + * This is the same function as this from nand_base.c nand_read_buf
>> + */
>> +static void omap_spl_read_buf(struct mtd_info *mtd, uint8_t *buf, int
>> len)
>> +{
>> + int i;
>> + struct nand_chip *chip = mtd->priv;
>> +
>> + for (i = 0; i< len; i++)
>> + buf[i] = readb(chip->IO_ADDR_R);
>> +}
>> +#endif
>
> What is the difference between this function and nand_read_buf() in
> nand_base.c ?
none - static is the problem. Did the same as with the x16 version above.
>
> best regards,
> Aneesh
Regards & thx for the review!
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support
2011-07-28 8:38 ` [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support Simon Schwarz
2011-07-28 9:42 ` Aneesh V
2011-07-28 9:58 ` Aneesh V
@ 2011-07-28 14:16 ` Aneesh V
2011-07-28 18:50 ` Scott Wood
2 siblings, 1 reply; 134+ messages in thread
From: Aneesh V @ 2011-07-28 14:16 UTC (permalink / raw)
To: u-boot
Hi Simon,
On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
> Add NAND support for the new SPL structure.
>
> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
> ---
> This patch didn't exist before V2!
>
> V2 changes:
> ADD Some define-barriers for OMAP3 to only use NAND
> ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
> header
> CHG cosmetic
> ADD do_reset() implementation for omap-common spl
> ADD nand_copy_image to nand.h
> ADD CPP barriers for mmc and nand support. The parts depending on library
> support are only compiled if the respective library is included.
>
> V3 changes:
> ADD Comment why setup_clocks_for_console() isn't called for OMAP3
> CHG cosmetic (deleted empty line)
> CHG rename of NAND_MODE_HW to NAND_MODE_HW_ECC
> DEL NAND_MODE_SW. Not used.
>
> V4 changes:
> CHG cosmetic - style problems
>
> V5 changes:
> CHG renamed nand_copy_image to nand_spl_load_image
> CHG offs paramter of nand_spl_load_image is of type loff_t now
>
> V6 changes:
> ADD call to nand_deselect after loading the images
> ADD nand_deselect to nand.h
>
> Transition from V1 to V2 also includes that this patch is now based on
> - the new SPL layout by Aneesh V and Daniel Schwierzeck
> - the OMAP4 SPL patches by Aneesh V
> ---
> arch/arm/cpu/armv7/omap-common/spl.c | 47 ++++++++++++++++++++++++++++++++++
> arch/arm/include/asm/omap_common.h | 1 +
> include/nand.h | 3 ++
> 3 files changed, 51 insertions(+), 0 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
> index d177652..7ec5c7c 100644
> --- a/arch/arm/cpu/armv7/omap-common/spl.c
> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
> @@ -26,6 +26,7 @@
> #include<asm/u-boot.h>
> #include<asm/utils.h>
> #include<asm/arch/sys_proto.h>
> +#include<nand.h>
> #include<mmc.h>
> #include<fat.h>
> #include<timestamp_autogenerated.h>
> @@ -107,6 +108,7 @@ static void parse_image_header(const struct image_header *header)
> }
> }
>
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> static void mmc_load_image_raw(struct mmc *mmc)
> {
> u32 image_size_sectors, err;
> @@ -140,7 +142,9 @@ end:
> hang();
> }
> }
> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> static void mmc_load_image_fat(struct mmc *mmc)
> {
> s32 err;
> @@ -173,7 +177,9 @@ end:
> hang();
> }
> }
> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>
> +#ifdef CONFIG_SPL_MMC_SUPPORT
> static void mmc_load_image(void)
> {
> struct mmc *mmc;
> @@ -206,6 +212,28 @@ static void mmc_load_image(void)
> hang();
> }
> }
> +#endif /* CONFIG_SPL_MMC_SUPPORT */
> +
> +#ifdef CONFIG_SPL_NAND_SUPPORT
> +static void nand_load_image(void)
> +{
> + gpmc_init();
> + nand_init();
> + nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
> + CONFIG_SYS_NAND_U_BOOT_SIZE,
> + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
Guess CONFIG_SYS_NAND_U_BOOT_DST is same as CONFIG_SYS_TEXT_BASE. Why
define a new flag then?
> +#ifdef CONFIG_NAND_ENV_DST
> + nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
> + (uchar *)CONFIG_NAND_ENV_DST);
> +#ifdef CONFIG_ENV_OFFSET_REDUND
> + nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
> + (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
> +#endif
> +#endif
> + nand_deselect();
> + parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
I think you are assuming the image type and size here. Why not do this
as it is done for MMC. That is, read just 1 sector, parse the buffer,
find the size of the image and read only that much subsequently. You
will have to then use u-boot.img instead of u-boot.bin as the payload.
Maybe you should clone arch/arm/cpu/armv7/omap4/config.mk in omap3
folder to get MLO and u-boot.img targets.
best regards,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support
2011-07-28 12:44 ` Simon Schwarz
@ 2011-07-28 14:24 ` Aneesh V
2011-07-28 14:34 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Aneesh V @ 2011-07-28 14:24 UTC (permalink / raw)
To: u-boot
On Thursday 28 July 2011 06:14 PM, Simon Schwarz wrote:
[snip ..]
>>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>>
>> and here..
>>
>> You start the same the #ifdef again immediately after the #endif. Why
>> don't you club them together into just one #ifdef block.
> IMHO #ifdef each function makes it more readable but...
Ok. I don't have any strong views on that.
>
>>
>> Actually, since we have garbage collection of un-used functions, I
>> think doing the calls under #ifdef should be enough, which you have
>> taken care in board_init_r(). That may help to avoid some #ifdef
>> clutter.
> ...I take this way :)
>
> I had to define some MMC specific stuff in the board config (copied it
Does your board have MMC support? Then it definitely makes sense to
keep MMC support enabled.
> from OMAP4 - not tested) and added __attribute__((unused)) to
> mmc_load_image to prevent the warning if the Library is not used.
Did GCC give warning without this change? I think it doesn't due to
-ffunction-sections?
best regards,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support
2011-07-28 14:24 ` Aneesh V
@ 2011-07-28 14:34 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-28 14:34 UTC (permalink / raw)
To: u-boot
Hi Aneesh,
On 07/28/2011 04:24 PM, Aneesh V wrote:
> On Thursday 28 July 2011 06:14 PM, Simon Schwarz wrote:
> [snip ..]
>
>>>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>>>
>>> and here..
>>>
>>> You start the same the #ifdef again immediately after the #endif. Why
>>> don't you club them together into just one #ifdef block.
>> IMHO #ifdef each function makes it more readable but...
>
> Ok. I don't have any strong views on that.
>
>>
>>>
>>> Actually, since we have garbage collection of un-used functions, I
>>> think doing the calls under #ifdef should be enough, which you have
>>> taken care in board_init_r(). That may help to avoid some #ifdef
>>> clutter.
>> ...I take this way :)
>>
>> I had to define some MMC specific stuff in the board config (copied it
>
> Does your board have MMC support? Then it definitely makes sense to
> keep MMC support enabled.
Yes it has MMC. If NAND works and is stable enough I will go for MMC.
>
>> from OMAP4 - not tested) and added __attribute__((unused)) to
>> mmc_load_image to prevent the warning if the Library is not used.
>
> Did GCC give warning without this change? I think it doesn't due to
> -ffunction-sections?
It does issue warnings:
spl.c:178:13: warning: 'mmc_load_image' defined but not used
>
> best regards,
> Aneesh
Regards
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 3/5] nand spl: add NAND Library to new SPL
2011-07-28 14:04 ` Simon Schwarz
@ 2011-07-28 16:18 ` Aneesh V
2011-07-29 12:17 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Aneesh V @ 2011-07-28 16:18 UTC (permalink / raw)
To: u-boot
On Thursday 28 July 2011 07:34 PM, Simon Schwarz wrote:
> Hi Aneesh,
>
> On 07/28/2011 01:54 PM, Aneesh V wrote:
>> On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
>>> Insert some NAND driver sources into NAND SPL library.
>>>
>>> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
>>
>> [snip ..]
>>
>>> +
>>> +int nand_curr_device = -1;
>>
>> Is nand_curr_device used anywhere?
>
> Was used in nand.c - this isn't included anymore -> deleted
>
>>
>>> +static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
>>> +static nand_info_t info;
>>> +nand_info_t nand_info[CONFIG_SYS_MAX_NAND_DEVICE];
>>
>> Is nand_info used anywhere?
>
> Same as above -> deleted.
>
>>
>>> +static struct nand_chip nand_chip;
>>
>> Is nand_chip used anywhere? I see that this definition is shadowed in
>> function nand_init().
>
> Deleted the double definition.
>
> nand_chip is used in:
> - nand_command
> - nand_is_bad_block
> - nand_read_page
> - nand_init
> - nand_deselect
>
>>
>>> +
>>> +#if (CONFIG_SYS_NAND_PAGE_SIZE<= 512)
>>
>> [snip ..]
>>
>>> +/*
>>> + * omap_spl_read_buf16 - [DEFAULT] read chip data into buffer
>>> + * @mtd: MTD device structure
>>> + * @buf: buffer to store date
>>
>> typo: date instead of data.
>>
>
> see below for solution (btw. this typo comes from nand_base.c)
>
>>> + * @len: number of bytes to read
>>> + *
>>> + * Default read function for 16bit buswith
>>> + *
>>> + * This function is based on nand_read_buf16 from nand_base.c. This
>>> version
>>> + * reads 32bit not 16bit although the bus only has 16bit.
>>> + */
>>> +static void omap_spl_read_buf16(struct mtd_info *mtd, uint8_t *buf,
>>> int len)
>>> +{
>>> + int i;
>>> + struct nand_chip *chip = mtd->priv;
>>> + u32 *p = (u32 *) buf;
>>
>> Why this variable p?
> It is used to cast the 8-bit buffer variable into a 32bit one. Actually
> the same is done for the 16bit implementation. (There it is the adaption
> to the bus width - why 32bit here see below)
>>
>>> + len>>= 2;
>>> +
>>> + for (i = 0; i< len; i++)
>>> + p[i] = readl(chip->IO_ADDR_R);
>>> +}
>>
>> Should this function be called omap_spl_read_buf32() ?
>> Or still better, should this be added as nand_read_buf32() in
>> nand_base.c itself?
>
> Oh. There I played around with the Access Size Adaptation of the GPMC -
> It is still a x16 interface - this is what the 16 refers to IMHO. But
Ok. I have to admit that I am not a NAND expert and I do not understand
this code well.
> for sake of simplicity I will change this back to 16bit access - I don't
> think that there is a big performance impact although I didn't measure it.
No. If it's an OMAP specific optimization, I don't see a reason to
remove it. Looks like that may actually improve performance. However,
you may have to take into account of the alignment of buffer, the size
requested etc. Please have a look at the implementation in drivers/mtd
/nand/davinci_nand.c(although the implementation here seems to be for
8-bit devices, something similar may be possible for 16-bit)
>
> I cloned them because the functions in nand_base.c are static.
>
> My solution: deleted the cloned functions - use these from nand_base by
> removing the static modifier and add them to nand.h
I hope there won't be any name-space conflict due to this.
best regards,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support
2011-07-28 14:16 ` Aneesh V
@ 2011-07-28 18:50 ` Scott Wood
2011-07-28 19:07 ` Wolfgang Denk
2011-07-29 7:34 ` Aneesh V
0 siblings, 2 replies; 134+ messages in thread
From: Scott Wood @ 2011-07-28 18:50 UTC (permalink / raw)
To: u-boot
On Thu, 28 Jul 2011 19:46:25 +0530
Aneesh V <aneesh@ti.com> wrote:
> On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
> > +#ifdef CONFIG_SPL_NAND_SUPPORT
> > +static void nand_load_image(void)
> > +{
> > + gpmc_init();
> > + nand_init();
> > + nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
> > + CONFIG_SYS_NAND_U_BOOT_SIZE,
> > + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
>
> Guess CONFIG_SYS_NAND_U_BOOT_DST is same as CONFIG_SYS_TEXT_BASE. Why
> define a new flag then?
History from when CONFIG_SYS_TEXT_BASE was just TEXT_BASE and there was no
separate CONFIG_SYS_TEXT_BASE_SPL. Also, what if there's a middle step
before the final U-Boot? This is a define that's used across all
platforms.
> > +#ifdef CONFIG_NAND_ENV_DST
> > + nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
> > + (uchar *)CONFIG_NAND_ENV_DST);
> > +#ifdef CONFIG_ENV_OFFSET_REDUND
> > + nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
> > + (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
> > +#endif
> > +#endif
> > + nand_deselect();
> > + parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
>
> I think you are assuming the image type and size here.
This is how all the other NAND SPLs do it. We're building both at the same
time to create a single combination image, so it's not that bad of an
assumption.
An image header might simplify the chained spl/tpl case, though.
-Scott
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 2/5] omap-common: add nand spl support
2011-07-28 7:51 ` Simon Schwarz
@ 2011-07-28 18:56 ` Scott Wood
2011-07-29 8:48 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Scott Wood @ 2011-07-28 18:56 UTC (permalink / raw)
To: u-boot
On Thu, 28 Jul 2011 09:51:01 +0200
Simon Schwarz <simonschwarzcor@googlemail.com> wrote:
> On 07/27/2011 11:38 PM, Scott Wood wrote:
> > Note that there will not be one implementation of nand_copy_image suitable
> > for all hardware, just as currently nand_spl/nand_boot.c is not used for
> > all NAND SPL targets.
>
> Hm. I know that. I just adapated the old nand_boot.c.
While we're moving things around, could we call it
something like "nand_spl_simple.c"?
> AFAIK the other implementations use prefixes for the function names -
> therefore we can just add them to the nand-spl-library and gcc will do
> the rest.
The other implementations do not have prefixes -- they all are entered via
nand_boot(). More importantly, not all implementations are buildable for
all targets. They depend on certain #defines that may not be there. This
includes the "simple" implementation.
-Scott
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support
2011-07-28 18:50 ` Scott Wood
@ 2011-07-28 19:07 ` Wolfgang Denk
2011-07-29 7:34 ` Aneesh V
1 sibling, 0 replies; 134+ messages in thread
From: Wolfgang Denk @ 2011-07-28 19:07 UTC (permalink / raw)
To: u-boot
Dear Scott Wood,
In message <20110728135005.03c97ac0@schlenkerla.am.freescale.net> you wrote:
>
> This is how all the other NAND SPLs do it. We're building both at the same
> time to create a single combination image, so it's not that bad of an
> assumption.
>
> An image header might simplify the chained spl/tpl case, though.
I think we should have a (simple) image header, that at least provides
information about the size - but eventually we might want to know the
load and entry point addresses as well, so we could as well just reuse
struct image_header for this purpose, too.
One use case we should keep in mind here is not to load the regular
U-Boot image, but something completely different - like a Linux
kernel, for example.
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
f u cn rd ths, u cn gt a gd jb n cmptr prgrmmng.
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 3/5] nand spl: add NAND Library to new SPL
2011-07-28 8:38 ` [U-Boot] [PATCH V6 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
2011-07-28 11:54 ` Aneesh V
@ 2011-07-28 19:16 ` Scott Wood
2011-07-29 9:12 ` Simon Schwarz
1 sibling, 1 reply; 134+ messages in thread
From: Scott Wood @ 2011-07-28 19:16 UTC (permalink / raw)
To: u-boot
On Thu, 28 Jul 2011 10:38:09 +0200
Simon Schwarz <simonschwarzcor@googlemail.com> wrote:
> +CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
Not sure what this has to do with NAND.
> +int nand_curr_device = -1;
> +static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
> +static nand_info_t info;
> +nand_info_t nand_info[CONFIG_SYS_MAX_NAND_DEVICE];
> +static struct nand_chip nand_chip;
It doesn't look like nand_info or nand_curr_device are used.
> +/* nand_boot()-function from the old nand_spl ripped apart into
> + * - nand_init()
> + * - nand_spl_load_image()
> + * - nand_deselect()
> + */
References to what the code used to look like should go in the commit
message -- they're not relevant to someone reading this code years from
now.
Splitting this up is going to add bytes -- is it really needed?
> +void nand_init(void)
> +{
> + struct nand_chip nand_chip;
This is shadowing the file-scope nand_chip.
> + /*
> + * Init board specific nand support
> + */
> + nand_chip.select_chip = NULL;
> + info.priv = &nand_chip;
> + nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
> + (void __iomem *)CONFIG_SYS_NAND_BASE;
> + nand_chip.dev_ready = NULL; /* preset to NULL */
> + nand_chip.options = 0;
Once you switch to the BSS nand_cihp, you can get rid of the
zero init.
> +/* Copy image from NAND to RAM
> + * offs: Offset in NAND flash
> + * size: size of image
> + * dst: destination pointer to RAM
> + */
> +void nand_spl_load_image(loff_t offs, unsigned int size, uchar *dst)
> +{
> + nand_load(&info, offs, size, dst);
> +}
Just strip the mtd_info parameter from nand_load -- no need for a wrapper.
-Scott
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support
2011-07-28 18:50 ` Scott Wood
2011-07-28 19:07 ` Wolfgang Denk
@ 2011-07-29 7:34 ` Aneesh V
2011-07-29 8:19 ` Simon Schwarz
1 sibling, 1 reply; 134+ messages in thread
From: Aneesh V @ 2011-07-29 7:34 UTC (permalink / raw)
To: u-boot
Hi Scott, Simon,
On Friday 29 July 2011 12:20 AM, Scott Wood wrote:
> On Thu, 28 Jul 2011 19:46:25 +0530
> Aneesh V<aneesh@ti.com> wrote:
>
>> On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
>>> +#ifdef CONFIG_SPL_NAND_SUPPORT
>>> +static void nand_load_image(void)
>>> +{
>>> + gpmc_init();
>>> + nand_init();
>>> + nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
>>> + CONFIG_SYS_NAND_U_BOOT_SIZE,
>>> + (uchar *)CONFIG_SYS_NAND_U_BOOT_DST);
>>
>> Guess CONFIG_SYS_NAND_U_BOOT_DST is same as CONFIG_SYS_TEXT_BASE. Why
>> define a new flag then?
>
> History from when CONFIG_SYS_TEXT_BASE was just TEXT_BASE and there was no
> separate CONFIG_SYS_TEXT_BASE_SPL. Also, what if there's a middle step
> before the final U-Boot? This is a define that's used across all
> platforms.
>
Perhaps he should not use any hard-coded destination. Please see below.
>>> +#ifdef CONFIG_NAND_ENV_DST
>>> + nand_spl_load_image(CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE,
>>> + (uchar *)CONFIG_NAND_ENV_DST);
>>> +#ifdef CONFIG_ENV_OFFSET_REDUND
>>> + nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE,
>>> + (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE);
>>> +#endif
>>> +#endif
>>> + nand_deselect();
>>> + parse_image_header((struct image_header *)CONFIG_SYS_NAND_U_BOOT_DST);
>>
>> I think you are assuming the image type and size here.
>
> This is how all the other NAND SPLs do it. We're building both at the same
> time to create a single combination image, so it's not that bad of an
> assumption.
For OMAP, we are not building a combination image. OMAP typically
allows booting from a FAT file system in an MMC card in addition to raw
boot from eMMC/NAND. So, we have separate files for SPL/x-loader and
u-boot. The SPL file(MLO) is picked up by ROM code and u-boot is picked
up by x-loader/SPL.
The first version of my MMC SPL too was also making assumptions about
the image. But Wolfgang asked me to make it more generic.
According to this I added the necessary code to parse a mkimage header
and find the image size, load address, image type etc from the image
itself and use these while loading the image and while jumping to it.
This gives us more flexibility about the second image.
1. In raw boot the second image can be changed anytime by flashing a
new image(let's say kernel uImage) at the pre-defined location for the
second image.
2. In FAT mode just change CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME and you can
load a different image with mkimage header.
Only the jumping part needs some customization for different types of
images if parameters are passed.
I would like Simon to do it the same way for NAND. Here he is calling
parse_image_header() but only after loading the entire image. That
helps in the jumping part. But he could make the loading part also
generic.
best regards,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support
2011-07-29 7:34 ` Aneesh V
@ 2011-07-29 8:19 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-29 8:19 UTC (permalink / raw)
To: u-boot
Hi Scott, Aneesh,
to short the discussion: I already work on the implementation of using
the image header.
I think a new version will be released late today.
Regards & thx for your reviews!
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V4 2/5] omap-common: add nand spl support
2011-07-28 18:56 ` Scott Wood
@ 2011-07-29 8:48 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-29 8:48 UTC (permalink / raw)
To: u-boot
Hi Scott,
On 07/28/2011 08:56 PM, Scott Wood wrote:
> On Thu, 28 Jul 2011 09:51:01 +0200
> Simon Schwarz<simonschwarzcor@googlemail.com> wrote:
>
>> On 07/27/2011 11:38 PM, Scott Wood wrote:
>>> Note that there will not be one implementation of nand_copy_image suitable
>>> for all hardware, just as currently nand_spl/nand_boot.c is not used for
>>> all NAND SPL targets.
>>
>> Hm. I know that. I just adapated the old nand_boot.c.
>
> While we're moving things around, could we call it
> something like "nand_spl_simple.c"?
>
Sure, if there are no arguments against -> will do.
>> AFAIK the other implementations use prefixes for the function names -
>> therefore we can just add them to the nand-spl-library and gcc will do
>> the rest.
>
> The other implementations do not have prefixes -- they all are entered via
> nand_boot(). More importantly, not all implementations are buildable for
> all targets. They depend on certain #defines that may not be there. This
> includes the "simple" implementation.
Hm - so adding #ifdefs is inevitable then? Will do if there are no
objections.
> -Scott
>
Regards & thx for review!
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 3/5] nand spl: add NAND Library to new SPL
2011-07-28 19:16 ` Scott Wood
@ 2011-07-29 9:12 ` Simon Schwarz
2011-07-29 9:27 ` Wolfgang Denk
0 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-29 9:12 UTC (permalink / raw)
To: u-boot
On 07/28/2011 09:16 PM, Scott Wood wrote:
> On Thu, 28 Jul 2011 10:38:09 +0200
> Simon Schwarz<simonschwarzcor@googlemail.com> wrote:
>
>> +CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
>
> Not sure what this has to do with NAND.
right. This used by devkit8000 - will change the subject to "spl: add
NAND and POWER library to new SPL"
>> +int nand_curr_device = -1;
>> +static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
>> +static nand_info_t info;
>> +nand_info_t nand_info[CONFIG_SYS_MAX_NAND_DEVICE];
>> +static struct nand_chip nand_chip;
>
> It doesn't look like nand_info or nand_curr_device are used.
Already deleted.
>
>> +/* nand_boot()-function from the old nand_spl ripped apart into
>> + * - nand_init()
>> + * - nand_spl_load_image()
>> + * - nand_deselect()
>> + */
>
> References to what the code used to look like should go in the commit
> message -- they're not relevant to someone reading this code years from
> now.
Changed.
>
> Splitting this up is going to add bytes -- is it really needed?
>
Yes it is. Since nand_boot did everything in the old spl. Now we have to
use the functions from the outside.
The payload also can differ much more - u-boot image + environment.
linux image with FDT image etc. It is also necessary for using
parse_header by Aneesh.
>> +void nand_init(void)
>> +{
>> + struct nand_chip nand_chip;
>
> This is shadowing the file-scope nand_chip.
Already deleted
>
>> + /*
>> + * Init board specific nand support
>> + */
>> + nand_chip.select_chip = NULL;
>> + info.priv =&nand_chip;
>> + nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
>> + (void __iomem *)CONFIG_SYS_NAND_BASE;
>> + nand_chip.dev_ready = NULL; /* preset to NULL */
>> + nand_chip.options = 0;
>
> Once you switch to the BSS nand_cihp, you can get rid of the
> zero init.
do you mean when bss_init is done? If yes I will delete these.
>
>> +/* Copy image from NAND to RAM
>> + * offs: Offset in NAND flash
>> + * size: size of image
>> + * dst: destination pointer to RAM
>> + */
>> +void nand_spl_load_image(loff_t offs, unsigned int size, uchar *dst)
>> +{
>> + nand_load(&info, offs, size, dst);
>> +}
>
> Just strip the mtd_info parameter from nand_load -- no need for a wrapper.
Since this was criticised by many - I will drop the old interface and
get rid of mtd_info everywhere in nand_spl_simple.c
>
> -Scott
>
Regards & thx for review!
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 3/5] nand spl: add NAND Library to new SPL
2011-07-29 9:12 ` Simon Schwarz
@ 2011-07-29 9:27 ` Wolfgang Denk
2011-07-29 12:27 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Wolfgang Denk @ 2011-07-29 9:27 UTC (permalink / raw)
To: u-boot
Dear Simon Schwarz,
In message <4E327989.6070300@gmail.com> you wrote:
> On 07/28/2011 09:16 PM, Scott Wood wrote:
> > On Thu, 28 Jul 2011 10:38:09 +0200
> > Simon Schwarz<simonschwarzcor@googlemail.com> wrote:
> >
> >> +CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
> >
> > Not sure what this has to do with NAND.
>
> right. This used by devkit8000 - will change the subject to "spl: add
> NAND and POWER library to new SPL"
Should we not rather split this into two separate patches?
Best regards,
Wolfgang Denk
--
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: wd at denx.de
Some programming languages manage to absorb change, but withstand
progress. -- Epigrams in Programming, ACM SIGPLAN Sept. 1982
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 3/5] nand spl: add NAND Library to new SPL
2011-07-28 16:18 ` Aneesh V
@ 2011-07-29 12:17 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-29 12:17 UTC (permalink / raw)
To: u-boot
Hi Aneesh,
On 07/28/2011 06:18 PM, Aneesh V wrote:
[snip]
>>
>> Oh. There I played around with the Access Size Adaptation of the GPMC -
>> It is still a x16 interface - this is what the 16 refers to IMHO. But
>
> Ok. I have to admit that I am not a NAND expert and I do not understand
> this code well.
>
>> for sake of simplicity I will change this back to 16bit access - I don't
>> think that there is a big performance impact although I didn't measure
>> it.
>
> No. If it's an OMAP specific optimization, I don't see a reason to
> remove it. Looks like that may actually improve performance. However,
> you may have to take into account of the alignment of buffer, the size
> requested etc. Please have a look at the implementation in drivers/mtd
> /nand/davinci_nand.c(although the implementation here seems to be for
> 8-bit devices, something similar may be possible for 16-bit)
I literally just played around with that ;)
I will add it in the standard version here.
For my BA I will have to evaluate if it has a performance impact anyway
- if it has I will send a patch later.
>
>>
>> I cloned them because the functions in nand_base.c are static.
>>
>> My solution: deleted the cloned functions - use these from nand_base by
>> removing the static modifier and add them to nand.h
>
> I hope there won't be any name-space conflict due to this.
Me too. For devkit8000 there is none - BUILDALL will show.
>
> best regards,
> Aneesh
Regards
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 3/5] nand spl: add NAND Library to new SPL
2011-07-29 9:27 ` Wolfgang Denk
@ 2011-07-29 12:27 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-29 12:27 UTC (permalink / raw)
To: u-boot
Dear Wolfgang Denk,
On 07/29/2011 11:27 AM, Wolfgang Denk wrote:
> Dear Simon Schwarz,
>
> In message<4E327989.6070300@gmail.com> you wrote:
>> On 07/28/2011 09:16 PM, Scott Wood wrote:
>>> On Thu, 28 Jul 2011 10:38:09 +0200
>>> Simon Schwarz<simonschwarzcor@googlemail.com> wrote:
>>>
>>>> +CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
>>>
>>> Not sure what this has to do with NAND.
>>
>> right. This used by devkit8000 - will change the subject to "spl: add
>> NAND and POWER library to new SPL"
>
> Should we not rather split this into two separate patches?
Will do.
>
> Best regards,
>
> Wolfgang Denk
>
Regards
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 1/5] omap3: Configure RAM bank 0 if in SPL
2011-07-28 9:42 ` Simon Schwarz
@ 2011-07-29 16:53 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-29 16:53 UTC (permalink / raw)
To: u-boot
Hi Aneesh,
On 07/28/2011 11:42 AM, Simon Schwarz wrote:
> Hi Aneesh,
>
> On 07/28/2011 10:50 AM, Aneesh V wrote:
>> Hi Simon,
>>
>> First of all sorry for giving my first comments on v6. But I didn't
>> have mail access for the last couple of days.
>>
>> On Thursday 28 July 2011 02:08 PM, Simon Schwarz wrote:
>>> OMAP3 relied on the memory config done by X-loader or Configuration
>>> Header. This
>>> has to be reworked for the implementation of a SPL. This patch
>>> configures RAM
>>> bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by
>>> devkit8000
>>> are added to mem.h
>>>
>>> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
>>> ---
>>> V1 changes:
>>> ADD Settings for Micron RAM
>>>
>>> V2 changes:
>>> DEL spl_debug outputs if mem test fails/passes
>>> CHG CONFIG_PRELOADER to CONFIG_SPL_BUILD
>>>
>>> V3 changes:
>>> nothing
>>>
>>> V4 changes:
>>> nothing
>>>
>>> V5 changes:
>>> nothing
>>>
>>> V6 changes:
>>> nothing
>>>
>>> Transition from V1 to V2 also includes that this patch is now based on
>>> - the new SPL layout by Aneesh V and Daniel Schwierzeck
>>> - the OMAP4 SPL patches by Aneesh V
>>>
>>> This is the successor of "[U-Boot,3/5] devkit8000 nand_spl: Add RAM
>>> configuration independent of x-loader or CH"
>>> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114)
>>> ---
>>> arch/arm/cpu/armv7/omap3/sdrc.c | 30 ++++++++++++++++++++++++++-
>>> arch/arm/include/asm/arch-omap3/mem.h | 36
>>> +++++++++++++++++++++++++++++++++
>>> 2 files changed, 65 insertions(+), 1 deletions(-)
>>>
>>> diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c
>>> b/arch/arm/cpu/armv7/omap3/sdrc.c
>>> index 2a7970b..dac14d0 100644
>>> --- a/arch/arm/cpu/armv7/omap3/sdrc.c
>>> +++ b/arch/arm/cpu/armv7/omap3/sdrc.c
>>> @@ -8,6 +8,9 @@
>>> * Copyright (C) 2004-2010
>>> * Texas Instruments Incorporated - http://www.ti.com/
>>> *
>>> + * Copyright (C) 2011
>>> + * Corscience GmbH& Co. KG - Simon Schwarz<schwarz@corscience.de>
>>> + *
>>> * Author :
>>> * Vaibhav Hiremath<hvaibhav@ti.com>
>>> *
>>> @@ -133,13 +136,38 @@ void do_sdrc_init(u32 cs, u32 early)
>>> sdelay(0x20000);
>>> }
>>>
>>> +#ifdef CONFIG_SPL_BUILD
>>
>> Is this really specific to SPL. mem_init() should ideally be the same
>> for SPL and NOR u-boot, right? Maybe you could remove the #ifdef?
>
>> I think NOR boot is broken on OMAP3(somebody please correct me if I am
>> wrong). I think this may be one thing that helps to make it work again.
>
> I did this to not influence non-SPL code. But you are right since
> mem_init isn't called if it is already in RAM I can remove the #ifdefs
> -> will do in V7.
>
MAKEALL showed that this not a good idea. Since the config of V_MCFG
V_RFR_CTRL are not defined for all RAM-types OMAP3 boards use - build
errors.
I added a comment on this.
>>> + /* If we use a SPL there is no x-loader nor config header so we have
>>> + * to do the job ourselfs
>>> + */
>>> + if (cs == CS0) {
>>> + sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
>>> +
>>> + /* General SDRC config */
>>> + writel(V_MCFG,&sdrc_base->cs[cs].mcfg);
>>> + writel(V_RFR_CTRL,&sdrc_base->cs[cs].rfr_ctrl);
>>> +
>>> + /* AC timings */
>>> + writel(V_ACTIMA_165,&sdrc_actim_base0->ctrla);
>>> + writel(V_ACTIMB_165,&sdrc_actim_base0->ctrlb);
>>> +
>>> + /* Initialize */
>>> + writel(CMD_NOP,&sdrc_base->cs[cs].manual);
>>> + writel(CMD_PRECHARGE,&sdrc_base->cs[cs].manual);
>>> + writel(CMD_AUTOREFRESH,&sdrc_base->cs[cs].manual);
>>> + writel(CMD_AUTOREFRESH,&sdrc_base->cs[cs].manual);
>>> +
>>> + writel(V_MR,&sdrc_base->cs[cs].mr);
>>> + }
>>> +#endif /* CONFIG_SPL_BUILD */
>>
>>
>> best regards,
>> Aneesh
>
> Regards, thanks for review!
> Simon
Regards
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support
2011-07-28 8:38 ` [U-Boot] [PATCH V6 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
` (4 preceding siblings ...)
2011-07-28 8:38 ` [U-Boot] [PATCH V6 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
@ 2011-07-29 16:53 ` Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 1/7] omap-common/omap4: relocate early UART clock setup Simon Schwarz
` (8 more replies)
5 siblings, 9 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-29 16:53 UTC (permalink / raw)
To: u-boot
V1 Initial SPL support for OMAP3 was based on the old SPL
V2 Introduced major changes. It is based on the OMAP4-SPL patch by
Aneesh V and the new SPL Framework by Daniel Schwierzeck and Aneesh V
V3 Some small bug fixes and correct placed SOB.
V4 Corrected one bugfix and some style problems
V5 Exclude some nand objects from SPL, interface change for nand_spl
V6 Added nand_spl.c - git add mistake, some small changes
V7 integrates "[PATCH V0] omap-common: move early UART clock setup to
board.c", rewrite of image loading to use image headers, removed many
#ifdefs, use read functions from nand_base.c, some smaller changes
This is based on the following patches:
- New SPL framework (in u-boot-ti)
- OMAP4 SPL (in u-boot-ti)
Simon Schwarz (7):
omap-common/omap4: relocate early UART clock setup
omap3: Configure RAM bank 0 if in SPL
omap-common: add nand spl support
spl: add NAND Library to new SPL
spl: Add POWER library to new spl
omap3: new SPL structure support
devkit8000: Add nand-spl support for new SPL
arch/arm/cpu/armv7/omap-common/spl.c | 44 +++++-
arch/arm/cpu/armv7/omap3/board.c | 37 ++++-
arch/arm/cpu/armv7/omap3/config.mk | 30 +++
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 +
arch/arm/cpu/armv7/omap3/sdrc.c | 32 ++++-
arch/arm/cpu/armv7/omap4/board.c | 1 +
arch/arm/include/asm/arch-omap3/mem.h | 36 ++++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
arch/arm/include/asm/omap_common.h | 1 +
board/timll/devkit8000/devkit8000.c | 2 +-
doc/README.SPL | 2 +
drivers/mtd/nand/Makefile | 10 +-
drivers/mtd/nand/nand_base.c | 4 +-
drivers/mtd/nand/nand_spl_simple.c | 257 +++++++++++++++++++++++++++
drivers/mtd/nand/omap_gpmc.c | 27 +++
include/configs/devkit8000.h | 51 ++++++
include/nand.h | 7 +
spl/Makefile | 2 +
18 files changed, 539 insertions(+), 10 deletions(-)
create mode 100644 arch/arm/cpu/armv7/omap3/config.mk
create mode 100644 drivers/mtd/nand/nand_spl_simple.c
--
1.7.4.1
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V7 1/7] omap-common/omap4: relocate early UART clock setup
2011-07-29 16:53 ` [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support Simon Schwarz
@ 2011-07-29 16:53 ` Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 2/7] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
` (7 subsequent siblings)
8 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-29 16:53 UTC (permalink / raw)
To: u-boot
Moves the early UART clock setup setup_clocks_for_console() from
preloader_console_init() to s_init() of OMAP4.
This is done to prepare for OMAP3 integration.
This patch was posted seperatly to the mailinglist but I decidet - since it is
a prereqesit for this patch to add it. Former port to ML:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/104395
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
Did not exist before V7.
---
arch/arm/cpu/armv7/omap-common/spl.c | 2 +-
arch/arm/cpu/armv7/omap4/board.c | 1 +
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
index d177652..1d301f4 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -249,6 +249,7 @@ void board_init_r(gd_t *id, ulong dummy)
}
}
+/* This requires UART clocks to be enabled */
void preloader_console_init(void)
{
const char *u_boot_rev = U_BOOT_VERSION;
@@ -259,7 +260,6 @@ void preloader_console_init(void)
gd->flags |= GD_FLG_RELOC;
gd->baudrate = CONFIG_BAUDRATE;
- setup_clocks_for_console();
serial_init(); /* serial communications setup */
/* Avoid a second "U-Boot" coming from this string */
diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c
index 5943d61..a9e90de 100644
--- a/arch/arm/cpu/armv7/omap4/board.c
+++ b/arch/arm/cpu/armv7/omap4/board.c
@@ -196,6 +196,7 @@ void s_init(void)
watchdog_init();
set_mux_conf_regs();
#ifdef CONFIG_SPL_BUILD
+ setup_clocks_for_console();
preloader_console_init();
#endif
prcm_init();
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V7 2/7] omap3: Configure RAM bank 0 if in SPL
2011-07-29 16:53 ` [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 1/7] omap-common/omap4: relocate early UART clock setup Simon Schwarz
@ 2011-07-29 16:53 ` Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 3/7] omap-common: add nand spl support Simon Schwarz
` (6 subsequent siblings)
8 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-29 16:53 UTC (permalink / raw)
To: u-boot
OMAP3 relied on the memory config done by X-loader or Configuration Header. This
has to be reworked for the implementation of a SPL. This patch configures RAM
bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000
are added to mem.h
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD Settings for Micron RAM
V2 changes:
DEL spl_debug outputs if mem test fails/passes
CHG CONFIG_PRELOADER to CONFIG_SPL_BUILD
V3 changes:
nothing
V4 changes:
nothing
V5 changes:
nothing
V6 changes:
nothing
V7 changes:
DEL unnecessary #fidef CONFIG_SPL_BUILD
ADD comment on why we need the ifdef in sdrc.c
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,3/5] devkit8000 nand_spl: Add RAM
configuration independent of x-loader or CH"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114)
---
arch/arm/cpu/armv7/omap3/sdrc.c | 32 ++++++++++++++++++++++++++++-
arch/arm/include/asm/arch-omap3/mem.h | 36 +++++++++++++++++++++++++++++++++
2 files changed, 67 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index 2a7970b..0dd1955 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -8,6 +8,9 @@
* Copyright (C) 2004-2010
* Texas Instruments Incorporated - http://www.ti.com/
*
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
+ *
* Author :
* Vaibhav Hiremath <hvaibhav@ti.com>
*
@@ -133,13 +136,40 @@ void do_sdrc_init(u32 cs, u32 early)
sdelay(0x20000);
}
+/* As long as V_MCFG and V_RFR_CTRL is not defined for all OMAP3 boards we need
+ * to prevent this to be build in non-SPL build */
+#ifdef CONFIG_SPL_BUILD
+ /* If we use a SPL there is no x-loader nor config header so we have
+ * to do the job ourselfs
+ */
+ if (cs == CS0) {
+ sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
+
+ /* General SDRC config */
+ writel(V_MCFG, &sdrc_base->cs[cs].mcfg);
+ writel(V_RFR_CTRL, &sdrc_base->cs[cs].rfr_ctrl);
+
+ /* AC timings */
+ writel(V_ACTIMA_165, &sdrc_actim_base0->ctrla);
+ writel(V_ACTIMB_165, &sdrc_actim_base0->ctrlb);
+
+ /* Initialize */
+ writel(CMD_NOP, &sdrc_base->cs[cs].manual);
+ writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+
+ writel(V_MR, &sdrc_base->cs[cs].mr);
+ }
+#endif
+
/*
* SDRC timings are set up by x-load or config header
* We don't need to redo them here.
* Older x-loads configure only CS0
* configure CS1 to handle this ommission
*/
- if (cs) {
+ if (cs == CS1) {
sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
writel(readl(&sdrc_base->cs[CS0].mcfg),
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
index f165949..8e28f77 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -128,6 +128,33 @@ enum {
(MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) | \
(MICRON_TWTR_165 << 16))
+#define MICRON_RAMTYPE 0x1
+#define MICRON_DDRTYPE 0x0
+#define MICRON_DEEPPD 0x1
+#define MICRON_B32NOT16 0x1
+#define MICRON_BANKALLOCATION 0x2
+#define MICRON_RAMSIZE ((PHYS_SDRAM_1_SIZE/(1024*1024))/2)
+#define MICRON_ADDRMUXLEGACY 0x1
+#define MICRON_CASWIDTH 0x5
+#define MICRON_RASWIDTH 0x2
+#define MICRON_LOCKSTATUS 0x0
+#define MICRON_V_MCFG ((MICRON_LOCKSTATUS << 30) | (MICRON_RASWIDTH << 24) | \
+ (MICRON_CASWIDTH << 20) | (MICRON_ADDRMUXLEGACY << 19) | \
+ (MICRON_RAMSIZE << 8) | (MICRON_BANKALLOCATION << 6) | \
+ (MICRON_B32NOT16 << 4) | (MICRON_DEEPPD << 3) | \
+ (MICRON_DDRTYPE << 2) | (MICRON_RAMTYPE))
+
+#define MICRON_ARCV 2030
+#define MICRON_ARE 0x1
+#define MICRON_V_RFR_CTRL ((MICRON_ARCV << 8) | (MICRON_ARE))
+
+#define MICRON_BL 0x2
+#define MICRON_SIL 0x0
+#define MICRON_CASL 0x3
+#define MICRON_WBST 0x0
+#define MICRON_V_MR ((MICRON_WBST << 9) | (MICRON_CASL << 4) | \
+ (MICRON_SIL << 3) | (MICRON_BL))
+
/*
* NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns
* ACTIMA
@@ -171,10 +198,15 @@ enum {
#define V_ACTIMA_165 INFINEON_V_ACTIMA_165
#define V_ACTIMB_165 INFINEON_V_ACTIMB_165
#endif
+
#ifdef CONFIG_OMAP3_MICRON_DDR
#define V_ACTIMA_165 MICRON_V_ACTIMA_165
#define V_ACTIMB_165 MICRON_V_ACTIMB_165
+#define V_MCFG MICRON_V_MCFG
+#define V_RFR_CTRL MICRON_V_RFR_CTRL
+#define V_MR MICRON_V_MR
#endif
+
#ifdef CONFIG_OMAP3_NUMONYX_DDR
#define V_ACTIMA_165 NUMONYX_V_ACTIMA_165
#define V_ACTIMB_165 NUMONYX_V_ACTIMB_165
@@ -184,6 +216,10 @@ enum {
#error "Please choose the right DDR type in config header"
#endif
+#if defined(CONFIG_SPL_BUILD) && (!defined(V_MCFG) || !defined(V_RFR_CTRL))
+#error "Please choose the right DDR type in config header"
+#endif
+
/*
* GPMC settings -
* Definitions is as per the following format
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V7 3/7] omap-common: add nand spl support
2011-07-29 16:53 ` [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 1/7] omap-common/omap4: relocate early UART clock setup Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 2/7] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
@ 2011-07-29 16:53 ` Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 4/7] spl: add NAND Library to new SPL Simon Schwarz
` (5 subsequent siblings)
8 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-29 16:53 UTC (permalink / raw)
To: u-boot
Add NAND support for the new SPL structure.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
This patch didn't exist before V2!
V2 changes:
ADD Some define-barriers for OMAP3 to only use NAND
ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
header
CHG cosmetic
ADD do_reset() implementation for omap-common spl
ADD nand_copy_image to nand.h
ADD CPP barriers for mmc and nand support. The parts depending on library
support are only compiled if the respective library is included.
V3 changes:
ADD Comment why setup_clocks_for_console() isn't called for OMAP3
CHG cosmetic (deleted empty line)
CHG rename of NAND_MODE_HW to NAND_MODE_HW_ECC
DEL NAND_MODE_SW. Not used.
V4 changes:
CHG cosmetic - style problems
V5 changes:
CHG renamed nand_copy_image to nand_spl_load_image
CHG offs paramter of nand_spl_load_image is of type loff_t now
V6 changes:
ADD call to nand_deselect after loading the images
ADD nand_deselect to nand.h
V7 changes:
DEL some CONFIG_SPL_* relying on garbage collection now
ADD mmc_load_image and nand_load_image now have __attribute__((unused)) to
prevent warnings when the lib is not added to SPL
DEL do_reset() isn't used anymore
CHG header based loading in SPL
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
---
arch/arm/cpu/armv7/omap-common/spl.c | 42 +++++++++++++++++++++++++++++++++-
arch/arm/include/asm/omap_common.h | 1 +
include/nand.h | 3 ++
3 files changed, 45 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
index 1d301f4..3681ec0 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -26,6 +26,7 @@
#include <asm/u-boot.h>
#include <asm/utils.h>
#include <asm/arch/sys_proto.h>
+#include <nand.h>
#include <mmc.h>
#include <fat.h>
#include <timestamp_autogenerated.h>
@@ -173,7 +174,7 @@ end:
hang();
}
}
-
+static void mmc_load_image(void) __attribute__((unused));
static void mmc_load_image(void)
{
struct mmc *mmc;
@@ -207,6 +208,38 @@ static void mmc_load_image(void)
}
}
+static void nand_load_image(void) __attribute__ ((unused));
+static void nand_load_image(void)
+{
+ const struct image_header *header;
+
+ gpmc_init();
+ nand_init();
+
+ /*use CONFIG_SYS_TEXT_BASE as temporary storage area */
+ header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
+
+#ifdef CONFIG_NAND_ENV_DST
+ nand_spl_read_page(CONFIG_ENV_OFFSET, (void *)header);
+ parse_image_header(header);
+ nand_spl_load_image(CONFIG_ENV_OFFSET, image_size,
+ (void *)image_load_addr);
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ nand_spl_read_page(CONFIG_ENV_OFFSET_REDUND, (void *)header);
+ parse_image_header(header);
+ nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, image_size,
+ (void *)image_load_addr);
+#endif
+#endif
+ /* Load u-boot */
+ nand_spl_read_page(CONFIG_SYS_NAND_U_BOOT_OFFS, (void *)header);
+ parse_image_header(header);
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+ image_size, (void *)image_load_addr);
+
+ nand_deselect();
+}
+
void jump_to_image_no_args(void)
{
typedef void (*image_entry_noargs_t)(void)__attribute__ ((noreturn));
@@ -228,10 +261,17 @@ void board_init_r(gd_t *id, ulong dummy)
boot_device = omap_boot_device();
debug("boot device - %d\n", boot_device);
switch (boot_device) {
+#ifdef CONFIG_SPL_MMC_SUPPORT
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
mmc_load_image();
break;
+#endif
+#ifdef CONFIG_SPL_NAND_SUPPORT
+ case BOOT_DEVICE_NAND:
+ nand_load_image();
+ break;
+#endif
default:
printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
hang();
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index d3cb857..13f6884 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -49,6 +49,7 @@ void preloader_console_init(void);
#define MMCSD_MODE_UNDEFINED 0
#define MMCSD_MODE_RAW 1
#define MMCSD_MODE_FAT 2
+#define NAND_MODE_HW_ECC 3
u32 omap_boot_device(void);
u32 omap_boot_mode(void);
diff --git a/include/nand.h b/include/nand.h
index 8d94b5c..3c5ef4e 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -132,6 +132,9 @@ int nand_lock( nand_info_t *meminfo, int tight );
int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
+void nand_spl_load_image(loff_t offs, unsigned int size, uchar *dst);
+void nand_deselect(void);
+
#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
void board_nand_select_device(struct nand_chip *nand, int chip);
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V7 4/7] spl: add NAND Library to new SPL
2011-07-29 16:53 ` [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support Simon Schwarz
` (2 preceding siblings ...)
2011-07-29 16:53 ` [U-Boot] [PATCH V7 3/7] omap-common: add nand spl support Simon Schwarz
@ 2011-07-29 16:53 ` Simon Schwarz
2011-08-01 17:58 ` Scott Wood
2011-07-29 16:53 ` [U-Boot] [PATCH V7 5/7] spl: Add POWER library to new spl Simon Schwarz
` (4 subsequent siblings)
8 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-07-29 16:53 UTC (permalink / raw)
To: u-boot
Adds NAND libarary to SPL.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
CHG Default to HW ecc in SPL build
ADD nand_read_buf16 function, read buffer
ADD omap_dev_ready function, indicte if chip is ready
V2 changes:
DEL GPMC_WAIT0_PIN_ACTIVE define
CHG omap_dev_ready() renamed to omap_spl_dev_ready(), does not use the
GPMC_WAIT0_PIN_ACTIVE-define anymore
CHG ogpmc_read_buf16 renamed omap_spl_read_buf16
ADD omap_spl_read_buf, 8x buf read function
ADD CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to SPL
CHG cosmetic
CHG nand_base and nand_bbt aren't needed for SPL anymore
CHG omap_nand_switch_ecc is not compiled for SPL
ADD entry for CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to README.SPL
V3 changes:
DEL cosmetic (empty line)
V4 changes:
nothing
V5 changes:
CHG nand_ecc.o is only compiled for SPL if CONFIG_OMAP34XX is set
V6 changes:
ADD nand_spl.c - git add, finally
DEL nand_ecc barrier ifdef for OMAP3
V7 changes:
CHG nand_read_buf and nand_read_buf16 - removed static modifier
ADD nand_base.c to SPL
DEL omap_spl_read_buf16 and omap_spl_read_buf from omap_gpmc - now use the
functions of nand_base.de
ADD nand_read_buf and nand_read_buf16 to nand.h
CHG commit message to reflect that also POWER library is added
CHG renamed nand_spl.c to nand_spl_simple.c
CHG removed mtd from all interfaces of the nand_spl_simple
CHG nand_load image is now nand_spl_load_image
CHG removed comment on the transition from nand_boot to nand_spl_simple
CHG all offset parameters are now of type loff_t
CHG moved power library adding to an own patch
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND support
to omap_gpmc driver"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1
---
doc/README.SPL | 1 +
drivers/mtd/nand/Makefile | 10 +-
drivers/mtd/nand/nand_base.c | 4 +-
drivers/mtd/nand/nand_spl_simple.c | 257 ++++++++++++++++++++++++++++++++++++
drivers/mtd/nand/omap_gpmc.c | 27 ++++
include/nand.h | 6 +-
spl/Makefile | 1 +
7 files changed, 301 insertions(+), 5 deletions(-)
create mode 100644 drivers/mtd/nand/nand_spl_simple.c
diff --git a/doc/README.SPL b/doc/README.SPL
index ce8e19f..ef946ce 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -60,3 +60,4 @@ CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
CONFIG_SPL_SPI_SUPPORT (drivers/spi/libspi.o)
CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
+CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 8b598f6..fcd8b74 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -26,12 +26,18 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libnand.o
ifdef CONFIG_CMD_NAND
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_OMAP34XX
+COBJS-y += nand_spl_simple.o
+endif
+else
COBJS-y += nand.o
-COBJS-y += nand_base.o
COBJS-y += nand_bbt.o
-COBJS-y += nand_ecc.o
COBJS-y += nand_ids.o
COBJS-y += nand_util.o
+endif
+COBJS-y += nand_ecc.o
+COBJS-y += nand_base.o
COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 1a95a91..e7dfcb1 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -213,7 +213,7 @@ static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
*
* Default read function for 8bit buswith
*/
-static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
{
int i;
struct nand_chip *chip = mtd->priv;
@@ -269,7 +269,7 @@ static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
*
* Default read function for 16bit buswith
*/
-static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
+void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
{
int i;
struct nand_chip *chip = mtd->priv;
diff --git a/drivers/mtd/nand/nand_spl_simple.c b/drivers/mtd/nand/nand_spl_simple.c
new file mode 100644
index 0000000..e33085e
--- /dev/null
+++ b/drivers/mtd/nand/nand_spl_simple.c
@@ -0,0 +1,257 @@
+/*
+ * (C) Copyright 2006-2008
+ * Stefan Roese, DENX Software Engineering, sr at denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <nand.h>
+#include <asm/io.h>
+
+static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
+static nand_info_t mtd;
+static struct nand_chip nand_chip;
+
+#if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
+/*
+ * NAND command for small page NAND devices (512)
+ */
+static int nand_command(int block, int page, loff_t offs,
+ u8 cmd)
+{
+ struct nand_chip *this = mtd.priv;
+ int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+
+ while (!this->dev_ready(&mtd))
+ ;
+
+ /* Begin command latch cycle */
+ this->cmd_ctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
+ /* Set ALE and clear CLE to start address cycle */
+ /* Column address */
+ this->cmd_ctrl(&mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
+ this->cmd_ctrl(&mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
+ this->cmd_ctrl(&mtd, (page_addr >> 8) & 0xff,
+ NAND_CTRL_ALE); /* A[24:17] */
+#ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
+ /* One more address cycle for devices > 32MiB */
+ this->cmd_ctrl(&mtd, (page_addr >> 16) & 0x0f,
+ NAND_CTRL_ALE); /* A[28:25] */
+#endif
+ /* Latch in address */
+ this->cmd_ctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
+
+ /*
+ * Wait a while for the data to be ready
+ */
+ while (!this->dev_ready(&mtd))
+ ;
+
+ return 0;
+}
+#else
+/*
+ * NAND command for large page NAND devices (2k)
+ */
+static int nand_command(int block, int page, loff_t offs,
+ u8 cmd)
+{
+ struct nand_chip *this = mtd.priv;
+ int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+ void (*hwctrl)(struct mtd_info *mtd, int cmd,
+ unsigned int ctrl) = this->cmd_ctrl;
+
+ while (!this->dev_ready(&mtd))
+ ;
+
+ /* Emulate NAND_CMD_READOOB */
+ if (cmd == NAND_CMD_READOOB) {
+ offs += CONFIG_SYS_NAND_PAGE_SIZE;
+ cmd = NAND_CMD_READ0;
+ }
+
+ /* Shift the offset from byte addressing to word addressing. */
+ if (this->options & NAND_BUSWIDTH_16)
+ offs >>= 1;
+
+ /* Begin command latch cycle */
+ hwctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
+ /* Set ALE and clear CLE to start address cycle */
+ /* Column address */
+ hwctrl(&mtd, offs & 0xff,
+ NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
+ hwctrl(&mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
+ /* Row address */
+ hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
+ hwctrl(&mtd, ((page_addr >> 8) & 0xff),
+ NAND_CTRL_ALE); /* A[27:20] */
+#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
+ /* One more address cycle for devices > 128MiB */
+ hwctrl(&mtd, (page_addr >> 16) & 0x0f,
+ NAND_CTRL_ALE); /* A[31:28] */
+#endif
+ /* Latch in address */
+ hwctrl(&mtd, NAND_CMD_READSTART,
+ NAND_CTRL_CLE | NAND_CTRL_CHANGE);
+ hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
+
+ /*
+ * Wait a while for the data to be ready
+ */
+ while (!this->dev_ready(&mtd))
+ ;
+
+ return 0;
+}
+#endif
+
+static int nand_is_bad_block(int block)
+{
+ struct nand_chip *this = mtd.priv;
+
+ nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS,
+ NAND_CMD_READOOB);
+
+ /*
+ * Read one byte (or two if it's a 16 bit chip).
+ */
+ if (this->options & NAND_BUSWIDTH_16) {
+ if (readw(this->IO_ADDR_R) != 0xffff)
+ return 1;
+ } else {
+ if (readb(this->IO_ADDR_R) != 0xff)
+ return 1;
+ }
+
+ return 0;
+}
+
+static int nand_read_page(int block, int page, void *dst)
+{
+ struct nand_chip *this = mtd.priv;
+ u_char *ecc_calc;
+ u_char *ecc_code;
+ u_char *oob_data;
+ int i;
+ int eccsize = CONFIG_SYS_NAND_ECCSIZE;
+ int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
+ int eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
+ uint8_t *p = dst;
+ int stat;
+
+ nand_command(block, page, 0, NAND_CMD_READ0);
+
+ /* No malloc available for now, just use some temporary locations
+ * in SDRAM
+ */
+ ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
+ ecc_code = ecc_calc + 0x100;
+ oob_data = ecc_calc + 0x200;
+
+ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+ this->ecc.hwctl(&mtd, NAND_ECC_READ);
+ this->read_buf(&mtd, p, eccsize);
+ this->ecc.calculate(&mtd, p, &ecc_calc[i]);
+ }
+ this->read_buf(&mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
+
+ /* Pick the ECC bytes out of the oob data */
+ for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++)
+ ecc_code[i] = oob_data[nand_ecc_pos[i]];
+
+ eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
+ p = dst;
+
+ for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+ /* No chance to do something with the possible error message
+ * from correct_data(). We just hope that all possible errors
+ * are corrected by this routine.
+ */
+ stat = this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]);
+ }
+
+ return 0;
+}
+
+int nand_spl_load_image(loff_t offs, unsigned int size, void *dst)
+{
+ unsigned int block, lastblock;
+ unsigned int page;
+
+ /*
+ * offs has to be aligned to a page address!
+ */
+ block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
+ lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
+ page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
+
+ while (block <= lastblock) {
+ if (!nand_is_bad_block(block)) {
+ /*
+ * Skip bad blocks
+ */
+ while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
+ nand_read_page(block, page, dst);
+ dst += CONFIG_SYS_NAND_PAGE_SIZE;
+ page++;
+ }
+
+ page = 0;
+ } else {
+ lastblock++;
+ }
+
+ block++;
+ }
+
+ return 0;
+}
+
+/* nand_init() - initialize data to make nand usable by SPL */
+void nand_init(void)
+{
+ /*
+ * Init board specific nand support
+ */
+ mtd.priv = &nand_chip;
+ nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
+ (void __iomem *)CONFIG_SYS_NAND_BASE;
+ nand_chip.options = 0;
+ board_nand_init(&nand_chip);
+
+ if (nand_chip.select_chip)
+ nand_chip.select_chip(&mtd, 0);
+}
+
+/* SPL interface to read a page */
+void nand_spl_read_page(loff_t offs, void *dst)
+{
+ int block, page;
+ /* calc the block */
+ block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
+ /* calc the page */
+ page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
+ /* read */
+ nand_read_page(block, page, dst);
+}
+
+/* Unselect after operation */
+void nand_deselect(void)
+{
+ if (nand_chip.select_chip)
+ nand_chip.select_chip(&mtd, -1);
+}
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 99b9cef..5bbec48 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -61,6 +61,14 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
writeb(cmd, this->IO_ADDR_W);
}
+#ifdef CONFIG_SPL_BUILD
+/* Check wait pin as dev ready indicator */
+int omap_spl_dev_ready(struct mtd_info *mtd)
+{
+ return gpmc_cfg->status & (1 << 8);
+}
+#endif
+
/*
* omap_hwecc_init - Initialize the Hardware ECC for NAND flash in
* GPMC controller
@@ -224,6 +232,7 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
}
}
+#ifndef CONFIG_SPL_BUILD
/*
* omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc.
* The default is to come up on s/w ecc
@@ -280,6 +289,7 @@ void omap_nand_switch_ecc(int32_t hardware)
nand->options &= ~NAND_OWN_BUFFERS;
}
+#endif /* CONFIG_SPL_BUILD */
/*
* Board-specific NAND initialization. The following members of the
@@ -338,7 +348,24 @@ int board_nand_init(struct nand_chip *nand)
nand->chip_delay = 100;
/* Default ECC mode */
+#ifndef CONFIG_SPL_BUILD
nand->ecc.mode = NAND_ECC_SOFT;
+#else
+ nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.layout = &hw_nand_oob;
+ nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
+ nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
+ nand->ecc.hwctl = omap_enable_hwecc;
+ nand->ecc.correct = omap_correct_data;
+ nand->ecc.calculate = omap_calculate_ecc;
+ omap_hwecc_init(nand);
+
+ if (nand->options & NAND_BUSWIDTH_16)
+ nand->read_buf = nand_read_buf16;
+ else
+ nand->read_buf = nand_read_buf;
+ nand->dev_ready = omap_spl_dev_ready;
+#endif
return 0;
}
diff --git a/include/nand.h b/include/nand.h
index 3c5ef4e..54905bb 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -132,9 +132,13 @@ int nand_lock( nand_info_t *meminfo, int tight );
int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
-void nand_spl_load_image(loff_t offs, unsigned int size, uchar *dst);
+int nand_spl_load_image(loff_t offs, unsigned int size, void *dst);
+void nand_spl_read_page(loff_t offs, void *dst);
void nand_deselect(void);
+void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len);
+void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len);
+
#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
void board_nand_select_device(struct nand_chip *nand, int chip);
#endif
diff --git a/spl/Makefile b/spl/Makefile
index 87f13f6..17d4f7f 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -46,6 +46,7 @@ LIBS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/libspi_flash.o
LIBS-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/libspi.o
LIBS-$(CONFIG_SPL_FAT_SUPPORT) += fs/fat/libfat.o
LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o
+LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/libnand.o
ifeq ($(SOC),omap3)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V7 5/7] spl: Add POWER library to new spl
2011-07-29 16:53 ` [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support Simon Schwarz
` (3 preceding siblings ...)
2011-07-29 16:53 ` [U-Boot] [PATCH V7 4/7] spl: add NAND Library to new SPL Simon Schwarz
@ 2011-07-29 16:53 ` Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 6/7] omap3: new SPL structure support Simon Schwarz
` (3 subsequent siblings)
8 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-29 16:53 UTC (permalink / raw)
To: u-boot
Adds power library to the new spl
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
Didn't exist before V7
---
doc/README.SPL | 1 +
spl/Makefile | 1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/doc/README.SPL b/doc/README.SPL
index ef946ce..2987f43 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -60,4 +60,5 @@ CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
CONFIG_SPL_SPI_SUPPORT (drivers/spi/libspi.o)
CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
+CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
diff --git a/spl/Makefile b/spl/Makefile
index 17d4f7f..0c0d3c4 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -46,6 +46,7 @@ LIBS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/libspi_flash.o
LIBS-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/libspi.o
LIBS-$(CONFIG_SPL_FAT_SUPPORT) += fs/fat/libfat.o
LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o
+LIBS-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/libpower.o
LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/libnand.o
ifeq ($(SOC),omap3)
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V7 6/7] omap3: new SPL structure support
2011-07-29 16:53 ` [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support Simon Schwarz
` (4 preceding siblings ...)
2011-07-29 16:53 ` [U-Boot] [PATCH V7 5/7] spl: Add POWER library to new spl Simon Schwarz
@ 2011-07-29 16:53 ` Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 7/7] devkit8000: Add nand-spl support for new SPL Simon Schwarz
` (2 subsequent siblings)
8 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-29 16:53 UTC (permalink / raw)
To: u-boot
Support for the new spl structure. Using the interface defined by Aneesh V for
OMAP4
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD support for early console output in SPL
V2 changes:
ADD include omap_common.h in board.c
ADD implement new omap common interface omap_boot_device, omap_boot_mode and
omap_rev_string (very basic)
CHG cosmetic
CHG Don't add ecc switch command in SPL
ADD save_boot_params stump with warning to implement it
V3 changes:
none
V4 changes:
CHG cosmetic - corrected style problem
V5 changes:
nothing
V6 changes:
nothing
V7 changes:
ADD copied config.mk from OMAP4 to OMAP3
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is in some parts a anccesstor of "[U-Boot,2/5] devkit8000 nand_spl: omap3
support nand_spl boot"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114) in V1
---
arch/arm/cpu/armv7/omap3/board.c | 37 +++++++++++++++++++++++++-
arch/arm/cpu/armv7/omap3/config.mk | 30 +++++++++++++++++++++
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 +++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
4 files changed, 71 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/cpu/armv7/omap3/config.mk
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 4aaf97b..ee3285f 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -39,6 +39,7 @@
#include <asm/cache.h>
#include <asm/armv7.h>
#include <asm/omap_gpio.h>
+#include <asm/omap_common.h>
/* Declarations */
extern omap3_sysinfo sysinfo;
@@ -56,6 +57,28 @@ static const struct gpio_bank gpio_bank_34xx[6] = {
const struct gpio_bank *const omap_gpio_bank = gpio_bank_34xx;
+#ifdef CONFIG_SPL_BUILD
+/*
+* We use static variables because global data is not ready yet.
+* Initialized data is available in SPL right from the beginning.
+* We would not typically need to save these parameters in regular
+* U-Boot. This is needed only in SPL at the moment.
+*/
+u32 omap3_boot_device = BOOT_DEVICE_NAND;
+u32 omap3_boot_mode = NAND_MODE_HW_ECC;
+
+u32 omap_boot_device(void)
+{
+ return omap3_boot_device;
+}
+
+u32 omap_boot_mode(void)
+{
+ return omap3_boot_mode;
+}
+#endif /* CONFIG_SPL_BUILD */
+
+
/******************************************************************************
* Routine: delay
* Description: spinning delay to use before udelay works
@@ -197,6 +220,10 @@ void s_init(void)
per_clocks_enable();
+#ifdef CONFIG_SPL_BUILD
+ preloader_console_init();
+#endif
+
if (!in_sdram)
mem_init();
}
@@ -245,7 +272,7 @@ void abort(void)
{
}
-#ifdef CONFIG_NAND_OMAP_GPMC
+#if defined(CONFIG_NAND_OMAP_GPMC) & !defined(CONFIG_SPL_BUILD)
/******************************************************************************
* OMAP3 specific command to switch between NAND HW and SW ecc
*****************************************************************************/
@@ -273,7 +300,7 @@ U_BOOT_CMD(
"[hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc algorithm"
);
-#endif /* CONFIG_NAND_OMAP_GPMC */
+#endif /* CONFIG_NAND_OMAP_GPMC & !CONFIG_SPL_BUILD */
#ifdef CONFIG_DISPLAY_BOARDINFO
/**
@@ -402,3 +429,9 @@ void v7_outer_cache_disable(void)
omap3_update_aux_cr(0, 0x2);
}
#endif
+
+void omap_rev_string(char *omap_rev_string)
+{
+ sprintf(omap_rev_string, "OMAP3, sorry revision detection" \
+ " unimplemented");
+}
diff --git a/arch/arm/cpu/armv7/omap3/config.mk b/arch/arm/cpu/armv7/omap3/config.mk
new file mode 100644
index 0000000..b34fa64
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap3/config.mk
@@ -0,0 +1,30 @@
+#
+# Copyright 2011 Linaro Limited
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# (C) Copyright 2010
+# Texas Instruments, <www.ti.com>
+#
+# Aneesh V <aneesh@ti.com>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+ifdef CONFIG_SPL_BUILD
+ALL-y += $(OBJTREE)/MLO
+else
+ALL-y += $(obj)u-boot.img
+endif
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index 67e8ceb..48a7ec6 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -35,6 +35,11 @@
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
+.global save_boot_params
+save_boot_params:
+ #warning "Please implement save_boot_params for OMAP3"
+ bx lr
+
.global omap3_gp_romcode_call
omap3_gp_romcode_call:
PUSH {r4-r12, lr} @ Save all registers from ROM code!
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h
index 995e7cb..7b60051 100644
--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
@@ -71,4 +71,5 @@ void power_init_r(void);
void dieid_num_r(void);
void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
void omap3_gp_romcode_call(u32 service_id, u32 parameter);
+void omap_rev_string(char *omap_rev_string);
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V7 7/7] devkit8000: Add nand-spl support for new SPL
2011-07-29 16:53 ` [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support Simon Schwarz
` (5 preceding siblings ...)
2011-07-29 16:53 ` [U-Boot] [PATCH V7 6/7] omap3: new SPL structure support Simon Schwarz
@ 2011-07-29 16:53 ` Simon Schwarz
2011-08-01 16:23 ` [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 0/9] " Simon Schwarz
8 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-07-29 16:53 UTC (permalink / raw)
To: u-boot
Add NAND SPL support to the devkit8000 config
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD devkit8000_nand to board.cfg
ADD nand_spl Makefile, llinker script, spl-devkit8000.c
ADD config ecc, SRAM, SPL to board config
ADD CONFIG_SYS_SRAM_START and _SIZE to board config
ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config
V2 changes:
ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER, NAND and
CONFIG_SPL_LDSCRIPT to board config
CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_*
ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config: Where to
expect u-boot and where to load it.
ADD some barrier to not build board_eth_init in SPL
DEL no changes to board.cfg
DEL everything used the old nand_spl layout (Makefile, linker script,
spl-devkit8000.c)
CHG cosmetic
V3 changes:
CHG Deleted wrong comment
V4 changes:
CHG CONFIG_SYS_SRAM_SIZE NOW has the right value
CHG cosmetic - corrected style problems
V5 changes:
nothing
V6 changes:
nothing
V7 changes:
ADD MMC dummy defines to prevent #ifedf clutter in spl.c
DEL CONFIG_SYS_NAND_U_BOOT_DST
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl
support"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)
---
board/timll/devkit8000/devkit8000.c | 2 +-
include/configs/devkit8000.h | 51 +++++++++++++++++++++++++++++++++++
2 files changed, 52 insertions(+), 1 deletions(-)
diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
index 95afaaa..9b53742 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -119,7 +119,7 @@ void set_muxconf_regs(void)
MUX_DEVKIT8000();
}
-#ifdef CONFIG_DRIVER_DM9000
+#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
/*
* Routine: board_eth_init
* Description: Setting up the Ethernet hardware.
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 125c690..da59400 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -307,4 +307,55 @@
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
+/* SRAM config */
+#define CONFIG_SYS_SRAM_START 0x40200000
+#define CONFIG_SYS_SRAM_SIZE 0x10000
+
+/* Defines for SPL */
+#define CONFIG_SPL
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
+#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */
+#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
+
+#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
+#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+ 10, 11, 12, 13}
+
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 3
+
+#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
+ CONFIG_SYS_NAND_ECCSIZE)
+#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
+ CONFIG_SYS_NAND_ECCSTEPS)
+
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
+
+/* MMC boot config */
+/* !!!! THESE ARE NOT TESTED DUMMYS !!!! */
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
+
#endif /* __CONFIG_H */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support
2011-07-29 16:53 ` [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support Simon Schwarz
` (6 preceding siblings ...)
2011-07-29 16:53 ` [U-Boot] [PATCH V7 7/7] devkit8000: Add nand-spl support for new SPL Simon Schwarz
@ 2011-08-01 16:23 ` Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 0/9] " Simon Schwarz
8 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-01 16:23 UTC (permalink / raw)
To: u-boot
Hi list,
Since I'am on vacation from the day after tomorrow for the rest of the
week: Any comment on the new version?
Is there a forecast on the chances of mainlining it for the upcoming
release?
Regards
Simon
On 07/29/2011 06:53 PM, Simon Schwarz wrote:
> V1 Initial SPL support for OMAP3 was based on the old SPL
> V2 Introduced major changes. It is based on the OMAP4-SPL patch by
> Aneesh V and the new SPL Framework by Daniel Schwierzeck and Aneesh V
> V3 Some small bug fixes and correct placed SOB.
> V4 Corrected one bugfix and some style problems
> V5 Exclude some nand objects from SPL, interface change for nand_spl
> V6 Added nand_spl.c - git add mistake, some small changes
> V7 integrates "[PATCH V0] omap-common: move early UART clock setup to
> board.c", rewrite of image loading to use image headers, removed many
> #ifdefs, use read functions from nand_base.c, some smaller changes
>
> This is based on the following patches:
> - New SPL framework (in u-boot-ti)
> - OMAP4 SPL (in u-boot-ti)
>
> Simon Schwarz (7):
> omap-common/omap4: relocate early UART clock setup
> omap3: Configure RAM bank 0 if in SPL
> omap-common: add nand spl support
> spl: add NAND Library to new SPL
> spl: Add POWER library to new spl
> omap3: new SPL structure support
> devkit8000: Add nand-spl support for new SPL
>
> arch/arm/cpu/armv7/omap-common/spl.c | 44 +++++-
> arch/arm/cpu/armv7/omap3/board.c | 37 ++++-
> arch/arm/cpu/armv7/omap3/config.mk | 30 +++
> arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 +
> arch/arm/cpu/armv7/omap3/sdrc.c | 32 ++++-
> arch/arm/cpu/armv7/omap4/board.c | 1 +
> arch/arm/include/asm/arch-omap3/mem.h | 36 ++++
> arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
> arch/arm/include/asm/omap_common.h | 1 +
> board/timll/devkit8000/devkit8000.c | 2 +-
> doc/README.SPL | 2 +
> drivers/mtd/nand/Makefile | 10 +-
> drivers/mtd/nand/nand_base.c | 4 +-
> drivers/mtd/nand/nand_spl_simple.c | 257 +++++++++++++++++++++++++++
> drivers/mtd/nand/omap_gpmc.c | 27 +++
> include/configs/devkit8000.h | 51 ++++++
> include/nand.h | 7 +
> spl/Makefile | 2 +
> 18 files changed, 539 insertions(+), 10 deletions(-)
> create mode 100644 arch/arm/cpu/armv7/omap3/config.mk
> create mode 100644 drivers/mtd/nand/nand_spl_simple.c
>
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V7 4/7] spl: add NAND Library to new SPL
2011-07-29 16:53 ` [U-Boot] [PATCH V7 4/7] spl: add NAND Library to new SPL Simon Schwarz
@ 2011-08-01 17:58 ` Scott Wood
2011-08-02 8:15 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Scott Wood @ 2011-08-01 17:58 UTC (permalink / raw)
To: u-boot
On Fri, 29 Jul 2011 18:53:38 +0200
Simon Schwarz <simonschwarzcor@googlemail.com> wrote:
> diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
> index 8b598f6..fcd8b74 100644
> --- a/drivers/mtd/nand/Makefile
> +++ b/drivers/mtd/nand/Makefile
> @@ -26,12 +26,18 @@ include $(TOPDIR)/config.mk
> LIB := $(obj)libnand.o
>
> ifdef CONFIG_CMD_NAND
> +ifdef CONFIG_SPL_BUILD
> +ifdef CONFIG_OMAP34XX
> +COBJS-y += nand_spl_simple.o
> +endif
> +else
Please define a symbol for nand_spl_simple, and have the platform config
file select it.
> +int nand_spl_load_image(loff_t offs, unsigned int size, void *dst)
> +{
> + unsigned int block, lastblock;
> + unsigned int page;
> +
> + /*
> + * offs has to be aligned to a page address!
> + */
> + block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
> + lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
> + page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
Hmm, maybe it's better to leave offs as 32-bit, if we're going to be
dividing. The existing SPL has it as "unsigned int", and it's unlikely
that the SPL will be loading from offsets above 4GiB. Sorry about the back
and forth...
> +/* SPL interface to read a page */
> +void nand_spl_read_page(loff_t offs, void *dst)
> +{
> + int block, page;
> + /* calc the block */
> + block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
> + /* calc the page */
> + page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
> + /* read */
> + nand_read_page(block, page, dst);
> +}
How does this differ from nand_spl_load_image() with size ==
CONFIG_SYS_NAND_PAGE_SIZE, other than the lack of bad block skipping?
-Scott
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V7 4/7] spl: add NAND Library to new SPL
2011-08-01 17:58 ` Scott Wood
@ 2011-08-02 8:15 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-02 8:15 UTC (permalink / raw)
To: u-boot
On 08/01/2011 07:58 PM, Scott Wood wrote:
> On Fri, 29 Jul 2011 18:53:38 +0200
> Simon Schwarz<simonschwarzcor@googlemail.com> wrote:
>
>> diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
>> index 8b598f6..fcd8b74 100644
>> --- a/drivers/mtd/nand/Makefile
>> +++ b/drivers/mtd/nand/Makefile
>> @@ -26,12 +26,18 @@ include $(TOPDIR)/config.mk
>> LIB := $(obj)libnand.o
>>
>> ifdef CONFIG_CMD_NAND
>> +ifdef CONFIG_SPL_BUILD
>> +ifdef CONFIG_OMAP34XX
>> +COBJS-y += nand_spl_simple.o
>> +endif
>> +else
>
> Please define a symbol for nand_spl_simple, and have the platform config
> file select it.
done.
>
>> +int nand_spl_load_image(loff_t offs, unsigned int size, void *dst)
>> +{
>> + unsigned int block, lastblock;
>> + unsigned int page;
>> +
>> + /*
>> + * offs has to be aligned to a page address!
>> + */
>> + block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
>> + lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
>> + page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
>
> Hmm, maybe it's better to leave offs as 32-bit, if we're going to be
> dividing. The existing SPL has it as "unsigned int", and it's unlikely
> that the SPL will be loading from offsets above 4GiB. Sorry about the back
> and forth...
hm ok.
>
>> +/* SPL interface to read a page */
>> +void nand_spl_read_page(loff_t offs, void *dst)
>> +{
>> + int block, page;
>> + /* calc the block */
>> + block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
>> + /* calc the page */
>> + page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
>> + /* read */
>> + nand_read_page(block, page, dst);
>> +}
>
> How does this differ from nand_spl_load_image() with size ==
> CONFIG_SYS_NAND_PAGE_SIZE, other than the lack of bad block skipping?
Damn bad block skipping. right. Will change.
> -Scott
>
Regards & thanks for review!
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support
2011-07-28 9:42 ` Aneesh V
2011-07-28 12:44 ` Simon Schwarz
@ 2011-08-02 12:03 ` Simon Schwarz
2011-08-02 12:18 ` Aneesh V
1 sibling, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-08-02 12:03 UTC (permalink / raw)
To: u-boot
Hi Aneesh,
<snip>
>> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
>> b/arch/arm/cpu/armv7/omap-common/spl.c
>> index d177652..7ec5c7c 100644
>> --- a/arch/arm/cpu/armv7/omap-common/spl.c
>> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
>> @@ -26,6 +26,7 @@
>> #include<asm/u-boot.h>
>> #include<asm/utils.h>
>> #include<asm/arch/sys_proto.h>
>> +#include<nand.h>
>> #include<mmc.h>
>> #include<fat.h>
>> #include<timestamp_autogenerated.h>
>> @@ -107,6 +108,7 @@ static void parse_image_header(const struct
>> image_header *header)
>> }
>> }
>>
>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>> static void mmc_load_image_raw(struct mmc *mmc)
>> {
>> u32 image_size_sectors, err;
>> @@ -140,7 +142,9 @@ end:
>> hang();
>> }
>> }
>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>
> here..
>
>>
>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>> static void mmc_load_image_fat(struct mmc *mmc)
>> {
>> s32 err;
>> @@ -173,7 +177,9 @@ end:
>> hang();
>> }
>> }
>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>
> and here..
>
> You start the same the #ifdef again immediately after the #endif. Why
> don't you club them together into just one #ifdef block.
>
> Actually, since we have garbage collection of un-used functions, I
> think doing the calls under #ifdef should be enough, which you have
> taken care in board_init_r(). That may help to avoid some #ifdef
> clutter.
I have to dig out this mail again. I found that removing the ifdefs
breaks OMAP4 since it lacks some NAND specific defines.
So I wonder - is it ok to define them to some garbage-value in the file
and emit an #error if the corresponding LIB is set in SPL?
This would state in the file that these defines are used and it would
avoid the need of defining them.
This would look like:
#ifndef CONFIG_SPL_NAND_BLA
#ifdef CONFIG_SPL_NAND_SUPPORT
#error CONFIG_SPL_NAND_BLA is not set although \
CONFIG_SPL_NAND_SUPPORT is active
#else
#define CONFIG_SPL_NAND_BLA 0x0
#endif
#endif
Maybe this can be simplified by some macro...
I find it really annoying to set values for code I don't want to use...
Regards
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support
2011-08-02 12:03 ` Simon Schwarz
@ 2011-08-02 12:18 ` Aneesh V
2011-08-02 12:30 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Aneesh V @ 2011-08-02 12:18 UTC (permalink / raw)
To: u-boot
Hi Simon,
On Tuesday 02 August 2011 05:33 PM, Simon Schwarz wrote:
> Hi Aneesh,
>
> <snip>
>>> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
>>> b/arch/arm/cpu/armv7/omap-common/spl.c
>>> index d177652..7ec5c7c 100644
>>> --- a/arch/arm/cpu/armv7/omap-common/spl.c
>>> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
>>> @@ -26,6 +26,7 @@
>>> #include<asm/u-boot.h>
>>> #include<asm/utils.h>
>>> #include<asm/arch/sys_proto.h>
>>> +#include<nand.h>
>>> #include<mmc.h>
>>> #include<fat.h>
>>> #include<timestamp_autogenerated.h>
>>> @@ -107,6 +108,7 @@ static void parse_image_header(const struct
>>> image_header *header)
>>> }
>>> }
>>>
>>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>>> static void mmc_load_image_raw(struct mmc *mmc)
>>> {
>>> u32 image_size_sectors, err;
>>> @@ -140,7 +142,9 @@ end:
>>> hang();
>>> }
>>> }
>>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>>
>> here..
>>
>>>
>>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>>> static void mmc_load_image_fat(struct mmc *mmc)
>>> {
>>> s32 err;
>>> @@ -173,7 +177,9 @@ end:
>>> hang();
>>> }
>>> }
>>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>>
>> and here..
>>
>> You start the same the #ifdef again immediately after the #endif. Why
>> don't you club them together into just one #ifdef block.
>>
>> Actually, since we have garbage collection of un-used functions, I
>> think doing the calls under #ifdef should be enough, which you have
>> taken care in board_init_r(). That may help to avoid some #ifdef
>> clutter.
>
> I have to dig out this mail again. I found that removing the ifdefs
> breaks OMAP4 since it lacks some NAND specific defines.
>
> So I wonder - is it ok to define them to some garbage-value in the file
> and emit an #error if the corresponding LIB is set in SPL?
>
> This would state in the file that these defines are used and it would
> avoid the need of defining them.
>
> This would look like:
> #ifndef CONFIG_SPL_NAND_BLA
> #ifdef CONFIG_SPL_NAND_SUPPORT
> #error CONFIG_SPL_NAND_BLA is not set although \
> CONFIG_SPL_NAND_SUPPORT is active
> #else
> #define CONFIG_SPL_NAND_BLA 0x0
> #endif
> #endif
>
> Maybe this can be simplified by some macro...
>
> I find it really annoying to set values for code I don't want to use...
Maybe, what we could do is to split the file into two:
spl_mmc.c
spl_nand.c
or three:
spl.c
spl_mmc.c
spl_nand.c
and then in the Makefile conditionally include them based on
CONFIG_SPL_NAND_SUPPORT, CONFIG_SPL_MMC_SUPPORT etc. I think this may
solve your difficulties.
best regards,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support
2011-08-02 12:18 ` Aneesh V
@ 2011-08-02 12:30 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-02 12:30 UTC (permalink / raw)
To: u-boot
Hi Aneesh,
On 08/02/2011 02:18 PM, Aneesh V wrote:
> Hi Simon,
>
> On Tuesday 02 August 2011 05:33 PM, Simon Schwarz wrote:
>> Hi Aneesh,
>>
>> <snip>
>>>> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
>>>> b/arch/arm/cpu/armv7/omap-common/spl.c
>>>> index d177652..7ec5c7c 100644
>>>> --- a/arch/arm/cpu/armv7/omap-common/spl.c
>>>> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
>>>> @@ -26,6 +26,7 @@
>>>> #include<asm/u-boot.h>
>>>> #include<asm/utils.h>
>>>> #include<asm/arch/sys_proto.h>
>>>> +#include<nand.h>
>>>> #include<mmc.h>
>>>> #include<fat.h>
>>>> #include<timestamp_autogenerated.h>
>>>> @@ -107,6 +108,7 @@ static void parse_image_header(const struct
>>>> image_header *header)
>>>> }
>>>> }
>>>>
>>>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>>>> static void mmc_load_image_raw(struct mmc *mmc)
>>>> {
>>>> u32 image_size_sectors, err;
>>>> @@ -140,7 +142,9 @@ end:
>>>> hang();
>>>> }
>>>> }
>>>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>>>
>>> here..
>>>
>>>>
>>>> +#ifdef CONFIG_SPL_MMC_SUPPORT
>>>> static void mmc_load_image_fat(struct mmc *mmc)
>>>> {
>>>> s32 err;
>>>> @@ -173,7 +177,9 @@ end:
>>>> hang();
>>>> }
>>>> }
>>>> +#endif /* CONFIG_SPL_MMC_SUPPORT */
>>>
>>> and here..
>>>
>>> You start the same the #ifdef again immediately after the #endif. Why
>>> don't you club them together into just one #ifdef block.
>>>
>>> Actually, since we have garbage collection of un-used functions, I
>>> think doing the calls under #ifdef should be enough, which you have
>>> taken care in board_init_r(). That may help to avoid some #ifdef
>>> clutter.
>>
>> I have to dig out this mail again. I found that removing the ifdefs
>> breaks OMAP4 since it lacks some NAND specific defines.
>>
>> So I wonder - is it ok to define them to some garbage-value in the file
>> and emit an #error if the corresponding LIB is set in SPL?
>>
>> This would state in the file that these defines are used and it would
>> avoid the need of defining them.
>>
>> This would look like:
>> #ifndef CONFIG_SPL_NAND_BLA
>> #ifdef CONFIG_SPL_NAND_SUPPORT
>> #error CONFIG_SPL_NAND_BLA is not set although \
>> CONFIG_SPL_NAND_SUPPORT is active
>> #else
>> #define CONFIG_SPL_NAND_BLA 0x0
>> #endif
>> #endif
>>
>> Maybe this can be simplified by some macro...
>>
>> I find it really annoying to set values for code I don't want to use...
>
> Maybe, what we could do is to split the file into two:
> spl_mmc.c
> spl_nand.c
>
> or three:
> spl.c
> spl_mmc.c
> spl_nand.c
>
> and then in the Makefile conditionally include them based on
> CONFIG_SPL_NAND_SUPPORT, CONFIG_SPL_MMC_SUPPORT etc. I think this may
> solve your difficulties.
Seems to be the simplest solution -> will do.
> best regards,
> Aneesh
Regards
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 0/9] OMAP3 and devkit8000 SPL support
2011-07-29 16:53 ` [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support Simon Schwarz
` (7 preceding siblings ...)
2011-08-01 16:23 ` [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support Simon Schwarz
@ 2011-08-02 15:59 ` Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 1/9] omap-common/omap4: relocate early UART clock setup Simon Schwarz
` (9 more replies)
8 siblings, 10 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-02 15:59 UTC (permalink / raw)
To: u-boot
V1 Initial SPL support for OMAP3 was based on the old SPL
V2 Introduced major changes. It is based on the OMAP4-SPL patch by
Aneesh V and the new SPL Framework by Daniel Schwierzeck and Aneesh V
V3 Some small bug fixes and correct placed SOB.
V4 Corrected one bugfix and some style problems
V5 Exclude some nand objects from SPL, interface change for nand_spl
V6 Added nand_spl.c - git add mistake, some small changes
V7 integrates "[PATCH V0] omap-common: move early UART clock setup to
board.c", rewrite of image loading to use image headers, removed many
#ifdefs, use read functions from nand_base.c, some smaller changes
V8 added boot parameter saving (was not implemented before V8!), added define
CONFIG_SPL_NAND_SIMPLE, reorganization of omap-common SPL
This is based on the following patches:
- New SPL framework (in u-boot-ti)
- OMAP4 SPL (in u-boot-ti)
Simon Schwarz (9):
omap-common/omap4: relocate early UART clock setup
omap3: Configure RAM bank 0 if in SPL
omap-common: add nand spl support
spl: add NAND Library to new SPL
spl: Add POWER library to new spl
omap3: new SPL structure support
devkit8000: Add nand-spl support for new SPL
omap3: implement boot parameter saving
omap-common: reorganize spl.c
arch/arm/cpu/armv7/omap-common/Makefile | 6 +
arch/arm/cpu/armv7/omap-common/spl.c | 165 +++++----------------------
arch/arm/cpu/armv7/omap-common/spl_mmc.c | 155 +++++++++++++++++++++++++
arch/arm/cpu/armv7/omap-common/spl_nand.c | 63 ++++++++++
arch/arm/cpu/armv7/omap3/board.c | 32 +++++-
arch/arm/cpu/armv7/omap3/config.mk | 30 +++++
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 10 ++
arch/arm/cpu/armv7/omap3/sdrc.c | 32 +++++-
arch/arm/cpu/armv7/omap4/board.c | 1 +
arch/arm/include/asm/arch-omap3/mem.h | 36 ++++++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
arch/arm/include/asm/omap_common.h | 31 +++++
board/timll/devkit8000/devkit8000.c | 2 +-
doc/README.SPL | 2 +
drivers/mtd/nand/Makefile | 10 ++-
drivers/mtd/nand/nand_base.c | 4 +-
drivers/mtd/nand/omap_gpmc.c | 27 +++++
include/configs/devkit8000.h | 53 +++++++++
include/nand.h | 6 +
spl/Makefile | 2 +
20 files changed, 523 insertions(+), 145 deletions(-)
create mode 100644 arch/arm/cpu/armv7/omap-common/spl_mmc.c
create mode 100644 arch/arm/cpu/armv7/omap-common/spl_nand.c
create mode 100644 arch/arm/cpu/armv7/omap3/config.mk
--
1.7.4.1
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 1/9] omap-common/omap4: relocate early UART clock setup
2011-08-02 15:59 ` [U-Boot] [PATCH V8 0/9] " Simon Schwarz
@ 2011-08-02 15:59 ` Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 2/9] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
` (8 subsequent siblings)
9 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-02 15:59 UTC (permalink / raw)
To: u-boot
Moves the early UART clock setup setup_clocks_for_console() from
preloader_console_init() to s_init() of OMAP4.
This is done to prepare for OMAP3 integration.
This patch was posted seperatly to the mailinglist but I decidet - since it is
a prereqesit for this patch to add it. Former port to ML:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/104395
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
Did not exist before V7.
V8 changes:
nothing
---
arch/arm/cpu/armv7/omap-common/spl.c | 2 +-
arch/arm/cpu/armv7/omap4/board.c | 1 +
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
index d177652..1d301f4 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -249,6 +249,7 @@ void board_init_r(gd_t *id, ulong dummy)
}
}
+/* This requires UART clocks to be enabled */
void preloader_console_init(void)
{
const char *u_boot_rev = U_BOOT_VERSION;
@@ -259,7 +260,6 @@ void preloader_console_init(void)
gd->flags |= GD_FLG_RELOC;
gd->baudrate = CONFIG_BAUDRATE;
- setup_clocks_for_console();
serial_init(); /* serial communications setup */
/* Avoid a second "U-Boot" coming from this string */
diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c
index 5943d61..a9e90de 100644
--- a/arch/arm/cpu/armv7/omap4/board.c
+++ b/arch/arm/cpu/armv7/omap4/board.c
@@ -196,6 +196,7 @@ void s_init(void)
watchdog_init();
set_mux_conf_regs();
#ifdef CONFIG_SPL_BUILD
+ setup_clocks_for_console();
preloader_console_init();
#endif
prcm_init();
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 2/9] omap3: Configure RAM bank 0 if in SPL
2011-08-02 15:59 ` [U-Boot] [PATCH V8 0/9] " Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 1/9] omap-common/omap4: relocate early UART clock setup Simon Schwarz
@ 2011-08-02 15:59 ` Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 3/9] omap-common: add nand spl support Simon Schwarz
` (7 subsequent siblings)
9 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-02 15:59 UTC (permalink / raw)
To: u-boot
OMAP3 relied on the memory config done by X-loader or Configuration Header. This
has to be reworked for the implementation of a SPL. This patch configures RAM
bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000
are added to mem.h
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD Settings for Micron RAM
V2 changes:
DEL spl_debug outputs if mem test fails/passes
CHG CONFIG_PRELOADER to CONFIG_SPL_BUILD
V3 changes:
nothing
V4 changes:
nothing
V5 changes:
nothing
V6 changes:
nothing
V7 changes:
DEL unnecessary #fidef CONFIG_SPL_BUILD
ADD comment on why we need the ifdef in sdrc.c
V8 changes:
nothing
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,3/5] devkit8000 nand_spl: Add RAM
configuration independent of x-loader or CH"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114)
---
arch/arm/cpu/armv7/omap3/sdrc.c | 32 ++++++++++++++++++++++++++++-
arch/arm/include/asm/arch-omap3/mem.h | 36 +++++++++++++++++++++++++++++++++
2 files changed, 67 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index 2a7970b..0dd1955 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -8,6 +8,9 @@
* Copyright (C) 2004-2010
* Texas Instruments Incorporated - http://www.ti.com/
*
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
+ *
* Author :
* Vaibhav Hiremath <hvaibhav@ti.com>
*
@@ -133,13 +136,40 @@ void do_sdrc_init(u32 cs, u32 early)
sdelay(0x20000);
}
+/* As long as V_MCFG and V_RFR_CTRL is not defined for all OMAP3 boards we need
+ * to prevent this to be build in non-SPL build */
+#ifdef CONFIG_SPL_BUILD
+ /* If we use a SPL there is no x-loader nor config header so we have
+ * to do the job ourselfs
+ */
+ if (cs == CS0) {
+ sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
+
+ /* General SDRC config */
+ writel(V_MCFG, &sdrc_base->cs[cs].mcfg);
+ writel(V_RFR_CTRL, &sdrc_base->cs[cs].rfr_ctrl);
+
+ /* AC timings */
+ writel(V_ACTIMA_165, &sdrc_actim_base0->ctrla);
+ writel(V_ACTIMB_165, &sdrc_actim_base0->ctrlb);
+
+ /* Initialize */
+ writel(CMD_NOP, &sdrc_base->cs[cs].manual);
+ writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+
+ writel(V_MR, &sdrc_base->cs[cs].mr);
+ }
+#endif
+
/*
* SDRC timings are set up by x-load or config header
* We don't need to redo them here.
* Older x-loads configure only CS0
* configure CS1 to handle this ommission
*/
- if (cs) {
+ if (cs == CS1) {
sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
writel(readl(&sdrc_base->cs[CS0].mcfg),
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
index f165949..8e28f77 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -128,6 +128,33 @@ enum {
(MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) | \
(MICRON_TWTR_165 << 16))
+#define MICRON_RAMTYPE 0x1
+#define MICRON_DDRTYPE 0x0
+#define MICRON_DEEPPD 0x1
+#define MICRON_B32NOT16 0x1
+#define MICRON_BANKALLOCATION 0x2
+#define MICRON_RAMSIZE ((PHYS_SDRAM_1_SIZE/(1024*1024))/2)
+#define MICRON_ADDRMUXLEGACY 0x1
+#define MICRON_CASWIDTH 0x5
+#define MICRON_RASWIDTH 0x2
+#define MICRON_LOCKSTATUS 0x0
+#define MICRON_V_MCFG ((MICRON_LOCKSTATUS << 30) | (MICRON_RASWIDTH << 24) | \
+ (MICRON_CASWIDTH << 20) | (MICRON_ADDRMUXLEGACY << 19) | \
+ (MICRON_RAMSIZE << 8) | (MICRON_BANKALLOCATION << 6) | \
+ (MICRON_B32NOT16 << 4) | (MICRON_DEEPPD << 3) | \
+ (MICRON_DDRTYPE << 2) | (MICRON_RAMTYPE))
+
+#define MICRON_ARCV 2030
+#define MICRON_ARE 0x1
+#define MICRON_V_RFR_CTRL ((MICRON_ARCV << 8) | (MICRON_ARE))
+
+#define MICRON_BL 0x2
+#define MICRON_SIL 0x0
+#define MICRON_CASL 0x3
+#define MICRON_WBST 0x0
+#define MICRON_V_MR ((MICRON_WBST << 9) | (MICRON_CASL << 4) | \
+ (MICRON_SIL << 3) | (MICRON_BL))
+
/*
* NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns
* ACTIMA
@@ -171,10 +198,15 @@ enum {
#define V_ACTIMA_165 INFINEON_V_ACTIMA_165
#define V_ACTIMB_165 INFINEON_V_ACTIMB_165
#endif
+
#ifdef CONFIG_OMAP3_MICRON_DDR
#define V_ACTIMA_165 MICRON_V_ACTIMA_165
#define V_ACTIMB_165 MICRON_V_ACTIMB_165
+#define V_MCFG MICRON_V_MCFG
+#define V_RFR_CTRL MICRON_V_RFR_CTRL
+#define V_MR MICRON_V_MR
#endif
+
#ifdef CONFIG_OMAP3_NUMONYX_DDR
#define V_ACTIMA_165 NUMONYX_V_ACTIMA_165
#define V_ACTIMB_165 NUMONYX_V_ACTIMB_165
@@ -184,6 +216,10 @@ enum {
#error "Please choose the right DDR type in config header"
#endif
+#if defined(CONFIG_SPL_BUILD) && (!defined(V_MCFG) || !defined(V_RFR_CTRL))
+#error "Please choose the right DDR type in config header"
+#endif
+
/*
* GPMC settings -
* Definitions is as per the following format
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 3/9] omap-common: add nand spl support
2011-08-02 15:59 ` [U-Boot] [PATCH V8 0/9] " Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 1/9] omap-common/omap4: relocate early UART clock setup Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 2/9] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
@ 2011-08-02 15:59 ` Simon Schwarz
2011-08-05 7:30 ` Aneesh V
2011-08-02 15:59 ` [U-Boot] [PATCH V8 4/9] spl: add NAND Library to new SPL Simon Schwarz
` (6 subsequent siblings)
9 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-08-02 15:59 UTC (permalink / raw)
To: u-boot
Add NAND support for the new SPL structure.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
This patch didn't exist before V2!
V2 changes:
ADD Some define-barriers for OMAP3 to only use NAND
ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
header
CHG cosmetic
ADD do_reset() implementation for omap-common spl
ADD nand_copy_image to nand.h
ADD CPP barriers for mmc and nand support. The parts depending on library
support are only compiled if the respective library is included.
V3 changes:
ADD Comment why setup_clocks_for_console() isn't called for OMAP3
CHG cosmetic (deleted empty line)
CHG rename of NAND_MODE_HW to NAND_MODE_HW_ECC
DEL NAND_MODE_SW. Not used.
V4 changes:
CHG cosmetic - style problems
V5 changes:
CHG renamed nand_copy_image to nand_spl_load_image
CHG offs paramter of nand_spl_load_image is of type loff_t now
V6 changes:
ADD call to nand_deselect after loading the images
ADD nand_deselect to nand.h
V7 changes:
DEL some CONFIG_SPL_* relying on garbage collection now
ADD mmc_load_image and nand_load_image now have __attribute__((unused)) to
prevent warnings when the lib is not added to SPL
DEL do_reset() isn't used anymore
CHG header based loading in SPL
V8 changes:
DEL nand_spl_read_page is replaced by nand_spl_load_image with size=page size
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
---
arch/arm/cpu/armv7/omap-common/spl.c | 46 +++++++++++++++++++++++++++++++++-
arch/arm/include/asm/omap_common.h | 1 +
include/nand.h | 3 ++
3 files changed, 49 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
index 1d301f4..53d10bf 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -26,6 +26,7 @@
#include <asm/u-boot.h>
#include <asm/utils.h>
#include <asm/arch/sys_proto.h>
+#include <nand.h>
#include <mmc.h>
#include <fat.h>
#include <timestamp_autogenerated.h>
@@ -173,7 +174,7 @@ end:
hang();
}
}
-
+static void mmc_load_image(void) __attribute__((unused));
static void mmc_load_image(void)
{
struct mmc *mmc;
@@ -207,12 +208,48 @@ static void mmc_load_image(void)
}
}
+#ifdef CONFIG_SPL_NAND_SUPPORT
+static void nand_load_image(void) __attribute__ ((unused));
+static void nand_load_image(void)
+{
+ struct image_header *header;
+
+ gpmc_init();
+ nand_init();
+
+ /*use CONFIG_SYS_TEXT_BASE as temporary storage area */
+ header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
+
+#ifdef CONFIG_NAND_ENV_DST
+ nand_spl_load_image(CONFIG_ENV_OFFSET,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ parse_image_header(header);
+ nand_spl_load_image(CONFIG_ENV_OFFSET, image_size,
+ (void *)image_load_addr);
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ parse_image_header(header);
+ nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, image_size,
+ (void *)image_load_addr);
+#endif
+#endif
+ /* Load u-boot */
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ parse_image_header(header);
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+ image_size, (void *)image_load_addr);
+ nand_deselect();
+}
+#endif /* CONFIG_SPL_NAND_SUPPORT */
void jump_to_image_no_args(void)
{
typedef void (*image_entry_noargs_t)(void)__attribute__ ((noreturn));
image_entry_noargs_t image_entry =
(image_entry_noargs_t) image_entry_point;
+ debug("image entry point: 0x%X\n", image_entry_point);
image_entry();
}
@@ -228,10 +265,17 @@ void board_init_r(gd_t *id, ulong dummy)
boot_device = omap_boot_device();
debug("boot device - %d\n", boot_device);
switch (boot_device) {
+#ifdef CONFIG_SPL_MMC_SUPPORT
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
mmc_load_image();
break;
+#endif
+#ifdef CONFIG_SPL_NAND_SUPPORT
+ case BOOT_DEVICE_NAND:
+ nand_load_image();
+ break;
+#endif
default:
printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
hang();
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index d3cb857..13f6884 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -49,6 +49,7 @@ void preloader_console_init(void);
#define MMCSD_MODE_UNDEFINED 0
#define MMCSD_MODE_RAW 1
#define MMCSD_MODE_FAT 2
+#define NAND_MODE_HW_ECC 3
u32 omap_boot_device(void);
u32 omap_boot_mode(void);
diff --git a/include/nand.h b/include/nand.h
index 8d94b5c..3c5ef4e 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -132,6 +132,9 @@ int nand_lock( nand_info_t *meminfo, int tight );
int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
+void nand_spl_load_image(loff_t offs, unsigned int size, uchar *dst);
+void nand_deselect(void);
+
#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
void board_nand_select_device(struct nand_chip *nand, int chip);
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 4/9] spl: add NAND Library to new SPL
2011-08-02 15:59 ` [U-Boot] [PATCH V8 0/9] " Simon Schwarz
` (2 preceding siblings ...)
2011-08-02 15:59 ` [U-Boot] [PATCH V8 3/9] omap-common: add nand spl support Simon Schwarz
@ 2011-08-02 15:59 ` Simon Schwarz
2011-08-02 16:12 ` Scott Wood
2011-08-02 15:59 ` [U-Boot] [PATCH V8 5/9] spl: Add POWER library to new spl Simon Schwarz
` (5 subsequent siblings)
9 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-08-02 15:59 UTC (permalink / raw)
To: u-boot
Adds NAND libarary to SPL.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
CHG Default to HW ecc in SPL build
ADD nand_read_buf16 function, read buffer
ADD omap_dev_ready function, indicte if chip is ready
V2 changes:
DEL GPMC_WAIT0_PIN_ACTIVE define
CHG omap_dev_ready() renamed to omap_spl_dev_ready(), does not use the
GPMC_WAIT0_PIN_ACTIVE-define anymore
CHG ogpmc_read_buf16 renamed omap_spl_read_buf16
ADD omap_spl_read_buf, 8x buf read function
ADD CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to SPL
CHG cosmetic
CHG nand_base and nand_bbt aren't needed for SPL anymore
CHG omap_nand_switch_ecc is not compiled for SPL
ADD entry for CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to README.SPL
V3 changes:
DEL cosmetic (empty line)
V4 changes:
nothing
V5 changes:
CHG nand_ecc.o is only compiled for SPL if CONFIG_OMAP34XX is set
V6 changes:
ADD nand_spl.c - git add, finally
DEL nand_ecc barrier ifdef for OMAP3
V7 changes:
CHG nand_read_buf and nand_read_buf16 - removed static modifier
ADD nand_base.c to SPL
DEL omap_spl_read_buf16 and omap_spl_read_buf from omap_gpmc - now use the
functions of nand_base.de
ADD nand_read_buf and nand_read_buf16 to nand.h
CHG commit message to reflect that also POWER library is added
CHG renamed nand_spl.c to nand_spl_simple.c
CHG removed mtd from all interfaces of the nand_spl_simple
CHG nand_load image is now nand_spl_load_image
CHG removed comment on the transition from nand_boot to nand_spl_simple
CHG all offset parameters are now of type loff_t
CHG moved power library adding to an own patch
V8 changes:
CHG: Added CONFIG_SPL_NAND_SIMPLE
DEL nand_spl_read_page is replaced by nand_spl_load_image with size=page size
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND support
to omap_gpmc driver"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1
---
doc/README.SPL | 1 +
drivers/mtd/nand/Makefile | 10 ++++++++--
drivers/mtd/nand/nand_base.c | 4 ++--
drivers/mtd/nand/omap_gpmc.c | 27 +++++++++++++++++++++++++++
include/nand.h | 5 ++++-
spl/Makefile | 1 +
6 files changed, 43 insertions(+), 5 deletions(-)
diff --git a/doc/README.SPL b/doc/README.SPL
index ce8e19f..ef946ce 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -60,3 +60,4 @@ CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
CONFIG_SPL_SPI_SUPPORT (drivers/spi/libspi.o)
CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
+CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 8b598f6..b6a7886 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -26,12 +26,18 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libnand.o
ifdef CONFIG_CMD_NAND
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_NAND_SIMPLE
+COBJS-y += nand_spl_simple.o
+endif
+else
COBJS-y += nand.o
-COBJS-y += nand_base.o
COBJS-y += nand_bbt.o
-COBJS-y += nand_ecc.o
COBJS-y += nand_ids.o
COBJS-y += nand_util.o
+endif
+COBJS-y += nand_ecc.o
+COBJS-y += nand_base.o
COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 1a95a91..e7dfcb1 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -213,7 +213,7 @@ static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
*
* Default read function for 8bit buswith
*/
-static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
{
int i;
struct nand_chip *chip = mtd->priv;
@@ -269,7 +269,7 @@ static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
*
* Default read function for 16bit buswith
*/
-static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
+void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
{
int i;
struct nand_chip *chip = mtd->priv;
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 99b9cef..5bbec48 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -61,6 +61,14 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
writeb(cmd, this->IO_ADDR_W);
}
+#ifdef CONFIG_SPL_BUILD
+/* Check wait pin as dev ready indicator */
+int omap_spl_dev_ready(struct mtd_info *mtd)
+{
+ return gpmc_cfg->status & (1 << 8);
+}
+#endif
+
/*
* omap_hwecc_init - Initialize the Hardware ECC for NAND flash in
* GPMC controller
@@ -224,6 +232,7 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
}
}
+#ifndef CONFIG_SPL_BUILD
/*
* omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc.
* The default is to come up on s/w ecc
@@ -280,6 +289,7 @@ void omap_nand_switch_ecc(int32_t hardware)
nand->options &= ~NAND_OWN_BUFFERS;
}
+#endif /* CONFIG_SPL_BUILD */
/*
* Board-specific NAND initialization. The following members of the
@@ -338,7 +348,24 @@ int board_nand_init(struct nand_chip *nand)
nand->chip_delay = 100;
/* Default ECC mode */
+#ifndef CONFIG_SPL_BUILD
nand->ecc.mode = NAND_ECC_SOFT;
+#else
+ nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.layout = &hw_nand_oob;
+ nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
+ nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
+ nand->ecc.hwctl = omap_enable_hwecc;
+ nand->ecc.correct = omap_correct_data;
+ nand->ecc.calculate = omap_calculate_ecc;
+ omap_hwecc_init(nand);
+
+ if (nand->options & NAND_BUSWIDTH_16)
+ nand->read_buf = nand_read_buf16;
+ else
+ nand->read_buf = nand_read_buf;
+ nand->dev_ready = omap_spl_dev_ready;
+#endif
return 0;
}
diff --git a/include/nand.h b/include/nand.h
index 3c5ef4e..b4140794 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -132,9 +132,12 @@ int nand_lock( nand_info_t *meminfo, int tight );
int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
-void nand_spl_load_image(loff_t offs, unsigned int size, uchar *dst);
+int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst);
void nand_deselect(void);
+void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len);
+void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len);
+
#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
void board_nand_select_device(struct nand_chip *nand, int chip);
#endif
diff --git a/spl/Makefile b/spl/Makefile
index 87f13f6..17d4f7f 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -46,6 +46,7 @@ LIBS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/libspi_flash.o
LIBS-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/libspi.o
LIBS-$(CONFIG_SPL_FAT_SUPPORT) += fs/fat/libfat.o
LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o
+LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/libnand.o
ifeq ($(SOC),omap3)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 5/9] spl: Add POWER library to new spl
2011-08-02 15:59 ` [U-Boot] [PATCH V8 0/9] " Simon Schwarz
` (3 preceding siblings ...)
2011-08-02 15:59 ` [U-Boot] [PATCH V8 4/9] spl: add NAND Library to new SPL Simon Schwarz
@ 2011-08-02 15:59 ` Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 6/9] omap3: new SPL structure support Simon Schwarz
` (4 subsequent siblings)
9 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-02 15:59 UTC (permalink / raw)
To: u-boot
Adds power library to the new spl
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
Didn't exist before V7
V8 changes:
nothing
---
doc/README.SPL | 1 +
spl/Makefile | 1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/doc/README.SPL b/doc/README.SPL
index ef946ce..2987f43 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -60,4 +60,5 @@ CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
CONFIG_SPL_SPI_SUPPORT (drivers/spi/libspi.o)
CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
+CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
diff --git a/spl/Makefile b/spl/Makefile
index 17d4f7f..0c0d3c4 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -46,6 +46,7 @@ LIBS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/libspi_flash.o
LIBS-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/libspi.o
LIBS-$(CONFIG_SPL_FAT_SUPPORT) += fs/fat/libfat.o
LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o
+LIBS-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/libpower.o
LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/libnand.o
ifeq ($(SOC),omap3)
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 6/9] omap3: new SPL structure support
2011-08-02 15:59 ` [U-Boot] [PATCH V8 0/9] " Simon Schwarz
` (4 preceding siblings ...)
2011-08-02 15:59 ` [U-Boot] [PATCH V8 5/9] spl: Add POWER library to new spl Simon Schwarz
@ 2011-08-02 15:59 ` Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 7/9] devkit8000: Add nand-spl support for new SPL Simon Schwarz
` (3 subsequent siblings)
9 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-02 15:59 UTC (permalink / raw)
To: u-boot
Support for the new spl structure. Using the interface defined by Aneesh V for
OMAP4
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD support for early console output in SPL
V2 changes:
ADD include omap_common.h in board.c
ADD implement new omap common interface omap_boot_device, omap_boot_mode and
omap_rev_string (very basic)
CHG cosmetic
CHG Don't add ecc switch command in SPL
ADD save_boot_params stump with warning to implement it
V3 changes:
none
V4 changes:
CHG cosmetic - corrected style problem
V5 changes:
nothing
V6 changes:
nothing
V7 changes:
ADD copied config.mk from OMAP4 to OMAP3
V8 changes:
CHG boot_mode can't be detected on OMAP3 so the function is not needed
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is in some parts a anccesstor of "[U-Boot,2/5] devkit8000 nand_spl: omap3
support nand_spl boot"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114) in V1
---
arch/arm/cpu/armv7/omap3/board.c | 32 +++++++++++++++++++++++++-
arch/arm/cpu/armv7/omap3/config.mk | 30 +++++++++++++++++++++++++
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 ++++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
4 files changed, 66 insertions(+), 2 deletions(-)
create mode 100644 arch/arm/cpu/armv7/omap3/config.mk
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 4aaf97b..ad4db9b 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -39,6 +39,7 @@
#include <asm/cache.h>
#include <asm/armv7.h>
#include <asm/omap_gpio.h>
+#include <asm/omap_common.h>
/* Declarations */
extern omap3_sysinfo sysinfo;
@@ -56,6 +57,23 @@ static const struct gpio_bank gpio_bank_34xx[6] = {
const struct gpio_bank *const omap_gpio_bank = gpio_bank_34xx;
+#ifdef CONFIG_SPL_BUILD
+/*
+* We use static variables because global data is not ready yet.
+* Initialized data is available in SPL right from the beginning.
+* We would not typically need to save these parameters in regular
+* U-Boot. This is needed only in SPL at the moment.
+*/
+u32 omap3_boot_device = BOOT_DEVICE_NAND;
+
+u32 omap_boot_device(void)
+{
+ return omap3_boot_device;
+}
+
+#endif /* CONFIG_SPL_BUILD */
+
+
/******************************************************************************
* Routine: delay
* Description: spinning delay to use before udelay works
@@ -197,6 +215,10 @@ void s_init(void)
per_clocks_enable();
+#ifdef CONFIG_SPL_BUILD
+ preloader_console_init();
+#endif
+
if (!in_sdram)
mem_init();
}
@@ -245,7 +267,7 @@ void abort(void)
{
}
-#ifdef CONFIG_NAND_OMAP_GPMC
+#if defined(CONFIG_NAND_OMAP_GPMC) & !defined(CONFIG_SPL_BUILD)
/******************************************************************************
* OMAP3 specific command to switch between NAND HW and SW ecc
*****************************************************************************/
@@ -273,7 +295,7 @@ U_BOOT_CMD(
"[hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc algorithm"
);
-#endif /* CONFIG_NAND_OMAP_GPMC */
+#endif /* CONFIG_NAND_OMAP_GPMC & !CONFIG_SPL_BUILD */
#ifdef CONFIG_DISPLAY_BOARDINFO
/**
@@ -402,3 +424,9 @@ void v7_outer_cache_disable(void)
omap3_update_aux_cr(0, 0x2);
}
#endif
+
+void omap_rev_string(char *omap_rev_string)
+{
+ sprintf(omap_rev_string, "OMAP3, sorry revision detection" \
+ " unimplemented");
+}
diff --git a/arch/arm/cpu/armv7/omap3/config.mk b/arch/arm/cpu/armv7/omap3/config.mk
new file mode 100644
index 0000000..b34fa64
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap3/config.mk
@@ -0,0 +1,30 @@
+#
+# Copyright 2011 Linaro Limited
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# (C) Copyright 2010
+# Texas Instruments, <www.ti.com>
+#
+# Aneesh V <aneesh@ti.com>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+ifdef CONFIG_SPL_BUILD
+ALL-y += $(OBJTREE)/MLO
+else
+ALL-y += $(obj)u-boot.img
+endif
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index 67e8ceb..48a7ec6 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -35,6 +35,11 @@
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
+.global save_boot_params
+save_boot_params:
+ #warning "Please implement save_boot_params for OMAP3"
+ bx lr
+
.global omap3_gp_romcode_call
omap3_gp_romcode_call:
PUSH {r4-r12, lr} @ Save all registers from ROM code!
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h
index 995e7cb..7b60051 100644
--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
@@ -71,4 +71,5 @@ void power_init_r(void);
void dieid_num_r(void);
void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
void omap3_gp_romcode_call(u32 service_id, u32 parameter);
+void omap_rev_string(char *omap_rev_string);
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 7/9] devkit8000: Add nand-spl support for new SPL
2011-08-02 15:59 ` [U-Boot] [PATCH V8 0/9] " Simon Schwarz
` (5 preceding siblings ...)
2011-08-02 15:59 ` [U-Boot] [PATCH V8 6/9] omap3: new SPL structure support Simon Schwarz
@ 2011-08-02 15:59 ` Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 8/9] omap3: implement boot parameter saving Simon Schwarz
` (2 subsequent siblings)
9 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-02 15:59 UTC (permalink / raw)
To: u-boot
Add NAND SPL support to the devkit8000 config
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD devkit8000_nand to board.cfg
ADD nand_spl Makefile, llinker script, spl-devkit8000.c
ADD config ecc, SRAM, SPL to board config
ADD CONFIG_SYS_SRAM_START and _SIZE to board config
ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config
V2 changes:
ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER, NAND and
CONFIG_SPL_LDSCRIPT to board config
CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_*
ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config: Where to
expect u-boot and where to load it.
ADD some barrier to not build board_eth_init in SPL
DEL no changes to board.cfg
DEL everything used the old nand_spl layout (Makefile, linker script,
spl-devkit8000.c)
CHG cosmetic
V3 changes:
CHG Deleted wrong comment
V4 changes:
CHG CONFIG_SYS_SRAM_SIZE NOW has the right value
CHG cosmetic - corrected style problems
V5 changes:
nothing
V6 changes:
nothing
V7 changes:
ADD MMC dummy defines to prevent #ifedf clutter in spl.c
DEL CONFIG_SYS_NAND_U_BOOT_DST
V8 changes:
ADD CONFIG_SPL_NAND_SIMPLE
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl
support"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)
---
board/timll/devkit8000/devkit8000.c | 2 +-
include/configs/devkit8000.h | 53 +++++++++++++++++++++++++++++++++++
2 files changed, 54 insertions(+), 1 deletions(-)
diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
index 95afaaa..9b53742 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -119,7 +119,7 @@ void set_muxconf_regs(void)
MUX_DEVKIT8000();
}
-#ifdef CONFIG_DRIVER_DM9000
+#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
/*
* Routine: board_eth_init
* Description: Setting up the Ethernet hardware.
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 125c690..bd164c7 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -307,4 +307,57 @@
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
+/* SRAM config */
+#define CONFIG_SYS_SRAM_START 0x40200000
+#define CONFIG_SYS_SRAM_SIZE 0x10000
+
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_NAND_SIMPLE
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
+#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */
+#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
+
+#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
+#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+ 10, 11, 12, 13}
+
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 3
+
+#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
+ CONFIG_SYS_NAND_ECCSIZE)
+#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
+ CONFIG_SYS_NAND_ECCSTEPS)
+
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
+
+/* MMC boot config */
+/* !!!! THESE ARE NOT TESTED DUMMYS !!!! */
+#define CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION 1
+#define CONFIG_SYS_MMC_SD_BOOTMODE MMCSD_MODE_FAT
+#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
+#define CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME "u-boot.img"
+
#endif /* __CONFIG_H */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 8/9] omap3: implement boot parameter saving
2011-08-02 15:59 ` [U-Boot] [PATCH V8 0/9] " Simon Schwarz
` (6 preceding siblings ...)
2011-08-02 15:59 ` [U-Boot] [PATCH V8 7/9] devkit8000: Add nand-spl support for new SPL Simon Schwarz
@ 2011-08-02 15:59 ` Simon Schwarz
2011-08-05 7:41 ` Aneesh V
2011-08-02 15:59 ` [U-Boot] [PATCH V8 9/9] omap-common: reorganize spl.c Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 0/9] OMAP3 and devkit8000 SPL support Simon Schwarz
9 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-08-02 15:59 UTC (permalink / raw)
To: u-boot
Implements the saving of boot params passed by OMAP3 ROM code.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
Didn't exist before V8
---
arch/arm/cpu/armv7/omap-common/spl.c | 6 +++++-
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 9 +++++++--
arch/arm/include/asm/omap_common.h | 10 ++++++++++
3 files changed, 22 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
index 53d10bf..3dd8e0d 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -194,8 +194,12 @@ static void mmc_load_image(void)
printf("spl: mmc init failed: err - %d\n", err);
hang();
}
-
+/* For OMAP3 there is no automatic boot mode detection */
+#ifdef CONFIG_OMAP34XX
+ boot_mode = CONFIG_SYS_MMC_SD_BOOTMODE;
+#else
boot_mode = omap_boot_mode();
+#endif
if (boot_mode == MMCSD_MODE_RAW) {
debug("boot mode - RAW\n");
mmc_load_image_raw(mmc);
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index 48a7ec6..a308ebd 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -37,8 +37,13 @@ _TEXT_BASE:
.global save_boot_params
save_boot_params:
- #warning "Please implement save_boot_params for OMAP3"
- bx lr
+#ifdef CONFIG_SPL_BUILD
+ ldr r4, =omap3_boot_device
+ ldr r5, [r0, #0x4]
+ and r5, r5, #0xff
+ str r5, [r4]
+#endif
+ bx lr
.global omap3_gp_romcode_call
omap3_gp_romcode_call:
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 13f6884..6469047 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -37,6 +37,7 @@
void preloader_console_init(void);
/* Boot device */
+#ifdef CONFIG_OMAP44XX /* OMAP4 */
#define BOOT_DEVICE_NONE 0
#define BOOT_DEVICE_XIP 1
#define BOOT_DEVICE_XIPWAIT 2
@@ -44,6 +45,15 @@ void preloader_console_init(void);
#define BOOT_DEVICE_ONE_NAND 4
#define BOOT_DEVICE_MMC1 5
#define BOOT_DEVICE_MMC2 6
+#elif CONFIG_OMAP34XX /* OMAP3 */
+#define BOOT_DEVICE_NONE 0
+#define BOOT_DEVICE_XIP 1
+#define BOOT_DEVICE_NAND 2
+#define BOOT_DEVICE_ONE_NAND 3
+#define BOOT_DEVICE_MMC2 5
+#define BOOT_DEVICE_MMC1 6
+#define BOOT_DEVICE_XIPWAIT 7
+#endif
/* Boot type */
#define MMCSD_MODE_UNDEFINED 0
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 9/9] omap-common: reorganize spl.c
2011-08-02 15:59 ` [U-Boot] [PATCH V8 0/9] " Simon Schwarz
` (7 preceding siblings ...)
2011-08-02 15:59 ` [U-Boot] [PATCH V8 8/9] omap3: implement boot parameter saving Simon Schwarz
@ 2011-08-02 15:59 ` Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 0/9] OMAP3 and devkit8000 SPL support Simon Schwarz
9 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-02 15:59 UTC (permalink / raw)
To: u-boot
split-up spl.c into spl.c, spl_mmc.c and spl_nand.c. This avoids problems
with missing defines if some one board does not use mmc or nand. This includes
adding spl_ prefix to some functions which are now public. spl_image_t is now
a public type. Added some of the common functions to omap-common.h
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
Didn't exist before V8
---
arch/arm/cpu/armv7/omap-common/Makefile | 6 +
arch/arm/cpu/armv7/omap-common/spl.c | 197 +++--------------------------
arch/arm/cpu/armv7/omap-common/spl_mmc.c | 155 +++++++++++++++++++++++
arch/arm/cpu/armv7/omap-common/spl_nand.c | 63 +++++++++
arch/arm/include/asm/omap_common.h | 20 +++
5 files changed, 264 insertions(+), 177 deletions(-)
create mode 100644 arch/arm/cpu/armv7/omap-common/spl_mmc.c
create mode 100644 arch/arm/cpu/armv7/omap-common/spl_nand.c
diff --git a/arch/arm/cpu/armv7/omap-common/Makefile b/arch/arm/cpu/armv7/omap-common/Makefile
index ea9f8ec..0b96b47 100644
--- a/arch/arm/cpu/armv7/omap-common/Makefile
+++ b/arch/arm/cpu/armv7/omap-common/Makefile
@@ -33,6 +33,12 @@ COBJS += gpio.o
ifdef CONFIG_SPL_BUILD
COBJS += spl.o
+ifdef CONFIG_SPL_NAND_SUPPORT
+COBJS += spl_nand.o
+endif
+ifdef CONFIG_SPL_MMC_SUPPORT
+COBJS += spl_mmc.o
+endif
endif
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
index 3dd8e0d..c76fea6 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -38,14 +38,11 @@
DECLARE_GLOBAL_DATA_PTR;
+struct spl_image_info spl_image;
+
/* Define global data structure pointer to it*/
static gd_t gdata __attribute__ ((section(".data")));
static bd_t bdata __attribute__ ((section(".data")));
-static const char *image_name;
-static u8 image_os;
-static u32 image_load_addr;
-static u32 image_entry_point;
-static u32 image_size;
inline void hang(void)
{
@@ -66,194 +63,40 @@ void board_init_f(ulong dummy)
relocate_code(CONFIG_SPL_STACK, &gdata, CONFIG_SPL_TEXT_BASE);
}
-#ifdef CONFIG_GENERIC_MMC
-int board_mmc_init(bd_t *bis)
-{
- switch (omap_boot_device()) {
- case BOOT_DEVICE_MMC1:
- omap_mmc_init(0);
- break;
- case BOOT_DEVICE_MMC2:
- omap_mmc_init(1);
- break;
- }
- return 0;
-}
-#endif
-
-static void parse_image_header(const struct image_header *header)
+void spl_parse_image_header(const struct image_header *header)
{
u32 header_size = sizeof(struct image_header);
if (__be32_to_cpu(header->ih_magic) == IH_MAGIC) {
- image_size = __be32_to_cpu(header->ih_size) + header_size;
- image_entry_point = __be32_to_cpu(header->ih_load);
+ spl_image.size = __be32_to_cpu(header->ih_size) + header_size;
+ spl_image.entry_point = __be32_to_cpu(header->ih_load);
/* Load including the header */
- image_load_addr = image_entry_point - header_size;
- image_os = header->ih_os;
- image_name = (const char *)&header->ih_name;
+ spl_image.load_addr = spl_image.entry_point - header_size;
+ spl_image.os = header->ih_os;
+ spl_image.name = (const char *)&header->ih_name;
debug("spl: payload image: %s load addr: 0x%x size: %d\n",
- image_name, image_load_addr, image_size);
+ spl_image.name, spl_image.load_addr, spl_image.size);
} else {
/* Signature not found - assume u-boot.bin */
printf("mkimage signature not found - ih_magic = %x\n",
header->ih_magic);
puts("Assuming u-boot.bin ..\n");
/* Let's assume U-Boot will not be more than 200 KB */
- image_size = 200 * 1024;
- image_entry_point = CONFIG_SYS_TEXT_BASE;
- image_load_addr = CONFIG_SYS_TEXT_BASE;
- image_os = IH_OS_U_BOOT;
- image_name = "U-Boot";
- }
-}
-
-static void mmc_load_image_raw(struct mmc *mmc)
-{
- u32 image_size_sectors, err;
- const struct image_header *header;
-
- header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
- sizeof(struct image_header));
-
- /* read image header to find the image size & load address */
- err = mmc->block_dev.block_read(0,
- CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, 1,
- (void *)header);
-
- if (err <= 0)
- goto end;
-
- parse_image_header(header);
-
- /* convert size to sectors - round up */
- image_size_sectors = (image_size + MMCSD_SECTOR_SIZE - 1) /
- MMCSD_SECTOR_SIZE;
-
- /* Read the header too to avoid extra memcpy */
- err = mmc->block_dev.block_read(0,
- CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR,
- image_size_sectors, (void *)image_load_addr);
-
-end:
- if (err <= 0) {
- printf("spl: mmc blk read err - %d\n", err);
- hang();
+ spl_image.size = 200 * 1024;
+ spl_image.entry_point = CONFIG_SYS_TEXT_BASE;
+ spl_image.load_addr = CONFIG_SYS_TEXT_BASE;
+ spl_image.os = IH_OS_U_BOOT;
+ spl_image.name = "U-Boot";
}
}
-static void mmc_load_image_fat(struct mmc *mmc)
-{
- s32 err;
- struct image_header *header;
-
- header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
- sizeof(struct image_header));
-
- err = fat_register_device(&mmc->block_dev,
- CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION);
- if (err) {
- printf("spl: fat register err - %d\n", err);
- hang();
- }
-
- err = file_fat_read(CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME,
- (u8 *)header, sizeof(struct image_header));
- if (err <= 0)
- goto end;
-
- parse_image_header(header);
-
- err = file_fat_read(CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME,
- (u8 *)image_load_addr, 0);
-
-end:
- if (err <= 0) {
- printf("spl: error reading image %s, err - %d\n",
- CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME, err);
- hang();
- }
-}
-static void mmc_load_image(void) __attribute__((unused));
-static void mmc_load_image(void)
-{
- struct mmc *mmc;
- int err;
- u32 boot_mode;
-
- mmc_initialize(gd->bd);
- /* We register only one device. So, the dev id is always 0 */
- mmc = find_mmc_device(0);
- if (!mmc) {
- puts("spl: mmc device not found!!\n");
- hang();
- }
-
- err = mmc_init(mmc);
- if (err) {
- printf("spl: mmc init failed: err - %d\n", err);
- hang();
- }
-/* For OMAP3 there is no automatic boot mode detection */
-#ifdef CONFIG_OMAP34XX
- boot_mode = CONFIG_SYS_MMC_SD_BOOTMODE;
-#else
- boot_mode = omap_boot_mode();
-#endif
- if (boot_mode == MMCSD_MODE_RAW) {
- debug("boot mode - RAW\n");
- mmc_load_image_raw(mmc);
- } else if (boot_mode == MMCSD_MODE_FAT) {
- debug("boot mode - FAT\n");
- mmc_load_image_fat(mmc);
- } else {
- puts("spl: wrong MMC boot mode\n");
- hang();
- }
-}
-
-#ifdef CONFIG_SPL_NAND_SUPPORT
-static void nand_load_image(void) __attribute__ ((unused));
-static void nand_load_image(void)
-{
- struct image_header *header;
-
- gpmc_init();
- nand_init();
-
- /*use CONFIG_SYS_TEXT_BASE as temporary storage area */
- header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
-
-#ifdef CONFIG_NAND_ENV_DST
- nand_spl_load_image(CONFIG_ENV_OFFSET,
- CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
- parse_image_header(header);
- nand_spl_load_image(CONFIG_ENV_OFFSET, image_size,
- (void *)image_load_addr);
-#ifdef CONFIG_ENV_OFFSET_REDUND
- nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND,
- CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
- parse_image_header(header);
- nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, image_size,
- (void *)image_load_addr);
-#endif
-#endif
- /* Load u-boot */
- nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
- CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
- parse_image_header(header);
- nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
- image_size, (void *)image_load_addr);
- nand_deselect();
-}
-#endif /* CONFIG_SPL_NAND_SUPPORT */
-void jump_to_image_no_args(void)
+static void jump_to_image_no_args(void)
{
typedef void (*image_entry_noargs_t)(void)__attribute__ ((noreturn));
image_entry_noargs_t image_entry =
- (image_entry_noargs_t) image_entry_point;
+ (image_entry_noargs_t) spl_image.entry_point;
- debug("image entry point: 0x%X\n", image_entry_point);
+ debug("image entry point: 0x%X\n", spl_image.entry_point);
image_entry();
}
@@ -272,12 +115,12 @@ void board_init_r(gd_t *id, ulong dummy)
#ifdef CONFIG_SPL_MMC_SUPPORT
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
- mmc_load_image();
+ spl_mmc_load_image();
break;
#endif
#ifdef CONFIG_SPL_NAND_SUPPORT
case BOOT_DEVICE_NAND:
- nand_load_image();
+ spl_nand_load_image();
break;
#endif
default:
@@ -286,7 +129,7 @@ void board_init_r(gd_t *id, ulong dummy)
break;
}
- switch (image_os) {
+ switch (spl_image.os) {
case IH_OS_U_BOOT:
debug("Jumping to U-Boot\n");
jump_to_image_no_args();
diff --git a/arch/arm/cpu/armv7/omap-common/spl_mmc.c b/arch/arm/cpu/armv7/omap-common/spl_mmc.c
new file mode 100644
index 0000000..d4f78c7
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap-common/spl_mmc.c
@@ -0,0 +1,155 @@
+/*
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ *
+ * Aneesh V <aneesh@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <asm/u-boot.h>
+#include <asm/utils.h>
+#include <asm/arch/sys_proto.h>
+#include <mmc.h>
+#include <fat.h>
+#include <timestamp_autogenerated.h>
+#include <version_autogenerated.h>
+#include <asm/omap_common.h>
+#include <asm/arch/mmc_host_def.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_GENERIC_MMC
+int board_mmc_init(bd_t *bis)
+{
+ switch (omap_boot_device()) {
+ case BOOT_DEVICE_MMC1:
+ omap_mmc_init(0);
+ break;
+ case BOOT_DEVICE_MMC2:
+ omap_mmc_init(1);
+ break;
+ }
+ return 0;
+}
+#endif
+
+static void mmc_load_image_raw(struct mmc *mmc)
+{
+ u32 image_size_sectors, err;
+ const struct image_header *header;
+
+ header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
+ sizeof(struct image_header));
+
+ /* read image header to find the image size & load address */
+ err = mmc->block_dev.block_read(0,
+ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, 1,
+ (void *)header);
+
+ if (err <= 0)
+ goto end;
+
+ spl_parse_image_header(header);
+
+ /* convert size to sectors - round up */
+ image_size_sectors = (spl_image.size + MMCSD_SECTOR_SIZE - 1) /
+ MMCSD_SECTOR_SIZE;
+
+ /* Read the header too to avoid extra memcpy */
+ err = mmc->block_dev.block_read(0,
+ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR,
+ image_size_sectors, (void *)spl_image.load_addr);
+
+end:
+ if (err <= 0) {
+ printf("spl: mmc blk read err - %d\n", err);
+ hang();
+ }
+}
+
+static void mmc_load_image_fat(struct mmc *mmc)
+{
+ s32 err;
+ struct image_header *header;
+
+ header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
+ sizeof(struct image_header));
+
+ err = fat_register_device(&mmc->block_dev,
+ CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION);
+ if (err) {
+ printf("spl: fat register err - %d\n", err);
+ hang();
+ }
+
+ err = file_fat_read(CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME,
+ (u8 *)header, sizeof(struct image_header));
+ if (err <= 0)
+ goto end;
+
+ spl_parse_image_header(header);
+
+ err = file_fat_read(CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME,
+ (u8 *)spl_image.load_addr, 0);
+
+end:
+ if (err <= 0) {
+ printf("spl: error reading image %s, err - %d\n",
+ CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME, err);
+ hang();
+ }
+}
+
+void spl_mmc_load_image(void)
+{
+ struct mmc *mmc;
+ int err;
+ u32 boot_mode;
+
+ mmc_initialize(gd->bd);
+ /* We register only one device. So, the dev id is always 0 */
+ mmc = find_mmc_device(0);
+ if (!mmc) {
+ puts("spl: mmc device not found!!\n");
+ hang();
+ }
+
+ err = mmc_init(mmc);
+ if (err) {
+ printf("spl: mmc init failed: err - %d\n", err);
+ hang();
+ }
+/* For OMAP3 there is no automatic boot mode detection */
+#ifdef CONFIG_OMAP34XX
+ boot_mode = CONFIG_SYS_MMC_SD_BOOTMODE;
+#else
+ boot_mode = omap_boot_mode();
+#endif
+ if (boot_mode == MMCSD_MODE_RAW) {
+ debug("boot mode - RAW\n");
+ mmc_load_image_raw(mmc);
+ } else if (boot_mode == MMCSD_MODE_FAT) {
+ debug("boot mode - FAT\n");
+ mmc_load_image_fat(mmc);
+ } else {
+ puts("spl: wrong MMC boot mode\n");
+ hang();
+ }
+}
diff --git a/arch/arm/cpu/armv7/omap-common/spl_nand.c b/arch/arm/cpu/armv7/omap-common/spl_nand.c
new file mode 100644
index 0000000..70eb109
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap-common/spl_nand.c
@@ -0,0 +1,63 @@
+/*
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <asm/u-boot.h>
+#include <asm/utils.h>
+#include <asm/arch/sys_proto.h>
+#include <nand.h>
+#include <timestamp_autogenerated.h>
+#include <version_autogenerated.h>
+#include <asm/omap_common.h>
+
+
+void spl_nand_load_image(void)
+{
+ struct image_header *header;
+ gpmc_init();
+ nand_init();
+
+ /*use CONFIG_SYS_TEXT_BASE as temporary storage area */
+ header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
+
+#ifdef CONFIG_NAND_ENV_DST
+ nand_spl_load_image(CONFIG_ENV_OFFSET,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ spl_parse_image_header(header);
+ nand_spl_load_image(CONFIG_ENV_OFFSET, spl_image.size,
+ (void *)image_load_addr);
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ spl_parse_image_header(header);
+ nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, spl_image.size,
+ (void *)image_load_addr);
+#endif
+#endif
+ /* Load u-boot */
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ spl_parse_image_header(header);
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+ spl_image.size, (void *)spl_image.load_addr);
+ nand_deselect();
+}
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index 6469047..978e096 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -61,7 +61,27 @@ void preloader_console_init(void);
#define MMCSD_MODE_FAT 2
#define NAND_MODE_HW_ECC 3
+struct spl_image_info {
+ const char *name;
+ u8 os;
+ u32 load_addr;
+ u32 entry_point;
+ u32 size;
+};
+
+extern struct spl_image_info spl_image;
+
u32 omap_boot_device(void);
u32 omap_boot_mode(void);
+
+/* SPL common function s*/
+void spl_parse_image_header(const struct image_header *header);
+
+/* NAND SPL functions */
+void spl_nand_load_image(void);
+
+/* MMC SPL functions */
+void spl_mmc_load_image(void);
+
#endif /* _OMAP_COMMON_H_ */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 4/9] spl: add NAND Library to new SPL
2011-08-02 15:59 ` [U-Boot] [PATCH V8 4/9] spl: add NAND Library to new SPL Simon Schwarz
@ 2011-08-02 16:12 ` Scott Wood
0 siblings, 0 replies; 134+ messages in thread
From: Scott Wood @ 2011-08-02 16:12 UTC (permalink / raw)
To: u-boot
On Tue, 2 Aug 2011 17:59:12 +0200
Simon Schwarz <simonschwarzcor@googlemail.com> wrote:
> V8 changes:
> CHG: Added CONFIG_SPL_NAND_SIMPLE
> DEL nand_spl_read_page is replaced by nand_spl_load_image with size=page size
>
> Transition from V1 to V2 also includes that this patch is now based on
> - the new SPL layout by Aneesh V and Daniel Schwierzeck
> - the OMAP4 SPL patches by Aneesh V
>
> This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND support
> to omap_gpmc driver"
> (http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1
> ---
> doc/README.SPL | 1 +
> drivers/mtd/nand/Makefile | 10 ++++++++--
> drivers/mtd/nand/nand_base.c | 4 ++--
> drivers/mtd/nand/omap_gpmc.c | 27 +++++++++++++++++++++++++++
> include/nand.h | 5 ++++-
> spl/Makefile | 1 +
> 6 files changed, 43 insertions(+), 5 deletions(-)
nand_spl_simple.c is missing again. :-)
-Scott
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 3/9] omap-common: add nand spl support
2011-08-02 15:59 ` [U-Boot] [PATCH V8 3/9] omap-common: add nand spl support Simon Schwarz
@ 2011-08-05 7:30 ` Aneesh V
2011-08-08 7:50 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Aneesh V @ 2011-08-05 7:30 UTC (permalink / raw)
To: u-boot
Hi Simon,
Sorry if my response is late. I was not in office for couple of days.
On Tuesday 02 August 2011 09:29 PM, Simon Schwarz wrote:
> Add NAND support for the new SPL structure.
>
> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
> ---
> This patch didn't exist before V2!
>
> V2 changes:
> ADD Some define-barriers for OMAP3 to only use NAND
> ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
> header
> CHG cosmetic
> ADD do_reset() implementation for omap-common spl
> ADD nand_copy_image to nand.h
> ADD CPP barriers for mmc and nand support. The parts depending on library
> support are only compiled if the respective library is included.
>
> V3 changes:
> ADD Comment why setup_clocks_for_console() isn't called for OMAP3
> CHG cosmetic (deleted empty line)
> CHG rename of NAND_MODE_HW to NAND_MODE_HW_ECC
> DEL NAND_MODE_SW. Not used.
>
> V4 changes:
> CHG cosmetic - style problems
>
> V5 changes:
> CHG renamed nand_copy_image to nand_spl_load_image
> CHG offs paramter of nand_spl_load_image is of type loff_t now
>
> V6 changes:
> ADD call to nand_deselect after loading the images
> ADD nand_deselect to nand.h
>
> V7 changes:
> DEL some CONFIG_SPL_* relying on garbage collection now
> ADD mmc_load_image and nand_load_image now have __attribute__((unused)) to
> prevent warnings when the lib is not added to SPL
> DEL do_reset() isn't used anymore
> CHG header based loading in SPL
>
> V8 changes:
> DEL nand_spl_read_page is replaced by nand_spl_load_image with size=page size
>
> Transition from V1 to V2 also includes that this patch is now based on
> - the new SPL layout by Aneesh V and Daniel Schwierzeck
> - the OMAP4 SPL patches by Aneesh V
> ---
> arch/arm/cpu/armv7/omap-common/spl.c | 46 +++++++++++++++++++++++++++++++++-
> arch/arm/include/asm/omap_common.h | 1 +
> include/nand.h | 3 ++
> 3 files changed, 49 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
> index 1d301f4..53d10bf 100644
> --- a/arch/arm/cpu/armv7/omap-common/spl.c
> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
> @@ -26,6 +26,7 @@
> #include<asm/u-boot.h>
> #include<asm/utils.h>
> #include<asm/arch/sys_proto.h>
> +#include<nand.h>
> #include<mmc.h>
> #include<fat.h>
> #include<timestamp_autogenerated.h>
> @@ -173,7 +174,7 @@ end:
> hang();
> }
> }
> -
> +static void mmc_load_image(void) __attribute__((unused));
> static void mmc_load_image(void)
> {
> struct mmc *mmc;
> @@ -207,12 +208,48 @@ static void mmc_load_image(void)
> }
> }
>
> +#ifdef CONFIG_SPL_NAND_SUPPORT
> +static void nand_load_image(void) __attribute__ ((unused));
> +static void nand_load_image(void)
> +{
> + struct image_header *header;
> +
> + gpmc_init();
> + nand_init();
> +
> + /*use CONFIG_SYS_TEXT_BASE as temporary storage area */
> + header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
> +
> +#ifdef CONFIG_NAND_ENV_DST
> + nand_spl_load_image(CONFIG_ENV_OFFSET,
> + CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
> + parse_image_header(header);
> + nand_spl_load_image(CONFIG_ENV_OFFSET, image_size,
> + (void *)image_load_addr);
> +#ifdef CONFIG_ENV_OFFSET_REDUND
> + nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND,
> + CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
> + parse_image_header(header);
> + nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, image_size,
> + (void *)image_load_addr);
> +#endif
> +#endif
Can you please explain the logic here. What are you loading here?
br,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 8/9] omap3: implement boot parameter saving
2011-08-02 15:59 ` [U-Boot] [PATCH V8 8/9] omap3: implement boot parameter saving Simon Schwarz
@ 2011-08-05 7:41 ` Aneesh V
2011-08-08 8:03 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Aneesh V @ 2011-08-05 7:41 UTC (permalink / raw)
To: u-boot
Hi Simon,
On Tuesday 02 August 2011 09:29 PM, Simon Schwarz wrote:
> Implements the saving of boot params passed by OMAP3 ROM code.
>
> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
> ---
> Didn't exist before V8
> ---
> arch/arm/cpu/armv7/omap-common/spl.c | 6 +++++-
> arch/arm/cpu/armv7/omap3/lowlevel_init.S | 9 +++++++--
> arch/arm/include/asm/omap_common.h | 10 ++++++++++
> 3 files changed, 22 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
> index 53d10bf..3dd8e0d 100644
> --- a/arch/arm/cpu/armv7/omap-common/spl.c
> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
> @@ -194,8 +194,12 @@ static void mmc_load_image(void)
> printf("spl: mmc init failed: err - %d\n", err);
> hang();
> }
> -
> +/* For OMAP3 there is no automatic boot mode detection */
> +#ifdef CONFIG_OMAP34XX
> + boot_mode = CONFIG_SYS_MMC_SD_BOOTMODE;
> +#else
> boot_mode = omap_boot_mode();
> +#endif
Why boot mode detection is not supported? You seem to be saving
bootparams below that has boot mode information. Why don't you use it?
best regards,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 3/9] omap-common: add nand spl support
2011-08-05 7:30 ` Aneesh V
@ 2011-08-08 7:50 ` Simon Schwarz
2011-08-08 9:04 ` Aneesh V
0 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-08-08 7:50 UTC (permalink / raw)
To: u-boot
Hi Aneesh,
On 08/05/2011 09:30 AM, Aneesh V wrote:
> Hi Simon,
>
> Sorry if my response is late. I was not in office for couple of days.
First day in office since vacation - so no you are not late ;)
>
> On Tuesday 02 August 2011 09:29 PM, Simon Schwarz wrote:
>> Add NAND support for the new SPL structure.
>>
>> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
>> ---
>> This patch didn't exist before V2!
>>
>> V2 changes:
>> ADD Some define-barriers for OMAP3 to only use NAND
>> ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses
>> the
>> header
>> CHG cosmetic
>> ADD do_reset() implementation for omap-common spl
>> ADD nand_copy_image to nand.h
>> ADD CPP barriers for mmc and nand support. The parts depending on library
>> support are only compiled if the respective library is included.
>>
>> V3 changes:
>> ADD Comment why setup_clocks_for_console() isn't called for OMAP3
>> CHG cosmetic (deleted empty line)
>> CHG rename of NAND_MODE_HW to NAND_MODE_HW_ECC
>> DEL NAND_MODE_SW. Not used.
>>
>> V4 changes:
>> CHG cosmetic - style problems
>>
>> V5 changes:
>> CHG renamed nand_copy_image to nand_spl_load_image
>> CHG offs paramter of nand_spl_load_image is of type loff_t now
>>
>> V6 changes:
>> ADD call to nand_deselect after loading the images
>> ADD nand_deselect to nand.h
>>
>> V7 changes:
>> DEL some CONFIG_SPL_* relying on garbage collection now
>> ADD mmc_load_image and nand_load_image now have
>> __attribute__((unused)) to
>> prevent warnings when the lib is not added to SPL
>> DEL do_reset() isn't used anymore
>> CHG header based loading in SPL
>>
>> V8 changes:
>> DEL nand_spl_read_page is replaced by nand_spl_load_image with
>> size=page size
>>
>> Transition from V1 to V2 also includes that this patch is now based on
>> - the new SPL layout by Aneesh V and Daniel Schwierzeck
>> - the OMAP4 SPL patches by Aneesh V
>> ---
>> arch/arm/cpu/armv7/omap-common/spl.c | 46
>> +++++++++++++++++++++++++++++++++-
>> arch/arm/include/asm/omap_common.h | 1 +
>> include/nand.h | 3 ++
>> 3 files changed, 49 insertions(+), 1 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
>> b/arch/arm/cpu/armv7/omap-common/spl.c
>> index 1d301f4..53d10bf 100644
>> --- a/arch/arm/cpu/armv7/omap-common/spl.c
>> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
>> @@ -26,6 +26,7 @@
>> #include<asm/u-boot.h>
>> #include<asm/utils.h>
>> #include<asm/arch/sys_proto.h>
>> +#include<nand.h>
>> #include<mmc.h>
>> #include<fat.h>
>> #include<timestamp_autogenerated.h>
>> @@ -173,7 +174,7 @@ end:
>> hang();
>> }
>> }
>> -
>> +static void mmc_load_image(void) __attribute__((unused));
>> static void mmc_load_image(void)
>> {
>> struct mmc *mmc;
>> @@ -207,12 +208,48 @@ static void mmc_load_image(void)
>> }
>> }
>>
>> +#ifdef CONFIG_SPL_NAND_SUPPORT
>> +static void nand_load_image(void) __attribute__ ((unused));
>> +static void nand_load_image(void)
>> +{
>> + struct image_header *header;
>> +
>> + gpmc_init();
>> + nand_init();
>> +
>> + /*use CONFIG_SYS_TEXT_BASE as temporary storage area */
>> + header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
>> +
>> +#ifdef CONFIG_NAND_ENV_DST
>> + nand_spl_load_image(CONFIG_ENV_OFFSET,
>> + CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
>> + parse_image_header(header);
>> + nand_spl_load_image(CONFIG_ENV_OFFSET, image_size,
>> + (void *)image_load_addr);
>> +#ifdef CONFIG_ENV_OFFSET_REDUND
>> + nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND,
>> + CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
>> + parse_image_header(header);
>> + nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, image_size,
>> + (void *)image_load_addr);
>> +#endif
>> +#endif
>
> Can you please explain the logic here. What are you loading here?
This is from the old nand_spl.c. AFAIK this is to load the environment
from NAND to RAM. I kept this to not break boards using it - although
there has to be some other mechanism for this because it is only used in
smdk6400.h.
The REDUND part does the same for a redundant copy. (docs say: to have a
working copy if power fails while doing saveenv).
>
> br,
> Aneesh
Regards
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 8/9] omap3: implement boot parameter saving
2011-08-05 7:41 ` Aneesh V
@ 2011-08-08 8:03 ` Simon Schwarz
2011-08-08 8:44 ` Aneesh V
0 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-08-08 8:03 UTC (permalink / raw)
To: u-boot
Hi Aneesh,
On 08/05/2011 09:41 AM, Aneesh V wrote:
> Hi Simon,
>
> On Tuesday 02 August 2011 09:29 PM, Simon Schwarz wrote:
>> Implements the saving of boot params passed by OMAP3 ROM code.
>>
>> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
>> ---
>> Didn't exist before V8
>> ---
>> arch/arm/cpu/armv7/omap-common/spl.c | 6 +++++-
>> arch/arm/cpu/armv7/omap3/lowlevel_init.S | 9 +++++++--
>> arch/arm/include/asm/omap_common.h | 10 ++++++++++
>> 3 files changed, 22 insertions(+), 3 deletions(-)
>>
>> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
>> b/arch/arm/cpu/armv7/omap-common/spl.c
>> index 53d10bf..3dd8e0d 100644
>> --- a/arch/arm/cpu/armv7/omap-common/spl.c
>> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
>> @@ -194,8 +194,12 @@ static void mmc_load_image(void)
>> printf("spl: mmc init failed: err - %d\n", err);
>> hang();
>> }
>> -
>> +/* For OMAP3 there is no automatic boot mode detection */
>> +#ifdef CONFIG_OMAP34XX
>> + boot_mode = CONFIG_SYS_MMC_SD_BOOTMODE;
>> +#else
>> boot_mode = omap_boot_mode();
>> +#endif
>
> Why boot mode detection is not supported? You seem to be saving
> bootparams below that has boot mode information. Why don't you use it?
>
Because you wrote: "What I have done for OMAP4 will not work for OMAP3.
For OMAP3 you will
get only the boot-device(eMMC, MMC/SD, nand etc) and *not* the bootmode(raw
vs FAT)."
http://mid.gmane.org/4E256783.5080601 at ti.com
Did I understand you wrong here?
> best regards,
> Aneesh
Regards
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 8/9] omap3: implement boot parameter saving
2011-08-08 8:03 ` Simon Schwarz
@ 2011-08-08 8:44 ` Aneesh V
2011-08-08 10:59 ` Simon Schwarz
0 siblings, 1 reply; 134+ messages in thread
From: Aneesh V @ 2011-08-08 8:44 UTC (permalink / raw)
To: u-boot
Hi Simon,
On Monday 08 August 2011 01:33 PM, Simon Schwarz wrote:
> Hi Aneesh,
>
> On 08/05/2011 09:41 AM, Aneesh V wrote:
>> Hi Simon,
>>
>> On Tuesday 02 August 2011 09:29 PM, Simon Schwarz wrote:
>>> Implements the saving of boot params passed by OMAP3 ROM code.
>>>
>>> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
>>> ---
>>> Didn't exist before V8
>>> ---
>>> arch/arm/cpu/armv7/omap-common/spl.c | 6 +++++-
>>> arch/arm/cpu/armv7/omap3/lowlevel_init.S | 9 +++++++--
>>> arch/arm/include/asm/omap_common.h | 10 ++++++++++
>>> 3 files changed, 22 insertions(+), 3 deletions(-)
>>>
>>> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
>>> b/arch/arm/cpu/armv7/omap-common/spl.c
>>> index 53d10bf..3dd8e0d 100644
>>> --- a/arch/arm/cpu/armv7/omap-common/spl.c
>>> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
>>> @@ -194,8 +194,12 @@ static void mmc_load_image(void)
>>> printf("spl: mmc init failed: err - %d\n", err);
>>> hang();
>>> }
>>> -
>>> +/* For OMAP3 there is no automatic boot mode detection */
>>> +#ifdef CONFIG_OMAP34XX
>>> + boot_mode = CONFIG_SYS_MMC_SD_BOOTMODE;
>>> +#else
>>> boot_mode = omap_boot_mode();
>>> +#endif
>>
>> Why boot mode detection is not supported? You seem to be saving
>> bootparams below that has boot mode information. Why don't you use it?
>>
>
> Because you wrote: "What I have done for OMAP4 will not work for OMAP3.
> For OMAP3 you will
> get only the boot-device(eMMC, MMC/SD, nand etc) and *not* the bootmode(raw
> vs FAT)."
> http://mid.gmane.org/4E256783.5080601 at ti.com
>
> Did I understand you wrong here?
Sorry for the noise. I mistook 'boot_mode' for 'boot_device'. Anyway,
instead of hard-coding this, I would prefer the following approach
taken by x-loader.
1. For eMMC - raw mode
2. For external MMC/SD card - FAT mode.
best regards,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 3/9] omap-common: add nand spl support
2011-08-08 7:50 ` Simon Schwarz
@ 2011-08-08 9:04 ` Aneesh V
0 siblings, 0 replies; 134+ messages in thread
From: Aneesh V @ 2011-08-08 9:04 UTC (permalink / raw)
To: u-boot
Hi Simon,
On Monday 08 August 2011 01:20 PM, Simon Schwarz wrote:
> Hi Aneesh,
>
> On 08/05/2011 09:30 AM, Aneesh V wrote:
>> Hi Simon,
>>
>> Sorry if my response is late. I was not in office for couple of days.
>
> First day in office since vacation - so no you are not late ;)
>
>>
>> On Tuesday 02 August 2011 09:29 PM, Simon Schwarz wrote:
>>> Add NAND support for the new SPL structure.
>>>
>>> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
>>> ---
>>> This patch didn't exist before V2!
>>>
>>> V2 changes:
>>> ADD Some define-barriers for OMAP3 to only use NAND
>>> ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses
>>> the
>>> header
>>> CHG cosmetic
>>> ADD do_reset() implementation for omap-common spl
>>> ADD nand_copy_image to nand.h
>>> ADD CPP barriers for mmc and nand support. The parts depending on
>>> library
>>> support are only compiled if the respective library is included.
>>>
>>> V3 changes:
>>> ADD Comment why setup_clocks_for_console() isn't called for OMAP3
>>> CHG cosmetic (deleted empty line)
>>> CHG rename of NAND_MODE_HW to NAND_MODE_HW_ECC
>>> DEL NAND_MODE_SW. Not used.
>>>
>>> V4 changes:
>>> CHG cosmetic - style problems
>>>
>>> V5 changes:
>>> CHG renamed nand_copy_image to nand_spl_load_image
>>> CHG offs paramter of nand_spl_load_image is of type loff_t now
>>>
>>> V6 changes:
>>> ADD call to nand_deselect after loading the images
>>> ADD nand_deselect to nand.h
>>>
>>> V7 changes:
>>> DEL some CONFIG_SPL_* relying on garbage collection now
>>> ADD mmc_load_image and nand_load_image now have
>>> __attribute__((unused)) to
>>> prevent warnings when the lib is not added to SPL
>>> DEL do_reset() isn't used anymore
>>> CHG header based loading in SPL
>>>
>>> V8 changes:
>>> DEL nand_spl_read_page is replaced by nand_spl_load_image with
>>> size=page size
>>>
>>> Transition from V1 to V2 also includes that this patch is now based on
>>> - the new SPL layout by Aneesh V and Daniel Schwierzeck
>>> - the OMAP4 SPL patches by Aneesh V
>>> ---
>>> arch/arm/cpu/armv7/omap-common/spl.c | 46
>>> +++++++++++++++++++++++++++++++++-
>>> arch/arm/include/asm/omap_common.h | 1 +
>>> include/nand.h | 3 ++
>>> 3 files changed, 49 insertions(+), 1 deletions(-)
>>>
>>> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
>>> b/arch/arm/cpu/armv7/omap-common/spl.c
>>> index 1d301f4..53d10bf 100644
>>> --- a/arch/arm/cpu/armv7/omap-common/spl.c
>>> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
>>> @@ -26,6 +26,7 @@
>>> #include<asm/u-boot.h>
>>> #include<asm/utils.h>
>>> #include<asm/arch/sys_proto.h>
>>> +#include<nand.h>
>>> #include<mmc.h>
>>> #include<fat.h>
>>> #include<timestamp_autogenerated.h>
>>> @@ -173,7 +174,7 @@ end:
>>> hang();
>>> }
>>> }
>>> -
>>> +static void mmc_load_image(void) __attribute__((unused));
>>> static void mmc_load_image(void)
>>> {
>>> struct mmc *mmc;
>>> @@ -207,12 +208,48 @@ static void mmc_load_image(void)
>>> }
>>> }
>>>
>>> +#ifdef CONFIG_SPL_NAND_SUPPORT
>>> +static void nand_load_image(void) __attribute__ ((unused));
>>> +static void nand_load_image(void)
>>> +{
>>> + struct image_header *header;
>>> +
>>> + gpmc_init();
>>> + nand_init();
>>> +
>>> + /*use CONFIG_SYS_TEXT_BASE as temporary storage area */
>>> + header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
>>> +
>>> +#ifdef CONFIG_NAND_ENV_DST
>>> + nand_spl_load_image(CONFIG_ENV_OFFSET,
>>> + CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
>>> + parse_image_header(header);
>>> + nand_spl_load_image(CONFIG_ENV_OFFSET, image_size,
>>> + (void *)image_load_addr);
>>> +#ifdef CONFIG_ENV_OFFSET_REDUND
>>> + nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND,
>>> + CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
>>> + parse_image_header(header);
>>> + nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, image_size,
>>> + (void *)image_load_addr);
>>> +#endif
>>> +#endif
>>
>> Can you please explain the logic here. What are you loading here?
>
> This is from the old nand_spl.c. AFAIK this is to load the environment
> from NAND to RAM. I kept this to not break boards using it - although
> there has to be some other mechanism for this because it is only used in
> smdk6400.h.
>
> The REDUND part does the same for a redundant copy. (docs say: to have a
> working copy if power fails while doing saveenv).
Hmm. Looks like this was a support added by the commit b74ab737. So, we
are pre-loading the ENV for u-boot here.
best regards,
Aneesh
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V8 8/9] omap3: implement boot parameter saving
2011-08-08 8:44 ` Aneesh V
@ 2011-08-08 10:59 ` Simon Schwarz
0 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-08 10:59 UTC (permalink / raw)
To: u-boot
On 08/08/2011 10:44 AM, Aneesh V wrote:
> Hi Simon,
>
> On Monday 08 August 2011 01:33 PM, Simon Schwarz wrote:
>> Hi Aneesh,
>>
>> On 08/05/2011 09:41 AM, Aneesh V wrote:
>>> Hi Simon,
>>>
>>> On Tuesday 02 August 2011 09:29 PM, Simon Schwarz wrote:
>>>> Implements the saving of boot params passed by OMAP3 ROM code.
>>>>
>>>> Signed-off-by: Simon Schwarz<simonschwarzcor@gmail.com>
>>>> ---
>>>> Didn't exist before V8
>>>> ---
>>>> arch/arm/cpu/armv7/omap-common/spl.c | 6 +++++-
>>>> arch/arm/cpu/armv7/omap3/lowlevel_init.S | 9 +++++++--
>>>> arch/arm/include/asm/omap_common.h | 10 ++++++++++
>>>> 3 files changed, 22 insertions(+), 3 deletions(-)
>>>>
>>>> diff --git a/arch/arm/cpu/armv7/omap-common/spl.c
>>>> b/arch/arm/cpu/armv7/omap-common/spl.c
>>>> index 53d10bf..3dd8e0d 100644
>>>> --- a/arch/arm/cpu/armv7/omap-common/spl.c
>>>> +++ b/arch/arm/cpu/armv7/omap-common/spl.c
>>>> @@ -194,8 +194,12 @@ static void mmc_load_image(void)
>>>> printf("spl: mmc init failed: err - %d\n", err);
>>>> hang();
>>>> }
>>>> -
>>>> +/* For OMAP3 there is no automatic boot mode detection */
>>>> +#ifdef CONFIG_OMAP34XX
>>>> + boot_mode = CONFIG_SYS_MMC_SD_BOOTMODE;
>>>> +#else
>>>> boot_mode = omap_boot_mode();
>>>> +#endif
>>>
>>> Why boot mode detection is not supported? You seem to be saving
>>> bootparams below that has boot mode information. Why don't you use it?
>>>
>>
>> Because you wrote: "What I have done for OMAP4 will not work for OMAP3.
>> For OMAP3 you will
>> get only the boot-device(eMMC, MMC/SD, nand etc) and *not* the
>> bootmode(raw
>> vs FAT)."
>> http://mid.gmane.org/4E256783.5080601 at ti.com
>>
>> Did I understand you wrong here?
>
> Sorry for the noise. I mistook 'boot_mode' for 'boot_device'. Anyway,
> instead of hard-coding this, I would prefer the following approach
> taken by x-loader.
>
> 1. For eMMC - raw mode
> 2. For external MMC/SD card - FAT mode.
done.
> best regards,
> Aneesh
Regards
Simon
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V9 0/9] OMAP3 and devkit8000 SPL support
2011-08-02 15:59 ` [U-Boot] [PATCH V8 0/9] " Simon Schwarz
` (8 preceding siblings ...)
2011-08-02 15:59 ` [U-Boot] [PATCH V8 9/9] omap-common: reorganize spl.c Simon Schwarz
@ 2011-08-08 13:11 ` Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 1/9] omap-common/omap4: relocate early UART clock setup Simon Schwarz
` (8 more replies)
9 siblings, 9 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-08 13:11 UTC (permalink / raw)
To: u-boot
V1 Initial SPL support for OMAP3 was based on the old SPL
V2 Introduced major changes. It is based on the OMAP4-SPL patch by
Aneesh V and the new SPL Framework by Daniel Schwierzeck and Aneesh V
V3 Some small bug fixes and correct placed SOB.
V4 Corrected one bugfix and some style problems
V5 Exclude some nand objects from SPL, interface change for nand_spl
V6 Added nand_spl.c - git add mistake, some small changes
V7 integrates "[PATCH V0] omap-common: move early UART clock setup to
board.c", rewrite of image loading to use image headers, removed many
#ifdefs, use read functions from nand_base.c, some smaller changes
V8 added boot parameter saving (was not implemented before V8!), added define
CONFIG_SPL_NAND_SIMPLE, reorganization of omap-common SPL
V9 added missing file. Changes in boot_mode
This is based on the following patches:
- New SPL framework (in u-boot-ti)
- OMAP4 SPL (in u-boot-ti)
Simon Schwarz (9):
omap-common/omap4: relocate early UART clock setup
omap3: Configure RAM bank 0 if in SPL
omap-common: add nand spl support
spl: add NAND Library to new SPL
spl: Add POWER library to new spl
omap3: new SPL structure support
devkit8000: Add nand-spl support for new SPL
omap3: implement boot parameter saving
omap-common: reorganize spl.c
arch/arm/cpu/armv7/omap-common/Makefile | 6 +
arch/arm/cpu/armv7/omap-common/spl.c | 165 +++---------------
arch/arm/cpu/armv7/omap-common/spl_mmc.c | 150 ++++++++++++++++
arch/arm/cpu/armv7/omap-common/spl_nand.c | 71 ++++++++
arch/arm/cpu/armv7/omap3/board.c | 50 ++++++-
arch/arm/cpu/armv7/omap3/config.mk | 30 ++++
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 10 +
arch/arm/cpu/armv7/omap3/sdrc.c | 32 ++++-
arch/arm/cpu/armv7/omap4/board.c | 1 +
arch/arm/include/asm/arch-omap3/mem.h | 36 ++++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
arch/arm/include/asm/omap_common.h | 31 ++++
board/timll/devkit8000/devkit8000.c | 2 +-
doc/README.SPL | 2 +
drivers/mtd/nand/Makefile | 10 +-
drivers/mtd/nand/nand_base.c | 4 +-
drivers/mtd/nand/nand_spl_simple.c | 245 +++++++++++++++++++++++++++
drivers/mtd/nand/omap_gpmc.c | 27 +++
include/configs/devkit8000.h | 46 +++++
include/nand.h | 6 +
spl/Makefile | 2 +
21 files changed, 782 insertions(+), 145 deletions(-)
create mode 100644 arch/arm/cpu/armv7/omap-common/spl_mmc.c
create mode 100644 arch/arm/cpu/armv7/omap-common/spl_nand.c
create mode 100644 arch/arm/cpu/armv7/omap3/config.mk
create mode 100644 drivers/mtd/nand/nand_spl_simple.c
--
1.7.4.1
^ permalink raw reply [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V9 1/9] omap-common/omap4: relocate early UART clock setup
2011-08-08 13:11 ` [U-Boot] [PATCH V9 0/9] OMAP3 and devkit8000 SPL support Simon Schwarz
@ 2011-08-08 13:11 ` Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 2/9] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
` (7 subsequent siblings)
8 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-08 13:11 UTC (permalink / raw)
To: u-boot
Moves the early UART clock setup setup_clocks_for_console() from
preloader_console_init() to s_init() of OMAP4.
This is done to prepare for OMAP3 integration.
This patch was posted seperatly to the mailinglist but I decidet - since it is
a prereqesit for this patch to add it. Former port to ML:
http://article.gmane.org/gmane.comp.boot-loaders.u-boot/104395
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
Did not exist before V7.
V8 changes:
nothing
V9 changes:
nothing
---
arch/arm/cpu/armv7/omap-common/spl.c | 2 +-
arch/arm/cpu/armv7/omap4/board.c | 1 +
2 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
index d177652..1d301f4 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -249,6 +249,7 @@ void board_init_r(gd_t *id, ulong dummy)
}
}
+/* This requires UART clocks to be enabled */
void preloader_console_init(void)
{
const char *u_boot_rev = U_BOOT_VERSION;
@@ -259,7 +260,6 @@ void preloader_console_init(void)
gd->flags |= GD_FLG_RELOC;
gd->baudrate = CONFIG_BAUDRATE;
- setup_clocks_for_console();
serial_init(); /* serial communications setup */
/* Avoid a second "U-Boot" coming from this string */
diff --git a/arch/arm/cpu/armv7/omap4/board.c b/arch/arm/cpu/armv7/omap4/board.c
index 5943d61..a9e90de 100644
--- a/arch/arm/cpu/armv7/omap4/board.c
+++ b/arch/arm/cpu/armv7/omap4/board.c
@@ -196,6 +196,7 @@ void s_init(void)
watchdog_init();
set_mux_conf_regs();
#ifdef CONFIG_SPL_BUILD
+ setup_clocks_for_console();
preloader_console_init();
#endif
prcm_init();
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V9 2/9] omap3: Configure RAM bank 0 if in SPL
2011-08-08 13:11 ` [U-Boot] [PATCH V9 0/9] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 1/9] omap-common/omap4: relocate early UART clock setup Simon Schwarz
@ 2011-08-08 13:11 ` Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 3/9] omap-common: add nand spl support Simon Schwarz
` (6 subsequent siblings)
8 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-08 13:11 UTC (permalink / raw)
To: u-boot
OMAP3 relied on the memory config done by X-loader or Configuration Header. This
has to be reworked for the implementation of a SPL. This patch configures RAM
bank 0 if CONFIG_SPL_BUILD is set. Settings for Micron-RAM used by devkit8000
are added to mem.h
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD Settings for Micron RAM
V2 changes:
DEL spl_debug outputs if mem test fails/passes
CHG CONFIG_PRELOADER to CONFIG_SPL_BUILD
V3 changes:
nothing
V4 changes:
nothing
V5 changes:
nothing
V6 changes:
nothing
V7 changes:
DEL unnecessary #fidef CONFIG_SPL_BUILD
ADD comment on why we need the ifdef in sdrc.c
V8 changes:
nothing
V9 changes:
nothing
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,3/5] devkit8000 nand_spl: Add RAM
configuration independent of x-loader or CH"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114)
---
arch/arm/cpu/armv7/omap3/sdrc.c | 32 ++++++++++++++++++++++++++++-
arch/arm/include/asm/arch-omap3/mem.h | 36 +++++++++++++++++++++++++++++++++
2 files changed, 67 insertions(+), 1 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap3/sdrc.c b/arch/arm/cpu/armv7/omap3/sdrc.c
index 2a7970b..0dd1955 100644
--- a/arch/arm/cpu/armv7/omap3/sdrc.c
+++ b/arch/arm/cpu/armv7/omap3/sdrc.c
@@ -8,6 +8,9 @@
* Copyright (C) 2004-2010
* Texas Instruments Incorporated - http://www.ti.com/
*
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
+ *
* Author :
* Vaibhav Hiremath <hvaibhav@ti.com>
*
@@ -133,13 +136,40 @@ void do_sdrc_init(u32 cs, u32 early)
sdelay(0x20000);
}
+/* As long as V_MCFG and V_RFR_CTRL is not defined for all OMAP3 boards we need
+ * to prevent this to be build in non-SPL build */
+#ifdef CONFIG_SPL_BUILD
+ /* If we use a SPL there is no x-loader nor config header so we have
+ * to do the job ourselfs
+ */
+ if (cs == CS0) {
+ sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
+
+ /* General SDRC config */
+ writel(V_MCFG, &sdrc_base->cs[cs].mcfg);
+ writel(V_RFR_CTRL, &sdrc_base->cs[cs].rfr_ctrl);
+
+ /* AC timings */
+ writel(V_ACTIMA_165, &sdrc_actim_base0->ctrla);
+ writel(V_ACTIMB_165, &sdrc_actim_base0->ctrlb);
+
+ /* Initialize */
+ writel(CMD_NOP, &sdrc_base->cs[cs].manual);
+ writel(CMD_PRECHARGE, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+ writel(CMD_AUTOREFRESH, &sdrc_base->cs[cs].manual);
+
+ writel(V_MR, &sdrc_base->cs[cs].mr);
+ }
+#endif
+
/*
* SDRC timings are set up by x-load or config header
* We don't need to redo them here.
* Older x-loads configure only CS0
* configure CS1 to handle this ommission
*/
- if (cs) {
+ if (cs == CS1) {
sdrc_actim_base0 = (struct sdrc_actim *)SDRC_ACTIM_CTRL0_BASE;
sdrc_actim_base1 = (struct sdrc_actim *)SDRC_ACTIM_CTRL1_BASE;
writel(readl(&sdrc_base->cs[CS0].mcfg),
diff --git a/arch/arm/include/asm/arch-omap3/mem.h b/arch/arm/include/asm/arch-omap3/mem.h
index f165949..8e28f77 100644
--- a/arch/arm/include/asm/arch-omap3/mem.h
+++ b/arch/arm/include/asm/arch-omap3/mem.h
@@ -128,6 +128,33 @@ enum {
(MICRON_XSR_165 << 0) | (MICRON_TXP_165 << 8) | \
(MICRON_TWTR_165 << 16))
+#define MICRON_RAMTYPE 0x1
+#define MICRON_DDRTYPE 0x0
+#define MICRON_DEEPPD 0x1
+#define MICRON_B32NOT16 0x1
+#define MICRON_BANKALLOCATION 0x2
+#define MICRON_RAMSIZE ((PHYS_SDRAM_1_SIZE/(1024*1024))/2)
+#define MICRON_ADDRMUXLEGACY 0x1
+#define MICRON_CASWIDTH 0x5
+#define MICRON_RASWIDTH 0x2
+#define MICRON_LOCKSTATUS 0x0
+#define MICRON_V_MCFG ((MICRON_LOCKSTATUS << 30) | (MICRON_RASWIDTH << 24) | \
+ (MICRON_CASWIDTH << 20) | (MICRON_ADDRMUXLEGACY << 19) | \
+ (MICRON_RAMSIZE << 8) | (MICRON_BANKALLOCATION << 6) | \
+ (MICRON_B32NOT16 << 4) | (MICRON_DEEPPD << 3) | \
+ (MICRON_DDRTYPE << 2) | (MICRON_RAMTYPE))
+
+#define MICRON_ARCV 2030
+#define MICRON_ARE 0x1
+#define MICRON_V_RFR_CTRL ((MICRON_ARCV << 8) | (MICRON_ARE))
+
+#define MICRON_BL 0x2
+#define MICRON_SIL 0x0
+#define MICRON_CASL 0x3
+#define MICRON_WBST 0x0
+#define MICRON_V_MR ((MICRON_WBST << 9) | (MICRON_CASL << 4) | \
+ (MICRON_SIL << 3) | (MICRON_BL))
+
/*
* NUMONYX part of IGEP v2 (165MHz optimized) 6.06ns
* ACTIMA
@@ -171,10 +198,15 @@ enum {
#define V_ACTIMA_165 INFINEON_V_ACTIMA_165
#define V_ACTIMB_165 INFINEON_V_ACTIMB_165
#endif
+
#ifdef CONFIG_OMAP3_MICRON_DDR
#define V_ACTIMA_165 MICRON_V_ACTIMA_165
#define V_ACTIMB_165 MICRON_V_ACTIMB_165
+#define V_MCFG MICRON_V_MCFG
+#define V_RFR_CTRL MICRON_V_RFR_CTRL
+#define V_MR MICRON_V_MR
#endif
+
#ifdef CONFIG_OMAP3_NUMONYX_DDR
#define V_ACTIMA_165 NUMONYX_V_ACTIMA_165
#define V_ACTIMB_165 NUMONYX_V_ACTIMB_165
@@ -184,6 +216,10 @@ enum {
#error "Please choose the right DDR type in config header"
#endif
+#if defined(CONFIG_SPL_BUILD) && (!defined(V_MCFG) || !defined(V_RFR_CTRL))
+#error "Please choose the right DDR type in config header"
+#endif
+
/*
* GPMC settings -
* Definitions is as per the following format
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V9 3/9] omap-common: add nand spl support
2011-08-08 13:11 ` [U-Boot] [PATCH V9 0/9] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 1/9] omap-common/omap4: relocate early UART clock setup Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 2/9] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
@ 2011-08-08 13:11 ` Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 4/9] spl: add NAND Library to new SPL Simon Schwarz
` (5 subsequent siblings)
8 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-08 13:11 UTC (permalink / raw)
To: u-boot
Add NAND support for the new SPL structure.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
This patch didn't exist before V2!
V2 changes:
ADD Some define-barriers for OMAP3 to only use NAND
ADD nand_load_image() - inits the OMAP gpmc, loads the images - parses the
header
CHG cosmetic
ADD do_reset() implementation for omap-common spl
ADD nand_copy_image to nand.h
ADD CPP barriers for mmc and nand support. The parts depending on library
support are only compiled if the respective library is included.
V3 changes:
ADD Comment why setup_clocks_for_console() isn't called for OMAP3
CHG cosmetic (deleted empty line)
CHG rename of NAND_MODE_HW to NAND_MODE_HW_ECC
DEL NAND_MODE_SW. Not used.
V4 changes:
CHG cosmetic - style problems
V5 changes:
CHG renamed nand_copy_image to nand_spl_load_image
CHG offs paramter of nand_spl_load_image is of type loff_t now
V6 changes:
ADD call to nand_deselect after loading the images
ADD nand_deselect to nand.h
V7 changes:
DEL some CONFIG_SPL_* relying on garbage collection now
ADD mmc_load_image and nand_load_image now have __attribute__((unused)) to
prevent warnings when the lib is not added to SPL
DEL do_reset() isn't used anymore
CHG header based loading in SPL
V8 changes:
DEL nand_spl_read_page is replaced by nand_spl_load_image with size=page size
V9 changes:
ADD comment to mark eMMC
ADD omap_boot_mode-function like in OMAP4
CHG boot_mode is now selected based on the boot device used
Based on:
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
---
arch/arm/cpu/armv7/omap-common/spl.c | 46 ++++++++++++++++++++++++++++++-
arch/arm/cpu/armv7/omap3/board.c | 50 ++++++++++++++++++++++++++++++++-
arch/arm/include/asm/omap_common.h | 31 +++++++++++++++++++++
include/nand.h | 3 ++
4 files changed, 127 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
index 1d301f4..53d10bf 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -26,6 +26,7 @@
#include <asm/u-boot.h>
#include <asm/utils.h>
#include <asm/arch/sys_proto.h>
+#include <nand.h>
#include <mmc.h>
#include <fat.h>
#include <timestamp_autogenerated.h>
@@ -173,7 +174,7 @@ end:
hang();
}
}
-
+static void mmc_load_image(void) __attribute__((unused));
static void mmc_load_image(void)
{
struct mmc *mmc;
@@ -207,12 +208,48 @@ static void mmc_load_image(void)
}
}
+#ifdef CONFIG_SPL_NAND_SUPPORT
+static void nand_load_image(void) __attribute__ ((unused));
+static void nand_load_image(void)
+{
+ struct image_header *header;
+
+ gpmc_init();
+ nand_init();
+
+ /*use CONFIG_SYS_TEXT_BASE as temporary storage area */
+ header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
+
+#ifdef CONFIG_NAND_ENV_DST
+ nand_spl_load_image(CONFIG_ENV_OFFSET,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ parse_image_header(header);
+ nand_spl_load_image(CONFIG_ENV_OFFSET, image_size,
+ (void *)image_load_addr);
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ parse_image_header(header);
+ nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, image_size,
+ (void *)image_load_addr);
+#endif
+#endif
+ /* Load u-boot */
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ parse_image_header(header);
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+ image_size, (void *)image_load_addr);
+ nand_deselect();
+}
+#endif /* CONFIG_SPL_NAND_SUPPORT */
void jump_to_image_no_args(void)
{
typedef void (*image_entry_noargs_t)(void)__attribute__ ((noreturn));
image_entry_noargs_t image_entry =
(image_entry_noargs_t) image_entry_point;
+ debug("image entry point: 0x%X\n", image_entry_point);
image_entry();
}
@@ -228,10 +265,17 @@ void board_init_r(gd_t *id, ulong dummy)
boot_device = omap_boot_device();
debug("boot device - %d\n", boot_device);
switch (boot_device) {
+#ifdef CONFIG_SPL_MMC_SUPPORT
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
mmc_load_image();
break;
+#endif
+#ifdef CONFIG_SPL_NAND_SUPPORT
+ case BOOT_DEVICE_NAND:
+ nand_load_image();
+ break;
+#endif
default:
printf("SPL: Un-supported Boot Device - %d!!!\n", boot_device);
hang();
diff --git a/arch/arm/cpu/armv7/omap3/board.c b/arch/arm/cpu/armv7/omap3/board.c
index 4aaf97b..39a17bc 100644
--- a/arch/arm/cpu/armv7/omap3/board.c
+++ b/arch/arm/cpu/armv7/omap3/board.c
@@ -39,6 +39,7 @@
#include <asm/cache.h>
#include <asm/armv7.h>
#include <asm/omap_gpio.h>
+#include <asm/omap_common.h>
/* Declarations */
extern omap3_sysinfo sysinfo;
@@ -56,6 +57,41 @@ static const struct gpio_bank gpio_bank_34xx[6] = {
const struct gpio_bank *const omap_gpio_bank = gpio_bank_34xx;
+#ifdef CONFIG_SPL_BUILD
+/*
+* We use static variables because global data is not ready yet.
+* Initialized data is available in SPL right from the beginning.
+* We would not typically need to save these parameters in regular
+* U-Boot. This is needed only in SPL at the moment.
+*/
+u32 omap3_boot_device = BOOT_DEVICE_NAND;
+
+/* auto boot mode detection is not possible for OMAP3 - hard code */
+u32 omap_boot_mode(void)
+{
+ switch (omap_boot_device()) {
+ case BOOT_DEVICE_MMC2:
+ return MMCSD_MODE_RAW;
+ case BOOT_DEVICE_MMC1:
+ return MMCSD_MODE_FAT;
+ break;
+ case BOOT_DEVICE_NAND:
+ return NAND_MODE_HW_ECC;
+ break;
+ default:
+ puts("spl: ERROR: unknown device - can't select boot mode\n");
+ hang();
+ }
+}
+
+u32 omap_boot_device(void)
+{
+ return omap3_boot_device;
+}
+
+#endif /* CONFIG_SPL_BUILD */
+
+
/******************************************************************************
* Routine: delay
* Description: spinning delay to use before udelay works
@@ -197,6 +233,10 @@ void s_init(void)
per_clocks_enable();
+#ifdef CONFIG_SPL_BUILD
+ preloader_console_init();
+#endif
+
if (!in_sdram)
mem_init();
}
@@ -245,7 +285,7 @@ void abort(void)
{
}
-#ifdef CONFIG_NAND_OMAP_GPMC
+#if defined(CONFIG_NAND_OMAP_GPMC) & !defined(CONFIG_SPL_BUILD)
/******************************************************************************
* OMAP3 specific command to switch between NAND HW and SW ecc
*****************************************************************************/
@@ -273,7 +313,7 @@ U_BOOT_CMD(
"[hw/sw] - Switch between NAND hardware (hw) or software (sw) ecc algorithm"
);
-#endif /* CONFIG_NAND_OMAP_GPMC */
+#endif /* CONFIG_NAND_OMAP_GPMC & !CONFIG_SPL_BUILD */
#ifdef CONFIG_DISPLAY_BOARDINFO
/**
@@ -402,3 +442,9 @@ void v7_outer_cache_disable(void)
omap3_update_aux_cr(0, 0x2);
}
#endif
+
+void omap_rev_string(char *omap_rev_string)
+{
+ sprintf(omap_rev_string, "OMAP3, sorry revision detection" \
+ " unimplemented");
+}
diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h
index d3cb857..015cede 100644
--- a/arch/arm/include/asm/omap_common.h
+++ b/arch/arm/include/asm/omap_common.h
@@ -37,6 +37,7 @@
void preloader_console_init(void);
/* Boot device */
+#ifdef CONFIG_OMAP44XX /* OMAP4 */
#define BOOT_DEVICE_NONE 0
#define BOOT_DEVICE_XIP 1
#define BOOT_DEVICE_XIPWAIT 2
@@ -44,13 +45,43 @@ void preloader_console_init(void);
#define BOOT_DEVICE_ONE_NAND 4
#define BOOT_DEVICE_MMC1 5
#define BOOT_DEVICE_MMC2 6
+#elif CONFIG_OMAP34XX /* OMAP3 */
+#define BOOT_DEVICE_NONE 0
+#define BOOT_DEVICE_XIP 1
+#define BOOT_DEVICE_NAND 2
+#define BOOT_DEVICE_ONE_NAND 3
+#define BOOT_DEVICE_MMC2 5 /*emmc*/
+#define BOOT_DEVICE_MMC1 6
+#define BOOT_DEVICE_XIPWAIT 7
+#endif
/* Boot type */
#define MMCSD_MODE_UNDEFINED 0
#define MMCSD_MODE_RAW 1
#define MMCSD_MODE_FAT 2
+#define NAND_MODE_HW_ECC 3
+
+struct spl_image_info {
+ const char *name;
+ u8 os;
+ u32 load_addr;
+ u32 entry_point;
+ u32 size;
+};
+
+extern struct spl_image_info spl_image;
u32 omap_boot_device(void);
u32 omap_boot_mode(void);
+
+/* SPL common function s*/
+void spl_parse_image_header(const struct image_header *header);
+
+/* NAND SPL functions */
+void spl_nand_load_image(void);
+
+/* MMC SPL functions */
+void spl_mmc_load_image(void);
+
#endif /* _OMAP_COMMON_H_ */
diff --git a/include/nand.h b/include/nand.h
index 8d94b5c..3c5ef4e 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -132,6 +132,9 @@ int nand_lock( nand_info_t *meminfo, int tight );
int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
+void nand_spl_load_image(loff_t offs, unsigned int size, uchar *dst);
+void nand_deselect(void);
+
#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
void board_nand_select_device(struct nand_chip *nand, int chip);
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V9 4/9] spl: add NAND Library to new SPL
2011-08-08 13:11 ` [U-Boot] [PATCH V9 0/9] OMAP3 and devkit8000 SPL support Simon Schwarz
` (2 preceding siblings ...)
2011-08-08 13:11 ` [U-Boot] [PATCH V9 3/9] omap-common: add nand spl support Simon Schwarz
@ 2011-08-08 13:11 ` Simon Schwarz
2011-08-08 23:34 ` Scott Wood
2011-08-08 13:11 ` [U-Boot] [PATCH V9 5/9] spl: Add POWER library to new spl Simon Schwarz
` (4 subsequent siblings)
8 siblings, 1 reply; 134+ messages in thread
From: Simon Schwarz @ 2011-08-08 13:11 UTC (permalink / raw)
To: u-boot
Adds NAND library to SPL.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
CHG Default to HW ecc in SPL build
ADD nand_read_buf16 function, read buffer
ADD omap_dev_ready function, indicte if chip is ready
V2 changes:
DEL GPMC_WAIT0_PIN_ACTIVE define
CHG omap_dev_ready() renamed to omap_spl_dev_ready(), does not use the
GPMC_WAIT0_PIN_ACTIVE-define anymore
CHG ogpmc_read_buf16 renamed omap_spl_read_buf16
ADD omap_spl_read_buf, 8x buf read function
ADD CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to SPL
CHG cosmetic
CHG nand_base and nand_bbt aren't needed for SPL anymore
CHG omap_nand_switch_ecc is not compiled for SPL
ADD entry for CONFIG_SPL_POWER_SUPPORT and CONFIG_SPL_NAND_SUPPORT to README.SPL
V3 changes:
DEL cosmetic (empty line)
V4 changes:
nothing
V5 changes:
CHG nand_ecc.o is only compiled for SPL if CONFIG_OMAP34XX is set
V6 changes:
ADD nand_spl.c - git add, finally
DEL nand_ecc barrier ifdef for OMAP3
V7 changes:
CHG nand_read_buf and nand_read_buf16 - removed static modifier
ADD nand_base.c to SPL
DEL omap_spl_read_buf16 and omap_spl_read_buf from omap_gpmc - now use the
functions of nand_base.de
ADD nand_read_buf and nand_read_buf16 to nand.h
CHG commit message to reflect that also POWER library is added
CHG renamed nand_spl.c to nand_spl_simple.c
CHG removed mtd from all interfaces of the nand_spl_simple
CHG nand_load image is now nand_spl_load_image
CHG removed comment on the transition from nand_boot to nand_spl_simple
CHG all offset parameters are now of type loff_t
CHG moved power library adding to an own patch
V8 changes:
CHG Added CONFIG_SPL_NAND_SIMPLE
DEL nand_spl_read_page is replaced by nand_spl_load_image with size=page size
V9 changes:
FIX readded config_spl_simple.c - somehow sneaked off the repo...
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This Patch is related to "[U-Boot,4/5] devkit8000 nand_spl: Add SPL NAND support
to omap_gpmc driver"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102115) in V1
---
doc/README.SPL | 1 +
drivers/mtd/nand/Makefile | 10 ++-
drivers/mtd/nand/nand_base.c | 4 +-
drivers/mtd/nand/nand_spl_simple.c | 245 ++++++++++++++++++++++++++++++++++++
drivers/mtd/nand/omap_gpmc.c | 27 ++++
include/nand.h | 5 +-
spl/Makefile | 1 +
7 files changed, 288 insertions(+), 5 deletions(-)
create mode 100644 drivers/mtd/nand/nand_spl_simple.c
diff --git a/doc/README.SPL b/doc/README.SPL
index ce8e19f..ef946ce 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -60,3 +60,4 @@ CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
CONFIG_SPL_SPI_SUPPORT (drivers/spi/libspi.o)
CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
+CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile
index 8b598f6..b6a7886 100644
--- a/drivers/mtd/nand/Makefile
+++ b/drivers/mtd/nand/Makefile
@@ -26,12 +26,18 @@ include $(TOPDIR)/config.mk
LIB := $(obj)libnand.o
ifdef CONFIG_CMD_NAND
+ifdef CONFIG_SPL_BUILD
+ifdef CONFIG_SPL_NAND_SIMPLE
+COBJS-y += nand_spl_simple.o
+endif
+else
COBJS-y += nand.o
-COBJS-y += nand_base.o
COBJS-y += nand_bbt.o
-COBJS-y += nand_ecc.o
COBJS-y += nand_ids.o
COBJS-y += nand_util.o
+endif
+COBJS-y += nand_ecc.o
+COBJS-y += nand_base.o
COBJS-$(CONFIG_NAND_ATMEL) += atmel_nand.o
COBJS-$(CONFIG_DRIVER_NAND_BFIN) += bfin_nand.o
diff --git a/drivers/mtd/nand/nand_base.c b/drivers/mtd/nand/nand_base.c
index 1a95a91..e7dfcb1 100644
--- a/drivers/mtd/nand/nand_base.c
+++ b/drivers/mtd/nand/nand_base.c
@@ -213,7 +213,7 @@ static void nand_write_buf(struct mtd_info *mtd, const uint8_t *buf, int len)
*
* Default read function for 8bit buswith
*/
-static void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
+void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len)
{
int i;
struct nand_chip *chip = mtd->priv;
@@ -269,7 +269,7 @@ static void nand_write_buf16(struct mtd_info *mtd, const uint8_t *buf, int len)
*
* Default read function for 16bit buswith
*/
-static void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
+void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len)
{
int i;
struct nand_chip *chip = mtd->priv;
diff --git a/drivers/mtd/nand/nand_spl_simple.c b/drivers/mtd/nand/nand_spl_simple.c
new file mode 100644
index 0000000..71491d4
--- /dev/null
+++ b/drivers/mtd/nand/nand_spl_simple.c
@@ -0,0 +1,245 @@
+/*
+ * (C) Copyright 2006-2008
+ * Stefan Roese, DENX Software Engineering, sr at denx.de.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include <common.h>
+#include <nand.h>
+#include <asm/io.h>
+
+static int nand_ecc_pos[] = CONFIG_SYS_NAND_ECCPOS;
+static nand_info_t mtd;
+static struct nand_chip nand_chip;
+
+#if (CONFIG_SYS_NAND_PAGE_SIZE <= 512)
+/*
+ * NAND command for small page NAND devices (512)
+ */
+static int nand_command(int block, int page, uint32_t offs,
+ u8 cmd)
+{
+ struct nand_chip *this = mtd.priv;
+ int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+
+ while (!this->dev_ready(&mtd))
+ ;
+
+ /* Begin command latch cycle */
+ this->cmd_ctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
+ /* Set ALE and clear CLE to start address cycle */
+ /* Column address */
+ this->cmd_ctrl(&mtd, offs, NAND_CTRL_ALE | NAND_CTRL_CHANGE);
+ this->cmd_ctrl(&mtd, page_addr & 0xff, NAND_CTRL_ALE); /* A[16:9] */
+ this->cmd_ctrl(&mtd, (page_addr >> 8) & 0xff,
+ NAND_CTRL_ALE); /* A[24:17] */
+#ifdef CONFIG_SYS_NAND_4_ADDR_CYCLE
+ /* One more address cycle for devices > 32MiB */
+ this->cmd_ctrl(&mtd, (page_addr >> 16) & 0x0f,
+ NAND_CTRL_ALE); /* A[28:25] */
+#endif
+ /* Latch in address */
+ this->cmd_ctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
+
+ /*
+ * Wait a while for the data to be ready
+ */
+ while (!this->dev_ready(&mtd))
+ ;
+
+ return 0;
+}
+#else
+/*
+ * NAND command for large page NAND devices (2k)
+ */
+static int nand_command(int block, int page, uint32_t offs,
+ u8 cmd)
+{
+ struct nand_chip *this = mtd.priv;
+ int page_addr = page + block * CONFIG_SYS_NAND_PAGE_COUNT;
+ void (*hwctrl)(struct mtd_info *mtd, int cmd,
+ unsigned int ctrl) = this->cmd_ctrl;
+
+ while (!this->dev_ready(&mtd))
+ ;
+
+ /* Emulate NAND_CMD_READOOB */
+ if (cmd == NAND_CMD_READOOB) {
+ offs += CONFIG_SYS_NAND_PAGE_SIZE;
+ cmd = NAND_CMD_READ0;
+ }
+
+ /* Shift the offset from byte addressing to word addressing. */
+ if (this->options & NAND_BUSWIDTH_16)
+ offs >>= 1;
+
+ /* Begin command latch cycle */
+ hwctrl(&mtd, cmd, NAND_CTRL_CLE | NAND_CTRL_CHANGE);
+ /* Set ALE and clear CLE to start address cycle */
+ /* Column address */
+ hwctrl(&mtd, offs & 0xff,
+ NAND_CTRL_ALE | NAND_CTRL_CHANGE); /* A[7:0] */
+ hwctrl(&mtd, (offs >> 8) & 0xff, NAND_CTRL_ALE); /* A[11:9] */
+ /* Row address */
+ hwctrl(&mtd, (page_addr & 0xff), NAND_CTRL_ALE); /* A[19:12] */
+ hwctrl(&mtd, ((page_addr >> 8) & 0xff),
+ NAND_CTRL_ALE); /* A[27:20] */
+#ifdef CONFIG_SYS_NAND_5_ADDR_CYCLE
+ /* One more address cycle for devices > 128MiB */
+ hwctrl(&mtd, (page_addr >> 16) & 0x0f,
+ NAND_CTRL_ALE); /* A[31:28] */
+#endif
+ /* Latch in address */
+ hwctrl(&mtd, NAND_CMD_READSTART,
+ NAND_CTRL_CLE | NAND_CTRL_CHANGE);
+ hwctrl(&mtd, NAND_CMD_NONE, NAND_NCE | NAND_CTRL_CHANGE);
+
+ /*
+ * Wait a while for the data to be ready
+ */
+ while (!this->dev_ready(&mtd))
+ ;
+
+ return 0;
+}
+#endif
+
+static int nand_is_bad_block(int block)
+{
+ struct nand_chip *this = mtd.priv;
+
+ nand_command(block, 0, CONFIG_SYS_NAND_BAD_BLOCK_POS,
+ NAND_CMD_READOOB);
+
+ /*
+ * Read one byte (or two if it's a 16 bit chip).
+ */
+ if (this->options & NAND_BUSWIDTH_16) {
+ if (readw(this->IO_ADDR_R) != 0xffff)
+ return 1;
+ } else {
+ if (readb(this->IO_ADDR_R) != 0xff)
+ return 1;
+ }
+
+ return 0;
+}
+
+static int nand_read_page(int block, int page, void *dst)
+{
+ struct nand_chip *this = mtd.priv;
+ u_char *ecc_calc;
+ u_char *ecc_code;
+ u_char *oob_data;
+ int i;
+ int eccsize = CONFIG_SYS_NAND_ECCSIZE;
+ int eccbytes = CONFIG_SYS_NAND_ECCBYTES;
+ int eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
+ uint8_t *p = dst;
+ int stat;
+
+ nand_command(block, page, 0, NAND_CMD_READ0);
+
+ /* No malloc available for now, just use some temporary locations
+ * in SDRAM
+ */
+ ecc_calc = (u_char *)(CONFIG_SYS_SDRAM_BASE + 0x10000);
+ ecc_code = ecc_calc + 0x100;
+ oob_data = ecc_calc + 0x200;
+
+ for (i = 0; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+ this->ecc.hwctl(&mtd, NAND_ECC_READ);
+ this->read_buf(&mtd, p, eccsize);
+ this->ecc.calculate(&mtd, p, &ecc_calc[i]);
+ }
+ this->read_buf(&mtd, oob_data, CONFIG_SYS_NAND_OOBSIZE);
+
+ /* Pick the ECC bytes out of the oob data */
+ for (i = 0; i < CONFIG_SYS_NAND_ECCTOTAL; i++)
+ ecc_code[i] = oob_data[nand_ecc_pos[i]];
+
+ eccsteps = CONFIG_SYS_NAND_ECCSTEPS;
+ p = dst;
+
+ for (i = 0 ; eccsteps; eccsteps--, i += eccbytes, p += eccsize) {
+ /* No chance to do something with the possible error message
+ * from correct_data(). We just hope that all possible errors
+ * are corrected by this routine.
+ */
+ stat = this->ecc.correct(&mtd, p, &ecc_code[i], &ecc_calc[i]);
+ }
+
+ return 0;
+}
+
+int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst)
+{
+ unsigned int block, lastblock;
+ unsigned int page;
+
+ /*
+ * offs has to be aligned to a page address!
+ */
+ block = offs / CONFIG_SYS_NAND_BLOCK_SIZE;
+ lastblock = (offs + size - 1) / CONFIG_SYS_NAND_BLOCK_SIZE;
+ page = (offs % CONFIG_SYS_NAND_BLOCK_SIZE) / CONFIG_SYS_NAND_PAGE_SIZE;
+
+ while (block <= lastblock) {
+ if (!nand_is_bad_block(block)) {
+ /*
+ * Skip bad blocks
+ */
+ while (page < CONFIG_SYS_NAND_PAGE_COUNT) {
+ nand_read_page(block, page, dst);
+ dst += CONFIG_SYS_NAND_PAGE_SIZE;
+ page++;
+ }
+
+ page = 0;
+ } else {
+ lastblock++;
+ }
+
+ block++;
+ }
+
+ return 0;
+}
+
+/* nand_init() - initialize data to make nand usable by SPL */
+void nand_init(void)
+{
+ /*
+ * Init board specific nand support
+ */
+ mtd.priv = &nand_chip;
+ nand_chip.IO_ADDR_R = nand_chip.IO_ADDR_W =
+ (void __iomem *)CONFIG_SYS_NAND_BASE;
+ nand_chip.options = 0;
+ board_nand_init(&nand_chip);
+
+ if (nand_chip.select_chip)
+ nand_chip.select_chip(&mtd, 0);
+}
+
+/* Unselect after operation */
+void nand_deselect(void)
+{
+ if (nand_chip.select_chip)
+ nand_chip.select_chip(&mtd, -1);
+}
diff --git a/drivers/mtd/nand/omap_gpmc.c b/drivers/mtd/nand/omap_gpmc.c
index 99b9cef..5bbec48 100644
--- a/drivers/mtd/nand/omap_gpmc.c
+++ b/drivers/mtd/nand/omap_gpmc.c
@@ -61,6 +61,14 @@ static void omap_nand_hwcontrol(struct mtd_info *mtd, int32_t cmd,
writeb(cmd, this->IO_ADDR_W);
}
+#ifdef CONFIG_SPL_BUILD
+/* Check wait pin as dev ready indicator */
+int omap_spl_dev_ready(struct mtd_info *mtd)
+{
+ return gpmc_cfg->status & (1 << 8);
+}
+#endif
+
/*
* omap_hwecc_init - Initialize the Hardware ECC for NAND flash in
* GPMC controller
@@ -224,6 +232,7 @@ static void omap_enable_hwecc(struct mtd_info *mtd, int32_t mode)
}
}
+#ifndef CONFIG_SPL_BUILD
/*
* omap_nand_switch_ecc - switch the ECC operation b/w h/w ecc and s/w ecc.
* The default is to come up on s/w ecc
@@ -280,6 +289,7 @@ void omap_nand_switch_ecc(int32_t hardware)
nand->options &= ~NAND_OWN_BUFFERS;
}
+#endif /* CONFIG_SPL_BUILD */
/*
* Board-specific NAND initialization. The following members of the
@@ -338,7 +348,24 @@ int board_nand_init(struct nand_chip *nand)
nand->chip_delay = 100;
/* Default ECC mode */
+#ifndef CONFIG_SPL_BUILD
nand->ecc.mode = NAND_ECC_SOFT;
+#else
+ nand->ecc.mode = NAND_ECC_HW;
+ nand->ecc.layout = &hw_nand_oob;
+ nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
+ nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
+ nand->ecc.hwctl = omap_enable_hwecc;
+ nand->ecc.correct = omap_correct_data;
+ nand->ecc.calculate = omap_calculate_ecc;
+ omap_hwecc_init(nand);
+
+ if (nand->options & NAND_BUSWIDTH_16)
+ nand->read_buf = nand_read_buf16;
+ else
+ nand->read_buf = nand_read_buf;
+ nand->dev_ready = omap_spl_dev_ready;
+#endif
return 0;
}
diff --git a/include/nand.h b/include/nand.h
index 3c5ef4e..b4140794 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -132,9 +132,12 @@ int nand_lock( nand_info_t *meminfo, int tight );
int nand_unlock( nand_info_t *meminfo, ulong start, ulong length );
int nand_get_lock_status(nand_info_t *meminfo, loff_t offset);
-void nand_spl_load_image(loff_t offs, unsigned int size, uchar *dst);
+int nand_spl_load_image(uint32_t offs, unsigned int size, void *dst);
void nand_deselect(void);
+void nand_read_buf16(struct mtd_info *mtd, uint8_t *buf, int len);
+void nand_read_buf(struct mtd_info *mtd, uint8_t *buf, int len);
+
#ifdef CONFIG_SYS_NAND_SELECT_DEVICE
void board_nand_select_device(struct nand_chip *nand, int chip);
#endif
diff --git a/spl/Makefile b/spl/Makefile
index 87f13f6..17d4f7f 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -46,6 +46,7 @@ LIBS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/libspi_flash.o
LIBS-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/libspi.o
LIBS-$(CONFIG_SPL_FAT_SUPPORT) += fs/fat/libfat.o
LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o
+LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/libnand.o
ifeq ($(SOC),omap3)
LIBS-y += $(CPUDIR)/omap-common/libomap-common.o
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V9 5/9] spl: Add POWER library to new spl
2011-08-08 13:11 ` [U-Boot] [PATCH V9 0/9] OMAP3 and devkit8000 SPL support Simon Schwarz
` (3 preceding siblings ...)
2011-08-08 13:11 ` [U-Boot] [PATCH V9 4/9] spl: add NAND Library to new SPL Simon Schwarz
@ 2011-08-08 13:11 ` Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 6/9] omap3: new SPL structure support Simon Schwarz
` (3 subsequent siblings)
8 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-08 13:11 UTC (permalink / raw)
To: u-boot
Adds power library to the new spl
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
Didn't exist before V7
V8 changes:
nothing
V9 changes:
nothing
---
doc/README.SPL | 1 +
spl/Makefile | 1 +
2 files changed, 2 insertions(+), 0 deletions(-)
diff --git a/doc/README.SPL b/doc/README.SPL
index ef946ce..2987f43 100644
--- a/doc/README.SPL
+++ b/doc/README.SPL
@@ -60,4 +60,5 @@ CONFIG_SPL_SPI_FLASH_SUPPORT (drivers/mtd/spi/libspi_flash.o)
CONFIG_SPL_SPI_SUPPORT (drivers/spi/libspi.o)
CONFIG_SPL_FAT_SUPPORT (fs/fat/libfat.o)
CONFIG_SPL_LIBGENERIC_SUPPORT (lib/libgeneric.o)
+CONFIG_SPL_POWER_SUPPORT (drivers/power/libpower.o)
CONFIG_SPL_NAND_SUPPORT (drivers/mtd/nand/libnand.o)
diff --git a/spl/Makefile b/spl/Makefile
index 17d4f7f..0c0d3c4 100644
--- a/spl/Makefile
+++ b/spl/Makefile
@@ -46,6 +46,7 @@ LIBS-$(CONFIG_SPL_SPI_FLASH_SUPPORT) += drivers/mtd/spi/libspi_flash.o
LIBS-$(CONFIG_SPL_SPI_SUPPORT) += drivers/spi/libspi.o
LIBS-$(CONFIG_SPL_FAT_SUPPORT) += fs/fat/libfat.o
LIBS-$(CONFIG_SPL_LIBGENERIC_SUPPORT) += lib/libgeneric.o
+LIBS-$(CONFIG_SPL_POWER_SUPPORT) += drivers/power/libpower.o
LIBS-$(CONFIG_SPL_NAND_SUPPORT) += drivers/mtd/nand/libnand.o
ifeq ($(SOC),omap3)
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V9 6/9] omap3: new SPL structure support
2011-08-08 13:11 ` [U-Boot] [PATCH V9 0/9] OMAP3 and devkit8000 SPL support Simon Schwarz
` (4 preceding siblings ...)
2011-08-08 13:11 ` [U-Boot] [PATCH V9 5/9] spl: Add POWER library to new spl Simon Schwarz
@ 2011-08-08 13:11 ` Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 7/9] devkit8000: Add nand-spl support for new SPL Simon Schwarz
` (2 subsequent siblings)
8 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-08 13:11 UTC (permalink / raw)
To: u-boot
Support for the new spl structure. Using the interface defined by Aneesh V for
OMAP4
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD support for early console output in SPL
V2 changes:
ADD include omap_common.h in board.c
ADD implement new omap common interface omap_boot_device, omap_boot_mode and
omap_rev_string (very basic)
CHG cosmetic
CHG Don't add ecc switch command in SPL
ADD save_boot_params stump with warning to implement it
V3 changes:
none
V4 changes:
CHG cosmetic - corrected style problem
V5 changes:
nothing
V6 changes:
nothing
V7 changes:
ADD copied config.mk from OMAP4 to OMAP3
V8 changes:
CHG boot_mode can't be detected on OMAP3 so the function is not needed
V9 changes:
nothing
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is in some parts a anccesstor of "[U-Boot,2/5] devkit8000 nand_spl: omap3
support nand_spl boot"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102114) in V1
---
arch/arm/cpu/armv7/omap3/config.mk | 30 +++++++++++++++++++++++++++
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 5 ++++
arch/arm/include/asm/arch-omap3/sys_proto.h | 1 +
3 files changed, 36 insertions(+), 0 deletions(-)
create mode 100644 arch/arm/cpu/armv7/omap3/config.mk
diff --git a/arch/arm/cpu/armv7/omap3/config.mk b/arch/arm/cpu/armv7/omap3/config.mk
new file mode 100644
index 0000000..b34fa64
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap3/config.mk
@@ -0,0 +1,30 @@
+#
+# Copyright 2011 Linaro Limited
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# (C) Copyright 2010
+# Texas Instruments, <www.ti.com>
+#
+# Aneesh V <aneesh@ti.com>
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# GNU General Public License for more details.
+#
+# You should have received a copy of the GNU General Public License
+# along with this program; if not, write to the Free Software
+# Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+# MA 02111-1307 USA
+#
+ifdef CONFIG_SPL_BUILD
+ALL-y += $(OBJTREE)/MLO
+else
+ALL-y += $(obj)u-boot.img
+endif
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index 67e8ceb..48a7ec6 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -35,6 +35,11 @@
_TEXT_BASE:
.word CONFIG_SYS_TEXT_BASE /* sdram load addr from config.mk */
+.global save_boot_params
+save_boot_params:
+ #warning "Please implement save_boot_params for OMAP3"
+ bx lr
+
.global omap3_gp_romcode_call
omap3_gp_romcode_call:
PUSH {r4-r12, lr} @ Save all registers from ROM code!
diff --git a/arch/arm/include/asm/arch-omap3/sys_proto.h b/arch/arm/include/asm/arch-omap3/sys_proto.h
index 995e7cb..7b60051 100644
--- a/arch/arm/include/asm/arch-omap3/sys_proto.h
+++ b/arch/arm/include/asm/arch-omap3/sys_proto.h
@@ -71,4 +71,5 @@ void power_init_r(void);
void dieid_num_r(void);
void do_omap3_emu_romcode_call(u32 service_id, u32 parameters);
void omap3_gp_romcode_call(u32 service_id, u32 parameter);
+void omap_rev_string(char *omap_rev_string);
#endif
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V9 7/9] devkit8000: Add nand-spl support for new SPL
2011-08-08 13:11 ` [U-Boot] [PATCH V9 0/9] OMAP3 and devkit8000 SPL support Simon Schwarz
` (5 preceding siblings ...)
2011-08-08 13:11 ` [U-Boot] [PATCH V9 6/9] omap3: new SPL structure support Simon Schwarz
@ 2011-08-08 13:11 ` Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 8/9] omap3: implement boot parameter saving Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 9/9] omap-common: reorganize spl.c Simon Schwarz
8 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-08 13:11 UTC (permalink / raw)
To: u-boot
Add NAND SPL support to the devkit8000 config
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
V1 changes:
ADD devkit8000_nand to board.cfg
ADD nand_spl Makefile, llinker script, spl-devkit8000.c
ADD config ecc, SRAM, SPL to board config
ADD CONFIG_SYS_SRAM_START and _SIZE to board config
ADD CONFIG_SYS_SPL_TEXT_BASE, _MAX_SIZE and SPL_STACK to board config
V2 changes:
ADD CONFIG_SPL and LIBCOMMON, LIBDISK, I2C, LIBGENERIC, SERIAL, POWER, NAND and
CONFIG_SPL_LDSCRIPT to board config
CHG renamed CONFIG_SYS_SPL_* to CONFIG_SPL_*
ADD CONFIG_SYS_NAND_U_BOOT_START, _OFFS, _SIZE, _DST to board config: Where to
expect u-boot and where to load it.
ADD some barrier to not build board_eth_init in SPL
DEL no changes to board.cfg
DEL everything used the old nand_spl layout (Makefile, linker script,
spl-devkit8000.c)
CHG cosmetic
V3 changes:
CHG Deleted wrong comment
V4 changes:
CHG CONFIG_SYS_SRAM_SIZE NOW has the right value
CHG cosmetic - corrected style problems
V5 changes:
nothing
V6 changes:
nothing
V7 changes:
ADD MMC dummy defines to prevent #ifedf clutter in spl.c
DEL CONFIG_SYS_NAND_U_BOOT_DST
V8 changes:
ADD CONFIG_SPL_NAND_SIMPLE
V9 changes:
DEL unused and untested MMC bootconfig
Transition from V1 to V2 also includes that this patch is now based on
- the new SPL layout by Aneesh V and Daniel Schwierzeck
- the OMAP4 SPL patches by Aneesh V
This is the successor of "[U-Boot,5/5] devkit8000 nand_spl: add nand_spl
support"
(http://article.gmane.org/gmane.comp.boot-loaders.u-boot/102111)
---
board/timll/devkit8000/devkit8000.c | 2 +-
include/configs/devkit8000.h | 46 +++++++++++++++++++++++++++++++++++
2 files changed, 47 insertions(+), 1 deletions(-)
diff --git a/board/timll/devkit8000/devkit8000.c b/board/timll/devkit8000/devkit8000.c
index 95afaaa..9b53742 100644
--- a/board/timll/devkit8000/devkit8000.c
+++ b/board/timll/devkit8000/devkit8000.c
@@ -119,7 +119,7 @@ void set_muxconf_regs(void)
MUX_DEVKIT8000();
}
-#ifdef CONFIG_DRIVER_DM9000
+#if defined(CONFIG_DRIVER_DM9000) & !defined(CONFIG_SPL_BUILD)
/*
* Routine: board_eth_init
* Description: Setting up the Ethernet hardware.
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index 125c690..9cbdb5d 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -307,4 +307,50 @@
CONFIG_SYS_INIT_RAM_SIZE - \
GENERATED_GBL_DATA_SIZE)
+/* SRAM config */
+#define CONFIG_SYS_SRAM_START 0x40200000
+#define CONFIG_SYS_SRAM_SIZE 0x10000
+
+/* Defines for SPL */
+#define CONFIG_SPL
+#define CONFIG_SPL_NAND_SIMPLE
+
+#define CONFIG_SPL_LIBCOMMON_SUPPORT
+#define CONFIG_SPL_LIBDISK_SUPPORT
+#define CONFIG_SPL_I2C_SUPPORT
+#define CONFIG_SPL_LIBGENERIC_SUPPORT
+#define CONFIG_SPL_SERIAL_SUPPORT
+#define CONFIG_SPL_POWER_SUPPORT
+#define CONFIG_SPL_NAND_SUPPORT
+#define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
+
+#define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/
+#define CONFIG_SPL_MAX_SIZE 0xB400 /* 45 K */
+#define CONFIG_SPL_STACK LOW_LEVEL_SRAM_STACK
+
+#define CONFIG_SPL_BSS_START_ADDR 0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
+#define CONFIG_SPL_BSS_MAX_SIZE 0x80000
+
+/* NAND boot config */
+#define CONFIG_SYS_NAND_PAGE_COUNT 64
+#define CONFIG_SYS_NAND_PAGE_SIZE 2048
+#define CONFIG_SYS_NAND_OOBSIZE 64
+#define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024)
+#define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
+#define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\
+ 10, 11, 12, 13}
+
+#define CONFIG_SYS_NAND_ECCSIZE 512
+#define CONFIG_SYS_NAND_ECCBYTES 3
+
+#define CONFIG_SYS_NAND_ECCSTEPS (CONFIG_SYS_NAND_PAGE_SIZE / \
+ CONFIG_SYS_NAND_ECCSIZE)
+#define CONFIG_SYS_NAND_ECCTOTAL (CONFIG_SYS_NAND_ECCBYTES * \
+ CONFIG_SYS_NAND_ECCSTEPS)
+
+#define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
+
+#define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000
+#define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000
+
#endif /* __CONFIG_H */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V9 8/9] omap3: implement boot parameter saving
2011-08-08 13:11 ` [U-Boot] [PATCH V9 0/9] OMAP3 and devkit8000 SPL support Simon Schwarz
` (6 preceding siblings ...)
2011-08-08 13:11 ` [U-Boot] [PATCH V9 7/9] devkit8000: Add nand-spl support for new SPL Simon Schwarz
@ 2011-08-08 13:11 ` Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 9/9] omap-common: reorganize spl.c Simon Schwarz
8 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-08 13:11 UTC (permalink / raw)
To: u-boot
Implements the saving of boot params passed by OMAP3 ROM code.
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
Didn't exist before V8
V9 changes:
nothing
---
arch/arm/cpu/armv7/omap-common/spl.c | 6 +++++-
arch/arm/cpu/armv7/omap3/lowlevel_init.S | 9 +++++++--
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
index 53d10bf..3dd8e0d 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -194,8 +194,12 @@ static void mmc_load_image(void)
printf("spl: mmc init failed: err - %d\n", err);
hang();
}
-
+/* For OMAP3 there is no automatic boot mode detection */
+#ifdef CONFIG_OMAP34XX
+ boot_mode = CONFIG_SYS_MMC_SD_BOOTMODE;
+#else
boot_mode = omap_boot_mode();
+#endif
if (boot_mode == MMCSD_MODE_RAW) {
debug("boot mode - RAW\n");
mmc_load_image_raw(mmc);
diff --git a/arch/arm/cpu/armv7/omap3/lowlevel_init.S b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
index 48a7ec6..a308ebd 100644
--- a/arch/arm/cpu/armv7/omap3/lowlevel_init.S
+++ b/arch/arm/cpu/armv7/omap3/lowlevel_init.S
@@ -37,8 +37,13 @@ _TEXT_BASE:
.global save_boot_params
save_boot_params:
- #warning "Please implement save_boot_params for OMAP3"
- bx lr
+#ifdef CONFIG_SPL_BUILD
+ ldr r4, =omap3_boot_device
+ ldr r5, [r0, #0x4]
+ and r5, r5, #0xff
+ str r5, [r4]
+#endif
+ bx lr
.global omap3_gp_romcode_call
omap3_gp_romcode_call:
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V9 9/9] omap-common: reorganize spl.c
2011-08-08 13:11 ` [U-Boot] [PATCH V9 0/9] OMAP3 and devkit8000 SPL support Simon Schwarz
` (7 preceding siblings ...)
2011-08-08 13:11 ` [U-Boot] [PATCH V9 8/9] omap3: implement boot parameter saving Simon Schwarz
@ 2011-08-08 13:11 ` Simon Schwarz
8 siblings, 0 replies; 134+ messages in thread
From: Simon Schwarz @ 2011-08-08 13:11 UTC (permalink / raw)
To: u-boot
split-up spl.c into spl.c, spl_mmc.c and spl_nand.c. This avoids problems
with missing defines if a board does not use mmc or nand. This includes
adding spl_ prefix to some functions which are now public. spl_image_t is now
a public type. Added some of the common functions to omap-common.h
Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
---
Didn't exist before V8
V9 changes:
FIX typo in commit message
ADD using omap_boot_mode() now
---
arch/arm/cpu/armv7/omap-common/Makefile | 6 +
arch/arm/cpu/armv7/omap-common/spl.c | 197 +++--------------------------
arch/arm/cpu/armv7/omap-common/spl_mmc.c | 150 ++++++++++++++++++++++
arch/arm/cpu/armv7/omap-common/spl_nand.c | 71 +++++++++++
4 files changed, 247 insertions(+), 177 deletions(-)
create mode 100644 arch/arm/cpu/armv7/omap-common/spl_mmc.c
create mode 100644 arch/arm/cpu/armv7/omap-common/spl_nand.c
diff --git a/arch/arm/cpu/armv7/omap-common/Makefile b/arch/arm/cpu/armv7/omap-common/Makefile
index ea9f8ec..0b96b47 100644
--- a/arch/arm/cpu/armv7/omap-common/Makefile
+++ b/arch/arm/cpu/armv7/omap-common/Makefile
@@ -33,6 +33,12 @@ COBJS += gpio.o
ifdef CONFIG_SPL_BUILD
COBJS += spl.o
+ifdef CONFIG_SPL_NAND_SUPPORT
+COBJS += spl_nand.o
+endif
+ifdef CONFIG_SPL_MMC_SUPPORT
+COBJS += spl_mmc.o
+endif
endif
SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/armv7/omap-common/spl.c b/arch/arm/cpu/armv7/omap-common/spl.c
index 3dd8e0d..c76fea6 100644
--- a/arch/arm/cpu/armv7/omap-common/spl.c
+++ b/arch/arm/cpu/armv7/omap-common/spl.c
@@ -38,14 +38,11 @@
DECLARE_GLOBAL_DATA_PTR;
+struct spl_image_info spl_image;
+
/* Define global data structure pointer to it*/
static gd_t gdata __attribute__ ((section(".data")));
static bd_t bdata __attribute__ ((section(".data")));
-static const char *image_name;
-static u8 image_os;
-static u32 image_load_addr;
-static u32 image_entry_point;
-static u32 image_size;
inline void hang(void)
{
@@ -66,194 +63,40 @@ void board_init_f(ulong dummy)
relocate_code(CONFIG_SPL_STACK, &gdata, CONFIG_SPL_TEXT_BASE);
}
-#ifdef CONFIG_GENERIC_MMC
-int board_mmc_init(bd_t *bis)
-{
- switch (omap_boot_device()) {
- case BOOT_DEVICE_MMC1:
- omap_mmc_init(0);
- break;
- case BOOT_DEVICE_MMC2:
- omap_mmc_init(1);
- break;
- }
- return 0;
-}
-#endif
-
-static void parse_image_header(const struct image_header *header)
+void spl_parse_image_header(const struct image_header *header)
{
u32 header_size = sizeof(struct image_header);
if (__be32_to_cpu(header->ih_magic) == IH_MAGIC) {
- image_size = __be32_to_cpu(header->ih_size) + header_size;
- image_entry_point = __be32_to_cpu(header->ih_load);
+ spl_image.size = __be32_to_cpu(header->ih_size) + header_size;
+ spl_image.entry_point = __be32_to_cpu(header->ih_load);
/* Load including the header */
- image_load_addr = image_entry_point - header_size;
- image_os = header->ih_os;
- image_name = (const char *)&header->ih_name;
+ spl_image.load_addr = spl_image.entry_point - header_size;
+ spl_image.os = header->ih_os;
+ spl_image.name = (const char *)&header->ih_name;
debug("spl: payload image: %s load addr: 0x%x size: %d\n",
- image_name, image_load_addr, image_size);
+ spl_image.name, spl_image.load_addr, spl_image.size);
} else {
/* Signature not found - assume u-boot.bin */
printf("mkimage signature not found - ih_magic = %x\n",
header->ih_magic);
puts("Assuming u-boot.bin ..\n");
/* Let's assume U-Boot will not be more than 200 KB */
- image_size = 200 * 1024;
- image_entry_point = CONFIG_SYS_TEXT_BASE;
- image_load_addr = CONFIG_SYS_TEXT_BASE;
- image_os = IH_OS_U_BOOT;
- image_name = "U-Boot";
- }
-}
-
-static void mmc_load_image_raw(struct mmc *mmc)
-{
- u32 image_size_sectors, err;
- const struct image_header *header;
-
- header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
- sizeof(struct image_header));
-
- /* read image header to find the image size & load address */
- err = mmc->block_dev.block_read(0,
- CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, 1,
- (void *)header);
-
- if (err <= 0)
- goto end;
-
- parse_image_header(header);
-
- /* convert size to sectors - round up */
- image_size_sectors = (image_size + MMCSD_SECTOR_SIZE - 1) /
- MMCSD_SECTOR_SIZE;
-
- /* Read the header too to avoid extra memcpy */
- err = mmc->block_dev.block_read(0,
- CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR,
- image_size_sectors, (void *)image_load_addr);
-
-end:
- if (err <= 0) {
- printf("spl: mmc blk read err - %d\n", err);
- hang();
+ spl_image.size = 200 * 1024;
+ spl_image.entry_point = CONFIG_SYS_TEXT_BASE;
+ spl_image.load_addr = CONFIG_SYS_TEXT_BASE;
+ spl_image.os = IH_OS_U_BOOT;
+ spl_image.name = "U-Boot";
}
}
-static void mmc_load_image_fat(struct mmc *mmc)
-{
- s32 err;
- struct image_header *header;
-
- header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
- sizeof(struct image_header));
-
- err = fat_register_device(&mmc->block_dev,
- CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION);
- if (err) {
- printf("spl: fat register err - %d\n", err);
- hang();
- }
-
- err = file_fat_read(CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME,
- (u8 *)header, sizeof(struct image_header));
- if (err <= 0)
- goto end;
-
- parse_image_header(header);
-
- err = file_fat_read(CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME,
- (u8 *)image_load_addr, 0);
-
-end:
- if (err <= 0) {
- printf("spl: error reading image %s, err - %d\n",
- CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME, err);
- hang();
- }
-}
-static void mmc_load_image(void) __attribute__((unused));
-static void mmc_load_image(void)
-{
- struct mmc *mmc;
- int err;
- u32 boot_mode;
-
- mmc_initialize(gd->bd);
- /* We register only one device. So, the dev id is always 0 */
- mmc = find_mmc_device(0);
- if (!mmc) {
- puts("spl: mmc device not found!!\n");
- hang();
- }
-
- err = mmc_init(mmc);
- if (err) {
- printf("spl: mmc init failed: err - %d\n", err);
- hang();
- }
-/* For OMAP3 there is no automatic boot mode detection */
-#ifdef CONFIG_OMAP34XX
- boot_mode = CONFIG_SYS_MMC_SD_BOOTMODE;
-#else
- boot_mode = omap_boot_mode();
-#endif
- if (boot_mode == MMCSD_MODE_RAW) {
- debug("boot mode - RAW\n");
- mmc_load_image_raw(mmc);
- } else if (boot_mode == MMCSD_MODE_FAT) {
- debug("boot mode - FAT\n");
- mmc_load_image_fat(mmc);
- } else {
- puts("spl: wrong MMC boot mode\n");
- hang();
- }
-}
-
-#ifdef CONFIG_SPL_NAND_SUPPORT
-static void nand_load_image(void) __attribute__ ((unused));
-static void nand_load_image(void)
-{
- struct image_header *header;
-
- gpmc_init();
- nand_init();
-
- /*use CONFIG_SYS_TEXT_BASE as temporary storage area */
- header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
-
-#ifdef CONFIG_NAND_ENV_DST
- nand_spl_load_image(CONFIG_ENV_OFFSET,
- CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
- parse_image_header(header);
- nand_spl_load_image(CONFIG_ENV_OFFSET, image_size,
- (void *)image_load_addr);
-#ifdef CONFIG_ENV_OFFSET_REDUND
- nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND,
- CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
- parse_image_header(header);
- nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, image_size,
- (void *)image_load_addr);
-#endif
-#endif
- /* Load u-boot */
- nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
- CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
- parse_image_header(header);
- nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
- image_size, (void *)image_load_addr);
- nand_deselect();
-}
-#endif /* CONFIG_SPL_NAND_SUPPORT */
-void jump_to_image_no_args(void)
+static void jump_to_image_no_args(void)
{
typedef void (*image_entry_noargs_t)(void)__attribute__ ((noreturn));
image_entry_noargs_t image_entry =
- (image_entry_noargs_t) image_entry_point;
+ (image_entry_noargs_t) spl_image.entry_point;
- debug("image entry point: 0x%X\n", image_entry_point);
+ debug("image entry point: 0x%X\n", spl_image.entry_point);
image_entry();
}
@@ -272,12 +115,12 @@ void board_init_r(gd_t *id, ulong dummy)
#ifdef CONFIG_SPL_MMC_SUPPORT
case BOOT_DEVICE_MMC1:
case BOOT_DEVICE_MMC2:
- mmc_load_image();
+ spl_mmc_load_image();
break;
#endif
#ifdef CONFIG_SPL_NAND_SUPPORT
case BOOT_DEVICE_NAND:
- nand_load_image();
+ spl_nand_load_image();
break;
#endif
default:
@@ -286,7 +129,7 @@ void board_init_r(gd_t *id, ulong dummy)
break;
}
- switch (image_os) {
+ switch (spl_image.os) {
case IH_OS_U_BOOT:
debug("Jumping to U-Boot\n");
jump_to_image_no_args();
diff --git a/arch/arm/cpu/armv7/omap-common/spl_mmc.c b/arch/arm/cpu/armv7/omap-common/spl_mmc.c
new file mode 100644
index 0000000..1d1e50c
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap-common/spl_mmc.c
@@ -0,0 +1,150 @@
+/*
+ * (C) Copyright 2010
+ * Texas Instruments, <www.ti.com>
+ *
+ * Aneesh V <aneesh@ti.com>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <asm/u-boot.h>
+#include <asm/utils.h>
+#include <asm/arch/sys_proto.h>
+#include <mmc.h>
+#include <fat.h>
+#include <timestamp_autogenerated.h>
+#include <version_autogenerated.h>
+#include <asm/omap_common.h>
+#include <asm/arch/mmc_host_def.h>
+
+DECLARE_GLOBAL_DATA_PTR;
+
+#ifdef CONFIG_GENERIC_MMC
+int board_mmc_init(bd_t *bis)
+{
+ switch (omap_boot_device()) {
+ case BOOT_DEVICE_MMC1:
+ omap_mmc_init(0);
+ break;
+ case BOOT_DEVICE_MMC2:
+ omap_mmc_init(1);
+ break;
+ }
+ return 0;
+}
+#endif
+
+static void mmc_load_image_raw(struct mmc *mmc)
+{
+ u32 image_size_sectors, err;
+ const struct image_header *header;
+
+ header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
+ sizeof(struct image_header));
+
+ /* read image header to find the image size & load address */
+ err = mmc->block_dev.block_read(0,
+ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, 1,
+ (void *)header);
+
+ if (err <= 0)
+ goto end;
+
+ spl_parse_image_header(header);
+
+ /* convert size to sectors - round up */
+ image_size_sectors = (spl_image.size + MMCSD_SECTOR_SIZE - 1) /
+ MMCSD_SECTOR_SIZE;
+
+ /* Read the header too to avoid extra memcpy */
+ err = mmc->block_dev.block_read(0,
+ CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR,
+ image_size_sectors, (void *)spl_image.load_addr);
+
+end:
+ if (err <= 0) {
+ printf("spl: mmc blk read err - %d\n", err);
+ hang();
+ }
+}
+
+static void mmc_load_image_fat(struct mmc *mmc)
+{
+ s32 err;
+ struct image_header *header;
+
+ header = (struct image_header *)(CONFIG_SYS_TEXT_BASE -
+ sizeof(struct image_header));
+
+ err = fat_register_device(&mmc->block_dev,
+ CONFIG_SYS_MMC_SD_FAT_BOOT_PARTITION);
+ if (err) {
+ printf("spl: fat register err - %d\n", err);
+ hang();
+ }
+
+ err = file_fat_read(CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME,
+ (u8 *)header, sizeof(struct image_header));
+ if (err <= 0)
+ goto end;
+
+ spl_parse_image_header(header);
+
+ err = file_fat_read(CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME,
+ (u8 *)spl_image.load_addr, 0);
+
+end:
+ if (err <= 0) {
+ printf("spl: error reading image %s, err - %d\n",
+ CONFIG_SPL_FAT_LOAD_PAYLOAD_NAME, err);
+ hang();
+ }
+}
+
+void spl_mmc_load_image(void)
+{
+ struct mmc *mmc;
+ int err;
+ u32 boot_mode;
+
+ mmc_initialize(gd->bd);
+ /* We register only one device. So, the dev id is always 0 */
+ mmc = find_mmc_device(0);
+ if (!mmc) {
+ puts("spl: mmc device not found!!\n");
+ hang();
+ }
+
+ err = mmc_init(mmc);
+ if (err) {
+ printf("spl: mmc init failed: err - %d\n", err);
+ hang();
+ }
+ boot_mode = omap_boot_mode();
+ if (boot_mode == MMCSD_MODE_RAW) {
+ debug("boot mode - RAW\n");
+ mmc_load_image_raw(mmc);
+ } else if (boot_mode == MMCSD_MODE_FAT) {
+ debug("boot mode - FAT\n");
+ mmc_load_image_fat(mmc);
+ } else {
+ puts("spl: wrong MMC boot mode\n");
+ hang();
+ }
+}
diff --git a/arch/arm/cpu/armv7/omap-common/spl_nand.c b/arch/arm/cpu/armv7/omap-common/spl_nand.c
new file mode 100644
index 0000000..af02a59
--- /dev/null
+++ b/arch/arm/cpu/armv7/omap-common/spl_nand.c
@@ -0,0 +1,71 @@
+/*
+ * Copyright (C) 2011
+ * Corscience GmbH & Co. KG - Simon Schwarz <schwarz@corscience.de>
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <common.h>
+#include <asm/u-boot.h>
+#include <asm/utils.h>
+#include <asm/arch/sys_proto.h>
+#include <nand.h>
+#include <timestamp_autogenerated.h>
+#include <version_autogenerated.h>
+#include <asm/omap_common.h>
+
+
+void spl_nand_load_image(void)
+{
+ struct image_header *header;
+ switch (omap_boot_mode()) {
+ case NAND_MODE_HW_ECC:
+ debug("spl: nand - using hw ecc\n");
+ gpmc_init();
+ nand_init();
+ break;
+ default:
+ puts("spl: ERROR: This bootmode is not implemented - hanging");
+ hang();
+ }
+
+ /*use CONFIG_SYS_TEXT_BASE as temporary storage area */
+ header = (struct image_header *)(CONFIG_SYS_TEXT_BASE);
+
+#ifdef CONFIG_NAND_ENV_DST
+ nand_spl_load_image(CONFIG_ENV_OFFSET,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ spl_parse_image_header(header);
+ nand_spl_load_image(CONFIG_ENV_OFFSET, spl_image.size,
+ (void *)image_load_addr);
+#ifdef CONFIG_ENV_OFFSET_REDUND
+ nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ spl_parse_image_header(header);
+ nand_spl_load_image(CONFIG_ENV_OFFSET_REDUND, spl_image.size,
+ (void *)image_load_addr);
+#endif
+#endif
+ /* Load u-boot */
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+ CONFIG_SYS_NAND_PAGE_SIZE, (void *)header);
+ spl_parse_image_header(header);
+ nand_spl_load_image(CONFIG_SYS_NAND_U_BOOT_OFFS,
+ spl_image.size, (void *)spl_image.load_addr);
+ nand_deselect();
+}
--
1.7.4.1
^ permalink raw reply related [flat|nested] 134+ messages in thread
* [U-Boot] [PATCH V9 4/9] spl: add NAND Library to new SPL
2011-08-08 13:11 ` [U-Boot] [PATCH V9 4/9] spl: add NAND Library to new SPL Simon Schwarz
@ 2011-08-08 23:34 ` Scott Wood
0 siblings, 0 replies; 134+ messages in thread
From: Scott Wood @ 2011-08-08 23:34 UTC (permalink / raw)
To: u-boot
On 08/08/2011 08:11 AM, Simon Schwarz wrote:
> Adds NAND library to SPL.
>
> Signed-off-by: Simon Schwarz <simonschwarzcor@gmail.com>
> ---
Acked-by: Scott Wood <scottwood@freescale.com>
-Scott
^ permalink raw reply [flat|nested] 134+ messages in thread
end of thread, other threads:[~2011-08-08 23:34 UTC | newest]
Thread overview: 134+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-06-28 14:14 [U-Boot] [0/5]devkit8000 nand_spl support simonschwarzcor at googlemail.com
2011-06-28 14:14 ` [U-Boot] [1/5]devkit8000 nand_spl: armv7 support nand_spl boot simonschwarzcor at googlemail.com
2011-06-29 8:27 ` Andreas Bießmann
2011-06-30 11:10 ` Aneesh V
2011-06-28 14:14 ` [U-Boot] [2/5]devkit8000 nand_spl: omap3 " simonschwarzcor at googlemail.com
2011-06-29 8:43 ` Andreas Bießmann
2011-06-30 9:06 ` Simon Schwarz
2011-06-30 10:38 ` Aneesh V
2011-06-28 14:14 ` [U-Boot] [3/5]devkit8000 nand_spl: Add RAM configuration independent of x-loader or CH simonschwarzcor at googlemail.com
2011-06-28 14:14 ` [U-Boot] [4/5]devkit8000 nand_spl: Add SPL NAND support to omap_gpmc driver simonschwarzcor at googlemail.com
2011-06-29 8:58 ` Andreas Bießmann
2011-06-30 11:01 ` Simon Schwarz
2011-06-28 14:14 ` [U-Boot] [5/5]devkit8000 nand_spl: add nand_spl support simonschwarzcor at googlemail.com
2011-06-28 15:01 ` Andreas Bießmann
2011-07-25 18:05 ` [U-Boot] [PATCH V2 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-07-25 18:05 ` [U-Boot] [PATCH V2 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
2011-07-25 18:05 ` [U-Boot] [PATCH V2 2/5] omap-common: add nand spl support Simon Schwarz
2011-07-26 6:07 ` Andreas Bießmann
2011-07-26 8:42 ` Simon Schwarz
2011-07-28 6:20 ` Aneesh V
2011-07-25 18:05 ` [U-Boot] [PATCH V2 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
2011-07-26 5:59 ` Andreas Bießmann
2011-07-26 8:47 ` Simon Schwarz
2011-07-25 18:05 ` [U-Boot] [PATCH V2 4/5] omap3: new SPL structure support Simon Schwarz
2011-07-26 6:11 ` Andreas Bießmann
2011-07-25 18:05 ` [U-Boot] [PATCH V2 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
2011-07-26 6:17 ` Andreas Bießmann
2011-07-26 9:09 ` Simon Schwarz
2011-07-26 10:22 ` [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-07-26 10:22 ` [U-Boot] [PATCH V3 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
2011-07-26 10:22 ` [U-Boot] [PATCH V3 2/5] omap-common: add nand spl support Simon Schwarz
2011-07-26 10:22 ` [U-Boot] [PATCH V3 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
2011-07-26 10:22 ` [U-Boot] [PATCH V3 4/5] omap3: new SPL structure support Simon Schwarz
2011-07-26 10:22 ` [U-Boot] [PATCH V3 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
2011-07-26 10:42 ` Andreas Bießmann
2011-07-26 12:34 ` Simon Schwarz
2011-07-26 11:04 ` Wolfgang Denk
2011-07-26 11:06 ` [U-Boot] [PATCH V3 0/5] OMAP3 and devkit8000 SPL support Wolfgang Denk
2011-07-26 12:31 ` Simon Schwarz
2011-07-26 12:09 ` [U-Boot] [PATCH V4 " Simon Schwarz
2011-07-26 12:09 ` [U-Boot] [PATCH V4 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
2011-07-26 12:09 ` [U-Boot] [PATCH V4 2/5] omap-common: add nand spl support Simon Schwarz
2011-07-26 18:06 ` Scott Wood
[not found] ` <4E2FCF6E.10701@gmail.com>
[not found] ` <20110727163839.736d5bed@schlenkerla.am.freescale.net>
2011-07-28 7:51 ` Simon Schwarz
2011-07-28 18:56 ` Scott Wood
2011-07-29 8:48 ` Simon Schwarz
2011-07-26 12:09 ` [U-Boot] [PATCH V4 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
2011-07-26 18:04 ` Scott Wood
2011-07-26 18:12 ` Scott Wood
2011-07-27 9:22 ` Simon Schwarz
2011-07-27 14:55 ` V, Aneesh
2011-07-27 22:01 ` Scott Wood
2011-07-28 7:27 ` Aneesh V
2011-07-26 12:09 ` [U-Boot] [PATCH V4 4/5] omap3: new SPL structure support Simon Schwarz
2011-07-26 12:09 ` [U-Boot] [PATCH V4 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 2/5] omap-common: add nand spl support Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 4/5] omap3: new SPL structure support Simon Schwarz
2011-07-27 12:50 ` [U-Boot] [PATCH V5 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
2011-07-28 8:38 ` [U-Boot] [PATCH V6 0/5] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-07-28 8:38 ` [U-Boot] [PATCH V6 1/5] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
2011-07-28 8:50 ` Aneesh V
2011-07-28 9:42 ` Simon Schwarz
2011-07-29 16:53 ` Simon Schwarz
2011-07-28 8:38 ` [U-Boot] [PATCH V6 2/5] omap-common: add nand spl support Simon Schwarz
2011-07-28 9:42 ` Aneesh V
2011-07-28 12:44 ` Simon Schwarz
2011-07-28 14:24 ` Aneesh V
2011-07-28 14:34 ` Simon Schwarz
2011-08-02 12:03 ` Simon Schwarz
2011-08-02 12:18 ` Aneesh V
2011-08-02 12:30 ` Simon Schwarz
2011-07-28 9:58 ` Aneesh V
2011-07-28 12:54 ` Simon Schwarz
2011-07-28 14:16 ` Aneesh V
2011-07-28 18:50 ` Scott Wood
2011-07-28 19:07 ` Wolfgang Denk
2011-07-29 7:34 ` Aneesh V
2011-07-29 8:19 ` Simon Schwarz
2011-07-28 8:38 ` [U-Boot] [PATCH V6 3/5] nand spl: add NAND Library to new SPL Simon Schwarz
2011-07-28 11:54 ` Aneesh V
2011-07-28 14:04 ` Simon Schwarz
2011-07-28 16:18 ` Aneesh V
2011-07-29 12:17 ` Simon Schwarz
2011-07-28 19:16 ` Scott Wood
2011-07-29 9:12 ` Simon Schwarz
2011-07-29 9:27 ` Wolfgang Denk
2011-07-29 12:27 ` Simon Schwarz
2011-07-28 8:38 ` [U-Boot] [PATCH V6 4/5] omap3: new SPL structure support Simon Schwarz
2011-07-28 8:38 ` [U-Boot] [PATCH V6 5/5] devkit8000: Add nand-spl support for new SPL Simon Schwarz
2011-07-28 10:51 ` Aneesh V
2011-07-28 11:54 ` Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 1/7] omap-common/omap4: relocate early UART clock setup Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 2/7] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 3/7] omap-common: add nand spl support Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 4/7] spl: add NAND Library to new SPL Simon Schwarz
2011-08-01 17:58 ` Scott Wood
2011-08-02 8:15 ` Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 5/7] spl: Add POWER library to new spl Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 6/7] omap3: new SPL structure support Simon Schwarz
2011-07-29 16:53 ` [U-Boot] [PATCH V7 7/7] devkit8000: Add nand-spl support for new SPL Simon Schwarz
2011-08-01 16:23 ` [U-Boot] [PATCH V7 0/7] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 0/9] " Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 1/9] omap-common/omap4: relocate early UART clock setup Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 2/9] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 3/9] omap-common: add nand spl support Simon Schwarz
2011-08-05 7:30 ` Aneesh V
2011-08-08 7:50 ` Simon Schwarz
2011-08-08 9:04 ` Aneesh V
2011-08-02 15:59 ` [U-Boot] [PATCH V8 4/9] spl: add NAND Library to new SPL Simon Schwarz
2011-08-02 16:12 ` Scott Wood
2011-08-02 15:59 ` [U-Boot] [PATCH V8 5/9] spl: Add POWER library to new spl Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 6/9] omap3: new SPL structure support Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 7/9] devkit8000: Add nand-spl support for new SPL Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 8/9] omap3: implement boot parameter saving Simon Schwarz
2011-08-05 7:41 ` Aneesh V
2011-08-08 8:03 ` Simon Schwarz
2011-08-08 8:44 ` Aneesh V
2011-08-08 10:59 ` Simon Schwarz
2011-08-02 15:59 ` [U-Boot] [PATCH V8 9/9] omap-common: reorganize spl.c Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 0/9] OMAP3 and devkit8000 SPL support Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 1/9] omap-common/omap4: relocate early UART clock setup Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 2/9] omap3: Configure RAM bank 0 if in SPL Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 3/9] omap-common: add nand spl support Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 4/9] spl: add NAND Library to new SPL Simon Schwarz
2011-08-08 23:34 ` Scott Wood
2011-08-08 13:11 ` [U-Boot] [PATCH V9 5/9] spl: Add POWER library to new spl Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 6/9] omap3: new SPL structure support Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 7/9] devkit8000: Add nand-spl support for new SPL Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 8/9] omap3: implement boot parameter saving Simon Schwarz
2011-08-08 13:11 ` [U-Boot] [PATCH V9 9/9] omap-common: reorganize spl.c Simon Schwarz
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