* [PATCH 0/8] OMAP3/4: Misc fixes and clean-up
@ 2011-09-08 5:21 ` Santosh Shilimkar
0 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:21 UTC (permalink / raw)
To: linux-arm-kernel
The series contains few fixes and clean-up for OMAP.
Briefly,
- HWMOD fix for the address space count
- Improving the L3 register accesses
- Bug fix in the L3 error handler
- Sparce warning and indentation fixes in L3 error handler
- Print master id in case of L3 custom errors for better debug.
- Adding local time clock node for the CPUfreq and time re-calibration
- Fix in the address overlap for emif and emulation domain.
The series is tested on OMAP4430 SDP and OMAP4430 beagle and SDP.
The following changes since commit c6a389f123b9f68d605bb7e0f9b32ec1e3e14132:
Linux 3.1-rc4 (2011-08-28 21:16:01 -0700)
are available in the git repository at:
git://gitorious.org/omap-sw-develoment/linux-omap-dev.git v3.1-rc4-omap-misc
Santosh Shilimkar (2):
OMAP4: clock: Add CPU local timer clock node.
OMAP4: Fix the emif and dmm virtual mapping
Todd Poynor (2):
OMAP: Improve register access in L3 Error handler.
OMAP: Fix a BUG in l3 error handler.
sricharan (4):
OMAP: hwmod: Fix the addr spaces count API.
OMAP: Fix indentation issues in l3 error handler.
OMAP: Fix sparse warnings in l3 error handler.
OMAP: Print Initiator name for l3 custom error.
arch/arm/mach-omap2/clock44xx_data.c | 9 ++
arch/arm/mach-omap2/omap_hwmod.c | 8 +-
arch/arm/mach-omap2/omap_l3_noc.c | 130 ++++++++++----------
arch/arm/mach-omap2/omap_l3_noc.h | 224 +++++++++++++++++++---------------
arch/arm/mach-omap2/omap_l3_smx.c | 91 +++++++-------
arch/arm/mach-omap2/omap_l3_smx.h | 164 ++++++++++++------------
arch/arm/plat-omap/include/plat/io.h | 4 +-
7 files changed, 336 insertions(+), 294 deletions(-)
^ permalink raw reply [flat|nested] 56+ messages in thread* [PATCH 1/8] OMAP: hwmod: Fix the addr spaces count API.
2011-09-08 5:21 ` Santosh Shilimkar
@ 2011-09-08 5:22 ` Santosh Shilimkar
-1 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-omap
Cc: linux-arm-kernel, sricharan, Santosh Shilimkar, Benoit Cousson,
Paul Walmsley, Kevin Hilman
From: sricharan <r.sricharan@ti.com>
The address space count API returns the number of address space
entries for a hwmod including a additional null value present in the
address space structure introduced recently. The devices which
have multiple hwmods and use device_build_ss are broken with this,
as their address resources are populated with a extra null value,
subsequently the probe fails. So fix the API not to add the null value.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
---
arch/arm/mach-omap2/omap_hwmod.c | 8 +++++---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 84cc0bd..32a0f48a 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -791,9 +791,11 @@ static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
if (!os || !os->addr)
return 0;
- do {
- mem = &os->addr[i++];
- } while (mem->pa_start != mem->pa_end);
+ mem = &os->addr[i];
+
+ while (mem->pa_start != mem->pa_end) {
+ mem = &os->addr[++i];
+ };
return i;
}
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 1/8] OMAP: hwmod: Fix the addr spaces count API.
@ 2011-09-08 5:22 ` Santosh Shilimkar
0 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-arm-kernel
From: sricharan <r.sricharan@ti.com>
The address space count API returns the number of address space
entries for a hwmod including a additional null value present in the
address space structure introduced recently. The devices which
have multiple hwmods and use device_build_ss are broken with this,
as their address resources are populated with a extra null value,
subsequently the probe fails. So fix the API not to add the null value.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
---
arch/arm/mach-omap2/omap_hwmod.c | 8 +++++---
1 files changed, 5 insertions(+), 3 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 84cc0bd..32a0f48a 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -791,9 +791,11 @@ static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
if (!os || !os->addr)
return 0;
- do {
- mem = &os->addr[i++];
- } while (mem->pa_start != mem->pa_end);
+ mem = &os->addr[i];
+
+ while (mem->pa_start != mem->pa_end) {
+ mem = &os->addr[++i];
+ };
return i;
}
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 1/8] OMAP: hwmod: Fix the addr spaces count API.
2011-09-08 5:22 ` Santosh Shilimkar
@ 2011-09-08 7:47 ` Cousson, Benoit
-1 siblings, 0 replies; 56+ messages in thread
From: Cousson, Benoit @ 2011-09-08 7:47 UTC (permalink / raw)
To: Shilimkar, Santosh
Cc: linux-omap, linux-arm-kernel, R, Sricharan, Paul Walmsley, Hilman, Kevin
Hi Sricharan,
On 9/8/2011 7:22 AM, Shilimkar, Santosh wrote:
> From: sricharan<r.sricharan@ti.com>
>
> The address space count API returns the number of address space
> entries for a hwmod including a additional null value present in the
> address space structure introduced recently.
That's a minor nit, but you might give the commit you are referencing here.
> The devices which
> have multiple hwmods and use device_build_ss are broken with this,
> as their address resources are populated with a extra null value,
> subsequently the probe fails. So fix the API not to add the null value.
It seems that in every cases, we are adding an extra null resource for
nothing. But it is true that will not crash if the driver is just
expecting an unique entry.
What is happening with multiple hwmods is probably the introduction of
that extra null resource in the middle of the real ones, hence shifting
the resource index?
You might give more details here.
> Signed-off-by: sricharan<r.sricharan@ti.com>
> Signed-off-by: Santosh Shilimkar<santosh.shilimkar@ti.com>
> Cc: Benoit Cousson<b-cousson@ti.com>
> Cc: Paul Walmsley<paul@pwsan.com>
> Cc: Kevin Hilman<khilman@ti.com>
> ---
> arch/arm/mach-omap2/omap_hwmod.c | 8 +++++---
> 1 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
> index 84cc0bd..32a0f48a 100644
> --- a/arch/arm/mach-omap2/omap_hwmod.c
> +++ b/arch/arm/mach-omap2/omap_hwmod.c
> @@ -791,9 +791,11 @@ static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
> if (!os || !os->addr)
> return 0;
>
> - do {
> - mem =&os->addr[i++];
> - } while (mem->pa_start != mem->pa_end);
> + mem =&os->addr[i];
> +
> + while (mem->pa_start != mem->pa_end) {
> + mem =&os->addr[++i];
> + };
>
> return i;
Cannot you just do "return i - 1"?
Regards,
Benoit
^ permalink raw reply [flat|nested] 56+ messages in thread* [PATCH 1/8] OMAP: hwmod: Fix the addr spaces count API.
@ 2011-09-08 7:47 ` Cousson, Benoit
0 siblings, 0 replies; 56+ messages in thread
From: Cousson, Benoit @ 2011-09-08 7:47 UTC (permalink / raw)
To: linux-arm-kernel
Hi Sricharan,
On 9/8/2011 7:22 AM, Shilimkar, Santosh wrote:
> From: sricharan<r.sricharan@ti.com>
>
> The address space count API returns the number of address space
> entries for a hwmod including a additional null value present in the
> address space structure introduced recently.
That's a minor nit, but you might give the commit you are referencing here.
> The devices which
> have multiple hwmods and use device_build_ss are broken with this,
> as their address resources are populated with a extra null value,
> subsequently the probe fails. So fix the API not to add the null value.
It seems that in every cases, we are adding an extra null resource for
nothing. But it is true that will not crash if the driver is just
expecting an unique entry.
What is happening with multiple hwmods is probably the introduction of
that extra null resource in the middle of the real ones, hence shifting
the resource index?
You might give more details here.
> Signed-off-by: sricharan<r.sricharan@ti.com>
> Signed-off-by: Santosh Shilimkar<santosh.shilimkar@ti.com>
> Cc: Benoit Cousson<b-cousson@ti.com>
> Cc: Paul Walmsley<paul@pwsan.com>
> Cc: Kevin Hilman<khilman@ti.com>
> ---
> arch/arm/mach-omap2/omap_hwmod.c | 8 +++++---
> 1 files changed, 5 insertions(+), 3 deletions(-)
>
> diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
> index 84cc0bd..32a0f48a 100644
> --- a/arch/arm/mach-omap2/omap_hwmod.c
> +++ b/arch/arm/mach-omap2/omap_hwmod.c
> @@ -791,9 +791,11 @@ static int _count_ocp_if_addr_spaces(struct omap_hwmod_ocp_if *os)
> if (!os || !os->addr)
> return 0;
>
> - do {
> - mem =&os->addr[i++];
> - } while (mem->pa_start != mem->pa_end);
> + mem =&os->addr[i];
> +
> + while (mem->pa_start != mem->pa_end) {
> + mem =&os->addr[++i];
> + };
>
> return i;
Cannot you just do "return i - 1"?
Regards,
Benoit
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 2/8] OMAP: Improve register access in L3 Error handler.
2011-09-08 5:21 ` Santosh Shilimkar
@ 2011-09-08 5:22 ` Santosh Shilimkar
-1 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-omap; +Cc: linux-arm-kernel, Todd Poynor, sricharan, Santosh Shilimkar
From: Todd Poynor <toddpoynor@google.com>
* Changed the way of accessing L3 target
registers from standard base rather
than relative to STDERRLOG_MAIN.
* Use ffs() to find error source from
the L3_FLAGMUX_REGERRn register.
* Remove extra l3_base[] entry.
* Modified L3 custom error message.
Signed-off-by: Todd Poynor <toddpoynor@google.com>
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/omap_l3_noc.c | 43 +++++++++---------
arch/arm/mach-omap2/omap_l3_noc.h | 86 +++++++++++++++++-------------------
arch/arm/mach-omap2/omap_l3_smx.c | 5 +-
arch/arm/mach-omap2/omap_l3_smx.h | 2 +-
4 files changed, 65 insertions(+), 71 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index 7b9f190..d560c88 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -56,10 +56,9 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
{
struct omap4_l3 *l3 = _l3;
- int inttype, i, j;
+ int inttype, i;
int err_src = 0;
- u32 std_err_main_addr, std_err_main, err_reg;
- u32 base, slave_addr, clear;
+ u32 std_err_main, err_reg, clear, base, l3_targ_base;
char *source_name;
/* Get the Type of interrupt */
@@ -71,42 +70,43 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
* to determine the source
*/
base = (u32)l3->l3_base[i];
- err_reg = readl(base + l3_flagmux[i] + (inttype << 3));
+ err_reg = readl(base + l3_flagmux[i] +
+ + L3_FLAGMUX_REGERR0 + (inttype << 3));
/* Get the corresponding error and analyse */
if (err_reg) {
/* Identify the source from control status register */
- for (j = 0; !(err_reg & (1 << j)); j++)
- ;
+ err_src = __ffs(err_reg);
- err_src = j;
/* Read the stderrlog_main_source from clk domain */
- std_err_main_addr = base + *(l3_targ[i] + err_src);
- std_err_main = readl(std_err_main_addr);
+ l3_targ_base = base + *(l3_targ[i] + err_src);
+ std_err_main = readl(l3_targ_base +
+ L3_TARG_STDERRLOG_MAIN);
switch (std_err_main & CUSTOM_ERROR) {
case STANDARD_ERROR:
source_name =
- l3_targ_stderrlog_main_name[i][err_src];
-
- slave_addr = std_err_main_addr +
- L3_SLAVE_ADDRESS_OFFSET;
+ l3_targ_inst_name[i][err_src];
WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n",
- source_name, readl(slave_addr));
+ source_name,
+ readl(l3_targ_base +
+ L3_TARG_STDERRLOG_SLVOFSLSB));
/* clear the std error log*/
clear = std_err_main | CLEAR_STDERR_LOG;
- writel(clear, std_err_main_addr);
+ writel(clear, l3_targ_base +
+ L3_TARG_STDERRLOG_MAIN);
break;
case CUSTOM_ERROR:
source_name =
- l3_targ_stderrlog_main_name[i][err_src];
+ l3_targ_inst_name[i][err_src];
- WARN(true, "CUSTOM SRESP error with SOURCE:%s\n",
- source_name);
+ WARN(true, "L3 custom error: SOURCE:%s\n",
+ source_name);
/* clear the std error log*/
clear = std_err_main | CLEAR_STDERR_LOG;
- writel(clear, std_err_main_addr);
+ writel(clear, l3_targ_base +
+ L3_TARG_STDERRLOG_MAIN);
break;
default:
@@ -123,9 +123,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
static int __init omap4_l3_probe(struct platform_device *pdev)
{
static struct omap4_l3 *l3;
- struct resource *res;
- int ret;
- int irq;
+ struct resource *res;
+ int ret, irq;
l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
if (!l3)
diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h
index 359b833..22c0d57 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.h
+++ b/arch/arm/mach-omap2/omap_l3_noc.h
@@ -23,63 +23,60 @@
#ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
#define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
-/*
- * L3 register offsets
- */
#define L3_MODULES 3
#define CLEAR_STDERR_LOG (1 << 31)
#define CUSTOM_ERROR 0x2
#define STANDARD_ERROR 0x0
#define INBAND_ERROR 0x0
-#define EMIF_KERRLOG_OFFSET 0x10
-#define L3_SLAVE_ADDRESS_OFFSET 0x14
-#define LOGICAL_ADDR_ERRORLOG 0x4
#define L3_APPLICATION_ERROR 0x0
#define L3_DEBUG_ERROR 0x1
+/* L3 TARG register offsets */
+#define L3_TARG_STDERRLOG_MAIN 0x48
+#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
+#define L3_FLAGMUX_REGERR0 0xc
+
u32 l3_flagmux[L3_MODULES] = {
- 0x50C,
- 0x100C,
- 0X020C
+ 0x500,
+ 0x1000,
+ 0X0200
};
-/*
- * L3 Target standard Error register offsets
- */
-u32 l3_targ_stderrlog_main_clk1[] = {
- 0x148, /* DMM1 */
- 0x248, /* DMM2 */
- 0x348, /* ABE */
- 0x448, /* L4CFG */
- 0x648 /* CLK2 PWR DISC */
+/* L3 Target standard Error register offsets */
+u32 l3_targ_inst_clk1[] = {
+ 0x100, /* DMM1 */
+ 0x200, /* DMM2 */
+ 0x300, /* ABE */
+ 0x400, /* L4CFG */
+ 0x600 /* CLK2 PWR DISC */
};
-u32 l3_targ_stderrlog_main_clk2[] = {
- 0x548, /* CORTEX M3 */
- 0x348, /* DSS */
- 0x148, /* GPMC */
- 0x448, /* ISS */
- 0x748, /* IVAHD */
- 0xD48, /* missing in TRM corresponds to AES1*/
- 0x948, /* L4 PER0*/
- 0x248, /* OCMRAM */
- 0x148, /* missing in TRM corresponds to GPMC sERROR*/
- 0x648, /* SGX */
- 0x848, /* SL2 */
- 0x1648, /* C2C */
- 0x1148, /* missing in TRM corresponds PWR DISC CLK1*/
- 0xF48, /* missing in TRM corrsponds to SHA1*/
- 0xE48, /* missing in TRM corresponds to AES2*/
- 0xC48, /* L4 PER3 */
- 0xA48, /* L4 PER1*/
- 0xB48 /* L4 PER2*/
+u32 l3_targ_inst_clk2[] = {
+ 0x500, /* CORTEX M3 */
+ 0x300, /* DSS */
+ 0x100, /* GPMC */
+ 0x400, /* ISS */
+ 0x700, /* IVAHD */
+ 0xD00, /* missing in TRM corresponds to AES1*/
+ 0x900, /* L4 PER0*/
+ 0x200, /* OCMRAM */
+ 0x100, /* missing in TRM corresponds to GPMC sERROR*/
+ 0x600, /* SGX */
+ 0x800, /* SL2 */
+ 0x1600, /* C2C */
+ 0x1100, /* missing in TRM corresponds PWR DISC CLK1*/
+ 0xF00, /* missing in TRM corrsponds to SHA1*/
+ 0xE00, /* missing in TRM corresponds to AES2*/
+ 0xC00, /* L4 PER3 */
+ 0xA00, /* L4 PER1*/
+ 0xB00 /* L4 PER2*/
};
-u32 l3_targ_stderrlog_main_clk3[] = {
- 0x0148 /* EMUSS */
+u32 l3_targ_inst_clk3[] = {
+ 0x0100 /* EMUSS */
};
-char *l3_targ_stderrlog_main_name[L3_MODULES][18] = {
+char *l3_targ_inst_name[L3_MODULES][18] = {
{
"DMM1",
"DMM2",
@@ -113,9 +110,9 @@ char *l3_targ_stderrlog_main_name[L3_MODULES][18] = {
};
u32 *l3_targ[L3_MODULES] = {
- l3_targ_stderrlog_main_clk1,
- l3_targ_stderrlog_main_clk2,
- l3_targ_stderrlog_main_clk3,
+ l3_targ_inst_clk1,
+ l3_targ_inst_clk2,
+ l3_targ_inst_clk3,
};
struct omap4_l3 {
@@ -123,10 +120,9 @@ struct omap4_l3 {
struct clk *ick;
/* memory base */
- void __iomem *l3_base[4];
+ void __iomem *l3_base[L3_MODULES];
int debug_irq;
int app_irq;
};
-
#endif
diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c
index 873c0e3..fa07edf 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.c
+++ b/arch/arm/mach-omap2/omap_l3_smx.c
@@ -191,10 +191,9 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
}
/* identify the error source */
- for (err_source = 0; !(status & (1 << err_source)); err_source++)
- ;
+ err_source = __ffs(status);
- base = l3->rt + *(omap3_l3_bases[int_type] + err_source);
+ base = l3->rt + omap3_l3_bases[int_type][err_source];
error = omap3_l3_readll(base, L3_ERROR_LOG);
if (error) {
error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR);
diff --git a/arch/arm/mach-omap2/omap_l3_smx.h b/arch/arm/mach-omap2/omap_l3_smx.h
index ba2ed9a..185d77a 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.h
+++ b/arch/arm/mach-omap2/omap_l3_smx.h
@@ -40,7 +40,7 @@
#define L3_SI_CONTROL 0x020
#define L3_SI_FLAG_STATUS_0 0x510
-const u64 shift = 1;
+static const u64 shift = 1;
#define L3_STATUS_0_MPUIA_BRST (shift << 0)
#define L3_STATUS_0_MPUIA_RSP (shift << 1)
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 2/8] OMAP: Improve register access in L3 Error handler.
@ 2011-09-08 5:22 ` Santosh Shilimkar
0 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-arm-kernel
From: Todd Poynor <toddpoynor@google.com>
* Changed the way of accessing L3 target
registers from standard base rather
than relative to STDERRLOG_MAIN.
* Use ffs() to find error source from
the L3_FLAGMUX_REGERRn register.
* Remove extra l3_base[] entry.
* Modified L3 custom error message.
Signed-off-by: Todd Poynor <toddpoynor@google.com>
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/omap_l3_noc.c | 43 +++++++++---------
arch/arm/mach-omap2/omap_l3_noc.h | 86 +++++++++++++++++-------------------
arch/arm/mach-omap2/omap_l3_smx.c | 5 +-
arch/arm/mach-omap2/omap_l3_smx.h | 2 +-
4 files changed, 65 insertions(+), 71 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index 7b9f190..d560c88 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -56,10 +56,9 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
{
struct omap4_l3 *l3 = _l3;
- int inttype, i, j;
+ int inttype, i;
int err_src = 0;
- u32 std_err_main_addr, std_err_main, err_reg;
- u32 base, slave_addr, clear;
+ u32 std_err_main, err_reg, clear, base, l3_targ_base;
char *source_name;
/* Get the Type of interrupt */
@@ -71,42 +70,43 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
* to determine the source
*/
base = (u32)l3->l3_base[i];
- err_reg = readl(base + l3_flagmux[i] + (inttype << 3));
+ err_reg = readl(base + l3_flagmux[i] +
+ + L3_FLAGMUX_REGERR0 + (inttype << 3));
/* Get the corresponding error and analyse */
if (err_reg) {
/* Identify the source from control status register */
- for (j = 0; !(err_reg & (1 << j)); j++)
- ;
+ err_src = __ffs(err_reg);
- err_src = j;
/* Read the stderrlog_main_source from clk domain */
- std_err_main_addr = base + *(l3_targ[i] + err_src);
- std_err_main = readl(std_err_main_addr);
+ l3_targ_base = base + *(l3_targ[i] + err_src);
+ std_err_main = readl(l3_targ_base +
+ L3_TARG_STDERRLOG_MAIN);
switch (std_err_main & CUSTOM_ERROR) {
case STANDARD_ERROR:
source_name =
- l3_targ_stderrlog_main_name[i][err_src];
-
- slave_addr = std_err_main_addr +
- L3_SLAVE_ADDRESS_OFFSET;
+ l3_targ_inst_name[i][err_src];
WARN(true, "L3 standard error: SOURCE:%s@address 0x%x\n",
- source_name, readl(slave_addr));
+ source_name,
+ readl(l3_targ_base +
+ L3_TARG_STDERRLOG_SLVOFSLSB));
/* clear the std error log*/
clear = std_err_main | CLEAR_STDERR_LOG;
- writel(clear, std_err_main_addr);
+ writel(clear, l3_targ_base +
+ L3_TARG_STDERRLOG_MAIN);
break;
case CUSTOM_ERROR:
source_name =
- l3_targ_stderrlog_main_name[i][err_src];
+ l3_targ_inst_name[i][err_src];
- WARN(true, "CUSTOM SRESP error with SOURCE:%s\n",
- source_name);
+ WARN(true, "L3 custom error: SOURCE:%s\n",
+ source_name);
/* clear the std error log*/
clear = std_err_main | CLEAR_STDERR_LOG;
- writel(clear, std_err_main_addr);
+ writel(clear, l3_targ_base +
+ L3_TARG_STDERRLOG_MAIN);
break;
default:
@@ -123,9 +123,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
static int __init omap4_l3_probe(struct platform_device *pdev)
{
static struct omap4_l3 *l3;
- struct resource *res;
- int ret;
- int irq;
+ struct resource *res;
+ int ret, irq;
l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
if (!l3)
diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h
index 359b833..22c0d57 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.h
+++ b/arch/arm/mach-omap2/omap_l3_noc.h
@@ -23,63 +23,60 @@
#ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
#define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
-/*
- * L3 register offsets
- */
#define L3_MODULES 3
#define CLEAR_STDERR_LOG (1 << 31)
#define CUSTOM_ERROR 0x2
#define STANDARD_ERROR 0x0
#define INBAND_ERROR 0x0
-#define EMIF_KERRLOG_OFFSET 0x10
-#define L3_SLAVE_ADDRESS_OFFSET 0x14
-#define LOGICAL_ADDR_ERRORLOG 0x4
#define L3_APPLICATION_ERROR 0x0
#define L3_DEBUG_ERROR 0x1
+/* L3 TARG register offsets */
+#define L3_TARG_STDERRLOG_MAIN 0x48
+#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
+#define L3_FLAGMUX_REGERR0 0xc
+
u32 l3_flagmux[L3_MODULES] = {
- 0x50C,
- 0x100C,
- 0X020C
+ 0x500,
+ 0x1000,
+ 0X0200
};
-/*
- * L3 Target standard Error register offsets
- */
-u32 l3_targ_stderrlog_main_clk1[] = {
- 0x148, /* DMM1 */
- 0x248, /* DMM2 */
- 0x348, /* ABE */
- 0x448, /* L4CFG */
- 0x648 /* CLK2 PWR DISC */
+/* L3 Target standard Error register offsets */
+u32 l3_targ_inst_clk1[] = {
+ 0x100, /* DMM1 */
+ 0x200, /* DMM2 */
+ 0x300, /* ABE */
+ 0x400, /* L4CFG */
+ 0x600 /* CLK2 PWR DISC */
};
-u32 l3_targ_stderrlog_main_clk2[] = {
- 0x548, /* CORTEX M3 */
- 0x348, /* DSS */
- 0x148, /* GPMC */
- 0x448, /* ISS */
- 0x748, /* IVAHD */
- 0xD48, /* missing in TRM corresponds to AES1*/
- 0x948, /* L4 PER0*/
- 0x248, /* OCMRAM */
- 0x148, /* missing in TRM corresponds to GPMC sERROR*/
- 0x648, /* SGX */
- 0x848, /* SL2 */
- 0x1648, /* C2C */
- 0x1148, /* missing in TRM corresponds PWR DISC CLK1*/
- 0xF48, /* missing in TRM corrsponds to SHA1*/
- 0xE48, /* missing in TRM corresponds to AES2*/
- 0xC48, /* L4 PER3 */
- 0xA48, /* L4 PER1*/
- 0xB48 /* L4 PER2*/
+u32 l3_targ_inst_clk2[] = {
+ 0x500, /* CORTEX M3 */
+ 0x300, /* DSS */
+ 0x100, /* GPMC */
+ 0x400, /* ISS */
+ 0x700, /* IVAHD */
+ 0xD00, /* missing in TRM corresponds to AES1*/
+ 0x900, /* L4 PER0*/
+ 0x200, /* OCMRAM */
+ 0x100, /* missing in TRM corresponds to GPMC sERROR*/
+ 0x600, /* SGX */
+ 0x800, /* SL2 */
+ 0x1600, /* C2C */
+ 0x1100, /* missing in TRM corresponds PWR DISC CLK1*/
+ 0xF00, /* missing in TRM corrsponds to SHA1*/
+ 0xE00, /* missing in TRM corresponds to AES2*/
+ 0xC00, /* L4 PER3 */
+ 0xA00, /* L4 PER1*/
+ 0xB00 /* L4 PER2*/
};
-u32 l3_targ_stderrlog_main_clk3[] = {
- 0x0148 /* EMUSS */
+u32 l3_targ_inst_clk3[] = {
+ 0x0100 /* EMUSS */
};
-char *l3_targ_stderrlog_main_name[L3_MODULES][18] = {
+char *l3_targ_inst_name[L3_MODULES][18] = {
{
"DMM1",
"DMM2",
@@ -113,9 +110,9 @@ char *l3_targ_stderrlog_main_name[L3_MODULES][18] = {
};
u32 *l3_targ[L3_MODULES] = {
- l3_targ_stderrlog_main_clk1,
- l3_targ_stderrlog_main_clk2,
- l3_targ_stderrlog_main_clk3,
+ l3_targ_inst_clk1,
+ l3_targ_inst_clk2,
+ l3_targ_inst_clk3,
};
struct omap4_l3 {
@@ -123,10 +120,9 @@ struct omap4_l3 {
struct clk *ick;
/* memory base */
- void __iomem *l3_base[4];
+ void __iomem *l3_base[L3_MODULES];
int debug_irq;
int app_irq;
};
-
#endif
diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c
index 873c0e3..fa07edf 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.c
+++ b/arch/arm/mach-omap2/omap_l3_smx.c
@@ -191,10 +191,9 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
}
/* identify the error source */
- for (err_source = 0; !(status & (1 << err_source)); err_source++)
- ;
+ err_source = __ffs(status);
- base = l3->rt + *(omap3_l3_bases[int_type] + err_source);
+ base = l3->rt + omap3_l3_bases[int_type][err_source];
error = omap3_l3_readll(base, L3_ERROR_LOG);
if (error) {
error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR);
diff --git a/arch/arm/mach-omap2/omap_l3_smx.h b/arch/arm/mach-omap2/omap_l3_smx.h
index ba2ed9a..185d77a 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.h
+++ b/arch/arm/mach-omap2/omap_l3_smx.h
@@ -40,7 +40,7 @@
#define L3_SI_CONTROL 0x020
#define L3_SI_FLAG_STATUS_0 0x510
-const u64 shift = 1;
+static const u64 shift = 1;
#define L3_STATUS_0_MPUIA_BRST (shift << 0)
#define L3_STATUS_0_MPUIA_RSP (shift << 1)
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread
* [PATCH 3/8] OMAP: Fix a BUG in l3 error handler.
2011-09-08 5:21 ` Santosh Shilimkar
@ 2011-09-08 5:22 ` Santosh Shilimkar
-1 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-omap; +Cc: linux-arm-kernel, Todd Poynor, sricharan, Santosh Shilimkar
From: Todd Poynor <toddpoynor@google.com>
With the current sequence of registering the irq and
assigning it to the app_irq, debug_irq driver variables,
there can be corner cases where the pending irq gets
triggered immediately after registering, handler gets called
resulting in a crash. So changed this sequence.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Todd Poynor <toddpoynor@google.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/omap_l3_noc.c | 12 +++++-------
1 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index d560c88..cf237dd 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -124,7 +124,7 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
{
static struct omap4_l3 *l3;
struct resource *res;
- int ret, irq;
+ int ret;
l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
if (!l3)
@@ -176,8 +176,8 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
/*
* Setup interrupt Handlers
*/
- irq = platform_get_irq(pdev, 0);
- ret = request_irq(irq,
+ l3->debug_irq = platform_get_irq(pdev, 0);
+ ret = request_irq(l3->debug_irq,
l3_interrupt_handler,
IRQF_DISABLED, "l3-dbg-irq", l3);
if (ret) {
@@ -185,10 +185,9 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
OMAP44XX_IRQ_L3_DBG);
goto err3;
}
- l3->debug_irq = irq;
- irq = platform_get_irq(pdev, 1);
- ret = request_irq(irq,
+ l3->app_irq = platform_get_irq(pdev, 1);
+ ret = request_irq(l3->app_irq,
l3_interrupt_handler,
IRQF_DISABLED, "l3-app-irq", l3);
if (ret) {
@@ -196,7 +195,6 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
OMAP44XX_IRQ_L3_APP);
goto err4;
}
- l3->app_irq = irq;
return 0;
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 3/8] OMAP: Fix a BUG in l3 error handler.
@ 2011-09-08 5:22 ` Santosh Shilimkar
0 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-arm-kernel
From: Todd Poynor <toddpoynor@google.com>
With the current sequence of registering the irq and
assigning it to the app_irq, debug_irq driver variables,
there can be corner cases where the pending irq gets
triggered immediately after registering, handler gets called
resulting in a crash. So changed this sequence.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Todd Poynor <toddpoynor@google.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/omap_l3_noc.c | 12 +++++-------
1 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index d560c88..cf237dd 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -124,7 +124,7 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
{
static struct omap4_l3 *l3;
struct resource *res;
- int ret, irq;
+ int ret;
l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
if (!l3)
@@ -176,8 +176,8 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
/*
* Setup interrupt Handlers
*/
- irq = platform_get_irq(pdev, 0);
- ret = request_irq(irq,
+ l3->debug_irq = platform_get_irq(pdev, 0);
+ ret = request_irq(l3->debug_irq,
l3_interrupt_handler,
IRQF_DISABLED, "l3-dbg-irq", l3);
if (ret) {
@@ -185,10 +185,9 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
OMAP44XX_IRQ_L3_DBG);
goto err3;
}
- l3->debug_irq = irq;
- irq = platform_get_irq(pdev, 1);
- ret = request_irq(irq,
+ l3->app_irq = platform_get_irq(pdev, 1);
+ ret = request_irq(l3->app_irq,
l3_interrupt_handler,
IRQF_DISABLED, "l3-app-irq", l3);
if (ret) {
@@ -196,7 +195,6 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
OMAP44XX_IRQ_L3_APP);
goto err4;
}
- l3->app_irq = irq;
return 0;
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread
* [PATCH 4/8] OMAP: Fix indentation issues in l3 error handler.
2011-09-08 5:21 ` Santosh Shilimkar
@ 2011-09-08 5:22 ` Santosh Shilimkar
-1 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-omap; +Cc: linux-arm-kernel, sricharan, Santosh Shilimkar, Paul Walmsley
From: sricharan <r.sricharan@ti.com>
The indentation problems in the l3 noc and smx
error handler files are fixed.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reported-by: Paul Walmsley <paul@pwsan.com>
Cc: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/omap_l3_noc.c | 58 +++++++-------
arch/arm/mach-omap2/omap_l3_noc.h | 106 +++++++++++++-------------
arch/arm/mach-omap2/omap_l3_smx.c | 86 ++++++++++----------
arch/arm/mach-omap2/omap_l3_smx.h | 156 ++++++++++++++++++------------------
4 files changed, 202 insertions(+), 204 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index cf237dd..1f68e95 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -1,25 +1,25 @@
/*
- * OMAP4XXX L3 Interconnect error handling driver
- *
- * Copyright (C) 2011 Texas Corporation
- * Santosh Shilimkar <santosh.shilimkar@ti.com>
- * Sricharan <r.sricharan@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
- * USA
- */
+ * OMAP4XXX L3 Interconnect error handling driver
+ *
+ * Copyright (C) 2011 Texas Corporation
+ * Santosh Shilimkar <santosh.shilimkar@ti.com>
+ * Sricharan <r.sricharan@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
+ * USA
+ */
#include <linux/init.h>
#include <linux/io.h>
#include <linux/platform_device.h>
@@ -55,7 +55,7 @@
static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
{
- struct omap4_l3 *l3 = _l3;
+ struct omap4_l3 *l3 = _l3;
int inttype, i;
int err_src = 0;
u32 std_err_main, err_reg, clear, base, l3_targ_base;
@@ -122,7 +122,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
static int __init omap4_l3_probe(struct platform_device *pdev)
{
- static struct omap4_l3 *l3;
+ static struct omap4_l3 *l3;
struct resource *res;
int ret;
@@ -182,7 +182,7 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
IRQF_DISABLED, "l3-dbg-irq", l3);
if (ret) {
pr_crit("L3: request_irq failed to register for 0x%x\n",
- OMAP44XX_IRQ_L3_DBG);
+ OMAP44XX_IRQ_L3_DBG);
goto err3;
}
@@ -192,7 +192,7 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
IRQF_DISABLED, "l3-app-irq", l3);
if (ret) {
pr_crit("L3: request_irq failed to register for 0x%x\n",
- OMAP44XX_IRQ_L3_APP);
+ OMAP44XX_IRQ_L3_APP);
goto err4;
}
@@ -213,7 +213,7 @@ err0:
static int __exit omap4_l3_remove(struct platform_device *pdev)
{
- struct omap4_l3 *l3 = platform_get_drvdata(pdev);
+ struct omap4_l3 *l3 = platform_get_drvdata(pdev);
free_irq(l3->app_irq, l3);
free_irq(l3->debug_irq, l3);
@@ -226,9 +226,9 @@ static int __exit omap4_l3_remove(struct platform_device *pdev)
}
static struct platform_driver omap4_l3_driver = {
- .remove = __exit_p(omap4_l3_remove),
- .driver = {
- .name = "omap_l3_noc",
+ .remove = __exit_p(omap4_l3_remove),
+ .driver = {
+ .name = "omap_l3_noc",
},
};
diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h
index 22c0d57..9120e70 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.h
+++ b/arch/arm/mach-omap2/omap_l3_noc.h
@@ -1,25 +1,25 @@
- /*
- * OMAP4XXX L3 Interconnect error handling driver header
- *
- * Copyright (C) 2011 Texas Corporation
- * Santosh Shilimkar <santosh.shilimkar@ti.com>
- * sricharan <r.sricharan@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
- * USA
- */
+/*
+ * OMAP4XXX L3 Interconnect error handling driver header
+ *
+ * Copyright (C) 2011 Texas Corporation
+ * Santosh Shilimkar <santosh.shilimkar@ti.com>
+ * sricharan <r.sricharan@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
+ * USA
+ */
#ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
#define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
@@ -32,9 +32,9 @@
#define L3_DEBUG_ERROR 0x1
/* L3 TARG register offsets */
-#define L3_TARG_STDERRLOG_MAIN 0x48
-#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
-#define L3_FLAGMUX_REGERR0 0xc
+#define L3_TARG_STDERRLOG_MAIN 0x48
+#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
+#define L3_FLAGMUX_REGERR0 0xc
u32 l3_flagmux[L3_MODULES] = {
0x500,
@@ -78,34 +78,34 @@ u32 l3_targ_inst_clk3[] = {
char *l3_targ_inst_name[L3_MODULES][18] = {
{
- "DMM1",
- "DMM2",
- "ABE",
- "L4CFG",
- "CLK2 PWR DISC",
+ "DMM1",
+ "DMM2",
+ "ABE",
+ "L4CFG",
+ "CLK2 PWR DISC",
},
{
- "CORTEX M3" ,
- "DSS ",
- "GPMC ",
- "ISS ",
- "IVAHD ",
- "AES1",
- "L4 PER0",
- "OCMRAM ",
- "GPMC sERROR",
- "SGX ",
- "SL2 ",
- "C2C ",
- "PWR DISC CLK1",
- "SHA1",
- "AES2",
- "L4 PER3",
- "L4 PER1",
- "L4 PER2",
+ "CORTEX M3" ,
+ "DSS ",
+ "GPMC ",
+ "ISS ",
+ "IVAHD ",
+ "AES1",
+ "L4 PER0",
+ "OCMRAM ",
+ "GPMC sERROR",
+ "SGX ",
+ "SL2 ",
+ "C2C ",
+ "PWR DISC CLK1",
+ "SHA1",
+ "AES2",
+ "L4 PER3",
+ "L4 PER1",
+ "L4 PER2",
},
{
- "EMUSS",
+ "EMUSS",
},
};
@@ -116,13 +116,13 @@ u32 *l3_targ[L3_MODULES] = {
};
struct omap4_l3 {
- struct device *dev;
- struct clk *ick;
+ struct device *dev;
+ struct clk *ick;
/* memory base */
void __iomem *l3_base[L3_MODULES];
- int debug_irq;
- int app_irq;
+ int debug_irq;
+ int app_irq;
};
#endif
diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c
index fa07edf..a05a62f 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.c
+++ b/arch/arm/mach-omap2/omap_l3_smx.c
@@ -1,26 +1,26 @@
- /*
- * OMAP3XXX L3 Interconnect Driver
- *
- * Copyright (C) 2011 Texas Corporation
- * Felipe Balbi <balbi@ti.com>
- * Santosh Shilimkar <santosh.shilimkar@ti.com>
- * Sricharan <r.sricharan@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
- * USA
- */
+/*
+ * OMAP3XXX L3 Interconnect Driver
+ *
+ * Copyright (C) 2011 Texas Corporation
+ * Felipe Balbi <balbi@ti.com>
+ * Santosh Shilimkar <santosh.shilimkar@ti.com>
+ * Sricharan <r.sricharan@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
+ * USA
+ */
#include <linux/kernel.h>
#include <linux/slab.h>
@@ -135,7 +135,7 @@ static char *omap3_l3_initiator_string(u8 initid)
}
}
-/**
+/*
* omap3_l3_block_irq - handles a register block's irq
* @l3: struct omap3_l3 *
* @base: register block base address
@@ -150,30 +150,29 @@ static char *omap3_l3_initiator_string(u8 initid)
static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3,
u64 error, int error_addr)
{
- u8 code = omap3_l3_decode_error_code(error);
- u8 initid = omap3_l3_decode_initid(error);
- u8 multi = error & L3_ERROR_LOG_MULTI;
- u32 address = omap3_l3_decode_addr(error_addr);
+ u8 code = omap3_l3_decode_error_code(error);
+ u8 initid = omap3_l3_decode_initid(error);
+ u8 multi = error & L3_ERROR_LOG_MULTI;
+ u32 address = omap3_l3_decode_addr(error_addr);
WARN(true, "%s seen by %s %s at address %x\n",
- omap3_l3_code_string(code),
- omap3_l3_initiator_string(initid),
- multi ? "Multiple Errors" : "",
- address);
+ omap3_l3_code_string(code),
+ omap3_l3_initiator_string(initid),
+ multi ? "Multiple Errors" : "", address);
return IRQ_HANDLED;
}
static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
{
- struct omap3_l3 *l3 = _l3;
- u64 status, clear;
- u64 error;
- u64 error_addr;
- u64 err_source = 0;
- void __iomem *base;
- int int_type;
- irqreturn_t ret = IRQ_NONE;
+ struct omap3_l3 *l3 = _l3;
+ u64 status, clear;
+ u64 error;
+ u64 error_addr;
+ u64 err_source = 0;
+ void __iomem *base;
+ int int_type;
+ irqreturn_t ret = IRQ_NONE;
int_type = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
if (!int_type) {
@@ -197,7 +196,6 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
error = omap3_l3_readll(base, L3_ERROR_LOG);
if (error) {
error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR);
-
ret |= omap3_l3_block_irq(l3, error, error_addr);
}
@@ -214,9 +212,9 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
static int __init omap3_l3_probe(struct platform_device *pdev)
{
- struct omap3_l3 *l3;
- struct resource *res;
- int ret;
+ struct omap3_l3 *l3;
+ struct resource *res;
+ int ret;
l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
if (!l3)
diff --git a/arch/arm/mach-omap2/omap_l3_smx.h b/arch/arm/mach-omap2/omap_l3_smx.h
index 185d77a..18e5ec2 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.h
+++ b/arch/arm/mach-omap2/omap_l3_smx.h
@@ -1,26 +1,26 @@
- /*
- * OMAP3XXX L3 Interconnect Driver header
- *
- * Copyright (C) 2011 Texas Corporation
- * Felipe Balbi <balbi@ti.com>
- * Santosh Shilimkar <santosh.shilimkar@ti.com>
- * sricharan <r.sricharan@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
- * USA
- */
+/*
+ * OMAP3XXX L3 Interconnect Driver header
+ *
+ * Copyright (C) 2011 Texas Corporation
+ * Felipe Balbi <balbi@ti.com>
+ * Santosh Shilimkar <santosh.shilimkar@ti.com>
+ * sricharan <r.sricharan@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
+ * USA
+ */
#ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
#define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
@@ -78,32 +78,32 @@ static const u64 shift = 1;
#define L3_STATUS_0_L4EMUTA_REQ (shift << 60)
#define L3_STATUS_0_MAD2DTA_REQ (shift << 61)
-#define L3_STATUS_0_TIMEOUT_MASK (L3_STATUS_0_MPUIA_BRST \
- | L3_STATUS_0_MPUIA_RSP \
- | L3_STATUS_0_IVAIA_BRST \
- | L3_STATUS_0_IVAIA_RSP \
- | L3_STATUS_0_SGXIA_BRST \
- | L3_STATUS_0_SGXIA_RSP \
- | L3_STATUS_0_CAMIA_BRST \
- | L3_STATUS_0_CAMIA_RSP \
- | L3_STATUS_0_DISPIA_BRST \
- | L3_STATUS_0_DISPIA_RSP \
- | L3_STATUS_0_DMARDIA_BRST \
- | L3_STATUS_0_DMARDIA_RSP \
- | L3_STATUS_0_DMAWRIA_BRST \
- | L3_STATUS_0_DMAWRIA_RSP \
- | L3_STATUS_0_USBOTGIA_BRST \
- | L3_STATUS_0_USBOTGIA_RSP \
- | L3_STATUS_0_USBHOSTIA_BRST \
- | L3_STATUS_0_SMSTA_REQ \
- | L3_STATUS_0_GPMCTA_REQ \
- | L3_STATUS_0_OCMRAMTA_REQ \
- | L3_STATUS_0_OCMROMTA_REQ \
- | L3_STATUS_0_IVATA_REQ \
- | L3_STATUS_0_SGXTA_REQ \
- | L3_STATUS_0_L4CORETA_REQ \
- | L3_STATUS_0_L4PERTA_REQ \
- | L3_STATUS_0_L4EMUTA_REQ \
+#define L3_STATUS_0_TIMEOUT_MASK (L3_STATUS_0_MPUIA_BRST \
+ | L3_STATUS_0_MPUIA_RSP \
+ | L3_STATUS_0_IVAIA_BRST \
+ | L3_STATUS_0_IVAIA_RSP \
+ | L3_STATUS_0_SGXIA_BRST \
+ | L3_STATUS_0_SGXIA_RSP \
+ | L3_STATUS_0_CAMIA_BRST \
+ | L3_STATUS_0_CAMIA_RSP \
+ | L3_STATUS_0_DISPIA_BRST \
+ | L3_STATUS_0_DISPIA_RSP \
+ | L3_STATUS_0_DMARDIA_BRST \
+ | L3_STATUS_0_DMARDIA_RSP \
+ | L3_STATUS_0_DMAWRIA_BRST \
+ | L3_STATUS_0_DMAWRIA_RSP \
+ | L3_STATUS_0_USBOTGIA_BRST \
+ | L3_STATUS_0_USBOTGIA_RSP \
+ | L3_STATUS_0_USBHOSTIA_BRST \
+ | L3_STATUS_0_SMSTA_REQ \
+ | L3_STATUS_0_GPMCTA_REQ \
+ | L3_STATUS_0_OCMRAMTA_REQ \
+ | L3_STATUS_0_OCMROMTA_REQ \
+ | L3_STATUS_0_IVATA_REQ \
+ | L3_STATUS_0_SGXTA_REQ \
+ | L3_STATUS_0_L4CORETA_REQ \
+ | L3_STATUS_0_L4PERTA_REQ \
+ | L3_STATUS_0_L4EMUTA_REQ \
| L3_STATUS_0_MAD2DTA_REQ)
#define L3_SI_FLAG_STATUS_1 0x530
@@ -137,19 +137,19 @@ static const u64 shift = 1;
enum omap3_l3_initiator_id {
/* LCD has 1 ID */
- OMAP_L3_LCD = 29,
+ OMAP_L3_LCD = 29,
/* SAD2D has 1 ID */
- OMAP_L3_SAD2D = 28,
+ OMAP_L3_SAD2D = 28,
/* MPU has 5 IDs */
- OMAP_L3_IA_MPU_SS_1 = 27,
- OMAP_L3_IA_MPU_SS_2 = 26,
- OMAP_L3_IA_MPU_SS_3 = 25,
- OMAP_L3_IA_MPU_SS_4 = 24,
- OMAP_L3_IA_MPU_SS_5 = 23,
+ OMAP_L3_IA_MPU_SS_1 = 27,
+ OMAP_L3_IA_MPU_SS_2 = 26,
+ OMAP_L3_IA_MPU_SS_3 = 25,
+ OMAP_L3_IA_MPU_SS_4 = 24,
+ OMAP_L3_IA_MPU_SS_5 = 23,
/* IVA2.2 SS has 3 IDs*/
- OMAP_L3_IA_IVA_SS_1 = 22,
- OMAP_L3_IA_IVA_SS_2 = 21,
- OMAP_L3_IA_IVA_SS_3 = 20,
+ OMAP_L3_IA_IVA_SS_1 = 22,
+ OMAP_L3_IA_IVA_SS_2 = 21,
+ OMAP_L3_IA_IVA_SS_3 = 20,
/* IVA 2.2 SS DMA has 6 IDS */
OMAP_L3_IA_IVA_SS_DMA_1 = 19,
OMAP_L3_IA_IVA_SS_DMA_2 = 18,
@@ -158,25 +158,25 @@ enum omap3_l3_initiator_id {
OMAP_L3_IA_IVA_SS_DMA_5 = 15,
OMAP_L3_IA_IVA_SS_DMA_6 = 14,
/* SGX has 1 ID */
- OMAP_L3_IA_SGX = 13,
+ OMAP_L3_IA_SGX = 13,
/* CAM has 3 ID */
- OMAP_L3_IA_CAM_1 = 12,
- OMAP_L3_IA_CAM_2 = 11,
- OMAP_L3_IA_CAM_3 = 10,
+ OMAP_L3_IA_CAM_1 = 12,
+ OMAP_L3_IA_CAM_2 = 11,
+ OMAP_L3_IA_CAM_3 = 10,
/* DAP has 1 ID */
- OMAP_L3_IA_DAP = 9,
+ OMAP_L3_IA_DAP = 9,
/* SDMA WR has 2 IDs */
- OMAP_L3_SDMA_WR_1 = 8,
- OMAP_L3_SDMA_WR_2 = 7,
+ OMAP_L3_SDMA_WR_1 = 8,
+ OMAP_L3_SDMA_WR_2 = 7,
/* SDMA RD has 4 IDs */
- OMAP_L3_SDMA_RD_1 = 6,
- OMAP_L3_SDMA_RD_2 = 5,
- OMAP_L3_SDMA_RD_3 = 4,
- OMAP_L3_SDMA_RD_4 = 3,
+ OMAP_L3_SDMA_RD_1 = 6,
+ OMAP_L3_SDMA_RD_2 = 5,
+ OMAP_L3_SDMA_RD_3 = 4,
+ OMAP_L3_SDMA_RD_4 = 3,
/* HSUSB OTG has 1 ID */
- OMAP_L3_USBOTG = 2,
+ OMAP_L3_USBOTG = 2,
/* HSUSB HOST has 1 ID */
- OMAP_L3_USBHOST = 1,
+ OMAP_L3_USBHOST = 1,
};
enum omap3_l3_code {
@@ -192,17 +192,17 @@ enum omap3_l3_code {
};
struct omap3_l3 {
- struct device *dev;
- struct clk *ick;
+ struct device *dev;
+ struct clk *ick;
/* memory base*/
- void __iomem *rt;
+ void __iomem *rt;
- int debug_irq;
- int app_irq;
+ int debug_irq;
+ int app_irq;
/* true when and inband functional error occurs */
- unsigned inband:1;
+ unsigned inband:1;
};
/* offsets for l3 agents in order with the Flag status register */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 4/8] OMAP: Fix indentation issues in l3 error handler.
@ 2011-09-08 5:22 ` Santosh Shilimkar
0 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-arm-kernel
From: sricharan <r.sricharan@ti.com>
The indentation problems in the l3 noc and smx
error handler files are fixed.
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reported-by: Paul Walmsley <paul@pwsan.com>
Cc: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/omap_l3_noc.c | 58 +++++++-------
arch/arm/mach-omap2/omap_l3_noc.h | 106 +++++++++++++-------------
arch/arm/mach-omap2/omap_l3_smx.c | 86 ++++++++++----------
arch/arm/mach-omap2/omap_l3_smx.h | 156 ++++++++++++++++++------------------
4 files changed, 202 insertions(+), 204 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index cf237dd..1f68e95 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -1,25 +1,25 @@
/*
- * OMAP4XXX L3 Interconnect error handling driver
- *
- * Copyright (C) 2011 Texas Corporation
- * Santosh Shilimkar <santosh.shilimkar@ti.com>
- * Sricharan <r.sricharan@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
- * USA
- */
+ * OMAP4XXX L3 Interconnect error handling driver
+ *
+ * Copyright (C) 2011 Texas Corporation
+ * Santosh Shilimkar <santosh.shilimkar@ti.com>
+ * Sricharan <r.sricharan@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
+ * USA
+ */
#include <linux/init.h>
#include <linux/io.h>
#include <linux/platform_device.h>
@@ -55,7 +55,7 @@
static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
{
- struct omap4_l3 *l3 = _l3;
+ struct omap4_l3 *l3 = _l3;
int inttype, i;
int err_src = 0;
u32 std_err_main, err_reg, clear, base, l3_targ_base;
@@ -122,7 +122,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
static int __init omap4_l3_probe(struct platform_device *pdev)
{
- static struct omap4_l3 *l3;
+ static struct omap4_l3 *l3;
struct resource *res;
int ret;
@@ -182,7 +182,7 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
IRQF_DISABLED, "l3-dbg-irq", l3);
if (ret) {
pr_crit("L3: request_irq failed to register for 0x%x\n",
- OMAP44XX_IRQ_L3_DBG);
+ OMAP44XX_IRQ_L3_DBG);
goto err3;
}
@@ -192,7 +192,7 @@ static int __init omap4_l3_probe(struct platform_device *pdev)
IRQF_DISABLED, "l3-app-irq", l3);
if (ret) {
pr_crit("L3: request_irq failed to register for 0x%x\n",
- OMAP44XX_IRQ_L3_APP);
+ OMAP44XX_IRQ_L3_APP);
goto err4;
}
@@ -213,7 +213,7 @@ err0:
static int __exit omap4_l3_remove(struct platform_device *pdev)
{
- struct omap4_l3 *l3 = platform_get_drvdata(pdev);
+ struct omap4_l3 *l3 = platform_get_drvdata(pdev);
free_irq(l3->app_irq, l3);
free_irq(l3->debug_irq, l3);
@@ -226,9 +226,9 @@ static int __exit omap4_l3_remove(struct platform_device *pdev)
}
static struct platform_driver omap4_l3_driver = {
- .remove = __exit_p(omap4_l3_remove),
- .driver = {
- .name = "omap_l3_noc",
+ .remove = __exit_p(omap4_l3_remove),
+ .driver = {
+ .name = "omap_l3_noc",
},
};
diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h
index 22c0d57..9120e70 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.h
+++ b/arch/arm/mach-omap2/omap_l3_noc.h
@@ -1,25 +1,25 @@
- /*
- * OMAP4XXX L3 Interconnect error handling driver header
- *
- * Copyright (C) 2011 Texas Corporation
- * Santosh Shilimkar <santosh.shilimkar@ti.com>
- * sricharan <r.sricharan@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
- * USA
- */
+/*
+ * OMAP4XXX L3 Interconnect error handling driver header
+ *
+ * Copyright (C) 2011 Texas Corporation
+ * Santosh Shilimkar <santosh.shilimkar@ti.com>
+ * sricharan <r.sricharan@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
+ * USA
+ */
#ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
#define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
@@ -32,9 +32,9 @@
#define L3_DEBUG_ERROR 0x1
/* L3 TARG register offsets */
-#define L3_TARG_STDERRLOG_MAIN 0x48
-#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
-#define L3_FLAGMUX_REGERR0 0xc
+#define L3_TARG_STDERRLOG_MAIN 0x48
+#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
+#define L3_FLAGMUX_REGERR0 0xc
u32 l3_flagmux[L3_MODULES] = {
0x500,
@@ -78,34 +78,34 @@ u32 l3_targ_inst_clk3[] = {
char *l3_targ_inst_name[L3_MODULES][18] = {
{
- "DMM1",
- "DMM2",
- "ABE",
- "L4CFG",
- "CLK2 PWR DISC",
+ "DMM1",
+ "DMM2",
+ "ABE",
+ "L4CFG",
+ "CLK2 PWR DISC",
},
{
- "CORTEX M3" ,
- "DSS ",
- "GPMC ",
- "ISS ",
- "IVAHD ",
- "AES1",
- "L4 PER0",
- "OCMRAM ",
- "GPMC sERROR",
- "SGX ",
- "SL2 ",
- "C2C ",
- "PWR DISC CLK1",
- "SHA1",
- "AES2",
- "L4 PER3",
- "L4 PER1",
- "L4 PER2",
+ "CORTEX M3" ,
+ "DSS ",
+ "GPMC ",
+ "ISS ",
+ "IVAHD ",
+ "AES1",
+ "L4 PER0",
+ "OCMRAM ",
+ "GPMC sERROR",
+ "SGX ",
+ "SL2 ",
+ "C2C ",
+ "PWR DISC CLK1",
+ "SHA1",
+ "AES2",
+ "L4 PER3",
+ "L4 PER1",
+ "L4 PER2",
},
{
- "EMUSS",
+ "EMUSS",
},
};
@@ -116,13 +116,13 @@ u32 *l3_targ[L3_MODULES] = {
};
struct omap4_l3 {
- struct device *dev;
- struct clk *ick;
+ struct device *dev;
+ struct clk *ick;
/* memory base */
void __iomem *l3_base[L3_MODULES];
- int debug_irq;
- int app_irq;
+ int debug_irq;
+ int app_irq;
};
#endif
diff --git a/arch/arm/mach-omap2/omap_l3_smx.c b/arch/arm/mach-omap2/omap_l3_smx.c
index fa07edf..a05a62f 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.c
+++ b/arch/arm/mach-omap2/omap_l3_smx.c
@@ -1,26 +1,26 @@
- /*
- * OMAP3XXX L3 Interconnect Driver
- *
- * Copyright (C) 2011 Texas Corporation
- * Felipe Balbi <balbi@ti.com>
- * Santosh Shilimkar <santosh.shilimkar@ti.com>
- * Sricharan <r.sricharan@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
- * USA
- */
+/*
+ * OMAP3XXX L3 Interconnect Driver
+ *
+ * Copyright (C) 2011 Texas Corporation
+ * Felipe Balbi <balbi@ti.com>
+ * Santosh Shilimkar <santosh.shilimkar@ti.com>
+ * Sricharan <r.sricharan@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
+ * USA
+ */
#include <linux/kernel.h>
#include <linux/slab.h>
@@ -135,7 +135,7 @@ static char *omap3_l3_initiator_string(u8 initid)
}
}
-/**
+/*
* omap3_l3_block_irq - handles a register block's irq
* @l3: struct omap3_l3 *
* @base: register block base address
@@ -150,30 +150,29 @@ static char *omap3_l3_initiator_string(u8 initid)
static irqreturn_t omap3_l3_block_irq(struct omap3_l3 *l3,
u64 error, int error_addr)
{
- u8 code = omap3_l3_decode_error_code(error);
- u8 initid = omap3_l3_decode_initid(error);
- u8 multi = error & L3_ERROR_LOG_MULTI;
- u32 address = omap3_l3_decode_addr(error_addr);
+ u8 code = omap3_l3_decode_error_code(error);
+ u8 initid = omap3_l3_decode_initid(error);
+ u8 multi = error & L3_ERROR_LOG_MULTI;
+ u32 address = omap3_l3_decode_addr(error_addr);
WARN(true, "%s seen by %s %s at address %x\n",
- omap3_l3_code_string(code),
- omap3_l3_initiator_string(initid),
- multi ? "Multiple Errors" : "",
- address);
+ omap3_l3_code_string(code),
+ omap3_l3_initiator_string(initid),
+ multi ? "Multiple Errors" : "", address);
return IRQ_HANDLED;
}
static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
{
- struct omap3_l3 *l3 = _l3;
- u64 status, clear;
- u64 error;
- u64 error_addr;
- u64 err_source = 0;
- void __iomem *base;
- int int_type;
- irqreturn_t ret = IRQ_NONE;
+ struct omap3_l3 *l3 = _l3;
+ u64 status, clear;
+ u64 error;
+ u64 error_addr;
+ u64 err_source = 0;
+ void __iomem *base;
+ int int_type;
+ irqreturn_t ret = IRQ_NONE;
int_type = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
if (!int_type) {
@@ -197,7 +196,6 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
error = omap3_l3_readll(base, L3_ERROR_LOG);
if (error) {
error_addr = omap3_l3_readll(base, L3_ERROR_LOG_ADDR);
-
ret |= omap3_l3_block_irq(l3, error, error_addr);
}
@@ -214,9 +212,9 @@ static irqreturn_t omap3_l3_app_irq(int irq, void *_l3)
static int __init omap3_l3_probe(struct platform_device *pdev)
{
- struct omap3_l3 *l3;
- struct resource *res;
- int ret;
+ struct omap3_l3 *l3;
+ struct resource *res;
+ int ret;
l3 = kzalloc(sizeof(*l3), GFP_KERNEL);
if (!l3)
diff --git a/arch/arm/mach-omap2/omap_l3_smx.h b/arch/arm/mach-omap2/omap_l3_smx.h
index 185d77a..18e5ec2 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.h
+++ b/arch/arm/mach-omap2/omap_l3_smx.h
@@ -1,26 +1,26 @@
- /*
- * OMAP3XXX L3 Interconnect Driver header
- *
- * Copyright (C) 2011 Texas Corporation
- * Felipe Balbi <balbi@ti.com>
- * Santosh Shilimkar <santosh.shilimkar@ti.com>
- * sricharan <r.sricharan@ti.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
- * USA
- */
+/*
+ * OMAP3XXX L3 Interconnect Driver header
+ *
+ * Copyright (C) 2011 Texas Corporation
+ * Felipe Balbi <balbi@ti.com>
+ * Santosh Shilimkar <santosh.shilimkar@ti.com>
+ * sricharan <r.sricharan@ti.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
+ * USA
+ */
#ifndef __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
#define __ARCH_ARM_MACH_OMAP2_L3_INTERCONNECT_3XXX_H
@@ -78,32 +78,32 @@ static const u64 shift = 1;
#define L3_STATUS_0_L4EMUTA_REQ (shift << 60)
#define L3_STATUS_0_MAD2DTA_REQ (shift << 61)
-#define L3_STATUS_0_TIMEOUT_MASK (L3_STATUS_0_MPUIA_BRST \
- | L3_STATUS_0_MPUIA_RSP \
- | L3_STATUS_0_IVAIA_BRST \
- | L3_STATUS_0_IVAIA_RSP \
- | L3_STATUS_0_SGXIA_BRST \
- | L3_STATUS_0_SGXIA_RSP \
- | L3_STATUS_0_CAMIA_BRST \
- | L3_STATUS_0_CAMIA_RSP \
- | L3_STATUS_0_DISPIA_BRST \
- | L3_STATUS_0_DISPIA_RSP \
- | L3_STATUS_0_DMARDIA_BRST \
- | L3_STATUS_0_DMARDIA_RSP \
- | L3_STATUS_0_DMAWRIA_BRST \
- | L3_STATUS_0_DMAWRIA_RSP \
- | L3_STATUS_0_USBOTGIA_BRST \
- | L3_STATUS_0_USBOTGIA_RSP \
- | L3_STATUS_0_USBHOSTIA_BRST \
- | L3_STATUS_0_SMSTA_REQ \
- | L3_STATUS_0_GPMCTA_REQ \
- | L3_STATUS_0_OCMRAMTA_REQ \
- | L3_STATUS_0_OCMROMTA_REQ \
- | L3_STATUS_0_IVATA_REQ \
- | L3_STATUS_0_SGXTA_REQ \
- | L3_STATUS_0_L4CORETA_REQ \
- | L3_STATUS_0_L4PERTA_REQ \
- | L3_STATUS_0_L4EMUTA_REQ \
+#define L3_STATUS_0_TIMEOUT_MASK (L3_STATUS_0_MPUIA_BRST \
+ | L3_STATUS_0_MPUIA_RSP \
+ | L3_STATUS_0_IVAIA_BRST \
+ | L3_STATUS_0_IVAIA_RSP \
+ | L3_STATUS_0_SGXIA_BRST \
+ | L3_STATUS_0_SGXIA_RSP \
+ | L3_STATUS_0_CAMIA_BRST \
+ | L3_STATUS_0_CAMIA_RSP \
+ | L3_STATUS_0_DISPIA_BRST \
+ | L3_STATUS_0_DISPIA_RSP \
+ | L3_STATUS_0_DMARDIA_BRST \
+ | L3_STATUS_0_DMARDIA_RSP \
+ | L3_STATUS_0_DMAWRIA_BRST \
+ | L3_STATUS_0_DMAWRIA_RSP \
+ | L3_STATUS_0_USBOTGIA_BRST \
+ | L3_STATUS_0_USBOTGIA_RSP \
+ | L3_STATUS_0_USBHOSTIA_BRST \
+ | L3_STATUS_0_SMSTA_REQ \
+ | L3_STATUS_0_GPMCTA_REQ \
+ | L3_STATUS_0_OCMRAMTA_REQ \
+ | L3_STATUS_0_OCMROMTA_REQ \
+ | L3_STATUS_0_IVATA_REQ \
+ | L3_STATUS_0_SGXTA_REQ \
+ | L3_STATUS_0_L4CORETA_REQ \
+ | L3_STATUS_0_L4PERTA_REQ \
+ | L3_STATUS_0_L4EMUTA_REQ \
| L3_STATUS_0_MAD2DTA_REQ)
#define L3_SI_FLAG_STATUS_1 0x530
@@ -137,19 +137,19 @@ static const u64 shift = 1;
enum omap3_l3_initiator_id {
/* LCD has 1 ID */
- OMAP_L3_LCD = 29,
+ OMAP_L3_LCD = 29,
/* SAD2D has 1 ID */
- OMAP_L3_SAD2D = 28,
+ OMAP_L3_SAD2D = 28,
/* MPU has 5 IDs */
- OMAP_L3_IA_MPU_SS_1 = 27,
- OMAP_L3_IA_MPU_SS_2 = 26,
- OMAP_L3_IA_MPU_SS_3 = 25,
- OMAP_L3_IA_MPU_SS_4 = 24,
- OMAP_L3_IA_MPU_SS_5 = 23,
+ OMAP_L3_IA_MPU_SS_1 = 27,
+ OMAP_L3_IA_MPU_SS_2 = 26,
+ OMAP_L3_IA_MPU_SS_3 = 25,
+ OMAP_L3_IA_MPU_SS_4 = 24,
+ OMAP_L3_IA_MPU_SS_5 = 23,
/* IVA2.2 SS has 3 IDs*/
- OMAP_L3_IA_IVA_SS_1 = 22,
- OMAP_L3_IA_IVA_SS_2 = 21,
- OMAP_L3_IA_IVA_SS_3 = 20,
+ OMAP_L3_IA_IVA_SS_1 = 22,
+ OMAP_L3_IA_IVA_SS_2 = 21,
+ OMAP_L3_IA_IVA_SS_3 = 20,
/* IVA 2.2 SS DMA has 6 IDS */
OMAP_L3_IA_IVA_SS_DMA_1 = 19,
OMAP_L3_IA_IVA_SS_DMA_2 = 18,
@@ -158,25 +158,25 @@ enum omap3_l3_initiator_id {
OMAP_L3_IA_IVA_SS_DMA_5 = 15,
OMAP_L3_IA_IVA_SS_DMA_6 = 14,
/* SGX has 1 ID */
- OMAP_L3_IA_SGX = 13,
+ OMAP_L3_IA_SGX = 13,
/* CAM has 3 ID */
- OMAP_L3_IA_CAM_1 = 12,
- OMAP_L3_IA_CAM_2 = 11,
- OMAP_L3_IA_CAM_3 = 10,
+ OMAP_L3_IA_CAM_1 = 12,
+ OMAP_L3_IA_CAM_2 = 11,
+ OMAP_L3_IA_CAM_3 = 10,
/* DAP has 1 ID */
- OMAP_L3_IA_DAP = 9,
+ OMAP_L3_IA_DAP = 9,
/* SDMA WR has 2 IDs */
- OMAP_L3_SDMA_WR_1 = 8,
- OMAP_L3_SDMA_WR_2 = 7,
+ OMAP_L3_SDMA_WR_1 = 8,
+ OMAP_L3_SDMA_WR_2 = 7,
/* SDMA RD has 4 IDs */
- OMAP_L3_SDMA_RD_1 = 6,
- OMAP_L3_SDMA_RD_2 = 5,
- OMAP_L3_SDMA_RD_3 = 4,
- OMAP_L3_SDMA_RD_4 = 3,
+ OMAP_L3_SDMA_RD_1 = 6,
+ OMAP_L3_SDMA_RD_2 = 5,
+ OMAP_L3_SDMA_RD_3 = 4,
+ OMAP_L3_SDMA_RD_4 = 3,
/* HSUSB OTG has 1 ID */
- OMAP_L3_USBOTG = 2,
+ OMAP_L3_USBOTG = 2,
/* HSUSB HOST has 1 ID */
- OMAP_L3_USBHOST = 1,
+ OMAP_L3_USBHOST = 1,
};
enum omap3_l3_code {
@@ -192,17 +192,17 @@ enum omap3_l3_code {
};
struct omap3_l3 {
- struct device *dev;
- struct clk *ick;
+ struct device *dev;
+ struct clk *ick;
/* memory base*/
- void __iomem *rt;
+ void __iomem *rt;
- int debug_irq;
- int app_irq;
+ int debug_irq;
+ int app_irq;
/* true when and inband functional error occurs */
- unsigned inband:1;
+ unsigned inband:1;
};
/* offsets for l3 agents in order with the Flag status register */
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread
* [PATCH 5/8] OMAP: Fix sparse warnings in l3 error handler.
2011-09-08 5:21 ` Santosh Shilimkar
@ 2011-09-08 5:22 ` Santosh Shilimkar
-1 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-omap; +Cc: linux-arm-kernel, sricharan, Santosh Shilimkar, Paul Walmsley
From: sricharan <r.sricharan@ti.com>
Fix below sparse warnings from the l3-noc and l3-smx error handlers
files.
arch/arm/mach-omap2/omap_l3_smx.h:209:22: warning: symbol 'omap3_l3_app_bases' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_smx.h:308:22: warning: symbol 'omap3_l3_debug_bases' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_smx.h:325:2: warning: incorrect type in initializer (different address spaces)
arch/arm/mach-omap2/omap_l3_smx.h:325:2: expected unsigned int [usertype] *
arch/arm/mach-omap2/omap_l3_smx.h:325:2: got unsigned int [noderef] [toplevel] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_smx.h:326:2: warning: incorrect type in initializer (different address spaces)
arch/arm/mach-omap2/omap_l3_smx.h:326:2: expected unsigned int [usertype] *
arch/arm/mach-omap2/omap_l3_smx.h:326:2: got unsigned int [noderef] [toplevel] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_smx.h:324:5: warning: symbol 'omap3_l3_bases' was not declared. Should it be static?
CC arch/arm/mach-omap2/omap_l3_smx.o
CHECK arch/arm/mach-omap2/omap_l3_noc.c
arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: symbol '__v' shadows an earlier one
arch/arm/mach-omap2/omap_l3_noc.c:73:13: originally declared here
arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: symbol '__v' shadows an earlier one
arch/arm/mach-omap2/omap_l3_noc.c:83:20: originally declared here
arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: symbol '__v' shadows an earlier one
arch/arm/mach-omap2/omap_l3_noc.c:90:5: originally declared here
arch/arm/mach-omap2/omap_l3_noc.h:39:5: warning: symbol 'l3_flagmux' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_noc.h:46:5: warning: symbol 'l3_targ_inst_clk1' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_noc.h:54:5: warning: symbol 'l3_targ_inst_clk2' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_noc.h:75:5: warning: symbol 'l3_targ_inst_clk3' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_noc.h:79:6: warning: symbol 'l3_targ_inst_name' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_noc.h:112:5: warning: symbol 'l3_targ' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_noc.c:72:11: warning: cast removes address space of expression
arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap2/omap_l3_noc.c:73:13: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_noc.c:73:13: got unsigned int
arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap2/omap_l3_noc.c:83:20: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_noc.c:83:20: got unsigned int
arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap2/omap_l3_noc.c:90:5: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_noc.c:90:5: got unsigned int
arch/arm/mach-omap2/omap_l3_noc.c:96:5: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap2/omap_l3_noc.c:96:5: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_noc.c:96:5: got unsigned int
arch/arm/mach-omap2/omap_l3_noc.c:108:5: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap2/omap_l3_noc.c:108:5: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_noc.c:108:5: got unsigned int
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reported-by: Paul Walmsley <paul@pwsan.com>
Cc: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/omap_l3_noc.c | 11 ++++++-----
arch/arm/mach-omap2/omap_l3_noc.h | 12 ++++++------
arch/arm/mach-omap2/omap_l3_smx.h | 6 +++---
3 files changed, 15 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index 1f68e95..8f18357 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -58,7 +58,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
struct omap4_l3 *l3 = _l3;
int inttype, i;
int err_src = 0;
- u32 std_err_main, err_reg, clear, base, l3_targ_base;
+ u32 std_err_main, err_reg, clear;
+ void __iomem *base, *l3_targ_base;
char *source_name;
/* Get the Type of interrupt */
@@ -69,8 +70,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
* Read the regerr register of the clock domain
* to determine the source
*/
- base = (u32)l3->l3_base[i];
- err_reg = readl(base + l3_flagmux[i] +
+ base = l3->l3_base[i];
+ err_reg = __raw_readl(base + l3_flagmux[i] +
+ L3_FLAGMUX_REGERR0 + (inttype << 3));
/* Get the corresponding error and analyse */
@@ -80,7 +81,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
/* Read the stderrlog_main_source from clk domain */
l3_targ_base = base + *(l3_targ[i] + err_src);
- std_err_main = readl(l3_targ_base +
+ std_err_main = __raw_readl(l3_targ_base +
L3_TARG_STDERRLOG_MAIN);
switch (std_err_main & CUSTOM_ERROR) {
@@ -89,7 +90,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
l3_targ_inst_name[i][err_src];
WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n",
source_name,
- readl(l3_targ_base +
+ __raw_readl(l3_targ_base +
L3_TARG_STDERRLOG_SLVOFSLSB));
/* clear the std error log*/
clear = std_err_main | CLEAR_STDERR_LOG;
diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h
index 9120e70..74c1643 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.h
+++ b/arch/arm/mach-omap2/omap_l3_noc.h
@@ -36,14 +36,14 @@
#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
#define L3_FLAGMUX_REGERR0 0xc
-u32 l3_flagmux[L3_MODULES] = {
+static u32 l3_flagmux[L3_MODULES] = {
0x500,
0x1000,
0X0200
};
/* L3 Target standard Error register offsets */
-u32 l3_targ_inst_clk1[] = {
+static u32 l3_targ_inst_clk1[] = {
0x100, /* DMM1 */
0x200, /* DMM2 */
0x300, /* ABE */
@@ -51,7 +51,7 @@ u32 l3_targ_inst_clk1[] = {
0x600 /* CLK2 PWR DISC */
};
-u32 l3_targ_inst_clk2[] = {
+static u32 l3_targ_inst_clk2[] = {
0x500, /* CORTEX M3 */
0x300, /* DSS */
0x100, /* GPMC */
@@ -72,11 +72,11 @@ u32 l3_targ_inst_clk2[] = {
0xB00 /* L4 PER2*/
};
-u32 l3_targ_inst_clk3[] = {
+static u32 l3_targ_inst_clk3[] = {
0x0100 /* EMUSS */
};
-char *l3_targ_inst_name[L3_MODULES][18] = {
+static char *l3_targ_inst_name[L3_MODULES][18] = {
{
"DMM1",
"DMM2",
@@ -109,7 +109,7 @@ char *l3_targ_inst_name[L3_MODULES][18] = {
},
};
-u32 *l3_targ[L3_MODULES] = {
+static u32 *l3_targ[L3_MODULES] = {
l3_targ_inst_clk1,
l3_targ_inst_clk2,
l3_targ_inst_clk3,
diff --git a/arch/arm/mach-omap2/omap_l3_smx.h b/arch/arm/mach-omap2/omap_l3_smx.h
index 18e5ec2..4f3cebc 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.h
+++ b/arch/arm/mach-omap2/omap_l3_smx.h
@@ -206,7 +206,7 @@ struct omap3_l3 {
};
/* offsets for l3 agents in order with the Flag status register */
-unsigned int __iomem omap3_l3_app_bases[] = {
+static unsigned int omap3_l3_app_bases[] = {
/* MPU IA */
0x1400,
0x1400,
@@ -305,7 +305,7 @@ unsigned int __iomem omap3_l3_app_bases[] = {
0,
};
-unsigned int __iomem omap3_l3_debug_bases[] = {
+static unsigned int omap3_l3_debug_bases[] = {
/* MPU DATA IA */
0x1400,
/* RESERVED */
@@ -321,7 +321,7 @@ unsigned int __iomem omap3_l3_debug_bases[] = {
/* REST RESERVED */
};
-u32 *omap3_l3_bases[] = {
+static u32 *omap3_l3_bases[] = {
omap3_l3_app_bases,
omap3_l3_debug_bases,
};
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 5/8] OMAP: Fix sparse warnings in l3 error handler.
@ 2011-09-08 5:22 ` Santosh Shilimkar
0 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-arm-kernel
From: sricharan <r.sricharan@ti.com>
Fix below sparse warnings from the l3-noc and l3-smx error handlers
files.
arch/arm/mach-omap2/omap_l3_smx.h:209:22: warning: symbol 'omap3_l3_app_bases' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_smx.h:308:22: warning: symbol 'omap3_l3_debug_bases' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_smx.h:325:2: warning: incorrect type in initializer (different address spaces)
arch/arm/mach-omap2/omap_l3_smx.h:325:2: expected unsigned int [usertype] *
arch/arm/mach-omap2/omap_l3_smx.h:325:2: got unsigned int [noderef] [toplevel] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_smx.h:326:2: warning: incorrect type in initializer (different address spaces)
arch/arm/mach-omap2/omap_l3_smx.h:326:2: expected unsigned int [usertype] *
arch/arm/mach-omap2/omap_l3_smx.h:326:2: got unsigned int [noderef] [toplevel] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_smx.h:324:5: warning: symbol 'omap3_l3_bases' was not declared. Should it be static?
CC arch/arm/mach-omap2/omap_l3_smx.o
CHECK arch/arm/mach-omap2/omap_l3_noc.c
arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: symbol '__v' shadows an earlier one
arch/arm/mach-omap2/omap_l3_noc.c:73:13: originally declared here
arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: symbol '__v' shadows an earlier one
arch/arm/mach-omap2/omap_l3_noc.c:83:20: originally declared here
arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: symbol '__v' shadows an earlier one
arch/arm/mach-omap2/omap_l3_noc.c:90:5: originally declared here
arch/arm/mach-omap2/omap_l3_noc.h:39:5: warning: symbol 'l3_flagmux' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_noc.h:46:5: warning: symbol 'l3_targ_inst_clk1' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_noc.h:54:5: warning: symbol 'l3_targ_inst_clk2' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_noc.h:75:5: warning: symbol 'l3_targ_inst_clk3' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_noc.h:79:6: warning: symbol 'l3_targ_inst_name' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_noc.h:112:5: warning: symbol 'l3_targ' was not declared. Should it be static?
arch/arm/mach-omap2/omap_l3_noc.c:72:11: warning: cast removes address space of expression
arch/arm/mach-omap2/omap_l3_noc.c:73:13: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap2/omap_l3_noc.c:73:13: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_noc.c:73:13: got unsigned int
arch/arm/mach-omap2/omap_l3_noc.c:83:20: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap2/omap_l3_noc.c:83:20: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_noc.c:83:20: got unsigned int
arch/arm/mach-omap2/omap_l3_noc.c:90:5: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap2/omap_l3_noc.c:90:5: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_noc.c:90:5: got unsigned int
arch/arm/mach-omap2/omap_l3_noc.c:96:5: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap2/omap_l3_noc.c:96:5: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_noc.c:96:5: got unsigned int
arch/arm/mach-omap2/omap_l3_noc.c:108:5: warning: incorrect type in argument 1 (different base types)
arch/arm/mach-omap2/omap_l3_noc.c:108:5: expected void const volatile [noderef] <asn:2>*<noident>
arch/arm/mach-omap2/omap_l3_noc.c:108:5: got unsigned int
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Reported-by: Paul Walmsley <paul@pwsan.com>
Cc: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/omap_l3_noc.c | 11 ++++++-----
arch/arm/mach-omap2/omap_l3_noc.h | 12 ++++++------
arch/arm/mach-omap2/omap_l3_smx.h | 6 +++---
3 files changed, 15 insertions(+), 14 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index 1f68e95..8f18357 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -58,7 +58,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
struct omap4_l3 *l3 = _l3;
int inttype, i;
int err_src = 0;
- u32 std_err_main, err_reg, clear, base, l3_targ_base;
+ u32 std_err_main, err_reg, clear;
+ void __iomem *base, *l3_targ_base;
char *source_name;
/* Get the Type of interrupt */
@@ -69,8 +70,8 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
* Read the regerr register of the clock domain
* to determine the source
*/
- base = (u32)l3->l3_base[i];
- err_reg = readl(base + l3_flagmux[i] +
+ base = l3->l3_base[i];
+ err_reg = __raw_readl(base + l3_flagmux[i] +
+ L3_FLAGMUX_REGERR0 + (inttype << 3));
/* Get the corresponding error and analyse */
@@ -80,7 +81,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
/* Read the stderrlog_main_source from clk domain */
l3_targ_base = base + *(l3_targ[i] + err_src);
- std_err_main = readl(l3_targ_base +
+ std_err_main = __raw_readl(l3_targ_base +
L3_TARG_STDERRLOG_MAIN);
switch (std_err_main & CUSTOM_ERROR) {
@@ -89,7 +90,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
l3_targ_inst_name[i][err_src];
WARN(true, "L3 standard error: SOURCE:%s@address 0x%x\n",
source_name,
- readl(l3_targ_base +
+ __raw_readl(l3_targ_base +
L3_TARG_STDERRLOG_SLVOFSLSB));
/* clear the std error log*/
clear = std_err_main | CLEAR_STDERR_LOG;
diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h
index 9120e70..74c1643 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.h
+++ b/arch/arm/mach-omap2/omap_l3_noc.h
@@ -36,14 +36,14 @@
#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
#define L3_FLAGMUX_REGERR0 0xc
-u32 l3_flagmux[L3_MODULES] = {
+static u32 l3_flagmux[L3_MODULES] = {
0x500,
0x1000,
0X0200
};
/* L3 Target standard Error register offsets */
-u32 l3_targ_inst_clk1[] = {
+static u32 l3_targ_inst_clk1[] = {
0x100, /* DMM1 */
0x200, /* DMM2 */
0x300, /* ABE */
@@ -51,7 +51,7 @@ u32 l3_targ_inst_clk1[] = {
0x600 /* CLK2 PWR DISC */
};
-u32 l3_targ_inst_clk2[] = {
+static u32 l3_targ_inst_clk2[] = {
0x500, /* CORTEX M3 */
0x300, /* DSS */
0x100, /* GPMC */
@@ -72,11 +72,11 @@ u32 l3_targ_inst_clk2[] = {
0xB00 /* L4 PER2*/
};
-u32 l3_targ_inst_clk3[] = {
+static u32 l3_targ_inst_clk3[] = {
0x0100 /* EMUSS */
};
-char *l3_targ_inst_name[L3_MODULES][18] = {
+static char *l3_targ_inst_name[L3_MODULES][18] = {
{
"DMM1",
"DMM2",
@@ -109,7 +109,7 @@ char *l3_targ_inst_name[L3_MODULES][18] = {
},
};
-u32 *l3_targ[L3_MODULES] = {
+static u32 *l3_targ[L3_MODULES] = {
l3_targ_inst_clk1,
l3_targ_inst_clk2,
l3_targ_inst_clk3,
diff --git a/arch/arm/mach-omap2/omap_l3_smx.h b/arch/arm/mach-omap2/omap_l3_smx.h
index 18e5ec2..4f3cebc 100644
--- a/arch/arm/mach-omap2/omap_l3_smx.h
+++ b/arch/arm/mach-omap2/omap_l3_smx.h
@@ -206,7 +206,7 @@ struct omap3_l3 {
};
/* offsets for l3 agents in order with the Flag status register */
-unsigned int __iomem omap3_l3_app_bases[] = {
+static unsigned int omap3_l3_app_bases[] = {
/* MPU IA */
0x1400,
0x1400,
@@ -305,7 +305,7 @@ unsigned int __iomem omap3_l3_app_bases[] = {
0,
};
-unsigned int __iomem omap3_l3_debug_bases[] = {
+static unsigned int omap3_l3_debug_bases[] = {
/* MPU DATA IA */
0x1400,
/* RESERVED */
@@ -321,7 +321,7 @@ unsigned int __iomem omap3_l3_debug_bases[] = {
/* REST RESERVED */
};
-u32 *omap3_l3_bases[] = {
+static u32 *omap3_l3_bases[] = {
omap3_l3_app_bases,
omap3_l3_debug_bases,
};
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread
* [PATCH 6/8] OMAP: Print Initiator name for l3 custom error.
2011-09-08 5:21 ` Santosh Shilimkar
@ 2011-09-08 5:22 ` Santosh Shilimkar
-1 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-omap; +Cc: linux-arm-kernel, sricharan, Santosh Shilimkar
From: sricharan <r.sricharan@ti.com>
The initiator id gets logged in the l3 target registers for custom error.
So print it to aid debugging.
Based on a internal patch by Devaraj Rangasamy <dev@ti.com>
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/omap_l3_noc.c | 26 ++++++++++++++++----------
arch/arm/mach-omap2/omap_l3_noc.h | 34 ++++++++++++++++++++++++++++++++++
2 files changed, 50 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index 8f18357..07a3d3e 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -56,11 +56,11 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
{
struct omap4_l3 *l3 = _l3;
- int inttype, i;
+ int inttype, i, k;
int err_src = 0;
- u32 std_err_main, err_reg, clear;
+ u32 std_err_main, err_reg, clear, masterid;
void __iomem *base, *l3_targ_base;
- char *source_name;
+ char *target_name, *master_name = "UN IDENTIFIED";
/* Get the Type of interrupt */
inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
@@ -83,13 +83,15 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
l3_targ_base = base + *(l3_targ[i] + err_src);
std_err_main = __raw_readl(l3_targ_base +
L3_TARG_STDERRLOG_MAIN);
+ masterid = __raw_readl(l3_targ_base +
+ L3_TARG_STDERRLOG_MSTADDR);
switch (std_err_main & CUSTOM_ERROR) {
case STANDARD_ERROR:
- source_name =
+ target_name =
l3_targ_inst_name[i][err_src];
- WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n",
- source_name,
+ WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n",
+ target_name,
__raw_readl(l3_targ_base +
L3_TARG_STDERRLOG_SLVOFSLSB));
/* clear the std error log*/
@@ -99,11 +101,15 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
break;
case CUSTOM_ERROR:
- source_name =
+ target_name =
l3_targ_inst_name[i][err_src];
-
- WARN(true, "L3 custom error: SOURCE:%s\n",
- source_name);
+ for (k = 0; k < NUM_OF_L3_MASTERS; k++) {
+ if (masterid == l3_masters[k].id)
+ master_name =
+ l3_masters[k].name;
+ }
+ WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",
+ master_name, target_name);
/* clear the std error log*/
clear = std_err_main | CLEAR_STDERR_LOG;
writel(clear, l3_targ_base +
diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h
index 74c1643..90b5098 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.h
+++ b/arch/arm/mach-omap2/omap_l3_noc.h
@@ -34,8 +34,11 @@
/* L3 TARG register offsets */
#define L3_TARG_STDERRLOG_MAIN 0x48
#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
+#define L3_TARG_STDERRLOG_MSTADDR 0x68
#define L3_FLAGMUX_REGERR0 0xc
+#define NUM_OF_L3_MASTERS (sizeof(l3_masters)/sizeof(l3_masters[0]))
+
static u32 l3_flagmux[L3_MODULES] = {
0x500,
0x1000,
@@ -76,6 +79,37 @@ static u32 l3_targ_inst_clk3[] = {
0x0100 /* EMUSS */
};
+static struct l3_masters_data {
+ u32 id;
+ char name[10];
+} l3_masters[] = {
+ { 0x0 , "MPU"},
+ { 0x10, "CS_ADP"},
+ { 0x14, "xxx"},
+ { 0x20, "DSP"},
+ { 0x30, "IVAHD"},
+ { 0x40, "ISS"},
+ { 0x44, "DucatiM3"},
+ { 0x48, "FaceDetect"},
+ { 0x50, "SDMA_Rd"},
+ { 0x54, "SDMA_Wr"},
+ { 0x58, "xxx"},
+ { 0x5C, "xxx"},
+ { 0x60, "SGX"},
+ { 0x70, "DSS"},
+ { 0x80, "C2C"},
+ { 0x88, "xxx"},
+ { 0x8C, "xxx"},
+ { 0x90, "HSI"},
+ { 0xA0, "MMC1"},
+ { 0xA4, "MMC2"},
+ { 0xA8, "MMC6"},
+ { 0xB0, "UNIPRO1"},
+ { 0xC0, "USBHOSTHS"},
+ { 0xC4, "USBOTGHS"},
+ { 0xC8, "USBHOSTFS"}
+};
+
static char *l3_targ_inst_name[L3_MODULES][18] = {
{
"DMM1",
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 6/8] OMAP: Print Initiator name for l3 custom error.
@ 2011-09-08 5:22 ` Santosh Shilimkar
0 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-arm-kernel
From: sricharan <r.sricharan@ti.com>
The initiator id gets logged in the l3 target registers for custom error.
So print it to aid debugging.
Based on a internal patch by Devaraj Rangasamy <dev@ti.com>
Signed-off-by: sricharan <r.sricharan@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/mach-omap2/omap_l3_noc.c | 26 ++++++++++++++++----------
arch/arm/mach-omap2/omap_l3_noc.h | 34 ++++++++++++++++++++++++++++++++++
2 files changed, 50 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-omap2/omap_l3_noc.c b/arch/arm/mach-omap2/omap_l3_noc.c
index 8f18357..07a3d3e 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.c
+++ b/arch/arm/mach-omap2/omap_l3_noc.c
@@ -56,11 +56,11 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
{
struct omap4_l3 *l3 = _l3;
- int inttype, i;
+ int inttype, i, k;
int err_src = 0;
- u32 std_err_main, err_reg, clear;
+ u32 std_err_main, err_reg, clear, masterid;
void __iomem *base, *l3_targ_base;
- char *source_name;
+ char *target_name, *master_name = "UN IDENTIFIED";
/* Get the Type of interrupt */
inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;
@@ -83,13 +83,15 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
l3_targ_base = base + *(l3_targ[i] + err_src);
std_err_main = __raw_readl(l3_targ_base +
L3_TARG_STDERRLOG_MAIN);
+ masterid = __raw_readl(l3_targ_base +
+ L3_TARG_STDERRLOG_MSTADDR);
switch (std_err_main & CUSTOM_ERROR) {
case STANDARD_ERROR:
- source_name =
+ target_name =
l3_targ_inst_name[i][err_src];
- WARN(true, "L3 standard error: SOURCE:%s at address 0x%x\n",
- source_name,
+ WARN(true, "L3 standard error: TARGET:%s at address 0x%x\n",
+ target_name,
__raw_readl(l3_targ_base +
L3_TARG_STDERRLOG_SLVOFSLSB));
/* clear the std error log*/
@@ -99,11 +101,15 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
break;
case CUSTOM_ERROR:
- source_name =
+ target_name =
l3_targ_inst_name[i][err_src];
-
- WARN(true, "L3 custom error: SOURCE:%s\n",
- source_name);
+ for (k = 0; k < NUM_OF_L3_MASTERS; k++) {
+ if (masterid == l3_masters[k].id)
+ master_name =
+ l3_masters[k].name;
+ }
+ WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",
+ master_name, target_name);
/* clear the std error log*/
clear = std_err_main | CLEAR_STDERR_LOG;
writel(clear, l3_targ_base +
diff --git a/arch/arm/mach-omap2/omap_l3_noc.h b/arch/arm/mach-omap2/omap_l3_noc.h
index 74c1643..90b5098 100644
--- a/arch/arm/mach-omap2/omap_l3_noc.h
+++ b/arch/arm/mach-omap2/omap_l3_noc.h
@@ -34,8 +34,11 @@
/* L3 TARG register offsets */
#define L3_TARG_STDERRLOG_MAIN 0x48
#define L3_TARG_STDERRLOG_SLVOFSLSB 0x5c
+#define L3_TARG_STDERRLOG_MSTADDR 0x68
#define L3_FLAGMUX_REGERR0 0xc
+#define NUM_OF_L3_MASTERS (sizeof(l3_masters)/sizeof(l3_masters[0]))
+
static u32 l3_flagmux[L3_MODULES] = {
0x500,
0x1000,
@@ -76,6 +79,37 @@ static u32 l3_targ_inst_clk3[] = {
0x0100 /* EMUSS */
};
+static struct l3_masters_data {
+ u32 id;
+ char name[10];
+} l3_masters[] = {
+ { 0x0 , "MPU"},
+ { 0x10, "CS_ADP"},
+ { 0x14, "xxx"},
+ { 0x20, "DSP"},
+ { 0x30, "IVAHD"},
+ { 0x40, "ISS"},
+ { 0x44, "DucatiM3"},
+ { 0x48, "FaceDetect"},
+ { 0x50, "SDMA_Rd"},
+ { 0x54, "SDMA_Wr"},
+ { 0x58, "xxx"},
+ { 0x5C, "xxx"},
+ { 0x60, "SGX"},
+ { 0x70, "DSS"},
+ { 0x80, "C2C"},
+ { 0x88, "xxx"},
+ { 0x8C, "xxx"},
+ { 0x90, "HSI"},
+ { 0xA0, "MMC1"},
+ { 0xA4, "MMC2"},
+ { 0xA8, "MMC6"},
+ { 0xB0, "UNIPRO1"},
+ { 0xC0, "USBHOSTHS"},
+ { 0xC4, "USBOTGHS"},
+ { 0xC8, "USBHOSTFS"}
+};
+
static char *l3_targ_inst_name[L3_MODULES][18] = {
{
"DMM1",
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread
* [PATCH 7/8] OMAP4: clock: Add CPU local timer clock node.
2011-09-08 5:21 ` Santosh Shilimkar
@ 2011-09-08 5:22 ` Santosh Shilimkar
-1 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-omap
Cc: linux-arm-kernel, Santosh Shilimkar, Paul Walmsley, Kevin Hilman
Local timer clock is sourced from the CPU clock and hence changes
along with CPU clock. These per CPU local timers are used as
clock-events, so they need to be reconfigured on CPU frequency
change as part of CPUfreq governor.
Newly introduced clockevents_reconfigure() needs to know the
twd clock-rate. Provide a clock-node to make clk_get_rate() work
for TWD.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
---
arch/arm/mach-omap2/clock44xx_data.c | 9 +++++++++
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 2af0e3f..8c981ab 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3091,6 +3091,14 @@ static struct clk auxclkreq5_ck = {
.recalc = &omap2_clksel_recalc,
};
+static struct clk smp_twd = {
+ .name = "smp_twd",
+ .parent = &dpll_mpu_ck,
+ .ops = &clkops_null,
+ .fixed_div = 2,
+ .recalc = &omap_fixed_divisor_recalc,
+};
+
/*
* clkdev
*/
@@ -3363,6 +3371,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X),
CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X),
CLK("omap_wdt", "ick", &dummy_ck, CK_443X),
+ CLK(NULL, "smp_twd", &smp_twd, CK_443X),
};
int __init omap4xxx_clk_init(void)
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 7/8] OMAP4: clock: Add CPU local timer clock node.
@ 2011-09-08 5:22 ` Santosh Shilimkar
0 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-arm-kernel
Local timer clock is sourced from the CPU clock and hence changes
along with CPU clock. These per CPU local timers are used as
clock-events, so they need to be reconfigured on CPU frequency
change as part of CPUfreq governor.
Newly introduced clockevents_reconfigure() needs to know the
twd clock-rate. Provide a clock-node to make clk_get_rate() work
for TWD.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
---
arch/arm/mach-omap2/clock44xx_data.c | 9 +++++++++
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 2af0e3f..8c981ab 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -3091,6 +3091,14 @@ static struct clk auxclkreq5_ck = {
.recalc = &omap2_clksel_recalc,
};
+static struct clk smp_twd = {
+ .name = "smp_twd",
+ .parent = &dpll_mpu_ck,
+ .ops = &clkops_null,
+ .fixed_div = 2,
+ .recalc = &omap_fixed_divisor_recalc,
+};
+
/*
* clkdev
*/
@@ -3363,6 +3371,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK("usbhs-omap.0", "usbhost_ick", &dummy_ck, CK_443X),
CLK("usbhs-omap.0", "usbtll_fck", &dummy_ck, CK_443X),
CLK("omap_wdt", "ick", &dummy_ck, CK_443X),
+ CLK(NULL, "smp_twd", &smp_twd, CK_443X),
};
int __init omap4xxx_clk_init(void)
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 7/8] OMAP4: clock: Add CPU local timer clock node.
2011-09-08 5:22 ` Santosh Shilimkar
@ 2011-09-29 19:12 ` Paul Walmsley
-1 siblings, 0 replies; 56+ messages in thread
From: Paul Walmsley @ 2011-09-29 19:12 UTC (permalink / raw)
To: Santosh Shilimkar; +Cc: linux-omap, linux-arm-kernel, Kevin Hilman
Hi Santosh,
On Thu, 8 Sep 2011, Santosh Shilimkar wrote:
> Local timer clock is sourced from the CPU clock and hence changes
> along with CPU clock. These per CPU local timers are used as
> clock-events, so they need to be reconfigured on CPU frequency
> change as part of CPUfreq governor.
>
> Newly introduced clockevents_reconfigure() needs to know the
> twd clock-rate. Provide a clock-node to make clk_get_rate() work
> for TWD.
>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Cc: Paul Walmsley <paul@pwsan.com>
> Cc: Kevin Hilman <khilman@ti.com>
This clock looks like the ARM Cortex-A9 MPCore PERIPHCLK, correct? From
ARM Cortex-A9 MPCore Technical Reference Manual (DDI 0407G) Section 5.1
"Clocks"?
Assuming that is so, I've modified this patch appropriately, and added
support to the autogeneration script to generate this clock node.
Care to take a quick look at it to make sure it's okay?
- Paul
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
Date: Thu, 8 Sep 2011 10:52:06 +0530
Subject: [PATCH] ARM: OMAP4: clock: Add CPU local timer clock node.
Local timer clock is sourced from the CPU clock and hence changes
along with CPU clock. These per CPU local timers are used as
clock-events, so they need to be reconfigured on CPU frequency
change as part of CPUfreq governor.
Newly introduced clockevents_reconfigure() needs to know the
twd clock-rate. Provide a clock-node to make clk_get_rate() work
for TWD.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
[paul@pwsan.com: renamed clock node to 'mpu_periphclk' to indicate that this
is the Cortex-A9 MPCore subsystem clock PERIPHCLK (DDI 0407G); moved
clock and clkdev entries to match the autogenerated script output]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/clock44xx_data.c | 9 +++++++++
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 4873c00..9684233 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1195,6 +1195,14 @@ static struct clk l4_wkup_clk_mux_ck = {
.recalc = &omap2_clksel_recalc,
};
+static struct clk mpu_periphclk = {
+ .name = "mpu_periphclk",
+ .parent = &dpll_mpu_ck,
+ .ops = &clkops_null,
+ .fixed_div = 2,
+ .recalc = &omap_fixed_divisor_recalc,
+};
+
static const struct clksel_rate div2_2to1_rates[] = {
{ .div = 1, .val = 1, .flags = RATE_IN_4430 },
{ .div = 2, .val = 0, .flags = RATE_IN_4430 },
@@ -3189,6 +3197,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X),
CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X),
CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X),
+ CLK(NULL, "smp_twd", &mpu_periphclk, CK_443X),
CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X),
CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X),
CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X),
--
1.7.6.3
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 7/8] OMAP4: clock: Add CPU local timer clock node.
@ 2011-09-29 19:12 ` Paul Walmsley
0 siblings, 0 replies; 56+ messages in thread
From: Paul Walmsley @ 2011-09-29 19:12 UTC (permalink / raw)
To: linux-arm-kernel
Hi Santosh,
On Thu, 8 Sep 2011, Santosh Shilimkar wrote:
> Local timer clock is sourced from the CPU clock and hence changes
> along with CPU clock. These per CPU local timers are used as
> clock-events, so they need to be reconfigured on CPU frequency
> change as part of CPUfreq governor.
>
> Newly introduced clockevents_reconfigure() needs to know the
> twd clock-rate. Provide a clock-node to make clk_get_rate() work
> for TWD.
>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> Cc: Paul Walmsley <paul@pwsan.com>
> Cc: Kevin Hilman <khilman@ti.com>
This clock looks like the ARM Cortex-A9 MPCore PERIPHCLK, correct? From
ARM Cortex-A9 MPCore Technical Reference Manual (DDI 0407G) Section 5.1
"Clocks"?
Assuming that is so, I've modified this patch appropriately, and added
support to the autogeneration script to generate this clock node.
Care to take a quick look at it to make sure it's okay?
- Paul
From: Santosh Shilimkar <santosh.shilimkar@ti.com>
Date: Thu, 8 Sep 2011 10:52:06 +0530
Subject: [PATCH] ARM: OMAP4: clock: Add CPU local timer clock node.
Local timer clock is sourced from the CPU clock and hence changes
along with CPU clock. These per CPU local timers are used as
clock-events, so they need to be reconfigured on CPU frequency
change as part of CPUfreq governor.
Newly introduced clockevents_reconfigure() needs to know the
twd clock-rate. Provide a clock-node to make clk_get_rate() work
for TWD.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
[paul at pwsan.com: renamed clock node to 'mpu_periphclk' to indicate that this
is the Cortex-A9 MPCore subsystem clock PERIPHCLK (DDI 0407G); moved
clock and clkdev entries to match the autogenerated script output]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
---
arch/arm/mach-omap2/clock44xx_data.c | 9 +++++++++
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/arch/arm/mach-omap2/clock44xx_data.c b/arch/arm/mach-omap2/clock44xx_data.c
index 4873c00..9684233 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -1195,6 +1195,14 @@ static struct clk l4_wkup_clk_mux_ck = {
.recalc = &omap2_clksel_recalc,
};
+static struct clk mpu_periphclk = {
+ .name = "mpu_periphclk",
+ .parent = &dpll_mpu_ck,
+ .ops = &clkops_null,
+ .fixed_div = 2,
+ .recalc = &omap_fixed_divisor_recalc,
+};
+
static const struct clksel_rate div2_2to1_rates[] = {
{ .div = 1, .val = 1, .flags = RATE_IN_4430 },
{ .div = 2, .val = 0, .flags = RATE_IN_4430 },
@@ -3189,6 +3197,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "l4_div_ck", &l4_div_ck, CK_443X),
CLK(NULL, "lp_clk_div_ck", &lp_clk_div_ck, CK_443X),
CLK(NULL, "l4_wkup_clk_mux_ck", &l4_wkup_clk_mux_ck, CK_443X),
+ CLK(NULL, "smp_twd", &mpu_periphclk, CK_443X),
CLK(NULL, "ocp_abe_iclk", &ocp_abe_iclk, CK_443X),
CLK(NULL, "per_abe_24m_fclk", &per_abe_24m_fclk, CK_443X),
CLK(NULL, "per_abe_nc_fclk", &per_abe_nc_fclk, CK_443X),
--
1.7.6.3
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 7/8] OMAP4: clock: Add CPU local timer clock node.
2011-09-29 19:12 ` Paul Walmsley
@ 2011-09-30 9:14 ` Shilimkar, Santosh
-1 siblings, 0 replies; 56+ messages in thread
From: Shilimkar, Santosh @ 2011-09-30 9:14 UTC (permalink / raw)
To: Paul Walmsley; +Cc: linux-omap, linux-arm-kernel, Kevin Hilman
On Fri, Sep 30, 2011 at 12:42 AM, Paul Walmsley <paul@pwsan.com> wrote:
> Hi Santosh,
>
> On Thu, 8 Sep 2011, Santosh Shilimkar wrote:
>
>> Local timer clock is sourced from the CPU clock and hence changes
>> along with CPU clock. These per CPU local timers are used as
>> clock-events, so they need to be reconfigured on CPU frequency
>> change as part of CPUfreq governor.
>>
>> Newly introduced clockevents_reconfigure() needs to know the
>> twd clock-rate. Provide a clock-node to make clk_get_rate() work
>> for TWD.
>>
>> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
>> Cc: Paul Walmsley <paul@pwsan.com>
>> Cc: Kevin Hilman <khilman@ti.com>
>
> This clock looks like the ARM Cortex-A9 MPCore PERIPHCLK, correct? From
> ARM Cortex-A9 MPCore Technical Reference Manual (DDI 0407G) Section 5.1
> "Clocks"?
>
Yes. Peripheral clock/2
> Assuming that is so, I've modified this patch appropriately, and added
> support to the autogeneration script to generate this clock node.
> Care to take a quick look at it to make sure it's okay?
>
Thanks a lot Paul. It looks good.
Regards
Santosh
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To unsubscribe from this list: send the line "unsubscribe linux-omap" in
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^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 7/8] OMAP4: clock: Add CPU local timer clock node.
@ 2011-09-30 9:14 ` Shilimkar, Santosh
0 siblings, 0 replies; 56+ messages in thread
From: Shilimkar, Santosh @ 2011-09-30 9:14 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Sep 30, 2011 at 12:42 AM, Paul Walmsley <paul@pwsan.com> wrote:
> Hi Santosh,
>
> On Thu, 8 Sep 2011, Santosh Shilimkar wrote:
>
>> Local timer clock is sourced from the CPU clock and hence changes
>> along with CPU clock. These per CPU local timers are used as
>> clock-events, so they need to be reconfigured on CPU frequency
>> change as part of CPUfreq governor.
>>
>> Newly introduced clockevents_reconfigure() needs to know the
>> twd clock-rate. Provide a clock-node to make clk_get_rate() work
>> for TWD.
>>
>> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
>> Cc: Paul Walmsley <paul@pwsan.com>
>> Cc: Kevin Hilman <khilman@ti.com>
>
> This clock looks like the ARM Cortex-A9 MPCore PERIPHCLK, correct? ?From
> ARM Cortex-A9 MPCore Technical Reference Manual (DDI 0407G) Section 5.1
> "Clocks"?
>
Yes. Peripheral clock/2
> Assuming that is so, I've modified this patch appropriately, and added
> support to the autogeneration script to generate this clock node.
> Care to take a quick look at it to make sure it's okay?
>
Thanks a lot Paul. It looks good.
Regards
Santosh
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 7/8] OMAP4: clock: Add CPU local timer clock node.
2011-09-08 5:22 ` Santosh Shilimkar
@ 2011-09-29 21:30 ` Linus Walleij
-1 siblings, 0 replies; 56+ messages in thread
From: Linus Walleij @ 2011-09-29 21:30 UTC (permalink / raw)
To: Santosh Shilimkar
Cc: linux-omap, Kevin Hilman, Paul Walmsley, linux-arm-kernel
2011/9/8 Santosh Shilimkar <santosh.shilimkar@ti.com>:
> Local timer clock is sourced from the CPU clock and hence changes
> along with CPU clock. These per CPU local timers are used as
> clock-events, so they need to be reconfigured on CPU frequency
> change as part of CPUfreq governor.
This requires patch 6956/2 right?
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6956/2
Can I add your Tested-by: to the patch as well?
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 7/8] OMAP4: clock: Add CPU local timer clock node.
@ 2011-09-29 21:30 ` Linus Walleij
0 siblings, 0 replies; 56+ messages in thread
From: Linus Walleij @ 2011-09-29 21:30 UTC (permalink / raw)
To: linux-arm-kernel
2011/9/8 Santosh Shilimkar <santosh.shilimkar@ti.com>:
> Local timer clock is sourced from the CPU clock and hence changes
> along with CPU clock. These per CPU local timers are used as
> clock-events, so they need to be reconfigured on CPU frequency
> change as part of CPUfreq governor.
This requires patch 6956/2 right?
http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6956/2
Can I add your Tested-by: to the patch as well?
Yours,
Linus Walleij
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 7/8] OMAP4: clock: Add CPU local timer clock node.
2011-09-29 21:30 ` Linus Walleij
@ 2011-09-30 9:15 ` Shilimkar, Santosh
-1 siblings, 0 replies; 56+ messages in thread
From: Shilimkar, Santosh @ 2011-09-30 9:15 UTC (permalink / raw)
To: Linus Walleij; +Cc: linux-omap, Kevin Hilman, Paul Walmsley, linux-arm-kernel
On Fri, Sep 30, 2011 at 3:00 AM, Linus Walleij <linus.walleij@linaro.org> wrote:
> 2011/9/8 Santosh Shilimkar <santosh.shilimkar@ti.com>:
>
>> Local timer clock is sourced from the CPU clock and hence changes
>> along with CPU clock. These per CPU local timers are used as
>> clock-events, so they need to be reconfigured on CPU frequency
>> change as part of CPUfreq governor.
>
> This requires patch 6956/2 right?
> http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6956/2
>
> Can I add your Tested-by: to the patch as well?
>
Sure.
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 7/8] OMAP4: clock: Add CPU local timer clock node.
@ 2011-09-30 9:15 ` Shilimkar, Santosh
0 siblings, 0 replies; 56+ messages in thread
From: Shilimkar, Santosh @ 2011-09-30 9:15 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Sep 30, 2011 at 3:00 AM, Linus Walleij <linus.walleij@linaro.org> wrote:
> 2011/9/8 Santosh Shilimkar <santosh.shilimkar@ti.com>:
>
>> Local timer clock is sourced from the CPU clock and hence changes
>> along with CPU clock. These per CPU local timers are used as
>> clock-events, so they need to be reconfigured on CPU frequency
>> change as part of CPUfreq governor.
>
> This requires patch 6956/2 right?
> http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6956/2
>
> Can I add your Tested-by: to the patch as well?
>
Sure.
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 7/8] OMAP4: clock: Add CPU local timer clock node.
2011-09-30 9:15 ` Shilimkar, Santosh
@ 2011-12-08 23:02 ` Turquette, Mike
-1 siblings, 0 replies; 56+ messages in thread
From: Turquette, Mike @ 2011-12-08 23:02 UTC (permalink / raw)
To: Shilimkar, Santosh
Cc: Linus Walleij, Kevin Hilman, Paul Walmsley, linux-omap, linux-arm-kernel
On Fri, Sep 30, 2011 at 2:15 AM, Shilimkar, Santosh
<santosh.shilimkar@ti.com> wrote:
> On Fri, Sep 30, 2011 at 3:00 AM, Linus Walleij <linus.walleij@linaro.org> wrote:
>> 2011/9/8 Santosh Shilimkar <santosh.shilimkar@ti.com>:
>>
>>> Local timer clock is sourced from the CPU clock and hence changes
>>> along with CPU clock. These per CPU local timers are used as
>>> clock-events, so they need to be reconfigured on CPU frequency
>>> change as part of CPUfreq governor.
>>
>> This requires patch 6956/2 right?
>> http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6956/2
>>
>> Can I add your Tested-by: to the patch as well?
>>
> Sure.
Santosh,
I've taken in Linus' patch as well as this patch while testing clk
notifiers (part of common clk framework code).
Linus' patch matches the clk based on dev_id, but the clkdev entry in
your patch populated dev_id with NULL and con_id with "smp_twd" so
things never worked correctly. Below changed fixed it for me:
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index ae8c292..0f8cf68 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -4114,7 +4114,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "l4_div_ck",
&l4_div_ck_hw.clk, CK_443X),
CLK(NULL, "lp_clk_div_ck",
&lp_clk_div_ck_hw.clk, CK_443X),
CLK(NULL, "l4_wkup_clk_mux_ck",
&l4_wkup_clk_mux_ck_hw.clk, CK_443X),
- CLK(NULL, "smp_twd",
&mpu_periphclk_hw.clk, CK_443X),
+ CLK("smp_twd", NULL, &mpu_periphclk_hw.clk,
CK_443X),
CLK(NULL, "ocp_abe_iclk",
&ocp_abe_iclk_hw.clk, CK_443X),
CLK(NULL, "per_abe_24m_fclk",
&per_abe_24m_fclk_hw.clk, CK_443X),
CLK(NULL, "per_abe_nc_fclk",
&per_abe_nc_fclk_hw.clk, CK_443X),
A better change might be for the code in smp_twd.c to match on con_id
but I'll let you guys sort that out.
Regards,
Mike
^ permalink raw reply related [flat|nested] 56+ messages in thread* [PATCH 7/8] OMAP4: clock: Add CPU local timer clock node.
@ 2011-12-08 23:02 ` Turquette, Mike
0 siblings, 0 replies; 56+ messages in thread
From: Turquette, Mike @ 2011-12-08 23:02 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Sep 30, 2011 at 2:15 AM, Shilimkar, Santosh
<santosh.shilimkar@ti.com> wrote:
> On Fri, Sep 30, 2011 at 3:00 AM, Linus Walleij <linus.walleij@linaro.org> wrote:
>> 2011/9/8 Santosh Shilimkar <santosh.shilimkar@ti.com>:
>>
>>> Local timer clock is sourced from the CPU clock and hence changes
>>> along with CPU clock. These per CPU local timers are used as
>>> clock-events, so they need to be reconfigured on CPU frequency
>>> change as part of CPUfreq governor.
>>
>> This requires patch 6956/2 right?
>> http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6956/2
>>
>> Can I add your Tested-by: to the patch as well?
>>
> Sure.
Santosh,
I've taken in Linus' patch as well as this patch while testing clk
notifiers (part of common clk framework code).
Linus' patch matches the clk based on dev_id, but the clkdev entry in
your patch populated dev_id with NULL and con_id with "smp_twd" so
things never worked correctly. Below changed fixed it for me:
diff --git a/arch/arm/mach-omap2/clock44xx_data.c
b/arch/arm/mach-omap2/clock44xx_data.c
index ae8c292..0f8cf68 100644
--- a/arch/arm/mach-omap2/clock44xx_data.c
+++ b/arch/arm/mach-omap2/clock44xx_data.c
@@ -4114,7 +4114,7 @@ static struct omap_clk omap44xx_clks[] = {
CLK(NULL, "l4_div_ck",
&l4_div_ck_hw.clk, CK_443X),
CLK(NULL, "lp_clk_div_ck",
&lp_clk_div_ck_hw.clk, CK_443X),
CLK(NULL, "l4_wkup_clk_mux_ck",
&l4_wkup_clk_mux_ck_hw.clk, CK_443X),
- CLK(NULL, "smp_twd",
&mpu_periphclk_hw.clk, CK_443X),
+ CLK("smp_twd", NULL, &mpu_periphclk_hw.clk,
CK_443X),
CLK(NULL, "ocp_abe_iclk",
&ocp_abe_iclk_hw.clk, CK_443X),
CLK(NULL, "per_abe_24m_fclk",
&per_abe_24m_fclk_hw.clk, CK_443X),
CLK(NULL, "per_abe_nc_fclk",
&per_abe_nc_fclk_hw.clk, CK_443X),
A better change might be for the code in smp_twd.c to match on con_id
but I'll let you guys sort that out.
Regards,
Mike
^ permalink raw reply related [flat|nested] 56+ messages in thread* Re: [PATCH 7/8] OMAP4: clock: Add CPU local timer clock node.
2011-12-08 23:02 ` Turquette, Mike
@ 2011-12-12 8:15 ` Shilimkar, Santosh
-1 siblings, 0 replies; 56+ messages in thread
From: Shilimkar, Santosh @ 2011-12-12 8:15 UTC (permalink / raw)
To: Turquette, Mike
Cc: Linus Walleij, Kevin Hilman, Paul Walmsley, linux-omap, linux-arm-kernel
On Fri, Dec 9, 2011 at 4:32 AM, Turquette, Mike <mturquette@ti.com> wrote:
> On Fri, Sep 30, 2011 at 2:15 AM, Shilimkar, Santosh
> <santosh.shilimkar@ti.com> wrote:
>> On Fri, Sep 30, 2011 at 3:00 AM, Linus Walleij <linus.walleij@linaro.org> wrote:
>>> 2011/9/8 Santosh Shilimkar <santosh.shilimkar@ti.com>:
>>>
>>>> Local timer clock is sourced from the CPU clock and hence changes
>>>> along with CPU clock. These per CPU local timers are used as
>>>> clock-events, so they need to be reconfigured on CPU frequency
>>>> change as part of CPUfreq governor.
>>>
>>> This requires patch 6956/2 right?
>>> http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6956/2
>>>
>>> Can I add your Tested-by: to the patch as well?
>>>
>> Sure.
>
> Santosh,
>
> I've taken in Linus' patch as well as this patch while testing clk
> notifiers (part of common clk framework code).
>
> Linus' patch matches the clk based on dev_id, but the clkdev entry in
> your patch populated dev_id with NULL and con_id with "smp_twd" so
> things never worked correctly. Below changed fixed it for me:
>
You are right.
When I picked up the patch while changing the
OMAP44XX stuff to OMAP4430, looks like I miss-placed it.
> diff --git a/arch/arm/mach-omap2/clock44xx_data.c
> b/arch/arm/mach-omap2/clock44xx_data.c
> index ae8c292..0f8cf68 100644
> --- a/arch/arm/mach-omap2/clock44xx_data.c
> +++ b/arch/arm/mach-omap2/clock44xx_data.c
> @@ -4114,7 +4114,7 @@ static struct omap_clk omap44xx_clks[] = {
> CLK(NULL, "l4_div_ck",
> &l4_div_ck_hw.clk, CK_443X),
> CLK(NULL, "lp_clk_div_ck",
> &lp_clk_div_ck_hw.clk, CK_443X),
> CLK(NULL, "l4_wkup_clk_mux_ck",
> &l4_wkup_clk_mux_ck_hw.clk, CK_443X),
> - CLK(NULL, "smp_twd",
> &mpu_periphclk_hw.clk, CK_443X),
> + CLK("smp_twd", NULL, &mpu_periphclk_hw.clk,
> CK_443X),
> CLK(NULL, "ocp_abe_iclk",
> &ocp_abe_iclk_hw.clk, CK_443X),
> CLK(NULL, "per_abe_24m_fclk",
> &per_abe_24m_fclk_hw.clk, CK_443X),
> CLK(NULL, "per_abe_nc_fclk",
> &per_abe_nc_fclk_hw.clk, CK_443X),
>
> A better change might be for the code in smp_twd.c to match on con_id
> but I'll let you guys sort that out.
I guess we can stick to what Linus and others have followed.
Will post an updated patch. Thanks for catch.
Regards
Santosh
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^ permalink raw reply [flat|nested] 56+ messages in thread* [PATCH 7/8] OMAP4: clock: Add CPU local timer clock node.
@ 2011-12-12 8:15 ` Shilimkar, Santosh
0 siblings, 0 replies; 56+ messages in thread
From: Shilimkar, Santosh @ 2011-12-12 8:15 UTC (permalink / raw)
To: linux-arm-kernel
On Fri, Dec 9, 2011 at 4:32 AM, Turquette, Mike <mturquette@ti.com> wrote:
> On Fri, Sep 30, 2011 at 2:15 AM, Shilimkar, Santosh
> <santosh.shilimkar@ti.com> wrote:
>> On Fri, Sep 30, 2011 at 3:00 AM, Linus Walleij <linus.walleij@linaro.org> wrote:
>>> 2011/9/8 Santosh Shilimkar <santosh.shilimkar@ti.com>:
>>>
>>>> Local timer clock is sourced from the CPU clock and hence changes
>>>> along with CPU clock. These per CPU local timers are used as
>>>> clock-events, so they need to be reconfigured on CPU frequency
>>>> change as part of CPUfreq governor.
>>>
>>> This requires patch 6956/2 right?
>>> http://www.arm.linux.org.uk/developer/patches/viewpatch.php?id=6956/2
>>>
>>> Can I add your Tested-by: to the patch as well?
>>>
>> Sure.
>
> Santosh,
>
> I've taken in Linus' patch as well as this patch while testing clk
> notifiers (part of common clk framework code).
>
> Linus' patch matches the clk based on dev_id, but the clkdev entry in
> your patch populated dev_id with NULL and con_id with "smp_twd" so
> things never worked correctly. ?Below changed fixed it for me:
>
You are right.
When I picked up the patch while changing the
OMAP44XX stuff to OMAP4430, looks like I miss-placed it.
> diff --git a/arch/arm/mach-omap2/clock44xx_data.c
> b/arch/arm/mach-omap2/clock44xx_data.c
> index ae8c292..0f8cf68 100644
> --- a/arch/arm/mach-omap2/clock44xx_data.c
> +++ b/arch/arm/mach-omap2/clock44xx_data.c
> @@ -4114,7 +4114,7 @@ static struct omap_clk omap44xx_clks[] = {
> ? ? ? ?CLK(NULL, ? ? ? "l4_div_ck",
> &l4_div_ck_hw.clk, ? ? ?CK_443X),
> ? ? ? ?CLK(NULL, ? ? ? "lp_clk_div_ck",
> &lp_clk_div_ck_hw.clk, ?CK_443X),
> ? ? ? ?CLK(NULL, ? ? ? "l4_wkup_clk_mux_ck",
> &l4_wkup_clk_mux_ck_hw.clk, ? ? CK_443X),
> - ? ? ? CLK(NULL, ? ? ? "smp_twd",
> &mpu_periphclk_hw.clk, ?CK_443X),
> + ? ? ? CLK("smp_twd", ?NULL, ? ? ? ? ? ? ? ? ? &mpu_periphclk_hw.clk,
> ?CK_443X),
> ? ? ? ?CLK(NULL, ? ? ? "ocp_abe_iclk",
> &ocp_abe_iclk_hw.clk, ? CK_443X),
> ? ? ? ?CLK(NULL, ? ? ? "per_abe_24m_fclk",
> &per_abe_24m_fclk_hw.clk, ? ? ? CK_443X),
> ? ? ? ?CLK(NULL, ? ? ? "per_abe_nc_fclk",
> &per_abe_nc_fclk_hw.clk, ? ? ? ?CK_443X),
>
> A better change might be for the code in smp_twd.c to match on con_id
> but I'll let you guys sort that out.
I guess we can stick to what Linus and others have followed.
Will post an updated patch. Thanks for catch.
Regards
Santosh
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 8/8] OMAP4: Fix the emif and dmm virtual mapping
2011-09-08 5:21 ` Santosh Shilimkar
@ 2011-09-08 5:22 ` Santosh Shilimkar
-1 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-omap; +Cc: linux-arm-kernel, Santosh Shilimkar, Girish S G
Fix the address overlap with Emulation domain (EMU).
The previous mapping was entering into EMU mapping
and was not as per comments. Fix the mapping accordingly.
[girishsg@ti.com: Helped fixing comments.]
Signed-off-by: Girish S G <girishsg@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/plat-omap/include/plat/io.h | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index d72ec85..a2f7d31 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -228,12 +228,12 @@
#define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
/* 0x4d000000 --> 0xfd200000 */
-#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + SZ_1M)
#define OMAP44XX_EMIF2_SIZE SZ_1M
#define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
/* 0x4e000000 --> 0xfd300000 */
-#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + SZ_1M)
#define OMAP44XX_DMM_SIZE SZ_1M
/*
* ----------------------------------------------------------------------------
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread
* [PATCH 8/8] OMAP4: Fix the emif and dmm virtual mapping
@ 2011-09-08 5:22 ` Santosh Shilimkar
0 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-08 5:22 UTC (permalink / raw)
To: linux-arm-kernel
Fix the address overlap with Emulation domain (EMU).
The previous mapping was entering into EMU mapping
and was not as per comments. Fix the mapping accordingly.
[girishsg at ti.com: Helped fixing comments.]
Signed-off-by: Girish S G <girishsg@ti.com>
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
---
arch/arm/plat-omap/include/plat/io.h | 4 ++--
1 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
index d72ec85..a2f7d31 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -228,12 +228,12 @@
#define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
/* 0x4d000000 --> 0xfd200000 */
-#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + SZ_1M)
#define OMAP44XX_EMIF2_SIZE SZ_1M
#define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
/* 0x4e000000 --> 0xfd300000 */
-#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
+#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + SZ_1M)
#define OMAP44XX_DMM_SIZE SZ_1M
/*
* ----------------------------------------------------------------------------
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread
* Re: [PATCH 8/8] OMAP4: Fix the emif and dmm virtual mapping
2011-09-08 5:22 ` Santosh Shilimkar
@ 2011-09-16 17:56 ` Kevin Hilman
-1 siblings, 0 replies; 56+ messages in thread
From: Kevin Hilman @ 2011-09-16 17:56 UTC (permalink / raw)
To: Santosh Shilimkar; +Cc: linux-omap, linux-arm-kernel, Girish S G
Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
> Fix the address overlap with Emulation domain (EMU).
>
> The previous mapping was entering into EMU mapping
> and was not as per comments. Fix the mapping accordingly.
>
> [girishsg@ti.com: Helped fixing comments.]
> Signed-off-by: Girish S G <girishsg@ti.com>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
> arch/arm/plat-omap/include/plat/io.h | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
> index d72ec85..a2f7d31 100644
> --- a/arch/arm/plat-omap/include/plat/io.h
> +++ b/arch/arm/plat-omap/include/plat/io.h
> @@ -228,12 +228,12 @@
>
> #define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
> /* 0x4d000000 --> 0xfd200000 */
> -#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
> +#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + SZ_1M)
IMO, this would be much clearer (and future proof) if you used
'+ OMAP44XX_EMIF1_SIZE' instead of SZ_1M.
> #define OMAP44XX_EMIF2_SIZE SZ_1M
>
> #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
> /* 0x4e000000 --> 0xfd300000 */
> -#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
> +#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + SZ_1M)
and '+ OMAP44XX_EMIF2_SIZE' here.
> #define OMAP44XX_DMM_SIZE SZ_1M
> /*
> * ----------------------------------------------------------------------------
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 8/8] OMAP4: Fix the emif and dmm virtual mapping
@ 2011-09-16 17:56 ` Kevin Hilman
0 siblings, 0 replies; 56+ messages in thread
From: Kevin Hilman @ 2011-09-16 17:56 UTC (permalink / raw)
To: linux-arm-kernel
Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
> Fix the address overlap with Emulation domain (EMU).
>
> The previous mapping was entering into EMU mapping
> and was not as per comments. Fix the mapping accordingly.
>
> [girishsg at ti.com: Helped fixing comments.]
> Signed-off-by: Girish S G <girishsg@ti.com>
> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
> ---
> arch/arm/plat-omap/include/plat/io.h | 4 ++--
> 1 files changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
> index d72ec85..a2f7d31 100644
> --- a/arch/arm/plat-omap/include/plat/io.h
> +++ b/arch/arm/plat-omap/include/plat/io.h
> @@ -228,12 +228,12 @@
>
> #define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
> /* 0x4d000000 --> 0xfd200000 */
> -#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
> +#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + SZ_1M)
IMO, this would be much clearer (and future proof) if you used
'+ OMAP44XX_EMIF1_SIZE' instead of SZ_1M.
> #define OMAP44XX_EMIF2_SIZE SZ_1M
>
> #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
> /* 0x4e000000 --> 0xfd300000 */
> -#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
> +#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + SZ_1M)
and '+ OMAP44XX_EMIF2_SIZE' here.
> #define OMAP44XX_DMM_SIZE SZ_1M
> /*
> * ----------------------------------------------------------------------------
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 8/8] OMAP4: Fix the emif and dmm virtual mapping
2011-09-16 17:56 ` Kevin Hilman
@ 2011-09-20 15:01 ` Santosh Shilimkar
-1 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-20 15:01 UTC (permalink / raw)
To: Kevin Hilman; +Cc: linux-omap, linux-arm-kernel, Girish S G
On Friday 16 September 2011 11:26 PM, Kevin Hilman wrote:
> Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
>
>> Fix the address overlap with Emulation domain (EMU).
>>
>> The previous mapping was entering into EMU mapping
>> and was not as per comments. Fix the mapping accordingly.
>>
>> [girishsg@ti.com: Helped fixing comments.]
>> Signed-off-by: Girish S G <girishsg@ti.com>
>> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
>> ---
>> arch/arm/plat-omap/include/plat/io.h | 4 ++--
>> 1 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
>> index d72ec85..a2f7d31 100644
>> --- a/arch/arm/plat-omap/include/plat/io.h
>> +++ b/arch/arm/plat-omap/include/plat/io.h
>> @@ -228,12 +228,12 @@
>>
>> #define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
>> /* 0x4d000000 --> 0xfd200000 */
>> -#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
>> +#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + SZ_1M)
>
> IMO, this would be much clearer (and future proof) if you used
> '+ OMAP44XX_EMIF1_SIZE' instead of SZ_1M.
>
ok.
>> #define OMAP44XX_EMIF2_SIZE SZ_1M
>>
>> #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
>> /* 0x4e000000 --> 0xfd300000 */
>> -#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
>> +#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + SZ_1M)
>
> and '+ OMAP44XX_EMIF2_SIZE' here.
>
Will add OMAP44XX_EMIF_SIZE since 2 EMIFs instaces are and
suppose to be identical.Almost missed this email in other traffic.
Regards
Santosh
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 8/8] OMAP4: Fix the emif and dmm virtual mapping
@ 2011-09-20 15:01 ` Santosh Shilimkar
0 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-20 15:01 UTC (permalink / raw)
To: linux-arm-kernel
On Friday 16 September 2011 11:26 PM, Kevin Hilman wrote:
> Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
>
>> Fix the address overlap with Emulation domain (EMU).
>>
>> The previous mapping was entering into EMU mapping
>> and was not as per comments. Fix the mapping accordingly.
>>
>> [girishsg at ti.com: Helped fixing comments.]
>> Signed-off-by: Girish S G <girishsg@ti.com>
>> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
>> ---
>> arch/arm/plat-omap/include/plat/io.h | 4 ++--
>> 1 files changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/arch/arm/plat-omap/include/plat/io.h b/arch/arm/plat-omap/include/plat/io.h
>> index d72ec85..a2f7d31 100644
>> --- a/arch/arm/plat-omap/include/plat/io.h
>> +++ b/arch/arm/plat-omap/include/plat/io.h
>> @@ -228,12 +228,12 @@
>>
>> #define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
>> /* 0x4d000000 --> 0xfd200000 */
>> -#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
>> +#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + SZ_1M)
>
> IMO, this would be much clearer (and future proof) if you used
> '+ OMAP44XX_EMIF1_SIZE' instead of SZ_1M.
>
ok.
>> #define OMAP44XX_EMIF2_SIZE SZ_1M
>>
>> #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
>> /* 0x4e000000 --> 0xfd300000 */
>> -#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
>> +#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + SZ_1M)
>
> and '+ OMAP44XX_EMIF2_SIZE' here.
>
Will add OMAP44XX_EMIF_SIZE since 2 EMIFs instaces are and
suppose to be identical.Almost missed this email in other traffic.
Regards
Santosh
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 8/8] OMAP4: Fix the emif and dmm virtual mapping
2011-09-20 15:01 ` Santosh Shilimkar
@ 2011-09-21 15:28 ` Santosh Shilimkar
-1 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-21 15:28 UTC (permalink / raw)
To: Kevin Hilman; +Cc: linux-omap, linux-arm-kernel, Girish S G
On Tuesday 20 September 2011 08:31 PM, Santosh Shilimkar wrote:
> On Friday 16 September 2011 11:26 PM, Kevin Hilman wrote:
>> Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
>>
[...]
>
>>> #define OMAP44XX_EMIF2_SIZE SZ_1M
>>>
>>> #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
>>> /* 0x4e000000 --> 0xfd300000 */
>>> -#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
>>> +#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + SZ_1M)
>>
>> and '+ OMAP44XX_EMIF2_SIZE' here.
>>
> Will add OMAP44XX_EMIF_SIZE since 2 EMIFs instaces are and
> suppose to be identical.Almost missed this email in other traffic.
OPPs. It was already there. Dumb of me not using it. Below
is the update what I will do.
diff --git a/arch/arm/plat-omap/include/plat/io.h
b/arch/arm/plat-omap/include/plat/io.h
index d72ec85..db36292 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -228,13 +228,13 @@
#define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
/* 0x4d000000 --> 0xfd200000 */
-#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
#define OMAP44XX_EMIF2_SIZE SZ_1M
+#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF2_SIZE)
#define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
/* 0x4e000000 --> 0xfd300000 */
-#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
#define OMAP44XX_DMM_SIZE SZ_1M
+#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_DMM_SIZE)
/*
*
----------------------------------------------------------------------------
* Omap specific register access
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread
* [PATCH 8/8] OMAP4: Fix the emif and dmm virtual mapping
@ 2011-09-21 15:28 ` Santosh Shilimkar
0 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-21 15:28 UTC (permalink / raw)
To: linux-arm-kernel
On Tuesday 20 September 2011 08:31 PM, Santosh Shilimkar wrote:
> On Friday 16 September 2011 11:26 PM, Kevin Hilman wrote:
>> Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
>>
[...]
>
>>> #define OMAP44XX_EMIF2_SIZE SZ_1M
>>>
>>> #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
>>> /* 0x4e000000 --> 0xfd300000 */
>>> -#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
>>> +#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + SZ_1M)
>>
>> and '+ OMAP44XX_EMIF2_SIZE' here.
>>
> Will add OMAP44XX_EMIF_SIZE since 2 EMIFs instaces are and
> suppose to be identical.Almost missed this email in other traffic.
OPPs. It was already there. Dumb of me not using it. Below
is the update what I will do.
diff --git a/arch/arm/plat-omap/include/plat/io.h
b/arch/arm/plat-omap/include/plat/io.h
index d72ec85..db36292 100644
--- a/arch/arm/plat-omap/include/plat/io.h
+++ b/arch/arm/plat-omap/include/plat/io.h
@@ -228,13 +228,13 @@
#define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
/* 0x4d000000 --> 0xfd200000 */
-#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
#define OMAP44XX_EMIF2_SIZE SZ_1M
+#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF2_SIZE)
#define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
/* 0x4e000000 --> 0xfd300000 */
-#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
#define OMAP44XX_DMM_SIZE SZ_1M
+#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_DMM_SIZE)
/*
*
----------------------------------------------------------------------------
* Omap specific register access
--
1.7.4.1
^ permalink raw reply related [flat|nested] 56+ messages in thread
* Re: [PATCH 8/8] OMAP4: Fix the emif and dmm virtual mapping
2011-09-21 15:28 ` Santosh Shilimkar
@ 2011-09-21 17:31 ` Kevin Hilman
-1 siblings, 0 replies; 56+ messages in thread
From: Kevin Hilman @ 2011-09-21 17:31 UTC (permalink / raw)
To: Santosh Shilimkar; +Cc: linux-omap, linux-arm-kernel, Girish S G
Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
> On Tuesday 20 September 2011 08:31 PM, Santosh Shilimkar wrote:
>> On Friday 16 September 2011 11:26 PM, Kevin Hilman wrote:
>>> Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
>>>
>
> [...]
>
>>
>>>> #define OMAP44XX_EMIF2_SIZE SZ_1M
>>>>
>>>> #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
>>>> /* 0x4e000000 --> 0xfd300000 */
>>>> -#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
>>>> +#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + SZ_1M)
>>>
>>> and '+ OMAP44XX_EMIF2_SIZE' here.
>>>
>> Will add OMAP44XX_EMIF_SIZE since 2 EMIFs instaces are and
>> suppose to be identical.Almost missed this email in other traffic.
>
> OPPs. It was already there. Dumb of me not using it. Below
> is the update what I will do.
>
> diff --git a/arch/arm/plat-omap/include/plat/io.h
> b/arch/arm/plat-omap/include/plat/io.h
> index d72ec85..db36292 100644
> --- a/arch/arm/plat-omap/include/plat/io.h
> +++ b/arch/arm/plat-omap/include/plat/io.h
> @@ -228,13 +228,13 @@
>
> #define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
> /* 0x4d000000 --> 0xfd200000 */
> -#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
> #define OMAP44XX_EMIF2_SIZE SZ_1M
> +#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF2_SIZE)
This doesn't look right either.
This #define is for the *start* of EMIF2 virtual address space, so
assuming the start address of EMIF2 is immediatly after EMIF1, it should
be EMIF1_VIRT + EMIF1_SIZE (not EMIF2_SIZE.)
> #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
> /* 0x4e000000 --> 0xfd300000 */
> -#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
> #define OMAP44XX_DMM_SIZE SZ_1M
> +#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_DMM_SIZE)
And here, assuming DMM range is immediately after EMIF2, this should be
EMIF2_VIRT + EMFI2_SIZE)
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 8/8] OMAP4: Fix the emif and dmm virtual mapping
@ 2011-09-21 17:31 ` Kevin Hilman
0 siblings, 0 replies; 56+ messages in thread
From: Kevin Hilman @ 2011-09-21 17:31 UTC (permalink / raw)
To: linux-arm-kernel
Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
> On Tuesday 20 September 2011 08:31 PM, Santosh Shilimkar wrote:
>> On Friday 16 September 2011 11:26 PM, Kevin Hilman wrote:
>>> Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
>>>
>
> [...]
>
>>
>>>> #define OMAP44XX_EMIF2_SIZE SZ_1M
>>>>
>>>> #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
>>>> /* 0x4e000000 --> 0xfd300000 */
>>>> -#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
>>>> +#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + SZ_1M)
>>>
>>> and '+ OMAP44XX_EMIF2_SIZE' here.
>>>
>> Will add OMAP44XX_EMIF_SIZE since 2 EMIFs instaces are and
>> suppose to be identical.Almost missed this email in other traffic.
>
> OPPs. It was already there. Dumb of me not using it. Below
> is the update what I will do.
>
> diff --git a/arch/arm/plat-omap/include/plat/io.h
> b/arch/arm/plat-omap/include/plat/io.h
> index d72ec85..db36292 100644
> --- a/arch/arm/plat-omap/include/plat/io.h
> +++ b/arch/arm/plat-omap/include/plat/io.h
> @@ -228,13 +228,13 @@
>
> #define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
> /* 0x4d000000 --> 0xfd200000 */
> -#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
> #define OMAP44XX_EMIF2_SIZE SZ_1M
> +#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF2_SIZE)
This doesn't look right either.
This #define is for the *start* of EMIF2 virtual address space, so
assuming the start address of EMIF2 is immediatly after EMIF1, it should
be EMIF1_VIRT + EMIF1_SIZE (not EMIF2_SIZE.)
> #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
> /* 0x4e000000 --> 0xfd300000 */
> -#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
> #define OMAP44XX_DMM_SIZE SZ_1M
> +#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_DMM_SIZE)
And here, assuming DMM range is immediately after EMIF2, this should be
EMIF2_VIRT + EMFI2_SIZE)
Kevin
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 8/8] OMAP4: Fix the emif and dmm virtual mapping
2011-09-21 17:31 ` Kevin Hilman
@ 2011-09-22 5:53 ` Shilimkar, Santosh
-1 siblings, 0 replies; 56+ messages in thread
From: Shilimkar, Santosh @ 2011-09-22 5:53 UTC (permalink / raw)
To: Kevin Hilman; +Cc: linux-omap, linux-arm-kernel, Girish S G
On Wed, Sep 21, 2011 at 11:01 PM, Kevin Hilman <khilman@ti.com> wrote:
> Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
>
>> On Tuesday 20 September 2011 08:31 PM, Santosh Shilimkar wrote:
>>> On Friday 16 September 2011 11:26 PM, Kevin Hilman wrote:
>>>> Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
>>>>
>>
>> [...]
>>
>>>
>>>>> #define OMAP44XX_EMIF2_SIZE SZ_1M
>>>>>
>>>>> #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
>>>>> /* 0x4e000000 --> 0xfd300000 */
>>>>> -#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
>>>>> +#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + SZ_1M)
>>>>
>>>> and '+ OMAP44XX_EMIF2_SIZE' here.
>>>>
>>> Will add OMAP44XX_EMIF_SIZE since 2 EMIFs instaces are and
>>> suppose to be identical.Almost missed this email in other traffic.
>>
>> OPPs. It was already there. Dumb of me not using it. Below
>> is the update what I will do.
>>
>> diff --git a/arch/arm/plat-omap/include/plat/io.h
>> b/arch/arm/plat-omap/include/plat/io.h
>> index d72ec85..db36292 100644
>> --- a/arch/arm/plat-omap/include/plat/io.h
>> +++ b/arch/arm/plat-omap/include/plat/io.h
>> @@ -228,13 +228,13 @@
>>
>> #define OMAP44XX_EMIF2_PHYS OMAP44XX_EMIF2_BASE
>> /* 0x4d000000 --> 0xfd200000 */
>> -#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
>> #define OMAP44XX_EMIF2_SIZE SZ_1M
>> +#define OMAP44XX_EMIF2_VIRT (OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF2_SIZE)
>
> This doesn't look right either.
>
> This #define is for the *start* of EMIF2 virtual address space, so
> assuming the start address of EMIF2 is immediatly after EMIF1, it should
> be EMIF1_VIRT + EMIF1_SIZE (not EMIF2_SIZE.)
>
>> #define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
>> /* 0x4e000000 --> 0xfd300000 */
>> -#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
>> #define OMAP44XX_DMM_SIZE SZ_1M
>> +#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + OMAP44XX_DMM_SIZE)
>
> And here, assuming DMM range is immediately after EMIF2, this should be
> EMIF2_VIRT + EMFI2_SIZE)
>
I agree.
Regards
Santosh
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^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 8/8] OMAP4: Fix the emif and dmm virtual mapping
@ 2011-09-22 5:53 ` Shilimkar, Santosh
0 siblings, 0 replies; 56+ messages in thread
From: Shilimkar, Santosh @ 2011-09-22 5:53 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 21, 2011 at 11:01 PM, Kevin Hilman <khilman@ti.com> wrote:
> Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
>
>> On Tuesday 20 September 2011 08:31 PM, Santosh Shilimkar wrote:
>>> On Friday 16 September 2011 11:26 PM, Kevin Hilman wrote:
>>>> Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
>>>>
>>
>> [...]
>>
>>>
>>>>> ?#define OMAP44XX_EMIF2_SIZE ? ? ? SZ_1M
>>>>>
>>>>> ?#define OMAP44XX_DMM_PHYS OMAP44XX_DMM_BASE
>>>>> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ?/* 0x4e000000 --> 0xfd300000 */
>>>>> -#define OMAP44XX_DMM_VIRT (OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
>>>>> +#define OMAP44XX_DMM_VIRT (OMAP44XX_EMIF2_VIRT + SZ_1M)
>>>>
>>>> and '+ OMAP44XX_EMIF2_SIZE' here.
>>>>
>>> Will add OMAP44XX_EMIF_SIZE since 2 EMIFs instaces are and
>>> suppose to be identical.Almost missed this email in other traffic.
>>
>> OPPs. It was already there. Dumb of me not using it. Below
>> is the update what I will do.
>>
>> diff --git a/arch/arm/plat-omap/include/plat/io.h
>> b/arch/arm/plat-omap/include/plat/io.h
>> index d72ec85..db36292 100644
>> --- a/arch/arm/plat-omap/include/plat/io.h
>> +++ b/arch/arm/plat-omap/include/plat/io.h
>> @@ -228,13 +228,13 @@
>>
>> ?#define OMAP44XX_EMIF2_PHYS ?OMAP44XX_EMIF2_BASE
>> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? /* 0x4d000000 --> 0xfd200000 */
>> -#define OMAP44XX_EMIF2_VIRT ?(OMAP44XX_EMIF2_PHYS + OMAP4_L3_PER_IO_OFFSET)
>> ?#define OMAP44XX_EMIF2_SIZE ?SZ_1M
>> +#define OMAP44XX_EMIF2_VIRT ?(OMAP44XX_EMIF1_VIRT + OMAP44XX_EMIF2_SIZE)
>
> This doesn't look right either.
>
> This #define is for the *start* of EMIF2 virtual address space, so
> assuming the start address of EMIF2 is immediatly after EMIF1, it should
> be EMIF1_VIRT + EMIF1_SIZE (not EMIF2_SIZE.)
>
>> ?#define OMAP44XX_DMM_PHYS ? ?OMAP44XX_DMM_BASE
>> ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? ? /* 0x4e000000 --> 0xfd300000 */
>> -#define OMAP44XX_DMM_VIRT ? ?(OMAP44XX_DMM_PHYS + OMAP4_L3_PER_IO_OFFSET)
>> ?#define OMAP44XX_DMM_SIZE ? ?SZ_1M
>> +#define OMAP44XX_DMM_VIRT ? ?(OMAP44XX_EMIF2_VIRT + OMAP44XX_DMM_SIZE)
>
> And here, assuming DMM range is immediately after EMIF2, this should be
> EMIF2_VIRT + EMFI2_SIZE)
>
I agree.
Regards
Santosh
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 0/8] OMAP3/4: Misc fixes and clean-up
2011-09-08 5:21 ` Santosh Shilimkar
@ 2011-09-24 6:03 ` Santosh Shilimkar
-1 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-24 6:03 UTC (permalink / raw)
To: Paul Walmsley; +Cc: linux-omap, linux-arm-kernel
Paul,
On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar wrote:
> The series contains few fixes and clean-up for OMAP.
> Briefly,
> - HWMOD fix for the address space count
> - Improving the L3 register accesses
> - Bug fix in the L3 error handler
> - Sparce warning and indentation fixes in L3 error handler
> - Print master id in case of L3 custom errors for better debug.
> - Adding local time clock node for the CPUfreq and time re-calibration
> - Fix in the address overlap for emif and emulation domain.
>
> The series is tested on OMAP4430 SDP and OMAP4430 beagle and SDP.
>
> The following changes since commit c6a389f123b9f68d605bb7e0f9b32ec1e3e14132:
>
> Linux 3.1-rc4 (2011-08-28 21:16:01 -0700)
>
> are available in the git repository at:
> git://gitorious.org/omap-sw-develoment/linux-omap-dev.git v3.1-rc4-omap-misc
>
I need your ack on below two patches so that I can re-base them and
send a pull request to Tony.
OMAP4: clock: Add CPU local timer clock node.
OMAP: Fix sparse warnings in l3 error handler.
Regards
Santosh
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 0/8] OMAP3/4: Misc fixes and clean-up
@ 2011-09-24 6:03 ` Santosh Shilimkar
0 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-24 6:03 UTC (permalink / raw)
To: linux-arm-kernel
Paul,
On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar wrote:
> The series contains few fixes and clean-up for OMAP.
> Briefly,
> - HWMOD fix for the address space count
> - Improving the L3 register accesses
> - Bug fix in the L3 error handler
> - Sparce warning and indentation fixes in L3 error handler
> - Print master id in case of L3 custom errors for better debug.
> - Adding local time clock node for the CPUfreq and time re-calibration
> - Fix in the address overlap for emif and emulation domain.
>
> The series is tested on OMAP4430 SDP and OMAP4430 beagle and SDP.
>
> The following changes since commit c6a389f123b9f68d605bb7e0f9b32ec1e3e14132:
>
> Linux 3.1-rc4 (2011-08-28 21:16:01 -0700)
>
> are available in the git repository at:
> git://gitorious.org/omap-sw-develoment/linux-omap-dev.git v3.1-rc4-omap-misc
>
I need your ack on below two patches so that I can re-base them and
send a pull request to Tony.
OMAP4: clock: Add CPU local timer clock node.
OMAP: Fix sparse warnings in l3 error handler.
Regards
Santosh
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 0/8] OMAP3/4: Misc fixes and clean-up
2011-09-24 6:03 ` Santosh Shilimkar
@ 2011-09-24 6:31 ` Paul Walmsley
-1 siblings, 0 replies; 56+ messages in thread
From: Paul Walmsley @ 2011-09-24 6:31 UTC (permalink / raw)
To: Santosh Shilimkar; +Cc: linux-omap, linux-arm-kernel
Hi Santosh
On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
> On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar wrote:
> > The series contains few fixes and clean-up for OMAP.
> > Briefly,
> > - HWMOD fix for the address space count
> > - Improving the L3 register accesses
> > - Bug fix in the L3 error handler
> > - Sparce warning and indentation fixes in L3 error handler
> > - Print master id in case of L3 custom errors for better debug.
> > - Adding local time clock node for the CPUfreq and time re-calibration
> > - Fix in the address overlap for emif and emulation domain.
> >
> > The series is tested on OMAP4430 SDP and OMAP4430 beagle and SDP.
> >
> > The following changes since commit c6a389f123b9f68d605bb7e0f9b32ec1e3e14132:
> >
> > Linux 3.1-rc4 (2011-08-28 21:16:01 -0700)
> >
> > are available in the git repository at:
> > git://gitorious.org/omap-sw-develoment/linux-omap-dev.git v3.1-rc4-omap-misc
> >
> I need your ack on below two patches so that I can re-base them and
> send a pull request to Tony.
>
> OMAP4: clock: Add CPU local timer clock node.
> OMAP: Fix sparse warnings in l3 error handler.
Are you targeting these for 3.1-rc ?
- Paul
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 0/8] OMAP3/4: Misc fixes and clean-up
@ 2011-09-24 6:31 ` Paul Walmsley
0 siblings, 0 replies; 56+ messages in thread
From: Paul Walmsley @ 2011-09-24 6:31 UTC (permalink / raw)
To: linux-arm-kernel
Hi Santosh
On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
> On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar wrote:
> > The series contains few fixes and clean-up for OMAP.
> > Briefly,
> > - HWMOD fix for the address space count
> > - Improving the L3 register accesses
> > - Bug fix in the L3 error handler
> > - Sparce warning and indentation fixes in L3 error handler
> > - Print master id in case of L3 custom errors for better debug.
> > - Adding local time clock node for the CPUfreq and time re-calibration
> > - Fix in the address overlap for emif and emulation domain.
> >
> > The series is tested on OMAP4430 SDP and OMAP4430 beagle and SDP.
> >
> > The following changes since commit c6a389f123b9f68d605bb7e0f9b32ec1e3e14132:
> >
> > Linux 3.1-rc4 (2011-08-28 21:16:01 -0700)
> >
> > are available in the git repository at:
> > git://gitorious.org/omap-sw-develoment/linux-omap-dev.git v3.1-rc4-omap-misc
> >
> I need your ack on below two patches so that I can re-base them and
> send a pull request to Tony.
>
> OMAP4: clock: Add CPU local timer clock node.
> OMAP: Fix sparse warnings in l3 error handler.
Are you targeting these for 3.1-rc ?
- Paul
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 0/8] OMAP3/4: Misc fixes and clean-up
2011-09-24 6:31 ` Paul Walmsley
@ 2011-09-24 6:35 ` Santosh Shilimkar
-1 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-24 6:35 UTC (permalink / raw)
To: Paul Walmsley; +Cc: linux-omap, linux-arm-kernel
On Saturday 24 September 2011 12:01 PM, Paul Walmsley wrote:
> Hi Santosh
>
> On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
>
>> On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar wrote:
>>> The series contains few fixes and clean-up for OMAP.
>>> Briefly,
>>> - HWMOD fix for the address space count
>>> - Improving the L3 register accesses
>>> - Bug fix in the L3 error handler
>>> - Sparce warning and indentation fixes in L3 error handler
>>> - Print master id in case of L3 custom errors for better debug.
>>> - Adding local time clock node for the CPUfreq and time re-calibration
>>> - Fix in the address overlap for emif and emulation domain.
>>>
>>> The series is tested on OMAP4430 SDP and OMAP4430 beagle and SDP.
>>>
>>> The following changes since commit c6a389f123b9f68d605bb7e0f9b32ec1e3e14132:
>>>
>>> Linux 3.1-rc4 (2011-08-28 21:16:01 -0700)
>>>
>>> are available in the git repository at:
>>> git://gitorious.org/omap-sw-develoment/linux-omap-dev.git v3.1-rc4-omap-misc
>>>
>> I need your ack on below two patches so that I can re-base them and
>> send a pull request to Tony.
>>
>> OMAP4: clock: Add CPU local timer clock node.
>> OMAP: Fix sparse warnings in l3 error handler.
>
> Are you targeting these for 3.1-rc ?
>
Nope. It's for 3.2 merge window.
As such, the series doesn't have any major regression
fixes which should make it before 3.2
Regards
Santosh
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 0/8] OMAP3/4: Misc fixes and clean-up
@ 2011-09-24 6:35 ` Santosh Shilimkar
0 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-24 6:35 UTC (permalink / raw)
To: linux-arm-kernel
On Saturday 24 September 2011 12:01 PM, Paul Walmsley wrote:
> Hi Santosh
>
> On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
>
>> On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar wrote:
>>> The series contains few fixes and clean-up for OMAP.
>>> Briefly,
>>> - HWMOD fix for the address space count
>>> - Improving the L3 register accesses
>>> - Bug fix in the L3 error handler
>>> - Sparce warning and indentation fixes in L3 error handler
>>> - Print master id in case of L3 custom errors for better debug.
>>> - Adding local time clock node for the CPUfreq and time re-calibration
>>> - Fix in the address overlap for emif and emulation domain.
>>>
>>> The series is tested on OMAP4430 SDP and OMAP4430 beagle and SDP.
>>>
>>> The following changes since commit c6a389f123b9f68d605bb7e0f9b32ec1e3e14132:
>>>
>>> Linux 3.1-rc4 (2011-08-28 21:16:01 -0700)
>>>
>>> are available in the git repository at:
>>> git://gitorious.org/omap-sw-develoment/linux-omap-dev.git v3.1-rc4-omap-misc
>>>
>> I need your ack on below two patches so that I can re-base them and
>> send a pull request to Tony.
>>
>> OMAP4: clock: Add CPU local timer clock node.
>> OMAP: Fix sparse warnings in l3 error handler.
>
> Are you targeting these for 3.1-rc ?
>
Nope. It's for 3.2 merge window.
As such, the series doesn't have any major regression
fixes which should make it before 3.2
Regards
Santosh
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 0/8] OMAP3/4: Misc fixes and clean-up
2011-09-24 6:35 ` Santosh Shilimkar
@ 2011-09-24 7:36 ` Paul Walmsley
-1 siblings, 0 replies; 56+ messages in thread
From: Paul Walmsley @ 2011-09-24 7:36 UTC (permalink / raw)
To: Santosh Shilimkar; +Cc: linux-omap, linux-arm-kernel
[-- Attachment #1: Type: TEXT/PLAIN, Size: 1451 bytes --]
Hi
On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
> On Saturday 24 September 2011 12:01 PM, Paul Walmsley wrote:
> > Hi Santosh
> >
> > On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
> >
> >> On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar wrote:
> >>>
> >> I need your ack on below two patches so that I can re-base them and
> >> send a pull request to Tony.
> >>
> >> OMAP4: clock: Add CPU local timer clock node.
> >> OMAP: Fix sparse warnings in l3 error handler.
> >
> > Are you targeting these for 3.1-rc ?
> >
> Nope. It's for 3.2 merge window.
> As such, the series doesn't have any major regression
> fixes which should make it before 3.2
In that case, patches 1 and 7 should go in through me. The rest should go
via Tony. So you can just drop 1 and 7 from your branch, I'll pull those
off the list.
Some comments though: Looks like you need to repost patch 1 due to
comments from Benoît? Also, have the autogeneration scripts been updated
for patch 7?
...
As far as patch 5 goes, you don't need my ack on that one, since I'm not
the maintainer or original author of that code. But feel free to add a
Reviewed-by:. I also tested the two L3 files with sparse and they are
clean now. Thanks very much for taking the initiative on this; I
personally appreciate it quite a bit, and I think having clean code
increases our credibility with upstream maintainers.
- Paul
^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 0/8] OMAP3/4: Misc fixes and clean-up
@ 2011-09-24 7:36 ` Paul Walmsley
0 siblings, 0 replies; 56+ messages in thread
From: Paul Walmsley @ 2011-09-24 7:36 UTC (permalink / raw)
To: linux-arm-kernel
Hi
On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
> On Saturday 24 September 2011 12:01 PM, Paul Walmsley wrote:
> > Hi Santosh
> >
> > On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
> >
> >> On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar wrote:
> >>>
> >> I need your ack on below two patches so that I can re-base them and
> >> send a pull request to Tony.
> >>
> >> OMAP4: clock: Add CPU local timer clock node.
> >> OMAP: Fix sparse warnings in l3 error handler.
> >
> > Are you targeting these for 3.1-rc ?
> >
> Nope. It's for 3.2 merge window.
> As such, the series doesn't have any major regression
> fixes which should make it before 3.2
In that case, patches 1 and 7 should go in through me. The rest should go
via Tony. So you can just drop 1 and 7 from your branch, I'll pull those
off the list.
Some comments though: Looks like you need to repost patch 1 due to
comments from Beno?t? Also, have the autogeneration scripts been updated
for patch 7?
...
As far as patch 5 goes, you don't need my ack on that one, since I'm not
the maintainer or original author of that code. But feel free to add a
Reviewed-by:. I also tested the two L3 files with sparse and they are
clean now. Thanks very much for taking the initiative on this; I
personally appreciate it quite a bit, and I think having clean code
increases our credibility with upstream maintainers.
- Paul
^ permalink raw reply [flat|nested] 56+ messages in thread
* Re: [PATCH 0/8] OMAP3/4: Misc fixes and clean-up
2011-09-24 7:36 ` Paul Walmsley
@ 2011-09-24 7:46 ` Santosh Shilimkar
-1 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-24 7:46 UTC (permalink / raw)
To: Paul Walmsley; +Cc: linux-omap, linux-arm-kernel
On Saturday 24 September 2011 01:06 PM, Paul Walmsley wrote:
> Hi
>
> On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
>
>> On Saturday 24 September 2011 12:01 PM, Paul Walmsley wrote:
>>> Hi Santosh
>>>
>>> On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
>>>
>>>> On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar wrote:
>>>>>
>>>> I need your ack on below two patches so that I can re-base them and
>>>> send a pull request to Tony.
>>>>
>>>> OMAP4: clock: Add CPU local timer clock node.
>>>> OMAP: Fix sparse warnings in l3 error handler.
>>>
>>> Are you targeting these for 3.1-rc ?
>>>
>> Nope. It's for 3.2 merge window.
>> As such, the series doesn't have any major regression
>> fixes which should make it before 3.2
>
> In that case, patches 1 and 7 should go in through me. The rest should go
> via Tony. So you can just drop 1 and 7 from your branch, I'll pull those
> off the list.
>
Will do.
> Some comments though: Looks like you need to repost patch 1 due to
> comments from Benoît? Also, have the autogeneration scripts been updated
> for patch 7?
>
Ok. Will post updated patch1.
For the patch 7, I will align with Benoit on the autogen script. It has
some differences with mainline OMAP4 clock data file.
> ...
>
> As far as patch 5 goes, you don't need my ack on that one, since I'm not
> the maintainer or original author of that code. But feel free to add a
> Reviewed-by:. I also tested the two L3 files with sparse and they are
> clean now. Thanks very much for taking the initiative on this; I
> personally appreciate it quite a bit, and I think having clean code
> increases our credibility with upstream maintainers.
>
Actually I wanted you to have a look to ensure that we addressed the
all sparce warnings. Will add your reviewed by on that patch.
Couldn't agree more on the clean code remark.
Regards
Santosh
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^ permalink raw reply [flat|nested] 56+ messages in thread
* [PATCH 0/8] OMAP3/4: Misc fixes and clean-up
@ 2011-09-24 7:46 ` Santosh Shilimkar
0 siblings, 0 replies; 56+ messages in thread
From: Santosh Shilimkar @ 2011-09-24 7:46 UTC (permalink / raw)
To: linux-arm-kernel
On Saturday 24 September 2011 01:06 PM, Paul Walmsley wrote:
> Hi
>
> On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
>
>> On Saturday 24 September 2011 12:01 PM, Paul Walmsley wrote:
>>> Hi Santosh
>>>
>>> On Sat, 24 Sep 2011, Santosh Shilimkar wrote:
>>>
>>>> On Thursday 08 September 2011 10:51 AM, Santosh Shilimkar wrote:
>>>>>
>>>> I need your ack on below two patches so that I can re-base them and
>>>> send a pull request to Tony.
>>>>
>>>> OMAP4: clock: Add CPU local timer clock node.
>>>> OMAP: Fix sparse warnings in l3 error handler.
>>>
>>> Are you targeting these for 3.1-rc ?
>>>
>> Nope. It's for 3.2 merge window.
>> As such, the series doesn't have any major regression
>> fixes which should make it before 3.2
>
> In that case, patches 1 and 7 should go in through me. The rest should go
> via Tony. So you can just drop 1 and 7 from your branch, I'll pull those
> off the list.
>
Will do.
> Some comments though: Looks like you need to repost patch 1 due to
> comments from Beno?t? Also, have the autogeneration scripts been updated
> for patch 7?
>
Ok. Will post updated patch1.
For the patch 7, I will align with Benoit on the autogen script. It has
some differences with mainline OMAP4 clock data file.
> ...
>
> As far as patch 5 goes, you don't need my ack on that one, since I'm not
> the maintainer or original author of that code. But feel free to add a
> Reviewed-by:. I also tested the two L3 files with sparse and they are
> clean now. Thanks very much for taking the initiative on this; I
> personally appreciate it quite a bit, and I think having clean code
> increases our credibility with upstream maintainers.
>
Actually I wanted you to have a look to ensure that we addressed the
all sparce warnings. Will add your reviewed by on that patch.
Couldn't agree more on the clean code remark.
Regards
Santosh
^ permalink raw reply [flat|nested] 56+ messages in thread