* [PATCH v4 1/4] ethernet: arc: Add support for Rockchip SoC layer device tree bindings
@ 2014-09-03 10:27 ` Romain Perier
0 siblings, 0 replies; 24+ messages in thread
From: Romain Perier @ 2014-09-03 10:27 UTC (permalink / raw)
To: heiko; +Cc: linux-rockchip, linux-arm-kernel, netdev, devicetree, arnd
This patch defines a platform glue layer for Rockchip SoCs which
support arc-emac driver. It ensures that regulator for the rmii is on
before trying to connect to the ethernet controller. It applies right
speed and mode changes to the grf when ethernet settings change.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
---
drivers/net/ethernet/arc/Kconfig | 10 ++
drivers/net/ethernet/arc/Makefile | 1 +
drivers/net/ethernet/arc/emac.h | 4 +-
drivers/net/ethernet/arc/emac_main.c | 2 +
drivers/net/ethernet/arc/emac_rockchip.c | 228 +++++++++++++++++++++++++++++++
5 files changed, 244 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ethernet/arc/emac_rockchip.c
diff --git a/drivers/net/ethernet/arc/Kconfig b/drivers/net/ethernet/arc/Kconfig
index 89e04fd..8e262e2 100644
--- a/drivers/net/ethernet/arc/Kconfig
+++ b/drivers/net/ethernet/arc/Kconfig
@@ -32,4 +32,14 @@ config ARC_EMAC
non-standard on-chip ethernet device ARC EMAC 10/100 is used.
Say Y here if you have such a board. If unsure, say N.
+config EMAC_ROCKCHIP
+ tristate "Rockchip EMAC support"
+ select ARC_EMAC_CORE
+ depends on OF_IRQ && OF_NET && REGULATOR
+ ---help---
+ Support for Rockchip RK3066/RK3188 EMAC ethernet controllers.
+ This selects Rockchip SoC glue layer support for the
+ emac device driver. This driver is used for RK3066/RK3188
+ EMAC ethernet controller.
+
endif # NET_VENDOR_ARC
diff --git a/drivers/net/ethernet/arc/Makefile b/drivers/net/ethernet/arc/Makefile
index 241bb80..79108af 100644
--- a/drivers/net/ethernet/arc/Makefile
+++ b/drivers/net/ethernet/arc/Makefile
@@ -5,3 +5,4 @@
arc_emac-objs := emac_main.o emac_mdio.o
obj-$(CONFIG_ARC_EMAC_CORE) += arc_emac.o
obj-$(CONFIG_ARC_EMAC) += emac_arc.o
+obj-$(CONFIG_EMAC_ROCKCHIP) += emac_rockchip.o
diff --git a/drivers/net/ethernet/arc/emac.h b/drivers/net/ethernet/arc/emac.h
index eb2ba67..dae1ac3 100644
--- a/drivers/net/ethernet/arc/emac.h
+++ b/drivers/net/ethernet/arc/emac.h
@@ -123,9 +123,11 @@ struct buffer_state {
* @speed: PHY's last set speed.
*/
struct arc_emac_priv {
- /* Devices */
const char *drv_name;
const char *drv_version;
+ void (*set_mac_speed)(void *priv, unsigned int speed);
+
+ /* Devices */
struct device *dev;
struct phy_device *phy_dev;
struct mii_bus *bus;
diff --git a/drivers/net/ethernet/arc/emac_main.c b/drivers/net/ethernet/arc/emac_main.c
index b35c69e..a08f343 100644
--- a/drivers/net/ethernet/arc/emac_main.c
+++ b/drivers/net/ethernet/arc/emac_main.c
@@ -48,6 +48,8 @@ static void arc_emac_adjust_link(struct net_device *ndev)
if (priv->speed != phy_dev->speed) {
priv->speed = phy_dev->speed;
state_changed = 1;
+ if (priv->set_mac_speed)
+ priv->set_mac_speed(priv, priv->speed);
}
if (priv->duplex != phy_dev->duplex) {
diff --git a/drivers/net/ethernet/arc/emac_rockchip.c b/drivers/net/ethernet/arc/emac_rockchip.c
new file mode 100644
index 0000000..97dffbc
--- /dev/null
+++ b/drivers/net/ethernet/arc/emac_rockchip.c
@@ -0,0 +1,228 @@
+/**
+ * emac-rockchip.c - Rockchip EMAC specific glue layer
+ *
+ * Copyright (C) 2014 Romain Perier <romain.perier@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/etherdevice.h>
+#include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/of_net.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/regulator/consumer.h>
+
+#include "emac.h"
+
+#define DRV_NAME "rockchip_emac"
+#define DRV_VERSION "1.0"
+
+#define GRF_MODE_MII (1UL << 0)
+#define GRF_MODE_RMII (0UL << 0)
+#define GRF_SPEED_10M (0UL << 1)
+#define GRF_SPEED_100M (1UL << 1)
+#define GRF_SPEED_ENABLE_BIT (1UL << 17)
+#define GRF_MODE_ENABLE_BIT (1UL << 16)
+
+struct emac_rockchip_soc_data {
+ int grf_offset;
+};
+
+struct rockchip_priv_data {
+ struct arc_emac_priv emac;
+ struct regmap *grf;
+ const struct emac_rockchip_soc_data *soc_data;
+ struct regulator *regulator;
+ struct clk *refclk;
+};
+
+static const struct emac_rockchip_soc_data emac_rockchip_dt_data[] = {
+ { .grf_offset = 0x154 }, /* rk3066 */
+ { .grf_offset = 0x0a4 }, /* rk3188 */
+};
+
+static const struct of_device_id emac_rockchip_dt_ids[] = {
+ { .compatible = "rockchip,rk3066-emac", .data = &emac_rockchip_dt_data[0] },
+ { .compatible = "rockchip,rk3188-emac", .data = &emac_rockchip_dt_data[1] },
+ { /* Sentinel */ }
+};
+
+static void emac_rockchip_set_mac_speed(void *priv, unsigned int speed)
+{
+ struct rockchip_priv_data *emac = priv;
+ u32 data;
+ int err = 0;
+
+ /* write-enable bits */
+ data = GRF_SPEED_ENABLE_BIT;
+
+ switch(speed) {
+ case 10:
+ data |= GRF_SPEED_10M;
+ break;
+ case 100:
+ data |= GRF_SPEED_100M;
+ break;
+ default:
+ pr_err("speed %u not supported\n", speed);
+ return;
+ }
+
+ err = regmap_write(emac->grf, emac->soc_data->grf_offset, data);
+ if (err)
+ pr_err("unable to apply speed %u to grf (%d)\n", speed, err);
+}
+
+static int emac_rockchip_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct net_device *ndev;
+ struct rockchip_priv_data *priv;
+ const struct of_device_id *match;
+ u32 data;
+ int err, interface;
+
+ if (!pdev->dev.of_node)
+ return -ENODEV;
+
+ ndev = alloc_etherdev(sizeof(struct rockchip_priv_data));
+ if (!ndev)
+ return -ENOMEM;
+ platform_set_drvdata(pdev, ndev);
+ SET_NETDEV_DEV(ndev, dev);
+
+ priv = netdev_priv(ndev);
+ priv->emac.drv_name = DRV_NAME;
+ priv->emac.drv_version = DRV_VERSION;
+ priv->emac.set_mac_speed = emac_rockchip_set_mac_speed;
+
+ interface = of_get_phy_mode(dev->of_node);
+
+ /* RK3066 and RK3188 SoCs only support RMII */
+ if (interface != PHY_INTERFACE_MODE_RMII) {
+ dev_err(dev, "unsupported phy interface mode %d\n", interface);
+ err = -ENOTSUPP;
+ goto out_netdev;
+ }
+
+ priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf");
+ if (IS_ERR(priv->grf)) {
+ dev_err(dev, "failed to retrieve global register file from the device tree (%ld)\n", PTR_ERR(priv->grf));
+ err = PTR_ERR(priv->grf);
+ goto out_netdev;
+ }
+
+ match = of_match_node(emac_rockchip_dt_ids, dev->of_node);
+ priv->soc_data = match->data;
+
+ priv->emac.clk = devm_clk_get(dev, "hclk");
+ if (IS_ERR(priv->emac.clk)) {
+ dev_err(dev, "failed to retrieve host clock from device tree (%ld)\n", PTR_ERR(priv->emac.clk));
+ err = PTR_ERR(priv->emac.clk);
+ goto out_netdev;
+ }
+
+ priv->refclk = devm_clk_get(dev, "macref");
+ if (IS_ERR(priv->refclk)) {
+ dev_err(dev, "failed to retrieve reference clock from device tree (%ld)\n", PTR_ERR(priv->refclk));
+ err = PTR_ERR(priv->refclk);
+ goto out_netdev;
+ }
+
+ err = clk_prepare_enable(priv->refclk);
+ if (err) {
+ dev_err(dev, "failed to enable reference clock (%d)\n", err);
+ goto out_netdev;
+ }
+
+ /* Optional regulator for PHY */
+ priv->regulator = devm_regulator_get_optional(dev, "phy");
+ if (IS_ERR(priv->regulator)) {
+ if (PTR_ERR(priv->regulator) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+ dev_err(dev, "no regulator found\n");
+ priv->regulator = NULL;
+ }
+
+ if (priv->regulator) {
+ err = regulator_enable(priv->regulator);
+ if (err) {
+ dev_err(dev, "failed to enable phy-supply (%d)\n", err);
+ goto out_clk_disable;
+ }
+ }
+
+ err = arc_emac_probe(ndev, interface);
+ if (err)
+ goto out_regulator_disable;
+
+ /* write-enable bits */
+ data = GRF_MODE_ENABLE_BIT | GRF_SPEED_ENABLE_BIT;
+
+ data |= GRF_SPEED_100M;
+ data |= GRF_MODE_RMII;
+
+ err = regmap_write(priv->grf, priv->soc_data->grf_offset, data);
+ if (err) {
+ dev_err(dev, "unable to apply initial settings to grf (%d)\n", err);
+ goto out_regulator_disable;
+ }
+
+ /* RMII interface needs always a rate of 50MHz */
+ err = clk_set_rate(priv->refclk, 50000000);
+ if (err)
+ dev_err(dev, "failed to change reference clock rate (%d)\n", err);
+ return 0;
+
+out_regulator_disable:
+ if (priv->regulator)
+ regulator_disable(priv->regulator);
+out_clk_disable:
+ clk_unprepare_disable(priv->refclk);
+out_netdev:
+ free_netdev(ndev);
+ return err;
+}
+
+static int emac_rockchip_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct rockchip_priv_data *priv = netdev_priv(ndev);
+ int err;
+
+ clk_disable_unprepare(priv->refclk);
+
+ if (priv->regulator)
+ regulator_disable(priv->regulator);
+
+ err = arc_emac_remove(ndev);
+ free_netdev(ndev);
+ return err;
+}
+
+MODULE_DEVICE_TABLE(of, emac_rockchip_dt_ids);
+
+static struct platform_driver emac_rockchip_driver = {
+ .probe = emac_rockchip_probe,
+ .remove = emac_rockchip_remove,
+ .driver = {
+ .name = DRV_NAME,
+ .of_match_table = emac_rockchip_dt_ids,
+ },
+};
+
+module_platform_driver(emac_rockchip_driver);
+
+MODULE_AUTHOR("Romain Perier <romain.perier@gmail.com>");
+MODULE_DESCRIPTION("Rockchip EMAC platform driver");
+MODULE_LICENSE("GPL");
--
1.9.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH v4 1/4] ethernet: arc: Add support for Rockchip SoC layer device tree bindings
@ 2014-09-03 10:27 ` Romain Perier
0 siblings, 0 replies; 24+ messages in thread
From: Romain Perier @ 2014-09-03 10:27 UTC (permalink / raw)
To: linux-arm-kernel
This patch defines a platform glue layer for Rockchip SoCs which
support arc-emac driver. It ensures that regulator for the rmii is on
before trying to connect to the ethernet controller. It applies right
speed and mode changes to the grf when ethernet settings change.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
---
drivers/net/ethernet/arc/Kconfig | 10 ++
drivers/net/ethernet/arc/Makefile | 1 +
drivers/net/ethernet/arc/emac.h | 4 +-
drivers/net/ethernet/arc/emac_main.c | 2 +
drivers/net/ethernet/arc/emac_rockchip.c | 228 +++++++++++++++++++++++++++++++
5 files changed, 244 insertions(+), 1 deletion(-)
create mode 100644 drivers/net/ethernet/arc/emac_rockchip.c
diff --git a/drivers/net/ethernet/arc/Kconfig b/drivers/net/ethernet/arc/Kconfig
index 89e04fd..8e262e2 100644
--- a/drivers/net/ethernet/arc/Kconfig
+++ b/drivers/net/ethernet/arc/Kconfig
@@ -32,4 +32,14 @@ config ARC_EMAC
non-standard on-chip ethernet device ARC EMAC 10/100 is used.
Say Y here if you have such a board. If unsure, say N.
+config EMAC_ROCKCHIP
+ tristate "Rockchip EMAC support"
+ select ARC_EMAC_CORE
+ depends on OF_IRQ && OF_NET && REGULATOR
+ ---help---
+ Support for Rockchip RK3066/RK3188 EMAC ethernet controllers.
+ This selects Rockchip SoC glue layer support for the
+ emac device driver. This driver is used for RK3066/RK3188
+ EMAC ethernet controller.
+
endif # NET_VENDOR_ARC
diff --git a/drivers/net/ethernet/arc/Makefile b/drivers/net/ethernet/arc/Makefile
index 241bb80..79108af 100644
--- a/drivers/net/ethernet/arc/Makefile
+++ b/drivers/net/ethernet/arc/Makefile
@@ -5,3 +5,4 @@
arc_emac-objs := emac_main.o emac_mdio.o
obj-$(CONFIG_ARC_EMAC_CORE) += arc_emac.o
obj-$(CONFIG_ARC_EMAC) += emac_arc.o
+obj-$(CONFIG_EMAC_ROCKCHIP) += emac_rockchip.o
diff --git a/drivers/net/ethernet/arc/emac.h b/drivers/net/ethernet/arc/emac.h
index eb2ba67..dae1ac3 100644
--- a/drivers/net/ethernet/arc/emac.h
+++ b/drivers/net/ethernet/arc/emac.h
@@ -123,9 +123,11 @@ struct buffer_state {
* @speed: PHY's last set speed.
*/
struct arc_emac_priv {
- /* Devices */
const char *drv_name;
const char *drv_version;
+ void (*set_mac_speed)(void *priv, unsigned int speed);
+
+ /* Devices */
struct device *dev;
struct phy_device *phy_dev;
struct mii_bus *bus;
diff --git a/drivers/net/ethernet/arc/emac_main.c b/drivers/net/ethernet/arc/emac_main.c
index b35c69e..a08f343 100644
--- a/drivers/net/ethernet/arc/emac_main.c
+++ b/drivers/net/ethernet/arc/emac_main.c
@@ -48,6 +48,8 @@ static void arc_emac_adjust_link(struct net_device *ndev)
if (priv->speed != phy_dev->speed) {
priv->speed = phy_dev->speed;
state_changed = 1;
+ if (priv->set_mac_speed)
+ priv->set_mac_speed(priv, priv->speed);
}
if (priv->duplex != phy_dev->duplex) {
diff --git a/drivers/net/ethernet/arc/emac_rockchip.c b/drivers/net/ethernet/arc/emac_rockchip.c
new file mode 100644
index 0000000..97dffbc
--- /dev/null
+++ b/drivers/net/ethernet/arc/emac_rockchip.c
@@ -0,0 +1,228 @@
+/**
+ * emac-rockchip.c - Rockchip EMAC specific glue layer
+ *
+ * Copyright (C) 2014 Romain Perier <romain.perier@gmail.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <linux/etherdevice.h>
+#include <linux/mfd/syscon.h>
+#include <linux/module.h>
+#include <linux/of_net.h>
+#include <linux/platform_device.h>
+#include <linux/regmap.h>
+#include <linux/regulator/consumer.h>
+
+#include "emac.h"
+
+#define DRV_NAME "rockchip_emac"
+#define DRV_VERSION "1.0"
+
+#define GRF_MODE_MII (1UL << 0)
+#define GRF_MODE_RMII (0UL << 0)
+#define GRF_SPEED_10M (0UL << 1)
+#define GRF_SPEED_100M (1UL << 1)
+#define GRF_SPEED_ENABLE_BIT (1UL << 17)
+#define GRF_MODE_ENABLE_BIT (1UL << 16)
+
+struct emac_rockchip_soc_data {
+ int grf_offset;
+};
+
+struct rockchip_priv_data {
+ struct arc_emac_priv emac;
+ struct regmap *grf;
+ const struct emac_rockchip_soc_data *soc_data;
+ struct regulator *regulator;
+ struct clk *refclk;
+};
+
+static const struct emac_rockchip_soc_data emac_rockchip_dt_data[] = {
+ { .grf_offset = 0x154 }, /* rk3066 */
+ { .grf_offset = 0x0a4 }, /* rk3188 */
+};
+
+static const struct of_device_id emac_rockchip_dt_ids[] = {
+ { .compatible = "rockchip,rk3066-emac", .data = &emac_rockchip_dt_data[0] },
+ { .compatible = "rockchip,rk3188-emac", .data = &emac_rockchip_dt_data[1] },
+ { /* Sentinel */ }
+};
+
+static void emac_rockchip_set_mac_speed(void *priv, unsigned int speed)
+{
+ struct rockchip_priv_data *emac = priv;
+ u32 data;
+ int err = 0;
+
+ /* write-enable bits */
+ data = GRF_SPEED_ENABLE_BIT;
+
+ switch(speed) {
+ case 10:
+ data |= GRF_SPEED_10M;
+ break;
+ case 100:
+ data |= GRF_SPEED_100M;
+ break;
+ default:
+ pr_err("speed %u not supported\n", speed);
+ return;
+ }
+
+ err = regmap_write(emac->grf, emac->soc_data->grf_offset, data);
+ if (err)
+ pr_err("unable to apply speed %u to grf (%d)\n", speed, err);
+}
+
+static int emac_rockchip_probe(struct platform_device *pdev)
+{
+ struct device *dev = &pdev->dev;
+ struct net_device *ndev;
+ struct rockchip_priv_data *priv;
+ const struct of_device_id *match;
+ u32 data;
+ int err, interface;
+
+ if (!pdev->dev.of_node)
+ return -ENODEV;
+
+ ndev = alloc_etherdev(sizeof(struct rockchip_priv_data));
+ if (!ndev)
+ return -ENOMEM;
+ platform_set_drvdata(pdev, ndev);
+ SET_NETDEV_DEV(ndev, dev);
+
+ priv = netdev_priv(ndev);
+ priv->emac.drv_name = DRV_NAME;
+ priv->emac.drv_version = DRV_VERSION;
+ priv->emac.set_mac_speed = emac_rockchip_set_mac_speed;
+
+ interface = of_get_phy_mode(dev->of_node);
+
+ /* RK3066 and RK3188 SoCs only support RMII */
+ if (interface != PHY_INTERFACE_MODE_RMII) {
+ dev_err(dev, "unsupported phy interface mode %d\n", interface);
+ err = -ENOTSUPP;
+ goto out_netdev;
+ }
+
+ priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf");
+ if (IS_ERR(priv->grf)) {
+ dev_err(dev, "failed to retrieve global register file from the device tree (%ld)\n", PTR_ERR(priv->grf));
+ err = PTR_ERR(priv->grf);
+ goto out_netdev;
+ }
+
+ match = of_match_node(emac_rockchip_dt_ids, dev->of_node);
+ priv->soc_data = match->data;
+
+ priv->emac.clk = devm_clk_get(dev, "hclk");
+ if (IS_ERR(priv->emac.clk)) {
+ dev_err(dev, "failed to retrieve host clock from device tree (%ld)\n", PTR_ERR(priv->emac.clk));
+ err = PTR_ERR(priv->emac.clk);
+ goto out_netdev;
+ }
+
+ priv->refclk = devm_clk_get(dev, "macref");
+ if (IS_ERR(priv->refclk)) {
+ dev_err(dev, "failed to retrieve reference clock from device tree (%ld)\n", PTR_ERR(priv->refclk));
+ err = PTR_ERR(priv->refclk);
+ goto out_netdev;
+ }
+
+ err = clk_prepare_enable(priv->refclk);
+ if (err) {
+ dev_err(dev, "failed to enable reference clock (%d)\n", err);
+ goto out_netdev;
+ }
+
+ /* Optional regulator for PHY */
+ priv->regulator = devm_regulator_get_optional(dev, "phy");
+ if (IS_ERR(priv->regulator)) {
+ if (PTR_ERR(priv->regulator) == -EPROBE_DEFER)
+ return -EPROBE_DEFER;
+ dev_err(dev, "no regulator found\n");
+ priv->regulator = NULL;
+ }
+
+ if (priv->regulator) {
+ err = regulator_enable(priv->regulator);
+ if (err) {
+ dev_err(dev, "failed to enable phy-supply (%d)\n", err);
+ goto out_clk_disable;
+ }
+ }
+
+ err = arc_emac_probe(ndev, interface);
+ if (err)
+ goto out_regulator_disable;
+
+ /* write-enable bits */
+ data = GRF_MODE_ENABLE_BIT | GRF_SPEED_ENABLE_BIT;
+
+ data |= GRF_SPEED_100M;
+ data |= GRF_MODE_RMII;
+
+ err = regmap_write(priv->grf, priv->soc_data->grf_offset, data);
+ if (err) {
+ dev_err(dev, "unable to apply initial settings to grf (%d)\n", err);
+ goto out_regulator_disable;
+ }
+
+ /* RMII interface needs always a rate of 50MHz */
+ err = clk_set_rate(priv->refclk, 50000000);
+ if (err)
+ dev_err(dev, "failed to change reference clock rate (%d)\n", err);
+ return 0;
+
+out_regulator_disable:
+ if (priv->regulator)
+ regulator_disable(priv->regulator);
+out_clk_disable:
+ clk_unprepare_disable(priv->refclk);
+out_netdev:
+ free_netdev(ndev);
+ return err;
+}
+
+static int emac_rockchip_remove(struct platform_device *pdev)
+{
+ struct net_device *ndev = platform_get_drvdata(pdev);
+ struct rockchip_priv_data *priv = netdev_priv(ndev);
+ int err;
+
+ clk_disable_unprepare(priv->refclk);
+
+ if (priv->regulator)
+ regulator_disable(priv->regulator);
+
+ err = arc_emac_remove(ndev);
+ free_netdev(ndev);
+ return err;
+}
+
+MODULE_DEVICE_TABLE(of, emac_rockchip_dt_ids);
+
+static struct platform_driver emac_rockchip_driver = {
+ .probe = emac_rockchip_probe,
+ .remove = emac_rockchip_remove,
+ .driver = {
+ .name = DRV_NAME,
+ .of_match_table = emac_rockchip_dt_ids,
+ },
+};
+
+module_platform_driver(emac_rockchip_driver);
+
+MODULE_AUTHOR("Romain Perier <romain.perier@gmail.com>");
+MODULE_DESCRIPTION("Rockchip EMAC platform driver");
+MODULE_LICENSE("GPL");
--
1.9.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 2/4] dt-bindings: Document EMAC Rockchip
2014-09-03 10:27 ` Romain Perier
@ 2014-09-03 10:27 ` Romain Perier
-1 siblings, 0 replies; 24+ messages in thread
From: Romain Perier @ 2014-09-03 10:27 UTC (permalink / raw)
To: heiko; +Cc: linux-rockchip, linux-arm-kernel, netdev, devicetree, arnd
This adds the necessary binding documentation for the EMAC Rockchip platform
driver found in RK3066 and RK3188 SoCs.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
---
.../devicetree/bindings/net/emac_rockchip.txt | 53 ++++++++++++++++++++++
1 file changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/emac_rockchip.txt
diff --git a/Documentation/devicetree/bindings/net/emac_rockchip.txt b/Documentation/devicetree/bindings/net/emac_rockchip.txt
new file mode 100644
index 0000000..d3242e4
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/emac_rockchip.txt
@@ -0,0 +1,53 @@
+* ARC EMAC 10/100 Ethernet platform driver for Rockchip Rk3066/RK3188 SoCs
+
+Required properties:
+- compatible: Should be "rockchip,rk3066-emac" or "rockchip,rk3188-emac"
+ according to the target SoC.
+- reg: Address and length of the register set for the device
+- interrupts: Should contain the EMAC interrupts
+- pinctrl-names: pin control state name ("default").
+- pinctrl-0: pin control group list of phandle. It must contain
+ pin control groups for communication with the phy and for the mii bus.
+- rockchip,grf: phandle to the syscon grf used to control speed and mode
+ for emac.
+- phy: see ethernet.txt file in the same directory.
+- phy-mode: see ethernet.txt file in the same directory.
+
+Optional properties:
+- phy-supply: phandle to a regulator if the PHY needs one
+
+Clock handling:
+- The host clock is needed to calculate and set polling period of EMAC.
+ It must be provided by the clock "hclk".
+- The reference clock is needed to get/set data from phy at the right frequency,
+ according to its "phy-mode". It must be provided by the clock "macref".
+
+Child nodes of the driver are the individual PHY devices connected to the
+MDIO bus. They must have a "reg" property given the PHY address on the MDIO bus.
+
+Examples:
+
+ethernet@10204000 {
+ compatible = "rockchip,rk3188-emac";
+ reg = <0xc0fc2000 0x3c>;
+ interrupts = <6>;
+ mac-address = [ 00 11 22 33 44 55 ];
+
+ clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
+ clock-names = "hclk", "macref";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
+
+ rockchip,grf = <&grf>;
+
+ phy = <&phy0>;
+ phy-mode = "rmii";
+ phy-supply = <&vcc_rmii>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy0: ethernet-phy@0 {
+ reg = <1>;
+ };
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 2/4] dt-bindings: Document EMAC Rockchip
@ 2014-09-03 10:27 ` Romain Perier
0 siblings, 0 replies; 24+ messages in thread
From: Romain Perier @ 2014-09-03 10:27 UTC (permalink / raw)
To: linux-arm-kernel
This adds the necessary binding documentation for the EMAC Rockchip platform
driver found in RK3066 and RK3188 SoCs.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
---
.../devicetree/bindings/net/emac_rockchip.txt | 53 ++++++++++++++++++++++
1 file changed, 53 insertions(+)
create mode 100644 Documentation/devicetree/bindings/net/emac_rockchip.txt
diff --git a/Documentation/devicetree/bindings/net/emac_rockchip.txt b/Documentation/devicetree/bindings/net/emac_rockchip.txt
new file mode 100644
index 0000000..d3242e4
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/emac_rockchip.txt
@@ -0,0 +1,53 @@
+* ARC EMAC 10/100 Ethernet platform driver for Rockchip Rk3066/RK3188 SoCs
+
+Required properties:
+- compatible: Should be "rockchip,rk3066-emac" or "rockchip,rk3188-emac"
+ according to the target SoC.
+- reg: Address and length of the register set for the device
+- interrupts: Should contain the EMAC interrupts
+- pinctrl-names: pin control state name ("default").
+- pinctrl-0: pin control group list of phandle. It must contain
+ pin control groups for communication with the phy and for the mii bus.
+- rockchip,grf: phandle to the syscon grf used to control speed and mode
+ for emac.
+- phy: see ethernet.txt file in the same directory.
+- phy-mode: see ethernet.txt file in the same directory.
+
+Optional properties:
+- phy-supply: phandle to a regulator if the PHY needs one
+
+Clock handling:
+- The host clock is needed to calculate and set polling period of EMAC.
+ It must be provided by the clock "hclk".
+- The reference clock is needed to get/set data from phy at the right frequency,
+ according to its "phy-mode". It must be provided by the clock "macref".
+
+Child nodes of the driver are the individual PHY devices connected to the
+MDIO bus. They must have a "reg" property given the PHY address on the MDIO bus.
+
+Examples:
+
+ethernet at 10204000 {
+ compatible = "rockchip,rk3188-emac";
+ reg = <0xc0fc2000 0x3c>;
+ interrupts = <6>;
+ mac-address = [ 00 11 22 33 44 55 ];
+
+ clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
+ clock-names = "hclk", "macref";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
+
+ rockchip,grf = <&grf>;
+
+ phy = <&phy0>;
+ phy-mode = "rmii";
+ phy-supply = <&vcc_rmii>;
+
+ #address-cells = <1>;
+ #size-cells = <0>;
+ phy0: ethernet-phy at 0 {
+ reg = <1>;
+ };
+};
--
1.9.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 3/4] ARM: dts: Add emac nodes to the rk3188 device tree
2014-09-03 10:27 ` Romain Perier
@ 2014-09-03 10:27 ` Romain Perier
-1 siblings, 0 replies; 24+ messages in thread
From: Romain Perier @ 2014-09-03 10:27 UTC (permalink / raw)
To: heiko; +Cc: linux-rockchip, linux-arm-kernel, netdev, devicetree, arnd
This adds support for EMAC Rockchip driver on RK3188 SoCs.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
---
arch/arm/boot/dts/rk3188.dtsi | 18 ++++++++++++++++++
arch/arm/boot/dts/rk3xxx.dtsi | 17 +++++++++++++++++
2 files changed, 35 insertions(+)
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index ee801a9..a182713 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -147,6 +147,24 @@
bias-disable;
};
+ emac {
+ emac_xfer: emac-xfer {
+ rockchip,pins = <RK_GPIO3 16 RK_FUNC_2 &pcfg_pull_none>, //tx_en
+ <RK_GPIO3 17 RK_FUNC_2 &pcfg_pull_none>, //txd1
+ <RK_GPIO3 18 RK_FUNC_2 &pcfg_pull_none>, //txd0
+ <RK_GPIO3 19 RK_FUNC_2 &pcfg_pull_none>, //rxd0
+ <RK_GPIO3 20 RK_FUNC_2 &pcfg_pull_none>, //rxd1
+ <RK_GPIO3 21 RK_FUNC_2 &pcfg_pull_none>, //mac_clk
+ <RK_GPIO3 22 RK_FUNC_2 &pcfg_pull_none>, //rx_err
+ <RK_GPIO3 23 RK_FUNC_2 &pcfg_pull_none>; //crs_dvalid
+ };
+
+ emac_mdio: emac-mdio {
+ rockchip,pins = <RK_GPIO3 24 RK_FUNC_2 &pcfg_pull_none>,
+ <RK_GPIO3 25 RK_FUNC_2 &pcfg_pull_none>;
+ };
+ };
+
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <RK_GPIO1 24 RK_FUNC_1 &pcfg_pull_none>,
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index 8caf85d..208b1df 100644
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -91,6 +91,23 @@
status = "disabled";
};
+ emac: ethernet@10204000 {
+ compatible = "snps,arc-emac";
+ reg = <0x10204000 0x3c>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rockchip,grf = <&grf>;
+
+ clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
+ clock-names = "hclk", "macref";
+ max-speed = <100>;
+ phy-mode = "rmii";
+
+ status = "disabled";
+ };
+
mmc0: dwmmc@10214000 {
compatible = "rockchip,rk2928-dw-mshc";
reg = <0x10214000 0x1000>;
--
1.9.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 3/4] ARM: dts: Add emac nodes to the rk3188 device tree
@ 2014-09-03 10:27 ` Romain Perier
0 siblings, 0 replies; 24+ messages in thread
From: Romain Perier @ 2014-09-03 10:27 UTC (permalink / raw)
To: linux-arm-kernel
This adds support for EMAC Rockchip driver on RK3188 SoCs.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
---
arch/arm/boot/dts/rk3188.dtsi | 18 ++++++++++++++++++
arch/arm/boot/dts/rk3xxx.dtsi | 17 +++++++++++++++++
2 files changed, 35 insertions(+)
diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi
index ee801a9..a182713 100644
--- a/arch/arm/boot/dts/rk3188.dtsi
+++ b/arch/arm/boot/dts/rk3188.dtsi
@@ -147,6 +147,24 @@
bias-disable;
};
+ emac {
+ emac_xfer: emac-xfer {
+ rockchip,pins = <RK_GPIO3 16 RK_FUNC_2 &pcfg_pull_none>, //tx_en
+ <RK_GPIO3 17 RK_FUNC_2 &pcfg_pull_none>, //txd1
+ <RK_GPIO3 18 RK_FUNC_2 &pcfg_pull_none>, //txd0
+ <RK_GPIO3 19 RK_FUNC_2 &pcfg_pull_none>, //rxd0
+ <RK_GPIO3 20 RK_FUNC_2 &pcfg_pull_none>, //rxd1
+ <RK_GPIO3 21 RK_FUNC_2 &pcfg_pull_none>, //mac_clk
+ <RK_GPIO3 22 RK_FUNC_2 &pcfg_pull_none>, //rx_err
+ <RK_GPIO3 23 RK_FUNC_2 &pcfg_pull_none>; //crs_dvalid
+ };
+
+ emac_mdio: emac-mdio {
+ rockchip,pins = <RK_GPIO3 24 RK_FUNC_2 &pcfg_pull_none>,
+ <RK_GPIO3 25 RK_FUNC_2 &pcfg_pull_none>;
+ };
+ };
+
i2c0 {
i2c0_xfer: i2c0-xfer {
rockchip,pins = <RK_GPIO1 24 RK_FUNC_1 &pcfg_pull_none>,
diff --git a/arch/arm/boot/dts/rk3xxx.dtsi b/arch/arm/boot/dts/rk3xxx.dtsi
index 8caf85d..208b1df 100644
--- a/arch/arm/boot/dts/rk3xxx.dtsi
+++ b/arch/arm/boot/dts/rk3xxx.dtsi
@@ -91,6 +91,23 @@
status = "disabled";
};
+ emac: ethernet at 10204000 {
+ compatible = "snps,arc-emac";
+ reg = <0x10204000 0x3c>;
+ interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ rockchip,grf = <&grf>;
+
+ clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
+ clock-names = "hclk", "macref";
+ max-speed = <100>;
+ phy-mode = "rmii";
+
+ status = "disabled";
+ };
+
mmc0: dwmmc at 10214000 {
compatible = "rockchip,rk2928-dw-mshc";
reg = <0x10214000 0x1000>;
--
1.9.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 4/4] ARM: dts: Enable emac node on the rk3188-radxarock boards
2014-09-03 10:27 ` Romain Perier
@ 2014-09-03 10:27 ` Romain Perier
-1 siblings, 0 replies; 24+ messages in thread
From: Romain Perier @ 2014-09-03 10:27 UTC (permalink / raw)
To: heiko; +Cc: linux-rockchip, linux-arm-kernel, netdev, devicetree, arnd
This enables EMAC Rockchip support on radxa rock boards.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
---
arch/arm/boot/dts/rk3188-radxarock.dts | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts
index 5e4e3c23..e1358d3 100644
--- a/arch/arm/boot/dts/rk3188-radxarock.dts
+++ b/arch/arm/boot/dts/rk3188-radxarock.dts
@@ -76,6 +76,24 @@
};
};
+&emac {
+ status = "okay";
+ compatible = "rockchip,rk3188-emac";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
+
+ mac-address = [ c6 ef 91 8e 60 4b ];
+ phy = <&phy0>;
+ phy-supply = <&vcc_rmii>;
+
+ phy0: ethernet-phy@0 {
+ reg = <0>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
&i2c1 {
status = "okay";
clock-frequency = <400000>;
@@ -201,6 +219,12 @@
};
};
+ lan8720a {
+ phy_int: phy-int {
+ rockchip,pins = <RK_GPIO3 26 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
ir-receiver {
ir_recv_pin: ir-recv-pin {
rockchip,pins = <RK_GPIO0 10 RK_FUNC_GPIO &pcfg_pull_none>;
--
1.9.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [PATCH 4/4] ARM: dts: Enable emac node on the rk3188-radxarock boards
@ 2014-09-03 10:27 ` Romain Perier
0 siblings, 0 replies; 24+ messages in thread
From: Romain Perier @ 2014-09-03 10:27 UTC (permalink / raw)
To: linux-arm-kernel
This enables EMAC Rockchip support on radxa rock boards.
Signed-off-by: Romain Perier <romain.perier@gmail.com>
---
arch/arm/boot/dts/rk3188-radxarock.dts | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts
index 5e4e3c23..e1358d3 100644
--- a/arch/arm/boot/dts/rk3188-radxarock.dts
+++ b/arch/arm/boot/dts/rk3188-radxarock.dts
@@ -76,6 +76,24 @@
};
};
+&emac {
+ status = "okay";
+ compatible = "rockchip,rk3188-emac";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
+
+ mac-address = [ c6 ef 91 8e 60 4b ];
+ phy = <&phy0>;
+ phy-supply = <&vcc_rmii>;
+
+ phy0: ethernet-phy at 0 {
+ reg = <0>;
+ interrupt-parent = <&gpio3>;
+ interrupts = <26 IRQ_TYPE_LEVEL_LOW>;
+ };
+};
+
&i2c1 {
status = "okay";
clock-frequency = <400000>;
@@ -201,6 +219,12 @@
};
};
+ lan8720a {
+ phy_int: phy-int {
+ rockchip,pins = <RK_GPIO3 26 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
ir-receiver {
ir_recv_pin: ir-recv-pin {
rockchip,pins = <RK_GPIO0 10 RK_FUNC_GPIO &pcfg_pull_none>;
--
1.9.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* Re: [PATCH v4 1/4] ethernet: arc: Add support for Rockchip SoC layer device tree bindings
2014-09-03 10:27 ` Romain Perier
@ 2014-09-03 10:42 ` Varka Bhadram
-1 siblings, 0 replies; 24+ messages in thread
From: Varka Bhadram @ 2014-09-03 10:42 UTC (permalink / raw)
To: Romain Perier, heiko
Cc: linux-rockchip, linux-arm-kernel, netdev, devicetree, arnd
On 09/03/2014 03:57 PM, Romain Perier wrote:
> This patch defines a platform glue layer for Rockchip SoCs which
> support arc-emac driver. It ensures that regulator for the rmii is on
> before trying to connect to the ethernet controller. It applies right
> speed and mode changes to the grf when ethernet settings change.
>
> Signed-off-by: Romain Perier <romain.perier@gmail.com>
> ---
> drivers/net/ethernet/arc/Kconfig | 10 ++
> drivers/net/ethernet/arc/Makefile | 1 +
> drivers/net/ethernet/arc/emac.h | 4 +-
> drivers/net/ethernet/arc/emac_main.c | 2 +
> drivers/net/ethernet/arc/emac_rockchip.c | 228 +++++++++++++++++++++++++++++++
> 5 files changed, 244 insertions(+), 1 deletion(-)
> create mode 100644 drivers/net/ethernet/arc/emac_rockchip.c
>
> diff --git a/drivers/net/ethernet/arc/Kconfig b/drivers/net/ethernet/arc/Kconfig
> index 89e04fd..8e262e2 100644
> --- a/drivers/net/ethernet/arc/Kconfig
> +++ b/drivers/net/ethernet/arc/Kconfig
> @@ -32,4 +32,14 @@ config ARC_EMAC
> non-standard on-chip ethernet device ARC EMAC 10/100 is used.
> Say Y here if you have such a board. If unsure, say N.
>
> +config EMAC_ROCKCHIP
> + tristate "Rockchip EMAC support"
> + select ARC_EMAC_CORE
> + depends on OF_IRQ && OF_NET && REGULATOR
> + ---help---
> + Support for Rockchip RK3066/RK3188 EMAC ethernet controllers.
> + This selects Rockchip SoC glue layer support for the
> + emac device driver. This driver is used for RK3066/RK3188
> + EMAC ethernet controller.
> +
> endif # NET_VENDOR_ARC
> diff --git a/drivers/net/ethernet/arc/Makefile b/drivers/net/ethernet/arc/Makefile
> index 241bb80..79108af 100644
> --- a/drivers/net/ethernet/arc/Makefile
> +++ b/drivers/net/ethernet/arc/Makefile
> @@ -5,3 +5,4 @@
> arc_emac-objs := emac_main.o emac_mdio.o
> obj-$(CONFIG_ARC_EMAC_CORE) += arc_emac.o
> obj-$(CONFIG_ARC_EMAC) += emac_arc.o
> +obj-$(CONFIG_EMAC_ROCKCHIP) += emac_rockchip.o
> diff --git a/drivers/net/ethernet/arc/emac.h b/drivers/net/ethernet/arc/emac.h
> index eb2ba67..dae1ac3 100644
> --- a/drivers/net/ethernet/arc/emac.h
> +++ b/drivers/net/ethernet/arc/emac.h
> @@ -123,9 +123,11 @@ struct buffer_state {
> * @speed: PHY's last set speed.
> */
> struct arc_emac_priv {
> - /* Devices */
> const char *drv_name;
> const char *drv_version;
> + void (*set_mac_speed)(void *priv, unsigned int speed);
> +
> + /* Devices */
> struct device *dev;
> struct phy_device *phy_dev;
> struct mii_bus *bus;
> diff --git a/drivers/net/ethernet/arc/emac_main.c b/drivers/net/ethernet/arc/emac_main.c
> index b35c69e..a08f343 100644
> --- a/drivers/net/ethernet/arc/emac_main.c
> +++ b/drivers/net/ethernet/arc/emac_main.c
> @@ -48,6 +48,8 @@ static void arc_emac_adjust_link(struct net_device *ndev)
> if (priv->speed != phy_dev->speed) {
> priv->speed = phy_dev->speed;
> state_changed = 1;
> + if (priv->set_mac_speed)
> + priv->set_mac_speed(priv, priv->speed);
> }
>
> if (priv->duplex != phy_dev->duplex) {
> diff --git a/drivers/net/ethernet/arc/emac_rockchip.c b/drivers/net/ethernet/arc/emac_rockchip.c
> new file mode 100644
> index 0000000..97dffbc
> --- /dev/null
> +++ b/drivers/net/ethernet/arc/emac_rockchip.c
> @@ -0,0 +1,228 @@
> +/**
> + * emac-rockchip.c - Rockchip EMAC specific glue layer
> + *
> + * Copyright (C) 2014 Romain Perier <romain.perier@gmail.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/etherdevice.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/module.h>
> +#include <linux/of_net.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/regulator/consumer.h>
> +
> +#include "emac.h"
> +
> +#define DRV_NAME "rockchip_emac"
> +#define DRV_VERSION "1.0"
> +
> +#define GRF_MODE_MII (1UL << 0)
> +#define GRF_MODE_RMII (0UL << 0)
> +#define GRF_SPEED_10M (0UL << 1)
> +#define GRF_SPEED_100M (1UL << 1)
> +#define GRF_SPEED_ENABLE_BIT (1UL << 17)
> +#define GRF_MODE_ENABLE_BIT (1UL << 16)
> +
> +struct emac_rockchip_soc_data {
> + int grf_offset;
> +};
> +
> +struct rockchip_priv_data {
> + struct arc_emac_priv emac;
> + struct regmap *grf;
> + const struct emac_rockchip_soc_data *soc_data;
> + struct regulator *regulator;
> + struct clk *refclk;
> +};
> +
> +static const struct emac_rockchip_soc_data emac_rockchip_dt_data[] = {
> + { .grf_offset = 0x154 }, /* rk3066 */
> + { .grf_offset = 0x0a4 }, /* rk3188 */
> +};
> +
> +static const struct of_device_id emac_rockchip_dt_ids[] = {
> + { .compatible = "rockchip,rk3066-emac", .data = &emac_rockchip_dt_data[0] },
> + { .compatible = "rockchip,rk3188-emac", .data = &emac_rockchip_dt_data[1] },
> + { /* Sentinel */ }
> +};
> +
of_device_id 's should be above probe/remove functionalities of the driver because we are
using *emac_rockchip_dt_ids* in probe function.
MODULE_DEVICE_TABLE(of, ...) should immediately follows the *of_device_id*
> +static void emac_rockchip_set_mac_speed(void *priv, unsigned int speed)
> +{
> + struct rockchip_priv_data *emac = priv;
> + u32 data;
> + int err = 0;
> +
> + /* write-enable bits */
> + data = GRF_SPEED_ENABLE_BIT;
> +
> + switch(speed) {
> + case 10:
> + data |= GRF_SPEED_10M;
> + break;
> + case 100:
> + data |= GRF_SPEED_100M;
> + break;
> + default:
> + pr_err("speed %u not supported\n", speed);
> + return;
> + }
> +
> + err = regmap_write(emac->grf, emac->soc_data->grf_offset, data);
> + if (err)
> + pr_err("unable to apply speed %u to grf (%d)\n", speed, err);
> +}
> +
> +static int emac_rockchip_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct net_device *ndev;
> + struct rockchip_priv_data *priv;
> + const struct of_device_id *match;
> + u32 data;
> + int err, interface;
> +
> + if (!pdev->dev.of_node)
> + return -ENODEV;
> +
> + ndev = alloc_etherdev(sizeof(struct rockchip_priv_data));
> + if (!ndev)
> + return -ENOMEM;
> + platform_set_drvdata(pdev, ndev);
> + SET_NETDEV_DEV(ndev, dev);
> +
> + priv = netdev_priv(ndev);
> + priv->emac.drv_name = DRV_NAME;
> + priv->emac.drv_version = DRV_VERSION;
> + priv->emac.set_mac_speed = emac_rockchip_set_mac_speed;
> +
> + interface = of_get_phy_mode(dev->of_node);
> +
> + /* RK3066 and RK3188 SoCs only support RMII */
> + if (interface != PHY_INTERFACE_MODE_RMII) {
> + dev_err(dev, "unsupported phy interface mode %d\n", interface);
> + err = -ENOTSUPP;
> + goto out_netdev;
> + }
> +
> + priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf");
> + if (IS_ERR(priv->grf)) {
> + dev_err(dev, "failed to retrieve global register file from the device tree (%ld)\n", PTR_ERR(priv->grf));
debug message is so lengthy ...?
we can omit *from device tree*
dev_err(dev, "failed to get global register file");
> + err = PTR_ERR(priv->grf);
> + goto out_netdev;
> + }
> +
> + match = of_match_node(emac_rockchip_dt_ids, dev->of_node);
> + priv->soc_data = match->data;
> +
> + priv->emac.clk = devm_clk_get(dev, "hclk");
> + if (IS_ERR(priv->emac.clk)) {
> + dev_err(dev, "failed to retrieve host clock from device tree (%ld)\n", PTR_ERR(priv->emac.clk));
> +
dto...
> err = PTR_ERR(priv->emac.clk);
> + goto out_netdev;
> + }
> +
> + priv->refclk = devm_clk_get(dev, "macref");
> + if (IS_ERR(priv->refclk)) {
> + dev_err(dev, "failed to retrieve reference clock from device tree (%ld)\n", PTR_ERR(priv->refclk));
dto...
> + err = PTR_ERR(priv->refclk);
> + goto out_netdev;
> + }
> +
> + err = clk_prepare_enable(priv->refclk);
> + if (err) {
> + dev_err(dev, "failed to enable reference clock (%d)\n", err);
> + goto out_netdev;
> + }
> +
> + /* Optional regulator for PHY */
> + priv->regulator = devm_regulator_get_optional(dev, "phy");
> + if (IS_ERR(priv->regulator)) {
> + if (PTR_ERR(priv->regulator) == -EPROBE_DEFER)
> + return -EPROBE_DEFER;
> + dev_err(dev, "no regulator found\n");
> + priv->regulator = NULL;
> + }
> +
> + if (priv->regulator) {
> + err = regulator_enable(priv->regulator);
> + if (err) {
> + dev_err(dev, "failed to enable phy-supply (%d)\n", err);
> + goto out_clk_disable;
> + }
> + }
> +
> + err = arc_emac_probe(ndev, interface);
> + if (err)
> + goto out_regulator_disable;
> +
> + /* write-enable bits */
> + data = GRF_MODE_ENABLE_BIT | GRF_SPEED_ENABLE_BIT;
> +
> + data |= GRF_SPEED_100M;
> + data |= GRF_MODE_RMII;
> +
> + err = regmap_write(priv->grf, priv->soc_data->grf_offset, data);
> + if (err) {
> + dev_err(dev, "unable to apply initial settings to grf (%d)\n", err);
> + goto out_regulator_disable;
> + }
> +
> + /* RMII interface needs always a rate of 50MHz */
> + err = clk_set_rate(priv->refclk, 50000000);
> + if (err)
> + dev_err(dev, "failed to change reference clock rate (%d)\n", err);
> + return 0;
> +
> +out_regulator_disable:
> + if (priv->regulator)
> + regulator_disable(priv->regulator);
> +out_clk_disable:
> + clk_unprepare_disable(priv->refclk);
> +out_netdev:
> + free_netdev(ndev);
> + return err;
> +}
> +
> +static int emac_rockchip_remove(struct platform_device *pdev)
> +{
> + struct net_device *ndev = platform_get_drvdata(pdev);
> + struct rockchip_priv_data *priv = netdev_priv(ndev);
> + int err;
> +
> + clk_disable_unprepare(priv->refclk);
> +
> + if (priv->regulator)
> + regulator_disable(priv->regulator);
> +
> + err = arc_emac_remove(ndev);
> + free_netdev(ndev);
> + return err;
> +}
> +
> +MODULE_DEVICE_TABLE(of, emac_rockchip_dt_ids);
> +
should be after *struct of_device_id*
> +static struct platform_driver emac_rockchip_driver = {
> + .probe = emac_rockchip_probe,
> + .remove = emac_rockchip_remove,
> + .driver = {
> + .name = DRV_NAME,
> + .of_match_table = emac_rockchip_dt_ids,
> + },
> +};
> +
> +module_platform_driver(emac_rockchip_driver);
> +
> +MODULE_AUTHOR("Romain Perier <romain.perier@gmail.com>");
> +MODULE_DESCRIPTION("Rockchip EMAC platform driver");
> +MODULE_LICENSE("GPL");
Thanks....
--
Regards,
Varka Bhadram.
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v4 1/4] ethernet: arc: Add support for Rockchip SoC layer device tree bindings
@ 2014-09-03 10:42 ` Varka Bhadram
0 siblings, 0 replies; 24+ messages in thread
From: Varka Bhadram @ 2014-09-03 10:42 UTC (permalink / raw)
To: linux-arm-kernel
On 09/03/2014 03:57 PM, Romain Perier wrote:
> This patch defines a platform glue layer for Rockchip SoCs which
> support arc-emac driver. It ensures that regulator for the rmii is on
> before trying to connect to the ethernet controller. It applies right
> speed and mode changes to the grf when ethernet settings change.
>
> Signed-off-by: Romain Perier <romain.perier@gmail.com>
> ---
> drivers/net/ethernet/arc/Kconfig | 10 ++
> drivers/net/ethernet/arc/Makefile | 1 +
> drivers/net/ethernet/arc/emac.h | 4 +-
> drivers/net/ethernet/arc/emac_main.c | 2 +
> drivers/net/ethernet/arc/emac_rockchip.c | 228 +++++++++++++++++++++++++++++++
> 5 files changed, 244 insertions(+), 1 deletion(-)
> create mode 100644 drivers/net/ethernet/arc/emac_rockchip.c
>
> diff --git a/drivers/net/ethernet/arc/Kconfig b/drivers/net/ethernet/arc/Kconfig
> index 89e04fd..8e262e2 100644
> --- a/drivers/net/ethernet/arc/Kconfig
> +++ b/drivers/net/ethernet/arc/Kconfig
> @@ -32,4 +32,14 @@ config ARC_EMAC
> non-standard on-chip ethernet device ARC EMAC 10/100 is used.
> Say Y here if you have such a board. If unsure, say N.
>
> +config EMAC_ROCKCHIP
> + tristate "Rockchip EMAC support"
> + select ARC_EMAC_CORE
> + depends on OF_IRQ && OF_NET && REGULATOR
> + ---help---
> + Support for Rockchip RK3066/RK3188 EMAC ethernet controllers.
> + This selects Rockchip SoC glue layer support for the
> + emac device driver. This driver is used for RK3066/RK3188
> + EMAC ethernet controller.
> +
> endif # NET_VENDOR_ARC
> diff --git a/drivers/net/ethernet/arc/Makefile b/drivers/net/ethernet/arc/Makefile
> index 241bb80..79108af 100644
> --- a/drivers/net/ethernet/arc/Makefile
> +++ b/drivers/net/ethernet/arc/Makefile
> @@ -5,3 +5,4 @@
> arc_emac-objs := emac_main.o emac_mdio.o
> obj-$(CONFIG_ARC_EMAC_CORE) += arc_emac.o
> obj-$(CONFIG_ARC_EMAC) += emac_arc.o
> +obj-$(CONFIG_EMAC_ROCKCHIP) += emac_rockchip.o
> diff --git a/drivers/net/ethernet/arc/emac.h b/drivers/net/ethernet/arc/emac.h
> index eb2ba67..dae1ac3 100644
> --- a/drivers/net/ethernet/arc/emac.h
> +++ b/drivers/net/ethernet/arc/emac.h
> @@ -123,9 +123,11 @@ struct buffer_state {
> * @speed: PHY's last set speed.
> */
> struct arc_emac_priv {
> - /* Devices */
> const char *drv_name;
> const char *drv_version;
> + void (*set_mac_speed)(void *priv, unsigned int speed);
> +
> + /* Devices */
> struct device *dev;
> struct phy_device *phy_dev;
> struct mii_bus *bus;
> diff --git a/drivers/net/ethernet/arc/emac_main.c b/drivers/net/ethernet/arc/emac_main.c
> index b35c69e..a08f343 100644
> --- a/drivers/net/ethernet/arc/emac_main.c
> +++ b/drivers/net/ethernet/arc/emac_main.c
> @@ -48,6 +48,8 @@ static void arc_emac_adjust_link(struct net_device *ndev)
> if (priv->speed != phy_dev->speed) {
> priv->speed = phy_dev->speed;
> state_changed = 1;
> + if (priv->set_mac_speed)
> + priv->set_mac_speed(priv, priv->speed);
> }
>
> if (priv->duplex != phy_dev->duplex) {
> diff --git a/drivers/net/ethernet/arc/emac_rockchip.c b/drivers/net/ethernet/arc/emac_rockchip.c
> new file mode 100644
> index 0000000..97dffbc
> --- /dev/null
> +++ b/drivers/net/ethernet/arc/emac_rockchip.c
> @@ -0,0 +1,228 @@
> +/**
> + * emac-rockchip.c - Rockchip EMAC specific glue layer
> + *
> + * Copyright (C) 2014 Romain Perier <romain.perier@gmail.com>
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License as published by
> + * the Free Software Foundation; either version 2 of the License, or
> + * (at your option) any later version.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> + * GNU General Public License for more details.
> + */
> +
> +#include <linux/etherdevice.h>
> +#include <linux/mfd/syscon.h>
> +#include <linux/module.h>
> +#include <linux/of_net.h>
> +#include <linux/platform_device.h>
> +#include <linux/regmap.h>
> +#include <linux/regulator/consumer.h>
> +
> +#include "emac.h"
> +
> +#define DRV_NAME "rockchip_emac"
> +#define DRV_VERSION "1.0"
> +
> +#define GRF_MODE_MII (1UL << 0)
> +#define GRF_MODE_RMII (0UL << 0)
> +#define GRF_SPEED_10M (0UL << 1)
> +#define GRF_SPEED_100M (1UL << 1)
> +#define GRF_SPEED_ENABLE_BIT (1UL << 17)
> +#define GRF_MODE_ENABLE_BIT (1UL << 16)
> +
> +struct emac_rockchip_soc_data {
> + int grf_offset;
> +};
> +
> +struct rockchip_priv_data {
> + struct arc_emac_priv emac;
> + struct regmap *grf;
> + const struct emac_rockchip_soc_data *soc_data;
> + struct regulator *regulator;
> + struct clk *refclk;
> +};
> +
> +static const struct emac_rockchip_soc_data emac_rockchip_dt_data[] = {
> + { .grf_offset = 0x154 }, /* rk3066 */
> + { .grf_offset = 0x0a4 }, /* rk3188 */
> +};
> +
> +static const struct of_device_id emac_rockchip_dt_ids[] = {
> + { .compatible = "rockchip,rk3066-emac", .data = &emac_rockchip_dt_data[0] },
> + { .compatible = "rockchip,rk3188-emac", .data = &emac_rockchip_dt_data[1] },
> + { /* Sentinel */ }
> +};
> +
of_device_id 's should be above probe/remove functionalities of the driver because we are
using *emac_rockchip_dt_ids* in probe function.
MODULE_DEVICE_TABLE(of, ...) should immediately follows the *of_device_id*
> +static void emac_rockchip_set_mac_speed(void *priv, unsigned int speed)
> +{
> + struct rockchip_priv_data *emac = priv;
> + u32 data;
> + int err = 0;
> +
> + /* write-enable bits */
> + data = GRF_SPEED_ENABLE_BIT;
> +
> + switch(speed) {
> + case 10:
> + data |= GRF_SPEED_10M;
> + break;
> + case 100:
> + data |= GRF_SPEED_100M;
> + break;
> + default:
> + pr_err("speed %u not supported\n", speed);
> + return;
> + }
> +
> + err = regmap_write(emac->grf, emac->soc_data->grf_offset, data);
> + if (err)
> + pr_err("unable to apply speed %u to grf (%d)\n", speed, err);
> +}
> +
> +static int emac_rockchip_probe(struct platform_device *pdev)
> +{
> + struct device *dev = &pdev->dev;
> + struct net_device *ndev;
> + struct rockchip_priv_data *priv;
> + const struct of_device_id *match;
> + u32 data;
> + int err, interface;
> +
> + if (!pdev->dev.of_node)
> + return -ENODEV;
> +
> + ndev = alloc_etherdev(sizeof(struct rockchip_priv_data));
> + if (!ndev)
> + return -ENOMEM;
> + platform_set_drvdata(pdev, ndev);
> + SET_NETDEV_DEV(ndev, dev);
> +
> + priv = netdev_priv(ndev);
> + priv->emac.drv_name = DRV_NAME;
> + priv->emac.drv_version = DRV_VERSION;
> + priv->emac.set_mac_speed = emac_rockchip_set_mac_speed;
> +
> + interface = of_get_phy_mode(dev->of_node);
> +
> + /* RK3066 and RK3188 SoCs only support RMII */
> + if (interface != PHY_INTERFACE_MODE_RMII) {
> + dev_err(dev, "unsupported phy interface mode %d\n", interface);
> + err = -ENOTSUPP;
> + goto out_netdev;
> + }
> +
> + priv->grf = syscon_regmap_lookup_by_phandle(dev->of_node, "rockchip,grf");
> + if (IS_ERR(priv->grf)) {
> + dev_err(dev, "failed to retrieve global register file from the device tree (%ld)\n", PTR_ERR(priv->grf));
debug message is so lengthy ...?
we can omit *from device tree*
dev_err(dev, "failed to get global register file");
> + err = PTR_ERR(priv->grf);
> + goto out_netdev;
> + }
> +
> + match = of_match_node(emac_rockchip_dt_ids, dev->of_node);
> + priv->soc_data = match->data;
> +
> + priv->emac.clk = devm_clk_get(dev, "hclk");
> + if (IS_ERR(priv->emac.clk)) {
> + dev_err(dev, "failed to retrieve host clock from device tree (%ld)\n", PTR_ERR(priv->emac.clk));
> +
dto...
> err = PTR_ERR(priv->emac.clk);
> + goto out_netdev;
> + }
> +
> + priv->refclk = devm_clk_get(dev, "macref");
> + if (IS_ERR(priv->refclk)) {
> + dev_err(dev, "failed to retrieve reference clock from device tree (%ld)\n", PTR_ERR(priv->refclk));
dto...
> + err = PTR_ERR(priv->refclk);
> + goto out_netdev;
> + }
> +
> + err = clk_prepare_enable(priv->refclk);
> + if (err) {
> + dev_err(dev, "failed to enable reference clock (%d)\n", err);
> + goto out_netdev;
> + }
> +
> + /* Optional regulator for PHY */
> + priv->regulator = devm_regulator_get_optional(dev, "phy");
> + if (IS_ERR(priv->regulator)) {
> + if (PTR_ERR(priv->regulator) == -EPROBE_DEFER)
> + return -EPROBE_DEFER;
> + dev_err(dev, "no regulator found\n");
> + priv->regulator = NULL;
> + }
> +
> + if (priv->regulator) {
> + err = regulator_enable(priv->regulator);
> + if (err) {
> + dev_err(dev, "failed to enable phy-supply (%d)\n", err);
> + goto out_clk_disable;
> + }
> + }
> +
> + err = arc_emac_probe(ndev, interface);
> + if (err)
> + goto out_regulator_disable;
> +
> + /* write-enable bits */
> + data = GRF_MODE_ENABLE_BIT | GRF_SPEED_ENABLE_BIT;
> +
> + data |= GRF_SPEED_100M;
> + data |= GRF_MODE_RMII;
> +
> + err = regmap_write(priv->grf, priv->soc_data->grf_offset, data);
> + if (err) {
> + dev_err(dev, "unable to apply initial settings to grf (%d)\n", err);
> + goto out_regulator_disable;
> + }
> +
> + /* RMII interface needs always a rate of 50MHz */
> + err = clk_set_rate(priv->refclk, 50000000);
> + if (err)
> + dev_err(dev, "failed to change reference clock rate (%d)\n", err);
> + return 0;
> +
> +out_regulator_disable:
> + if (priv->regulator)
> + regulator_disable(priv->regulator);
> +out_clk_disable:
> + clk_unprepare_disable(priv->refclk);
> +out_netdev:
> + free_netdev(ndev);
> + return err;
> +}
> +
> +static int emac_rockchip_remove(struct platform_device *pdev)
> +{
> + struct net_device *ndev = platform_get_drvdata(pdev);
> + struct rockchip_priv_data *priv = netdev_priv(ndev);
> + int err;
> +
> + clk_disable_unprepare(priv->refclk);
> +
> + if (priv->regulator)
> + regulator_disable(priv->regulator);
> +
> + err = arc_emac_remove(ndev);
> + free_netdev(ndev);
> + return err;
> +}
> +
> +MODULE_DEVICE_TABLE(of, emac_rockchip_dt_ids);
> +
should be after *struct of_device_id*
> +static struct platform_driver emac_rockchip_driver = {
> + .probe = emac_rockchip_probe,
> + .remove = emac_rockchip_remove,
> + .driver = {
> + .name = DRV_NAME,
> + .of_match_table = emac_rockchip_dt_ids,
> + },
> +};
> +
> +module_platform_driver(emac_rockchip_driver);
> +
> +MODULE_AUTHOR("Romain Perier <romain.perier@gmail.com>");
> +MODULE_DESCRIPTION("Rockchip EMAC platform driver");
> +MODULE_LICENSE("GPL");
Thanks....
--
Regards,
Varka Bhadram.
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v4 1/4] ethernet: arc: Add support for Rockchip SoC layer device tree bindings
2014-09-03 10:27 ` Romain Perier
@ 2014-09-03 11:14 ` Arnd Bergmann
-1 siblings, 0 replies; 24+ messages in thread
From: Arnd Bergmann @ 2014-09-03 11:14 UTC (permalink / raw)
To: linux-arm-kernel; +Cc: Romain Perier, heiko, linux-rockchip, devicetree, netdev
On Wednesday 03 September 2014 10:27:13 Romain Perier wrote:
> +static const struct emac_rockchip_soc_data emac_rockchip_dt_data[] = {
> + { .grf_offset = 0x154 }, /* rk3066 */
> + { .grf_offset = 0x0a4 }, /* rk3188 */
> +};
> +
> +static const struct of_device_id emac_rockchip_dt_ids[] = {
> + { .compatible = "rockchip,rk3066-emac", .data = &emac_rockchip_dt_data[0] },
> + { .compatible = "rockchip,rk3188-emac", .data = &emac_rockchip_dt_data[1] },
> + { /* Sentinel */ }
> +};
> +
>
One last question: is this the location given as .grf_offset the
only thing in grf that is potentially of concern to this driver?
If it is, you can change the binding to include the register number
in the syscon reference, like
rockchip,grf = <&grf 0x154>;
and then read it from there, to simplify the code needed to get the
number from the device id.
Arnd
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v4 1/4] ethernet: arc: Add support for Rockchip SoC layer device tree bindings
@ 2014-09-03 11:14 ` Arnd Bergmann
0 siblings, 0 replies; 24+ messages in thread
From: Arnd Bergmann @ 2014-09-03 11:14 UTC (permalink / raw)
To: linux-arm-kernel
On Wednesday 03 September 2014 10:27:13 Romain Perier wrote:
> +static const struct emac_rockchip_soc_data emac_rockchip_dt_data[] = {
> + { .grf_offset = 0x154 }, /* rk3066 */
> + { .grf_offset = 0x0a4 }, /* rk3188 */
> +};
> +
> +static const struct of_device_id emac_rockchip_dt_ids[] = {
> + { .compatible = "rockchip,rk3066-emac", .data = &emac_rockchip_dt_data[0] },
> + { .compatible = "rockchip,rk3188-emac", .data = &emac_rockchip_dt_data[1] },
> + { /* Sentinel */ }
> +};
> +
>
One last question: is this the location given as .grf_offset the
only thing in grf that is potentially of concern to this driver?
If it is, you can change the binding to include the register number
in the syscon reference, like
rockchip,grf = <&grf 0x154>;
and then read it from there, to simplify the code needed to get the
number from the device id.
Arnd
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v4 1/4] ethernet: arc: Add support for Rockchip SoC layer device tree bindings
2014-09-03 11:14 ` Arnd Bergmann
@ 2014-09-03 12:20 ` Heiko Stübner
-1 siblings, 0 replies; 24+ messages in thread
From: Heiko Stübner @ 2014-09-03 12:20 UTC (permalink / raw)
To: Arnd Bergmann
Cc: linux-arm-kernel, Romain Perier, linux-rockchip, devicetree, netdev
Am Mittwoch, 3. September 2014, 13:14:54 schrieb Arnd Bergmann:
> On Wednesday 03 September 2014 10:27:13 Romain Perier wrote:
> > +static const struct emac_rockchip_soc_data emac_rockchip_dt_data[] = {
> > + { .grf_offset = 0x154 }, /* rk3066 */
> > + { .grf_offset = 0x0a4 }, /* rk3188 */
> > +};
> > +
> > +static const struct of_device_id emac_rockchip_dt_ids[] = {
> > + { .compatible = "rockchip,rk3066-emac", .data =
> > &emac_rockchip_dt_data[0] }, + { .compatible =
> > "rockchip,rk3188-emac", .data = &emac_rockchip_dt_data[1] }, + { /*
> > Sentinel */ }
> > +};
> > +
>
> One last question: is this the location given as .grf_offset the
> only thing in grf that is potentially of concern to this driver?
>
> If it is, you can change the binding to include the register number
> in the syscon reference, like
>
> rockchip,grf = <&grf 0x154>;
>
> and then read it from there, to simplify the code needed to get the
> number from the device id.
I would disagree here :-)
Specific to the emac, there also exists a second register in the grf (0xa8 for
the rk3188) that contains a field
----
emac_newrcv_en - the selection of RMII receive selection
0: don't support the data package without header
1: support the data package without header
----
which we don't handle currently but somebody might want to in the future.
[There also is no documentation of this at all]
The dt maintainers also generally suggest to define compatibles for the
individual socs anyway, even if only one is matched, so I don't see the
necessity to encode this 2 times
compatible = "rockchip,rk3188-emac", "rockchip,rk3066-emac";
rockchip,grf = <&grf 0xa4>;
instead of the more flexible
compatible = "rockchip,rk3188-emac";
rockchip,grf = <&grf>;
which other rockchip drivers already use in this form.
Heiko
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v4 1/4] ethernet: arc: Add support for Rockchip SoC layer device tree bindings
@ 2014-09-03 12:20 ` Heiko Stübner
0 siblings, 0 replies; 24+ messages in thread
From: Heiko Stübner @ 2014-09-03 12:20 UTC (permalink / raw)
To: linux-arm-kernel
Am Mittwoch, 3. September 2014, 13:14:54 schrieb Arnd Bergmann:
> On Wednesday 03 September 2014 10:27:13 Romain Perier wrote:
> > +static const struct emac_rockchip_soc_data emac_rockchip_dt_data[] = {
> > + { .grf_offset = 0x154 }, /* rk3066 */
> > + { .grf_offset = 0x0a4 }, /* rk3188 */
> > +};
> > +
> > +static const struct of_device_id emac_rockchip_dt_ids[] = {
> > + { .compatible = "rockchip,rk3066-emac", .data =
> > &emac_rockchip_dt_data[0] }, + { .compatible =
> > "rockchip,rk3188-emac", .data = &emac_rockchip_dt_data[1] }, + { /*
> > Sentinel */ }
> > +};
> > +
>
> One last question: is this the location given as .grf_offset the
> only thing in grf that is potentially of concern to this driver?
>
> If it is, you can change the binding to include the register number
> in the syscon reference, like
>
> rockchip,grf = <&grf 0x154>;
>
> and then read it from there, to simplify the code needed to get the
> number from the device id.
I would disagree here :-)
Specific to the emac, there also exists a second register in the grf (0xa8 for
the rk3188) that contains a field
----
emac_newrcv_en - the selection of RMII receive selection
0: don't support the data package without header
1: support the data package without header
----
which we don't handle currently but somebody might want to in the future.
[There also is no documentation of this at all]
The dt maintainers also generally suggest to define compatibles for the
individual socs anyway, even if only one is matched, so I don't see the
necessity to encode this 2 times
compatible = "rockchip,rk3188-emac", "rockchip,rk3066-emac";
rockchip,grf = <&grf 0xa4>;
instead of the more flexible
compatible = "rockchip,rk3188-emac";
rockchip,grf = <&grf>;
which other rockchip drivers already use in this form.
Heiko
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH v4 1/4] ethernet: arc: Add support for Rockchip SoC layer device tree bindings
2014-09-03 12:20 ` Heiko Stübner
@ 2014-09-03 12:50 ` Arnd Bergmann
-1 siblings, 0 replies; 24+ messages in thread
From: Arnd Bergmann @ 2014-09-03 12:50 UTC (permalink / raw)
To: Heiko Stübner
Cc: linux-arm-kernel, Romain Perier, linux-rockchip, devicetree, netdev
On Wednesday 03 September 2014 14:20:50 Heiko Stübner wrote:
> >
> > One last question: is this the location given as .grf_offset the
> > only thing in grf that is potentially of concern to this driver?
> >
> > If it is, you can change the binding to include the register number
> > in the syscon reference, like
> >
> > rockchip,grf = <&grf 0x154>;
> >
> > and then read it from there, to simplify the code needed to get the
> > number from the device id.
>
> I would disagree here
>
> Specific to the emac, there also exists a second register in the grf (0xa8 for
> the rk3188) that contains a field
>
> ----
> emac_newrcv_en - the selection of RMII receive selection
> 0: don't support the data package without header
> 1: support the data package without header
> ----
>
> which we don't handle currently but somebody might want to in the future.
> [There also is no documentation of this at all]
Ok, fair enough. If there is a chance that there would be more of these
fields that we may want to support in the future, the table approach
seems reasonable.
The main advantage of putting the register number into the syscon
reference is to support future models without driver changes, but
it's not clear if that's worth it.
Arnd
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH v4 1/4] ethernet: arc: Add support for Rockchip SoC layer device tree bindings
@ 2014-09-03 12:50 ` Arnd Bergmann
0 siblings, 0 replies; 24+ messages in thread
From: Arnd Bergmann @ 2014-09-03 12:50 UTC (permalink / raw)
To: linux-arm-kernel
On Wednesday 03 September 2014 14:20:50 Heiko St?bner wrote:
> >
> > One last question: is this the location given as .grf_offset the
> > only thing in grf that is potentially of concern to this driver?
> >
> > If it is, you can change the binding to include the register number
> > in the syscon reference, like
> >
> > rockchip,grf = <&grf 0x154>;
> >
> > and then read it from there, to simplify the code needed to get the
> > number from the device id.
>
> I would disagree here
>
> Specific to the emac, there also exists a second register in the grf (0xa8 for
> the rk3188) that contains a field
>
> ----
> emac_newrcv_en - the selection of RMII receive selection
> 0: don't support the data package without header
> 1: support the data package without header
> ----
>
> which we don't handle currently but somebody might want to in the future.
> [There also is no documentation of this at all]
Ok, fair enough. If there is a chance that there would be more of these
fields that we may want to support in the future, the table approach
seems reasonable.
The main advantage of putting the register number into the syscon
reference is to support future models without driver changes, but
it's not clear if that's worth it.
Arnd
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 2/4] dt-bindings: Document EMAC Rockchip
2014-09-03 10:27 ` Romain Perier
@ 2014-09-03 14:26 ` Heiko Stübner
-1 siblings, 0 replies; 24+ messages in thread
From: Heiko Stübner @ 2014-09-03 14:26 UTC (permalink / raw)
To: Romain Perier; +Cc: linux-rockchip, linux-arm-kernel, netdev, devicetree, arnd
Am Mittwoch, 3. September 2014, 10:27:14 schrieb Romain Perier:
> This adds the necessary binding documentation for the EMAC Rockchip platform
> driver found in RK3066 and RK3188 SoCs.
>
> Signed-off-by: Romain Perier <romain.perier@gmail.com>
> ---
> .../devicetree/bindings/net/emac_rockchip.txt | 53
> ++++++++++++++++++++++ 1 file changed, 53 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/emac_rockchip.txt
>
> diff --git a/Documentation/devicetree/bindings/net/emac_rockchip.txt
> b/Documentation/devicetree/bindings/net/emac_rockchip.txt new file mode
> 100644
> index 0000000..d3242e4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/emac_rockchip.txt
> @@ -0,0 +1,53 @@
> +* ARC EMAC 10/100 Ethernet platform driver for Rockchip Rk3066/RK3188 SoCs
> +
> +Required properties:
> +- compatible: Should be "rockchip,rk3066-emac" or "rockchip,rk3188-emac"
> + according to the target SoC.
> +- reg: Address and length of the register set for the device
> +- interrupts: Should contain the EMAC interrupts
> +- pinctrl-names: pin control state name ("default").
> +- pinctrl-0: pin control group list of phandle. It must contain
> + pin control groups for communication with the phy and for the mii bus.
pinctrl is normally not supposed to be part of the binding doc, as it is a
property of the board and not the controller IP itself
> +- rockchip,grf: phandle to the syscon grf used to control speed and mode
> + for emac.
> +- phy: see ethernet.txt file in the same directory.
> +- phy-mode: see ethernet.txt file in the same directory.
> +
> +Optional properties:
> +- phy-supply: phandle to a regulator if the PHY needs one
> +
> +Clock handling:
> +- The host clock is needed to calculate and set polling period of EMAC.
> + It must be provided by the clock "hclk".
> +- The reference clock is needed to get/set data from phy at the right
> frequency,
> + according to its "phy-mode". It must be provided by the clock
> "macref".
I think a more often used scheme is something like
- clocks: Must contain an entry for each entry in clock-names.
- clock-names: Shall be "hclk" for the host clock needed to calculate and
set polling period of EMAC and "macref" for the reference
clock needed to transfer data to and from the phy.
> +
> +Child nodes of the driver are the individual PHY devices connected to the
> +MDIO bus. They must have a "reg" property given the PHY address on the MDIO
> bus. +
> +Examples:
> +
> +ethernet@10204000 {
> + compatible = "rockchip,rk3188-emac";
> + reg = <0xc0fc2000 0x3c>;
> + interrupts = <6>;
> + mac-address = [ 00 11 22 33 44 55 ];
> +
> + clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
> + clock-names = "hclk", "macref";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
> +
> + rockchip,grf = <&grf>;
> +
> + phy = <&phy0>;
> + phy-mode = "rmii";
> + phy-supply = <&vcc_rmii>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> + phy0: ethernet-phy@0 {
> + reg = <1>;
> + };
> +};
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 2/4] dt-bindings: Document EMAC Rockchip
@ 2014-09-03 14:26 ` Heiko Stübner
0 siblings, 0 replies; 24+ messages in thread
From: Heiko Stübner @ 2014-09-03 14:26 UTC (permalink / raw)
To: linux-arm-kernel
Am Mittwoch, 3. September 2014, 10:27:14 schrieb Romain Perier:
> This adds the necessary binding documentation for the EMAC Rockchip platform
> driver found in RK3066 and RK3188 SoCs.
>
> Signed-off-by: Romain Perier <romain.perier@gmail.com>
> ---
> .../devicetree/bindings/net/emac_rockchip.txt | 53
> ++++++++++++++++++++++ 1 file changed, 53 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/net/emac_rockchip.txt
>
> diff --git a/Documentation/devicetree/bindings/net/emac_rockchip.txt
> b/Documentation/devicetree/bindings/net/emac_rockchip.txt new file mode
> 100644
> index 0000000..d3242e4
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/net/emac_rockchip.txt
> @@ -0,0 +1,53 @@
> +* ARC EMAC 10/100 Ethernet platform driver for Rockchip Rk3066/RK3188 SoCs
> +
> +Required properties:
> +- compatible: Should be "rockchip,rk3066-emac" or "rockchip,rk3188-emac"
> + according to the target SoC.
> +- reg: Address and length of the register set for the device
> +- interrupts: Should contain the EMAC interrupts
> +- pinctrl-names: pin control state name ("default").
> +- pinctrl-0: pin control group list of phandle. It must contain
> + pin control groups for communication with the phy and for the mii bus.
pinctrl is normally not supposed to be part of the binding doc, as it is a
property of the board and not the controller IP itself
> +- rockchip,grf: phandle to the syscon grf used to control speed and mode
> + for emac.
> +- phy: see ethernet.txt file in the same directory.
> +- phy-mode: see ethernet.txt file in the same directory.
> +
> +Optional properties:
> +- phy-supply: phandle to a regulator if the PHY needs one
> +
> +Clock handling:
> +- The host clock is needed to calculate and set polling period of EMAC.
> + It must be provided by the clock "hclk".
> +- The reference clock is needed to get/set data from phy at the right
> frequency,
> + according to its "phy-mode". It must be provided by the clock
> "macref".
I think a more often used scheme is something like
- clocks: Must contain an entry for each entry in clock-names.
- clock-names: Shall be "hclk" for the host clock needed to calculate and
set polling period of EMAC and "macref" for the reference
clock needed to transfer data to and from the phy.
> +
> +Child nodes of the driver are the individual PHY devices connected to the
> +MDIO bus. They must have a "reg" property given the PHY address on the MDIO
> bus. +
> +Examples:
> +
> +ethernet at 10204000 {
> + compatible = "rockchip,rk3188-emac";
> + reg = <0xc0fc2000 0x3c>;
> + interrupts = <6>;
> + mac-address = [ 00 11 22 33 44 55 ];
> +
> + clocks = <&cru HCLK_EMAC>, <&cru SCLK_MAC>;
> + clock-names = "hclk", "macref";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
> +
> + rockchip,grf = <&grf>;
> +
> + phy = <&phy0>;
> + phy-mode = "rmii";
> + phy-supply = <&vcc_rmii>;
> +
> + #address-cells = <1>;
> + #size-cells = <0>;
> + phy0: ethernet-phy at 0 {
> + reg = <1>;
> + };
> +};
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 4/4] ARM: dts: Enable emac node on the rk3188-radxarock boards
2014-09-03 10:27 ` Romain Perier
@ 2014-09-03 15:29 ` Naoki FUKAUMI
-1 siblings, 0 replies; 24+ messages in thread
From: Naoki FUKAUMI @ 2014-09-03 15:29 UTC (permalink / raw)
To: Romain Perier
Cc: heiko, linux-rockchip, devicetree, arnd, linux-arm-kernel, netdev
On Wed, Sep 3, 2014 at 7:27 PM, Romain Perier <romain.perier@gmail.com> wrote:
> This enables EMAC Rockchip support on radxa rock boards.
>
> Signed-off-by: Romain Perier <romain.perier@gmail.com>
> ---
> arch/arm/boot/dts/rk3188-radxarock.dts | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts
> index 5e4e3c23..e1358d3 100644
> --- a/arch/arm/boot/dts/rk3188-radxarock.dts
> +++ b/arch/arm/boot/dts/rk3188-radxarock.dts
> @@ -76,6 +76,24 @@
> };
> };
>
> +&emac {
> + status = "okay";
> + compatible = "rockchip,rk3188-emac";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
> +
> + mac-address = [ c6 ef 91 8e 60 4b ];
is "mac-address" required?
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 4/4] ARM: dts: Enable emac node on the rk3188-radxarock boards
@ 2014-09-03 15:29 ` Naoki FUKAUMI
0 siblings, 0 replies; 24+ messages in thread
From: Naoki FUKAUMI @ 2014-09-03 15:29 UTC (permalink / raw)
To: linux-arm-kernel
On Wed, Sep 3, 2014 at 7:27 PM, Romain Perier <romain.perier@gmail.com> wrote:
> This enables EMAC Rockchip support on radxa rock boards.
>
> Signed-off-by: Romain Perier <romain.perier@gmail.com>
> ---
> arch/arm/boot/dts/rk3188-radxarock.dts | 24 ++++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
>
> diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts
> index 5e4e3c23..e1358d3 100644
> --- a/arch/arm/boot/dts/rk3188-radxarock.dts
> +++ b/arch/arm/boot/dts/rk3188-radxarock.dts
> @@ -76,6 +76,24 @@
> };
> };
>
> +&emac {
> + status = "okay";
> + compatible = "rockchip,rk3188-emac";
> +
> + pinctrl-names = "default";
> + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
> +
> + mac-address = [ c6 ef 91 8e 60 4b ];
is "mac-address" required?
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 4/4] ARM: dts: Enable emac node on the rk3188-radxarock boards
2014-09-03 15:29 ` Naoki FUKAUMI
@ 2014-09-03 16:37 ` PERIER Romain
-1 siblings, 0 replies; 24+ messages in thread
From: PERIER Romain @ 2014-09-03 16:37 UTC (permalink / raw)
To: Naoki FUKAUMI
Cc: Heiko Stübner, linux-rockchip, devicetree, Arnd Bergmann,
linux-arm-kernel, netdev
It is an optional property used by arc-emac (the core driver), if it
is not present the core driver generates one for you.
Problem being that with this property two radxa rock boards connected
on the same local network might have the same mac address.
In this case it would be probably better to remove this property. What
do you think ?
2014-09-03 17:29 GMT+02:00 Naoki FUKAUMI <naobsd@gmail.com>:
> On Wed, Sep 3, 2014 at 7:27 PM, Romain Perier <romain.perier@gmail.com> wrote:
>> This enables EMAC Rockchip support on radxa rock boards.
>>
>> Signed-off-by: Romain Perier <romain.perier@gmail.com>
>> ---
>> arch/arm/boot/dts/rk3188-radxarock.dts | 24 ++++++++++++++++++++++++
>> 1 file changed, 24 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts
>> index 5e4e3c23..e1358d3 100644
>> --- a/arch/arm/boot/dts/rk3188-radxarock.dts
>> +++ b/arch/arm/boot/dts/rk3188-radxarock.dts
>> @@ -76,6 +76,24 @@
>> };
>> };
>>
>> +&emac {
>> + status = "okay";
>> + compatible = "rockchip,rk3188-emac";
>> +
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
>> +
>> + mac-address = [ c6 ef 91 8e 60 4b ];
>
> is "mac-address" required?
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 4/4] ARM: dts: Enable emac node on the rk3188-radxarock boards
@ 2014-09-03 16:37 ` PERIER Romain
0 siblings, 0 replies; 24+ messages in thread
From: PERIER Romain @ 2014-09-03 16:37 UTC (permalink / raw)
To: linux-arm-kernel
It is an optional property used by arc-emac (the core driver), if it
is not present the core driver generates one for you.
Problem being that with this property two radxa rock boards connected
on the same local network might have the same mac address.
In this case it would be probably better to remove this property. What
do you think ?
2014-09-03 17:29 GMT+02:00 Naoki FUKAUMI <naobsd@gmail.com>:
> On Wed, Sep 3, 2014 at 7:27 PM, Romain Perier <romain.perier@gmail.com> wrote:
>> This enables EMAC Rockchip support on radxa rock boards.
>>
>> Signed-off-by: Romain Perier <romain.perier@gmail.com>
>> ---
>> arch/arm/boot/dts/rk3188-radxarock.dts | 24 ++++++++++++++++++++++++
>> 1 file changed, 24 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/rk3188-radxarock.dts b/arch/arm/boot/dts/rk3188-radxarock.dts
>> index 5e4e3c23..e1358d3 100644
>> --- a/arch/arm/boot/dts/rk3188-radxarock.dts
>> +++ b/arch/arm/boot/dts/rk3188-radxarock.dts
>> @@ -76,6 +76,24 @@
>> };
>> };
>>
>> +&emac {
>> + status = "okay";
>> + compatible = "rockchip,rk3188-emac";
>> +
>> + pinctrl-names = "default";
>> + pinctrl-0 = <&emac_xfer>, <&emac_mdio>, <&phy_int>;
>> +
>> + mac-address = [ c6 ef 91 8e 60 4b ];
>
> is "mac-address" required?
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [PATCH 4/4] ARM: dts: Enable emac node on the rk3188-radxarock boards
2014-09-03 16:37 ` PERIER Romain
@ 2014-09-03 17:45 ` Arnd Bergmann
-1 siblings, 0 replies; 24+ messages in thread
From: Arnd Bergmann @ 2014-09-03 17:45 UTC (permalink / raw)
To: linux-arm-kernel
Cc: PERIER Romain, Naoki FUKAUMI, devicetree, Heiko Stübner,
netdev, linux-rockchip
On Wednesday 03 September 2014 18:37:16 PERIER Romain wrote:
> It is an optional property used by arc-emac (the core driver), if it
> is not present the core driver generates one for you.
> Problem being that with this property two radxa rock boards connected
> on the same local network might have the same mac address.
>
> In this case it would be probably better to remove this property. What
> do you think ?
>
It would typically be filled in by the boot loader, and be all-zeroes
in the kernel-supplied dts file. I don't see a point in hardcoding
a particular MAC address in the dts file, since that won't work
unless it's the only device of that type in the network segment.
Arnd
^ permalink raw reply [flat|nested] 24+ messages in thread
* [PATCH 4/4] ARM: dts: Enable emac node on the rk3188-radxarock boards
@ 2014-09-03 17:45 ` Arnd Bergmann
0 siblings, 0 replies; 24+ messages in thread
From: Arnd Bergmann @ 2014-09-03 17:45 UTC (permalink / raw)
To: linux-arm-kernel
On Wednesday 03 September 2014 18:37:16 PERIER Romain wrote:
> It is an optional property used by arc-emac (the core driver), if it
> is not present the core driver generates one for you.
> Problem being that with this property two radxa rock boards connected
> on the same local network might have the same mac address.
>
> In this case it would be probably better to remove this property. What
> do you think ?
>
It would typically be filled in by the boot loader, and be all-zeroes
in the kernel-supplied dts file. I don't see a point in hardcoding
a particular MAC address in the dts file, since that won't work
unless it's the only device of that type in the network segment.
Arnd
^ permalink raw reply [flat|nested] 24+ messages in thread
end of thread, other threads:[~2014-09-03 17:45 UTC | newest]
Thread overview: 24+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2014-09-03 10:27 [PATCH v4 1/4] ethernet: arc: Add support for Rockchip SoC layer device tree bindings Romain Perier
2014-09-03 10:27 ` Romain Perier
2014-09-03 10:27 ` [PATCH 2/4] dt-bindings: Document EMAC Rockchip Romain Perier
2014-09-03 10:27 ` Romain Perier
2014-09-03 14:26 ` Heiko Stübner
2014-09-03 14:26 ` Heiko Stübner
2014-09-03 10:27 ` [PATCH 3/4] ARM: dts: Add emac nodes to the rk3188 device tree Romain Perier
2014-09-03 10:27 ` Romain Perier
2014-09-03 10:27 ` [PATCH 4/4] ARM: dts: Enable emac node on the rk3188-radxarock boards Romain Perier
2014-09-03 10:27 ` Romain Perier
2014-09-03 15:29 ` Naoki FUKAUMI
2014-09-03 15:29 ` Naoki FUKAUMI
2014-09-03 16:37 ` PERIER Romain
2014-09-03 16:37 ` PERIER Romain
2014-09-03 17:45 ` Arnd Bergmann
2014-09-03 17:45 ` Arnd Bergmann
2014-09-03 10:42 ` [PATCH v4 1/4] ethernet: arc: Add support for Rockchip SoC layer device tree bindings Varka Bhadram
2014-09-03 10:42 ` Varka Bhadram
2014-09-03 11:14 ` Arnd Bergmann
2014-09-03 11:14 ` Arnd Bergmann
2014-09-03 12:20 ` Heiko Stübner
2014-09-03 12:20 ` Heiko Stübner
2014-09-03 12:50 ` Arnd Bergmann
2014-09-03 12:50 ` Arnd Bergmann
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.