From: Masahiro Yamada <yamada.m@jp.panasonic.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [PATCH 23/26] mpc8260: remove ep82xxm board support
Date: Mon, 15 Dec 2014 23:26:28 +0900 [thread overview]
Message-ID: <1418653608-14177-24-git-send-email-yamada.m@jp.panasonic.com> (raw)
In-Reply-To: <1418653608-14177-1-git-send-email-yamada.m@jp.panasonic.com>
This board is still a non-generic board.
Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
---
arch/powerpc/cpu/mpc8260/Kconfig | 4 -
board/ep82xxm/Kconfig | 9 -
board/ep82xxm/MAINTAINERS | 6 -
board/ep82xxm/Makefile | 8 -
board/ep82xxm/ep82xxm.c | 274 ----------------------------
configs/ep82xxm_defconfig | 3 -
doc/README.scrapyard | 1 +
include/configs/ep82xxm.h | 383 ---------------------------------------
8 files changed, 1 insertion(+), 687 deletions(-)
delete mode 100644 board/ep82xxm/Kconfig
delete mode 100644 board/ep82xxm/MAINTAINERS
delete mode 100644 board/ep82xxm/Makefile
delete mode 100644 board/ep82xxm/ep82xxm.c
delete mode 100644 configs/ep82xxm_defconfig
delete mode 100644 include/configs/ep82xxm.h
diff --git a/arch/powerpc/cpu/mpc8260/Kconfig b/arch/powerpc/cpu/mpc8260/Kconfig
index 59e2bed..599b021 100644
--- a/arch/powerpc/cpu/mpc8260/Kconfig
+++ b/arch/powerpc/cpu/mpc8260/Kconfig
@@ -16,9 +16,6 @@ config TARGET_CPU86
config TARGET_CPU87
bool "Support CPU87"
-config TARGET_EP82XXM
- bool "Support ep82xxm"
-
config TARGET_KM82XX
bool "Support km82xx"
@@ -27,7 +24,6 @@ endchoice
source "board/atc/Kconfig"
source "board/cpu86/Kconfig"
source "board/cpu87/Kconfig"
-source "board/ep82xxm/Kconfig"
source "board/keymile/km82xx/Kconfig"
endmenu
diff --git a/board/ep82xxm/Kconfig b/board/ep82xxm/Kconfig
deleted file mode 100644
index d842091..0000000
--- a/board/ep82xxm/Kconfig
+++ /dev/null
@@ -1,9 +0,0 @@
-if TARGET_EP82XXM
-
-config SYS_BOARD
- default "ep82xxm"
-
-config SYS_CONFIG_NAME
- default "ep82xxm"
-
-endif
diff --git a/board/ep82xxm/MAINTAINERS b/board/ep82xxm/MAINTAINERS
deleted file mode 100644
index c053df9..0000000
--- a/board/ep82xxm/MAINTAINERS
+++ /dev/null
@@ -1,6 +0,0 @@
-EP82XXM BOARD
-#M: -
-S: Maintained
-F: board/ep82xxm/
-F: include/configs/ep82xxm.h
-F: configs/ep82xxm_defconfig
diff --git a/board/ep82xxm/Makefile b/board/ep82xxm/Makefile
deleted file mode 100644
index f9d3891..0000000
--- a/board/ep82xxm/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
-#
-# (C) Copyright 2001-2006
-# Wolfgang Denk, DENX Software Engineering, wd at denx.de.
-#
-# SPDX-License-Identifier: GPL-2.0+
-#
-
-obj-y := ep82xxm.o
diff --git a/board/ep82xxm/ep82xxm.c b/board/ep82xxm/ep82xxm.c
deleted file mode 100644
index fdde535..0000000
--- a/board/ep82xxm/ep82xxm.c
+++ /dev/null
@@ -1,274 +0,0 @@
-/*
- * Copyright (C) 2006 Embedded Planet, LLC.
- *
- * Support for Embedded Planet EP82xxM boards.
- * Tested on EP82xxM (MPC8270).
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#include <common.h>
-#include <mpc8260.h>
-#include <ioports.h>
-#include <asm/m8260_pci.h>
-#ifdef CONFIG_PCI
-#include <pci.h>
-#endif
-#include <miiphy.h>
-#include <linux/compiler.h>
-
-/*
- * I/O Port configuration table
- *
- * if conf is 1, then that port pin will be configured at boot time
- * according to the five values podr/pdir/ppar/psor/pdat for that entry
- */
-
-#define CONFIG_SYS_FCC2 1
-#define CONFIG_SYS_FCC3 1
-
-const iop_conf_t iop_conf_tab[4][32] = {
-
- /* Port A */
- { /* conf ppar psor pdir podr pdat */
- /* PA31 */ { 0, 0, 0, 0, 0, 1 }, /* PA31 */
- /* PA30 */ { 0, 0, 0, 0, 0, 1 }, /* PA30 */
- /* PA29 */ { 0, 0, 0, 0, 0, 1 }, /* PA29 */
- /* PA28 */ { 0, 0, 0, 0, 0, 1 }, /* PA28 */
- /* PA27 */ { 0, 0, 0, 0, 0, 1 }, /* PA27 */
- /* PA26 */ { 0, 0, 0, 0, 0, 1 }, /* PA26 */
- /* PA25 */ { 0, 0, 0, 0, 0, 1 }, /* PA25 */
- /* PA24 */ { 0, 0, 0, 0, 0, 1 }, /* PA24 */
- /* PA23 */ { 0, 0, 0, 0, 0, 1 }, /* PA23 */
- /* PA22 */ { 0, 0, 0, 0, 0, 0 }, /* PA22 */
- /* PA21 */ { 0, 0, 0, 0, 0, 1 }, /* PA21 */
- /* PA20 */ { 0, 0, 0, 0, 0, 1 }, /* PA20 */
- /* PA19 */ { 0, 0, 0, 0, 0, 1 }, /* PA19 */
- /* PA18 */ { 0, 0, 0, 0, 0, 1 }, /* PA18 */
- /* PA17 */ { 0, 0, 0, 0, 0, 1 }, /* PA17 */
- /* PA16 */ { 0, 0, 0, 0, 0, 1 }, /* PA16 */
- /* PA15 */ { 0, 0, 0, 0, 0, 1 }, /* PA15 */
- /* PA14 */ { 0, 0, 0, 0, 0, 1 }, /* PA14 */
- /* PA13 */ { 0, 0, 0, 0, 0, 1 }, /* PA13 */
- /* PA12 */ { 0, 0, 0, 0, 0, 1 }, /* PA12 */
- /* PA11 */ { 0, 0, 0, 0, 0, 1 }, /* PA11 */
- /* PA10 */ { 0, 0, 0, 0, 0, 1 }, /* PA10 */
- /* PA9 */ { 1, 1, 0, 1, 0, 1 }, /* SMC2 TxD */
- /* PA8 */ { 1, 1, 0, 0, 0, 1 }, /* SMC2 RxD */
- /* PA7 */ { 0, 0, 0, 0, 0, 1 }, /* PA7 */
- /* PA6 */ { 0, 0, 0, 0, 0, 1 }, /* PA6 */
- /* PA5 */ { 0, 0, 0, 0, 0, 1 }, /* PA5 */
- /* PA4 */ { 0, 0, 0, 0, 0, 1 }, /* PA4 */
- /* PA3 */ { 0, 0, 0, 0, 0, 1 }, /* PA3 */
- /* PA2 */ { 0, 0, 0, 0, 0, 1 }, /* PA2 */
- /* PA1 */ { 0, 0, 0, 0, 0, 1 }, /* PA1 */
- /* PA0 */ { 0, 0, 0, 0, 0, 1 } /* PA0 */
- },
-
- /* Port B */
- { /* conf ppar psor pdir podr pdat */
- /* PB31 */ { CONFIG_SYS_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TX_ER */
- /* PB30 */ { CONFIG_SYS_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_DV */
- /* PB29 */ { CONFIG_SYS_FCC2, 1, 1, 1, 0, 0 }, /* FCC2 MII TX_EN */
- /* PB28 */ { CONFIG_SYS_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RX_ER */
- /* PB27 */ { CONFIG_SYS_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII COL */
- /* PB26 */ { CONFIG_SYS_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII CRS */
- /* PB25 */ { CONFIG_SYS_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[3] */
- /* PB24 */ { CONFIG_SYS_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[2] */
- /* PB23 */ { CONFIG_SYS_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[1] */
- /* PB22 */ { CONFIG_SYS_FCC2, 1, 0, 1, 0, 0 }, /* FCC2 MII TxD[0] */
- /* PB21 */ { CONFIG_SYS_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[0] */
- /* PB20 */ { CONFIG_SYS_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[1] */
- /* PB19 */ { CONFIG_SYS_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[2] */
- /* PB18 */ { CONFIG_SYS_FCC2, 1, 0, 0, 0, 0 }, /* FCC2 MII RxD[3] */
- /* PB17 */ { CONFIG_SYS_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RX_DIV */
- /* PB16 */ { CONFIG_SYS_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RX_ERR */
- /* PB15 */ { CONFIG_SYS_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TX_ERR */
- /* PB14 */ { CONFIG_SYS_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TX_EN */
- /* PB13 */ { CONFIG_SYS_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:COL */
- /* PB12 */ { CONFIG_SYS_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:CRS */
- /* PB11 */ { CONFIG_SYS_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB10 */ { CONFIG_SYS_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB9 */ { CONFIG_SYS_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB8 */ { CONFIG_SYS_FCC3, 1, 0, 0, 0, 0 }, /* FCC3:RXD */
- /* PB7 */ { 0, 0, 0, 0, 0, 0 }, /* PB7 */
- /* PB6 */ { CONFIG_SYS_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB5 */ { CONFIG_SYS_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB4 */ { CONFIG_SYS_FCC3, 1, 0, 1, 0, 0 }, /* FCC3:TXD */
- /* PB3 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB2 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB1 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PB0 */ { 0, 0, 0, 0, 0, 0 } /* non-existent */
- },
-
- /* Port C */
- { /* conf ppar psor pdir podr pdat */
- /* PC31 */ { 0, 0, 0, 0, 0, 0 }, /* PC31 */
- /* PC30 */ { 0, 0, 0, 0, 0, 0 }, /* PC30 */
- /* PC29 */ { 1, 1, 1, 0, 0, 0 }, /* SCC1 CTS# */
- /* PC28 */ { 0, 0, 0, 0, 0, 0 }, /* PC28 */
- /* PC27 */ { CONFIG_SYS_FCC3, 1, 0, 1, 0, 0 }, /* FCC3: TXD[0] */
- /* PC26 */ { 0, 0, 0, 0, 0, 0 }, /* PC26 */
- /* PC25 */ { 0, 0, 0, 0, 0, 0 }, /* PC25 */
- /* PC24 */ { 0, 0, 0, 0, 0, 0 }, /* PC24 */
- /* PC23 */ { 0, 0, 0, 0, 0, 0 }, /* PC23 */
- /* PC22 */ { 0, 0, 0, 0, 0, 0 }, /* PC22 */
- /* PC21 */ { 0, 0, 0, 0, 0, 0 }, /* PC21 */
- /* PC20 */ { 0, 0, 0, 0, 0, 0 }, /* PC20 */
- /* PC19 */ { CONFIG_SYS_FCC2, 1, 0, 0, 0, 0 }, /* RxClk (CLK13) */
- /* PC18 */ { CONFIG_SYS_FCC2, 1, 0, 0, 0, 0 }, /* TxClk (CLK14) */
- /* PC17 */ { CONFIG_SYS_FCC3, 1, 0, 0, 0, 0 }, /* RxClk (CLK15) */
- /* PC16 */ { CONFIG_SYS_FCC3, 1, 0, 0, 0, 0 }, /* TxClk (CLK16) */
- /* PC15 */ { 0, 0, 0, 0, 0, 0 }, /* PC15 */
- /* PC14 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 CD# */
- /* PC13 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 CTS# */
- /* PC12 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 CD# */
- /* PC11 */ { 0, 0, 0, 0, 0, 0 }, /* PC11 */
- /* PC10 */ { 1, 1, 0, 0, 0, 0 }, /* SCC3 CD# */
- /* PC9 */ { 0, 0, 0, 0, 0, 0 }, /* PC9 */
- /* PC8 */ { 1, 1, 1, 0, 0, 0 }, /* SCC3 CTS# */
- /* PC7 */ { 0, 0, 0, 0, 0, 0 }, /* PC7 */
- /* PC6 */ { 0, 0, 0, 0, 0, 0 }, /* PC6 */
- /* PC5 */ { 0, 0, 0, 0, 0, 0 }, /* PC5 */
- /* PC4 */ { 0, 0, 0, 0, 0, 0 }, /* PC4 */
- /* PC3 */ { 0, 0, 0, 0, 0, 0 }, /* PC3 */
- /* PC2 */ { 0, 0, 0, 0, 0, 0 }, /* PC2 */
- /* PC1 */ { 0, 0, 0, 0, 0, 0 }, /* PC1 */
- /* PC0 */ { 0, 0, 0, 0, 0, 0 }, /* PC0 */
- },
-
- /* Port D */
- { /* conf ppar psor pdir podr pdat */
- /* PD31 */ { 1, 1, 0, 0, 0, 0 }, /* SCC1 RXD */
- /* PD30 */ { 1, 1, 1, 1, 0, 1 }, /* SCC1 TXD */
- /* PD29 */ { 1, 1, 0, 1, 0, 0 }, /* SCC1 RTS# */
- /* PD28 */ { 1, 1, 0, 0, 0, 0 }, /* SCC2 RXD */
- /* PD27 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 TXD */
- /* PD26 */ { 1, 1, 0, 1, 0, 0 }, /* SCC2 RTS# */
- /* PD25 */ { 1, 1, 0, 0, 0, 0 }, /* SCC3 RXD */
- /* PD24 */ { 1, 1, 0, 1, 0, 0 }, /* SCC3 TXD */
- /* PD23 */ { 1, 1, 0, 1, 0, 0 }, /* SCC3 RTS# */
- /* PD22 */ { 0, 0, 0, 0, 0, 1 }, /* PD22 */
- /* PD21 */ { 0, 0, 0, 0, 0, 1 }, /* PD21 */
- /* PD20 */ { 0, 0, 0, 0, 0, 1 }, /* PD20 */
- /* PD19 */ { 0, 0, 0, 0, 0, 1 }, /* PD19 */
- /* PD18 */ { 0, 0, 0, 0, 0, 1 }, /* PD18 */
- /* PD17 */ { 0, 0, 0, 0, 0, 1 }, /* PD17 */
- /* PD16 */ { 0, 0, 0, 0, 0, 1 }, /* PD16 */
- /* PD15 */ { 1, 1, 1, 0, 1, 1 }, /* I2C SDA */
- /* PD14 */ { 1, 1, 1, 0, 1, 1 }, /* I2C SCL */
- /* PD13 */ { 0, 0, 0, 0, 0, 1 }, /* PD13 */
- /* PD12 */ { 0, 0, 0, 0, 0, 1 }, /* PD12 */
- /* PD11 */ { 0, 0, 0, 0, 0, 1 }, /* PD11 */
- /* PD10 */ { 0, 0, 0, 0, 0, 1 }, /* PD10 */
- /* PD9 */ { 1, 1, 0, 1, 0, 1 }, /* SMC1 TxD */
- /* PD8 */ { 1, 1, 0, 0, 0, 1 }, /* SMC1 RxD */
- /* PD7 */ { 1, 1, 0, 0, 0, 1 }, /* SMC1 SMSYN */
- /* PD6 */ { 0, 0, 0, 0, 0, 1 }, /* PD6 */
- /* PD5 */ { 0, 0, 0, 0, 0, 1 }, /* PD5 */
- /* PD4 */ { 0, 0, 0, 0, 0, 1 }, /* PD4 */
- /* PD3 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PD2 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PD1 */ { 0, 0, 0, 0, 0, 0 }, /* non-existent */
- /* PD0 */ { 0, 0, 0, 0, 0, 0 } /* non-existent */
- }
-};
-
-#ifdef CONFIG_PCI
-typedef struct pci_ic_s {
- unsigned long pci_int_stat;
- unsigned long pci_int_mask;
-}pci_ic_t;
-#endif
-
-int board_early_init_f (void)
-{
- vu_char *bcsr = (vu_char *)CONFIG_SYS_BCSR;
-
- bcsr[4] |= 0x30; /* Turn the LEDs off */
-
-#if defined(CONFIG_CONS_ON_SMC) || defined(CONFIG_KGDB_ON_SMC)
- bcsr[6] |= 0x10;
-#endif
-#if defined(CONFIG_CONS_ON_SCC) || defined(CONFIG_KGDB_ON_SCC)
- bcsr[7] |= 0x10;
-#endif
-
-#if CONFIG_SYS_FCC3
- bcsr[8] |= 0xC0;
-#endif /* CONFIG_SYS_FCC3 */
-#if CONFIG_SYS_FCC2
- bcsr[8] |= 0x30;
-#endif /* CONFIG_SYS_FCC2 */
-
- return 0;
-}
-
-phys_size_t initdram(int board_type)
-{
- /* Size in MB of SDRAM populated on board*/
- long int msize = 256;
-
-#ifndef CONFIG_SYS_RAMBOOT
- volatile immap_t *immap = (immap_t *)CONFIG_SYS_IMMR;
- volatile memctl8260_t *memctl = &immap->im_memctl;
- uint psdmr = CONFIG_SYS_PSDMR;
- int i;
-
- unsigned char *ramptr1 = (unsigned char *)0x00000110;
- __maybe_unused unsigned char ramtmp;
-
- memctl->memc_mptpr = CONFIG_SYS_MPTPR;
-
-udelay(400);
-
- /* Initialise 60x bus SDRAM */
- memctl->memc_psrt = CONFIG_SYS_PSRT;
- memctl->memc_or1 = CONFIG_SYS_SDRAM_OR;
- memctl->memc_br1 = CONFIG_SYS_SDRAM_BR;
- memctl->memc_psdmr = psdmr;
-
-udelay(400);
-
- memctl->memc_psdmr = psdmr | PSDMR_OP_PREA; /* Precharge all banks */
- ramtmp = *ramptr1;
- memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; /* CBR refresh */
- for (i = 0; i < 8; i++) {
- memctl->memc_psdmr = psdmr | PSDMR_OP_CBRR; /* CBR refresh */
- }
- ramtmp = *ramptr1;
- memctl->memc_psdmr = psdmr | PSDMR_OP_MRW; /* Mode Register write */
- *ramptr1 = 0xFF;
- memctl->memc_psdmr = psdmr | PSDMR_RFEN; /* Refresh enable */
-#endif /* !CONFIG_SYS_RAMBOOT */
-
- /* Return total 60x bus SDRAM size */
- return msize * 1024 * 1024;
-}
-
-int checkboard(void)
-{
- vu_char *bcsr = (vu_char *)CONFIG_SYS_BCSR;
-
- puts("Board: ");
- switch (bcsr[0]) {
- case 0x0A:
- printf("EP82xxM 1.0 CPLD revision %d\n", bcsr[1]);
- break;
- default:
- printf("unknown: ID=%02X\n", bcsr[0]);
- }
-
- return 0;
-}
-
-#ifdef CONFIG_PCI
-struct pci_controller hose;
-
-extern void pci_mpc8250_init(struct pci_controller *);
-
-void pci_init_board(void)
-{
- pci_mpc8250_init(&hose);
-}
-#endif
diff --git a/configs/ep82xxm_defconfig b/configs/ep82xxm_defconfig
deleted file mode 100644
index 0842d2d..0000000
--- a/configs/ep82xxm_defconfig
+++ /dev/null
@@ -1,3 +0,0 @@
-CONFIG_PPC=y
-CONFIG_MPC8260=y
-CONFIG_TARGET_EP82XXM=y
diff --git a/doc/README.scrapyard b/doc/README.scrapyard
index 0c47ebd..400eea1 100644
--- a/doc/README.scrapyard
+++ b/doc/README.scrapyard
@@ -12,6 +12,7 @@ The list should be sorted in reverse chronological order.
Board Arch CPU Commit Removed Last known maintainer/contact
=================================================================================================
+ep82xxm powerpc mpc8260 - -
gw8260 powerpc mpc8260 - - Oliver Brown <obrown@adventnetworks.com>
IPHASE4539 powerpc mpc8260 - - Wolfgang Grandegger <wg@denx.de>
muas3001 powerpc mpc8260 - - Heiko Schocher <hs@denx.de>
diff --git a/include/configs/ep82xxm.h b/include/configs/ep82xxm.h
deleted file mode 100644
index cf31f0f..0000000
--- a/include/configs/ep82xxm.h
+++ /dev/null
@@ -1,383 +0,0 @@
-/*
- * Copyright (C) 2006 Embedded Planet, LLC.
- *
- * U-Boot configuration for Embedded Planet EP82xxM boards.
- *
- * SPDX-License-Identifier: GPL-2.0+
- */
-
-#ifndef __CONFIG_H
-#define __CONFIG_H
-
-#define CPU_ID_STR "MPC8270"
-
-#define CONFIG_EP82XXM /* Embedded Planet EP82xxM H 1.0 board */
- /* 256MB SDRAM / 64MB FLASH */
-
-#define CONFIG_SYS_TEXT_BASE 0xFFF00000
-
-#define CONFIG_BOARD_EARLY_INIT_F 1 /* Call board_early_init_f */
-
-/* Allow serial number (serial#) and MAC address (ethaddr) to be overwritten */
-#define CONFIG_ENV_OVERWRITE
-
-/*
- * Select serial console configuration
- *
- * If either CONFIG_CONS_ON_SMC or CONFIG_CONS_ON_SCC is selected, then
- * CONFIG_CONS_INDEX must be set to the channel number (1-2 for SMC, 1-4
- * for SCC).
- */
-#define CONFIG_CONS_ON_SMC /* Console is on SMC */
-#undef CONFIG_CONS_ON_SCC /* It's not on SCC */
-#undef CONFIG_CONS_NONE /* It's not on external UART */
-#define CONFIG_CONS_INDEX 1 /* SMC1 is used for console */
-
-#define CONFIG_SYS_BCSR 0xFA000000
-
-/*
- * Select ethernet configuration
- *
- * If either CONFIG_ETHER_ON_SCC or CONFIG_ETHER_ON_FCC is selected,
- * then CONFIG_ETHER_INDEX must be set to the channel number (1-4 for
- * SCC, 1-3 for FCC)
- *
- * If CONFIG_ETHER_NONE is defined, then either the ethernet routines
- * must be defined elsewhere (as for the console), or CONFIG_CMD_NET
- * must be unset.
- */
-#undef CONFIG_ETHER_ON_SCC /* Ethernet is not on SCC */
-#define CONFIG_ETHER_ON_FCC /* Ethernet is on FCC */
-#undef CONFIG_ETHER_NONE /* No external Ethernet */
-
-
-#define CONFIG_ETHER_ON_FCC2
-#define CONFIG_ETHER_ON_FCC3
-
-#define CONFIG_SYS_CMXFCR_MASK3 (CMXFCR_FC3 | CMXFCR_RF3CS_MSK | CMXFCR_TF3CS_MSK)
-#define CONFIG_SYS_CMXFCR_VALUE3 (CMXFCR_RF3CS_CLK15 | CMXFCR_TF3CS_CLK16)
-#define CONFIG_SYS_CMXFCR_MASK2 (CMXFCR_FC2 | CMXFCR_RF2CS_MSK | CMXFCR_TF2CS_MSK)
-#define CONFIG_SYS_CMXFCR_VALUE2 (CMXFCR_RF2CS_CLK13 | CMXFCR_TF2CS_CLK14)
-
-#define CONFIG_SYS_CPMFCR_RAMTYPE 0
-#define CONFIG_SYS_FCC_PSMR (FCC_PSMR_FDE | FCC_PSMR_LPB)
-
-#define CONFIG_MII /* MII PHY management */
-#define CONFIG_BITBANGMII /* Bit-banged MDIO interface */
-
-/*
- * GPIO pins used for bit-banged MII communications
- */
-#define MDIO_PORT 0 /* Not used - implemented in BCSR */
-
-#define MDIO_ACTIVE (*(vu_char *)(CONFIG_SYS_BCSR + 8) &= 0xFB)
-#define MDIO_TRISTATE (*(vu_char *)(CONFIG_SYS_BCSR + 8) |= 0x04)
-#define MDIO_READ (*(vu_char *)(CONFIG_SYS_BCSR + 8) & 1)
-
-#define MDIO(bit) if(bit) *(vu_char *)(CONFIG_SYS_BCSR + 8) |= 0x01; \
- else *(vu_char *)(CONFIG_SYS_BCSR + 8) &= 0xFE
-
-#define MDC(bit) if(bit) *(vu_char *)(CONFIG_SYS_BCSR + 8) |= 0x02; \
- else *(vu_char *)(CONFIG_SYS_BCSR + 8) &= 0xFD
-
-#define MIIDELAY udelay(1)
-
-
-#ifndef CONFIG_8260_CLKIN
-#define CONFIG_8260_CLKIN 66000000 /* in Hz */
-#endif
-
-#define CONFIG_BAUDRATE 115200
-
-#define CONFIG_SYS_VXWORKS_MAC_PTR 0x4300 /* Pass Ethernet MAC to VxWorks */
-
-
-/*
- * BOOTP options
- */
-#define CONFIG_BOOTP_BOOTFILESIZE
-#define CONFIG_BOOTP_BOOTPATH
-#define CONFIG_BOOTP_GATEWAY
-#define CONFIG_BOOTP_HOSTNAME
-
-
-/*
- * Command line configuration.
- */
-#include <config_cmd_default.h>
-
-
-#define CONFIG_CMD_DHCP
-#define CONFIG_CMD_ECHO
-#define CONFIG_CMD_I2C
-#define CONFIG_CMD_IMMAP
-#define CONFIG_CMD_MII
-#define CONFIG_CMD_PING
-#define CONFIG_CMD_DATE
-#define CONFIG_CMD_DTT
-#define CONFIG_CMD_EEPROM
-#define CONFIG_CMD_PCI
-#define CONFIG_CMD_DIAG
-
-
-#define CONFIG_ETHADDR 00:10:EC:00:88:65
-#define CONFIG_HAS_ETH1
-#define CONFIG_ETH1ADDR 00:10:EC:80:88:65
-#define CONFIG_IPADDR 10.0.0.245
-#define CONFIG_HOSTNAME EP82xxM
-#define CONFIG_SERVERIP 10.0.0.26
-#define CONFIG_GATEWAYIP 10.0.0.1
-#define CONFIG_NETMASK 255.255.255.0
-#define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
-#define CONFIG_ENV_IN_OWN_SECT 1
-#define CONFIG_AUTO_COMPLETE 1
-#define CONFIG_EXTRA_ENV_SETTINGS "ethprime=FCC3"
-
-#if defined(CONFIG_CMD_KGDB)
-#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */
-#define CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */
-#undef CONFIG_KGDB_NONE /* define if kgdb on something else */
-#define CONFIG_KGDB_INDEX 1 /* which serial channel for kgdb */
-#define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port at */
-#endif
-
-#define CONFIG_BZIP2 /* include support for bzip2 compressed images */
-#undef CONFIG_WATCHDOG /* disable platform specific watchdog */
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_HUSH_PARSER
-#define CONFIG_SYS_LONGHELP /* undef to save memory */
-#define CONFIG_SYS_PROMPT "ep82xxm=> " /* Monitor Command Prompt */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
-#else
-#define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
-#endif
-#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) /* Print Buffer Size */
-#define CONFIG_SYS_MAXARGS 16 /* max number of command args */
-#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
-
-#define CONFIG_SYS_MEMTEST_START 0x00100000 /* memtest works on */
-#define CONFIG_SYS_MEMTEST_END 0x00f00000 /* 1 ... 15 MB in DRAM */
-
-#define CONFIG_SYS_LOAD_ADDR 0x100000 /* default load address */
-
-#define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200, 230400 }
-
-/*-----------------------------------------------------------------------
- * Environment
- *----------------------------------------------------------------------*/
-/*
- * Define here the location of the environment variables (FLASH or EEPROM).
- * Note: DENX encourages to use redundant environment in FLASH.
- */
-#if 1
-#define CONFIG_ENV_IS_IN_FLASH 1 /* use FLASH for environment vars */
-#else
-#define CONFIG_ENV_IS_IN_EEPROM 1 /* use EEPROM for environment vars */
-#endif
-
-/*-----------------------------------------------------------------------
- * FLASH related
- *----------------------------------------------------------------------*/
-#define CONFIG_SYS_FLASH_BASE 0xFC000000
-#define CONFIG_SYS_FLASH_CFI
-#define CONFIG_FLASH_CFI_DRIVER
-#define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max num of flash banks */
-#define CONFIG_SYS_MAX_FLASH_SECT 512 /* max num of sects on one chip */
-#define CONFIG_SYS_FLASH_EMPTY_INFO /* print 'E' for empty sector in flinfo */
-
-#ifdef CONFIG_ENV_IS_IN_FLASH
-#define CONFIG_ENV_SECT_SIZE 0x20000
-#define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
-#endif /* CONFIG_ENV_IS_IN_FLASH */
-
-/*-----------------------------------------------------------------------
- * I2C
- *----------------------------------------------------------------------*/
-/* EEPROM Configuration */
-#define CONFIG_SYS_EEPROM_SIZE 0x1000
-#define CONFIG_SYS_I2C_EEPROM_ADDR 0x54
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 1
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 3
-#define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
-
-#ifdef CONFIG_ENV_IS_IN_EEPROM
-#define CONFIG_ENV_SIZE 0x200 /* Size of Environment vars */
-#define CONFIG_ENV_OFFSET 0x0
-#endif /* CONFIG_ENV_IS_IN_EEPROM */
-
-/* RTC Configuration */
-#define CONFIG_RTC_M41T11 1 /* uses a M41T81 */
-#define CONFIG_SYS_I2C_RTC_ADDR 0x68
-#define CONFIG_M41T11_BASE_YEAR 1900
-
-/* I2C SYSMON (LM75) */
-#define CONFIG_DTT_LM75 1
-#define CONFIG_DTT_SENSORS {0}
-#define CONFIG_SYS_DTT_MAX_TEMP 70
-#define CONFIG_SYS_DTT_LOW_TEMP -30
-#define CONFIG_SYS_DTT_HYSTERESIS 3
-
-/*-----------------------------------------------------------------------
- * NVRAM Configuration
- *-----------------------------------------------------------------------
- */
-#define CONFIG_SYS_NVRAM_BASE_ADDR 0xFA080000
-#define CONFIG_SYS_NVRAM_SIZE (128*1024)-16
-
-
-/*-----------------------------------------------------------------------
- * PCI stuff
- *-----------------------------------------------------------------------
- */
-/* General PCI */
-#define CONFIG_PCI /* include pci support */
-#define CONFIG_PCI_INDIRECT_BRIDGE /* indirect PCI bridge support */
-#define CONFIG_PCI_PNP /* do pci plug-and-play */
-#define CONFIG_PCI_SCAN_SHOW /* show pci devices on startup */
-#define CONFIG_PCI_BOOTDELAY 0
-
-/* PCI Memory map (if different from default map */
-#define CONFIG_SYS_PCI_SLV_MEM_LOCAL CONFIG_SYS_SDRAM_BASE /* Local base */
-#define CONFIG_SYS_PCI_SLV_MEM_BUS 0x00000000 /* PCI base */
-#define CONFIG_SYS_PICMR0_MASK_ATTRIB (PICMR_MASK_512MB | PICMR_ENABLE | \
- PICMR_PREFETCH_EN)
-
-/*
- * These are the windows that allow the CPU to access PCI address space.
- * All three PCI master windows, which allow the CPU to access PCI
- * prefetch, non prefetch, and IO space (see below), must all fit within
- * these windows.
- */
-
-/*
- * Master window that allows the CPU to access PCI Memory (prefetch).
- * This window will be setup with the second set of Outbound ATU registers
- * in the bridge.
- */
-
-#define CONFIG_SYS_PCI_MSTR_MEM_LOCAL 0x80000000 /* Local base */
-#define CONFIG_SYS_PCI_MSTR_MEM_BUS 0x80000000 /* PCI base */
-#define CONFIG_SYS_CPU_PCI_MEM_START PCI_MSTR_MEM_LOCAL
-#define CONFIG_SYS_PCI_MSTR_MEM_SIZE 0x20000000 /* 512MB */
-#define CONFIG_SYS_POCMR0_MASK_ATTRIB (POCMR_MASK_512MB | POCMR_ENABLE | POCMR_PREFETCH_EN)
-
-/*
- * Master window that allows the CPU to access PCI Memory (non-prefetch).
- * This window will be setup with the second set of Outbound ATU registers
- * in the bridge.
- */
-
-#define CONFIG_SYS_PCI_MSTR_MEMIO_LOCAL 0xA0000000 /* Local base */
-#define CONFIG_SYS_PCI_MSTR_MEMIO_BUS 0xA0000000 /* PCI base */
-#define CONFIG_SYS_CPU_PCI_MEMIO_START PCI_MSTR_MEMIO_LOCAL
-#define CONFIG_SYS_PCI_MSTR_MEMIO_SIZE 0x20000000 /* 512MB */
-#define CONFIG_SYS_POCMR1_MASK_ATTRIB (POCMR_MASK_512MB | POCMR_ENABLE)
-
-/*
- * Master window that allows the CPU to access PCI IO space.
- * This window will be setup with the first set of Outbound ATU registers
- * in the bridge.
- */
-
-#define CONFIG_SYS_PCI_MSTR_IO_LOCAL 0xF6000000 /* Local base */
-#define CONFIG_SYS_PCI_MSTR_IO_BUS 0x00000000 /* PCI base */
-#define CONFIG_SYS_CPU_PCI_IO_START PCI_MSTR_IO_LOCAL
-#define CONFIG_SYS_PCI_MSTR_IO_SIZE 0x02000000 /* 64MB */
-#define CONFIG_SYS_POCMR2_MASK_ATTRIB (POCMR_MASK_32MB | POCMR_ENABLE | POCMR_PCI_IO)
-
-
-/* PCIBR0 - for PCI IO*/
-#define CONFIG_SYS_PCI_MSTR0_LOCAL CONFIG_SYS_PCI_MSTR_IO_LOCAL /* Local base */
-#define CONFIG_SYS_PCIMSK0_MASK ~(CONFIG_SYS_PCI_MSTR_IO_SIZE - 1U) /* Size of window */
-/* PCIBR1 - prefetch and non-prefetch regions joined together */
-#define CONFIG_SYS_PCI_MSTR1_LOCAL CONFIG_SYS_PCI_MSTR_MEM_LOCAL
-#define CONFIG_SYS_PCIMSK1_MASK ~(CONFIG_SYS_PCI_MSTR_MEM_SIZE + CONFIG_SYS_PCI_MSTR_MEMIO_SIZE - 1U)
-
-
-#define CONFIG_SYS_DIRECT_FLASH_TFTP
-
-#if defined(CONFIG_CMD_JFFS2)
-#define CONFIG_SYS_JFFS2_FIRST_BANK 0
-#define CONFIG_SYS_JFFS2_NUM_BANKS CONFIG_SYS_MAX_FLASH_BANKS
-#define CONFIG_SYS_JFFS2_FIRST_SECTOR 0
-#define CONFIG_SYS_JFFS2_LAST_SECTOR 62
-#define CONFIG_SYS_JFFS2_SORT_FRAGMENTS
-#define CONFIG_SYS_JFFS_CUSTOM_PART
-#endif
-
-#if defined(CONFIG_CMD_I2C)
-#define CONFIG_HARD_I2C 1 /* To enable I2C support */
-#define CONFIG_SYS_I2C_SPEED 100000 /* I2C speed */
-#define CONFIG_SYS_I2C_SLAVE 0x7F /* I2C slave address */
-#endif
-
-#define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
-#if (CONFIG_SYS_MONITOR_BASE < CONFIG_SYS_FLASH_BASE)
-#define CONFIG_SYS_RAMBOOT
-#endif
-
-#define CONFIG_SYS_MONITOR_LEN (512 << 10) /* Reserve 256KB for Monitor */
-
-#define CONFIG_SYS_DEFAULT_IMMR 0x00010000
-#define CONFIG_SYS_IMMR 0xF0000000
-
-#define CONFIG_SYS_INIT_RAM_ADDR CONFIG_SYS_IMMR
-#define CONFIG_SYS_INIT_RAM_SIZE 0x2000 /* Size of used area in DPRAM */
-#define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
-#define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET
-
-
-/* Hard reset configuration word */
-#define CONFIG_SYS_HRCW_MASTER 0 /*0x1C800641*/ /* Not used - provided by CPLD */
-/* No slaves */
-#define CONFIG_SYS_HRCW_SLAVE1 0
-#define CONFIG_SYS_HRCW_SLAVE2 0
-#define CONFIG_SYS_HRCW_SLAVE3 0
-#define CONFIG_SYS_HRCW_SLAVE4 0
-#define CONFIG_SYS_HRCW_SLAVE5 0
-#define CONFIG_SYS_HRCW_SLAVE6 0
-#define CONFIG_SYS_HRCW_SLAVE7 0
-
-#define CONFIG_SYS_MALLOC_LEN (4096 << 10) /* Reserve 4 MB for malloc() */
-#define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */
-
-#define CONFIG_SYS_CACHELINE_SIZE 32 /* For MPC8260 CPUs */
-#if defined(CONFIG_CMD_KGDB)
-#define CONFIG_SYS_CACHELINE_SHIFT 5 /* log base 2 of the above value */
-#endif
-
-#define CONFIG_SYS_HID0_INIT 0
-#define CONFIG_SYS_HID0_FINAL 0
-
-#define CONFIG_SYS_HID2 0
-
-#define CONFIG_SYS_SIUMCR 0x02610000
-#define CONFIG_SYS_SYPCR 0xFFFF0689
-#define CONFIG_SYS_BCR 0x8080E000
-#define CONFIG_SYS_SCCR 0x00000001
-
-#define CONFIG_SYS_RMR 0
-#define CONFIG_SYS_TMCNTSC 0x000000C3
-#define CONFIG_SYS_PISCR 0x00000083
-#define CONFIG_SYS_RCCR 0
-
-#define CONFIG_SYS_MPTPR 0x0A00
-#define CONFIG_SYS_PSDMR 0xC432246E
-#define CONFIG_SYS_PSRT 0x32
-
-#define CONFIG_SYS_SDRAM_BASE 0x00000000
-#define CONFIG_SYS_SDRAM_BR (CONFIG_SYS_SDRAM_BASE | 0x00000041)
-#define CONFIG_SYS_SDRAM_OR 0xF0002900
-
-#define CONFIG_SYS_BR0_PRELIM (CONFIG_SYS_FLASH_BASE | 0x00001801)
-#define CONFIG_SYS_OR0_PRELIM 0xFC000882
-#define CONFIG_SYS_BR4_PRELIM (CONFIG_SYS_BCSR | 0x00001001)
-#define CONFIG_SYS_OR4_PRELIM 0xFFF00050
-
-#define CONFIG_SYS_RESET_ADDRESS 0xFFF00100
-
-#endif /* __CONFIG_H */
--
1.9.1
next prev parent reply other threads:[~2014-12-15 14:26 UTC|newest]
Thread overview: 55+ messages / expand[flat|nested] mbox.gz Atom feed top
2014-12-15 14:26 [U-Boot] [PATCH 0/26] Start removing non-generic boards Masahiro Yamada
2014-12-15 14:26 ` [U-Boot] [PATCH 01/26] mpc8xx: remove FPS{850, 860}L, NSCU, SM850, TK885D, virtlab2 support Masahiro Yamada
2015-01-05 18:21 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 02/26] powerpc: manroland: remove uc100, uc101, mucmc52, hmi1001 support Masahiro Yamada
2015-01-05 18:20 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 03/26] mpc8xx: remove ELPT860 board support Masahiro Yamada
2015-01-05 18:20 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 04/26] mpc8xx: remove KUP4X, KUP4K " Masahiro Yamada
2015-01-05 18:20 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 05/26] mpc8xx: remove SPD823TS " Masahiro Yamada
2015-01-05 18:20 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 06/26] mpc8xx: remove RRvision " Masahiro Yamada
2015-01-05 18:20 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 07/26] mpc8xx: remove R360MPI " Masahiro Yamada
2015-01-05 18:20 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 08/26] mpc8xx: remove NETVIA " Masahiro Yamada
2015-01-05 18:20 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 09/26] mpc8xx: remove lwmon " Masahiro Yamada
2015-01-05 18:20 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 10/26] mpc8xx: remove IVMS8, IVML24 " Masahiro Yamada
2015-01-05 18:20 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 11/26] mpc8xx: remove IP860 " Masahiro Yamada
2015-01-05 18:20 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 12/26] mpc8xx: remove ESTEEM192E " Masahiro Yamada
2015-01-05 18:20 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 13/26] powerpc: remove cogent_8xx, cogent_mpc8260 " Masahiro Yamada
2015-01-05 18:21 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 14/26] mpc8260: remove sacsng " Masahiro Yamada
2015-01-05 18:21 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 15/26] mpc8260: remove ppmc8260 " Masahiro Yamada
2015-01-05 18:21 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 16/26] mpc8260: remove ep8260 " Masahiro Yamada
2015-01-05 18:21 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 17/26] mpc8260: remove VoVPN-GW " Masahiro Yamada
2015-01-05 18:21 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 18/26] mpc8260: remove MPC8266ADS " Masahiro Yamada
2015-01-05 18:21 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 19/26] mpc8260: remove PM825, PM826, PM828 " Masahiro Yamada
2015-01-05 18:21 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 20/26] mpc8260: remove muas3001 " Masahiro Yamada
2015-01-05 18:21 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 21/26] mpc8260: remove IPHASE4539 " Masahiro Yamada
2015-01-05 18:21 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 22/26] mpc8260: remove gw8260 " Masahiro Yamada
2015-01-05 18:21 ` Tom Rini
2014-12-15 14:26 ` Masahiro Yamada [this message]
2015-01-05 18:21 ` [U-Boot] [PATCH 23/26] mpc8260: remove ep82xxm " Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 24/26] mpc8260: remove CPU86, CPU87 " Masahiro Yamada
2015-01-05 18:22 ` Tom Rini
2014-12-15 14:26 ` [U-Boot] [PATCH 25/26] mpc8260: remove atc " Masahiro Yamada
2014-12-15 14:26 ` [U-Boot] [PATCH 26/26] powerpc: mpc824x: remove MPC824X cpu support Masahiro Yamada
2014-12-15 16:46 ` York Sun
2015-01-05 18:22 ` Tom Rini
2015-01-05 15:44 ` [U-Boot] [PATCH 0/26] Start removing non-generic boards Masahiro YAMADA
2015-01-05 18:28 ` Tom Rini
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=1418653608-14177-24-git-send-email-yamada.m@jp.panasonic.com \
--to=yamada.m@jp.panasonic.com \
--cc=u-boot@lists.denx.de \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.