From: Randy Li <ayaka@soulik.info> To: linux-usb@vger.kernel.org Cc: felipe.balbi@linux.intel.com, John.Youn@synopsys.com, mark.rutland@arm.com, devicetree@vger.kernel.org, heiko@sntech.de, gregkh@linuxfoundation.org, linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org, robh+dt@kernel.org, kishon@ti.com, randy.li@rock-chips.com, Randy Li <ayaka@soulik.info> Subject: [PATCH v7 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup Date: Sun, 4 Sep 2016 05:55:27 +0800 [thread overview] Message-ID: <1472939729-15187-3-git-send-email-ayaka@soulik.info> (raw) In-Reply-To: <1472939729-15187-1-git-send-email-ayaka@soulik.info> It is a hardware bug in RK3288, the only way to solve it is to reset the phy. Signed-off-by: Randy Li <ayaka@soulik.info> --- .../devicetree/bindings/phy/rockchip-usb-phy.txt | 3 +++ drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++ 2 files changed, 23 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt index cc6be96..57dc388 100644 --- a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt +++ b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt @@ -27,6 +27,9 @@ Optional Properties: - clocks : phandle + clock specifier for the phy clocks - clock-names: string, clock name, must be "phyclk" - #clock-cells: for users of the phy-pll, should be 0 +- reset-names: Only allow the following entries: + - phy-reset +- resets: Must contain an entry for each entry in reset-names. Example: diff --git a/drivers/phy/phy-rockchip-usb.c b/drivers/phy/phy-rockchip-usb.c index 2a7381f..734987f 100644 --- a/drivers/phy/phy-rockchip-usb.c +++ b/drivers/phy/phy-rockchip-usb.c @@ -29,6 +29,7 @@ #include <linux/reset.h> #include <linux/regmap.h> #include <linux/mfd/syscon.h> +#include <linux/delay.h> static int enable_usb_uart; @@ -64,6 +65,7 @@ struct rockchip_usb_phy { struct clk_hw clk480m_hw; struct phy *phy; bool uart_enabled; + struct reset_control *reset; }; static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy, @@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy *_phy) return clk_prepare_enable(phy->clk480m); } +static int rockchip_usb_phy_reset(struct phy *_phy) +{ + struct rockchip_usb_phy *phy = phy_get_drvdata(_phy); + + if (phy->reset) { + reset_control_assert(phy->reset); + udelay(10); + reset_control_deassert(phy->reset); + } + + return 0; +} + static const struct phy_ops ops = { .power_on = rockchip_usb_phy_power_on, .power_off = rockchip_usb_phy_power_off, + .reset = rockchip_usb_phy_reset, .owner = THIS_MODULE, }; @@ -185,6 +201,10 @@ static int rockchip_usb_phy_init(struct rockchip_usb_phy_base *base, return -EINVAL; } + rk_phy->reset = of_reset_control_get(child, "phy-reset"); + if (IS_ERR(rk_phy->reset)) + rk_phy->reset = NULL; + rk_phy->reg_offset = reg_offset; rk_phy->clk = of_clk_get_by_name(child, "phyclk"); -- 2.7.4
WARNING: multiple messages have this Message-ID (diff)
From: Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org> To: linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org, felipe.balbi-VuQAYsv1563Yd54FQh9/CA@public.gmane.org, gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org, Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>, randy.li-TNX95d0MmH7DzftRWevZcw@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, John.Youn-HKixBCOQz3hWk0Htik3J/w@public.gmane.org, linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org, robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, kishon-l0cyMroinI0@public.gmane.org Subject: [PATCH v7 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup Date: Sun, 4 Sep 2016 05:55:27 +0800 [thread overview] Message-ID: <1472939729-15187-3-git-send-email-ayaka@soulik.info> (raw) In-Reply-To: <1472939729-15187-1-git-send-email-ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org> It is a hardware bug in RK3288, the only way to solve it is to reset the phy. Signed-off-by: Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org> --- .../devicetree/bindings/phy/rockchip-usb-phy.txt | 3 +++ drivers/phy/phy-rockchip-usb.c | 20 ++++++++++++++++++++ 2 files changed, 23 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt index cc6be96..57dc388 100644 --- a/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt +++ b/Documentation/devicetree/bindings/phy/rockchip-usb-phy.txt @@ -27,6 +27,9 @@ Optional Properties: - clocks : phandle + clock specifier for the phy clocks - clock-names: string, clock name, must be "phyclk" - #clock-cells: for users of the phy-pll, should be 0 +- reset-names: Only allow the following entries: + - phy-reset +- resets: Must contain an entry for each entry in reset-names. Example: diff --git a/drivers/phy/phy-rockchip-usb.c b/drivers/phy/phy-rockchip-usb.c index 2a7381f..734987f 100644 --- a/drivers/phy/phy-rockchip-usb.c +++ b/drivers/phy/phy-rockchip-usb.c @@ -29,6 +29,7 @@ #include <linux/reset.h> #include <linux/regmap.h> #include <linux/mfd/syscon.h> +#include <linux/delay.h> static int enable_usb_uart; @@ -64,6 +65,7 @@ struct rockchip_usb_phy { struct clk_hw clk480m_hw; struct phy *phy; bool uart_enabled; + struct reset_control *reset; }; static int rockchip_usb_phy_power(struct rockchip_usb_phy *phy, @@ -144,9 +146,23 @@ static int rockchip_usb_phy_power_on(struct phy *_phy) return clk_prepare_enable(phy->clk480m); } +static int rockchip_usb_phy_reset(struct phy *_phy) +{ + struct rockchip_usb_phy *phy = phy_get_drvdata(_phy); + + if (phy->reset) { + reset_control_assert(phy->reset); + udelay(10); + reset_control_deassert(phy->reset); + } + + return 0; +} + static const struct phy_ops ops = { .power_on = rockchip_usb_phy_power_on, .power_off = rockchip_usb_phy_power_off, + .reset = rockchip_usb_phy_reset, .owner = THIS_MODULE, }; @@ -185,6 +201,10 @@ static int rockchip_usb_phy_init(struct rockchip_usb_phy_base *base, return -EINVAL; } + rk_phy->reset = of_reset_control_get(child, "phy-reset"); + if (IS_ERR(rk_phy->reset)) + rk_phy->reset = NULL; + rk_phy->reg_offset = reg_offset; rk_phy->clk = of_clk_get_by_name(child, "phyclk"); -- 2.7.4
next prev parent reply other threads:[~2016-09-03 21:56 UTC|newest] Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top 2016-09-03 21:55 [PATCH v7 0/4] the fix for the USB HOST1 at rk3288 platform Randy Li 2016-09-03 21:55 ` Randy Li 2016-09-03 21:55 ` [PATCH v7 1/4] phy: Add reset callback Randy Li 2016-09-03 21:55 ` Randy Li 2016-09-03 21:55 ` Randy Li [this message] 2016-09-03 21:55 ` [PATCH v7 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup Randy Li 2016-09-03 21:55 ` [PATCH v7 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform Randy Li 2016-09-03 21:55 ` Randy Li 2016-09-03 22:08 ` Sergei Shtylyov 2016-09-03 22:08 ` Sergei Shtylyov 2016-09-05 13:35 ` David Laight 2016-09-05 13:35 ` David Laight 2016-09-05 23:38 ` Ayaka 2016-09-05 23:38 ` Ayaka 2016-09-06 5:14 ` Kishon Vijay Abraham I 2016-09-06 5:14 ` Kishon Vijay Abraham I 2016-09-06 18:54 ` John Youn 2016-09-06 18:54 ` John Youn 2016-09-07 1:19 ` Ayaka 2016-09-07 1:19 ` Ayaka 2016-09-07 2:02 ` John Youn 2016-09-07 2:02 ` John Youn 2016-09-03 21:55 ` [PATCH v7 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Randy Li 2016-09-03 21:55 ` Randy Li
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