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From: Randy Li <ayaka@soulik.info>
To: linux-usb@vger.kernel.org
Cc: felipe.balbi@linux.intel.com, John.Youn@synopsys.com,
	mark.rutland@arm.com, devicetree@vger.kernel.org,
	heiko@sntech.de, gregkh@linuxfoundation.org,
	linux-kernel@vger.kernel.org, linux-rockchip@lists.infradead.org,
	robh+dt@kernel.org, kishon@ti.com, randy.li@rock-chips.com,
	Randy Li <ayaka@soulik.info>
Subject: [PATCH v7 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform
Date: Sun,  4 Sep 2016 05:55:28 +0800	[thread overview]
Message-ID: <1472939729-15187-4-git-send-email-ayaka@soulik.info> (raw)
In-Reply-To: <1472939729-15187-1-git-send-email-ayaka@soulik.info>

On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
autosuspend).

We can get the PHY out of its bad state by asserting its "port reset",
but unfortunately that seems to assert a reset onto the USB bus so it
could confuse things if we don't actually deenumerate / reenumerate the
device.

We can also get the PHY out of its bad state by fully resetting it using
the reset from the CRU (clock reset unit) in chip, which does a more full
reset.  The CRU-based reset appears to actually cause devices on the bus
to be removed and reinserted, which fixes the problem (albeit in a hacky
way).

It's unfortunate that we need to do a full re-enumeration of devices at
wakeup time, but this is better than alternative of letting the bus get
wedged.

Signed-off-by: Randy Li <ayaka@soulik.info>
---
 drivers/usb/dwc2/core_intr.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
index d85c5c9..08485b7 100644
--- a/drivers/usb/dwc2/core_intr.c
+++ b/drivers/usb/dwc2/core_intr.c
@@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
 static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
 {
 	int ret;
+	struct device_node *np = hsotg->dev->of_node;
 
 	/* Clear interrupt */
 	dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS);
@@ -379,6 +380,17 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
 			/* Restart the Phy Clock */
 			pcgcctl &= ~PCGCTL_STOPPCLK;
 			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
+
+			/*
+			 * It is a quirk in Rockchip RK3288, causing by
+			 * a hardware bug. This will propagate out and
+			 * eventually we'll re-enumerate the device. 
+			 * Not great but the best we can do 
+			 */
+			if (of_device_is_compatible(np, "rockchip,rk3288-usb")
+					&& (NULL != hsotg->phy->ops->reset))
+				hsotg->phy->ops->reset(hsotg->phy);
+
 			mod_timer(&hsotg->wkp_timer,
 				  jiffies + msecs_to_jiffies(71));
 		} else {
-- 
2.7.4

WARNING: multiple messages have this Message-ID
From: Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>
To: linux-usb-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Cc: mark.rutland-5wv7dgnIgG8@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	heiko-4mtYJXux2i+zQB+pC5nmwQ@public.gmane.org,
	felipe.balbi-VuQAYsv1563Yd54FQh9/CA@public.gmane.org,
	gregkh-hQyY1W1yCW8ekmWlsbkhG0B+6BGkLq7r@public.gmane.org,
	Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>,
	randy.li-TNX95d0MmH7DzftRWevZcw@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	John.Youn-HKixBCOQz3hWk0Htik3J/w@public.gmane.org,
	linux-rockchip-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org,
	kishon-l0cyMroinI0@public.gmane.org
Subject: [PATCH v7 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform
Date: Sun,  4 Sep 2016 05:55:28 +0800	[thread overview]
Message-ID: <1472939729-15187-4-git-send-email-ayaka@soulik.info> (raw)
In-Reply-To: <1472939729-15187-1-git-send-email-ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>

On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
autosuspend).

We can get the PHY out of its bad state by asserting its "port reset",
but unfortunately that seems to assert a reset onto the USB bus so it
could confuse things if we don't actually deenumerate / reenumerate the
device.

We can also get the PHY out of its bad state by fully resetting it using
the reset from the CRU (clock reset unit) in chip, which does a more full
reset.  The CRU-based reset appears to actually cause devices on the bus
to be removed and reinserted, which fixes the problem (albeit in a hacky
way).

It's unfortunate that we need to do a full re-enumeration of devices at
wakeup time, but this is better than alternative of letting the bus get
wedged.

Signed-off-by: Randy Li <ayaka-xPW3/0Ywev/iB9QmIjCX8w@public.gmane.org>
---
 drivers/usb/dwc2/core_intr.c | 12 ++++++++++++
 1 file changed, 12 insertions(+)

diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
index d85c5c9..08485b7 100644
--- a/drivers/usb/dwc2/core_intr.c
+++ b/drivers/usb/dwc2/core_intr.c
@@ -345,6 +345,7 @@ static void dwc2_handle_session_req_intr(struct dwc2_hsotg *hsotg)
 static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
 {
 	int ret;
+	struct device_node *np = hsotg->dev->of_node;
 
 	/* Clear interrupt */
 	dwc2_writel(GINTSTS_WKUPINT, hsotg->regs + GINTSTS);
@@ -379,6 +380,17 @@ static void dwc2_handle_wakeup_detected_intr(struct dwc2_hsotg *hsotg)
 			/* Restart the Phy Clock */
 			pcgcctl &= ~PCGCTL_STOPPCLK;
 			dwc2_writel(pcgcctl, hsotg->regs + PCGCTL);
+
+			/*
+			 * It is a quirk in Rockchip RK3288, causing by
+			 * a hardware bug. This will propagate out and
+			 * eventually we'll re-enumerate the device. 
+			 * Not great but the best we can do 
+			 */
+			if (of_device_is_compatible(np, "rockchip,rk3288-usb")
+					&& (NULL != hsotg->phy->ops->reset))
+				hsotg->phy->ops->reset(hsotg->phy);
+
 			mod_timer(&hsotg->wkp_timer,
 				  jiffies + msecs_to_jiffies(71));
 		} else {
-- 
2.7.4

  parent reply	other threads:[~2016-09-03 21:56 UTC|newest]

Thread overview: 24+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2016-09-03 21:55 [PATCH v7 0/4] the fix for the USB HOST1 at " Randy Li
2016-09-03 21:55 ` Randy Li
2016-09-03 21:55 ` [PATCH v7 1/4] phy: Add reset callback Randy Li
2016-09-03 21:55   ` Randy Li
2016-09-03 21:55 ` [PATCH v7 2/4] phy: rockchip-usb: use rockchip_usb_phy_reset to reset phy during wakeup Randy Li
2016-09-03 21:55   ` Randy Li
2016-09-03 21:55 ` Randy Li [this message]
2016-09-03 21:55   ` [PATCH v7 3/4] usb: dwc2: assert phy reset when waking up in rk3288 platform Randy Li
2016-09-03 22:08   ` Sergei Shtylyov
2016-09-03 22:08     ` Sergei Shtylyov
2016-09-05 13:35   ` David Laight
2016-09-05 13:35     ` David Laight
2016-09-05 23:38     ` Ayaka
2016-09-05 23:38       ` Ayaka
2016-09-06  5:14   ` Kishon Vijay Abraham I
2016-09-06  5:14     ` Kishon Vijay Abraham I
2016-09-06 18:54     ` John Youn
2016-09-06 18:54       ` John Youn
2016-09-07  1:19       ` Ayaka
2016-09-07  1:19         ` Ayaka
2016-09-07  2:02         ` John Youn
2016-09-07  2:02           ` John Youn
2016-09-03 21:55 ` [PATCH v7 4/4] ARM: dts: rockchip: Point rk3288 dwc2 usb at the full PHY reset Randy Li
2016-09-03 21:55   ` Randy Li

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