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From: Stephen Boyd <sboyd@kernel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
	afaerber@suse.de, mark.rutland@arm.com, mturquette@baylibre.com,
	robh+dt@kernel.org
Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com,
	96boards@ucrobotics.com, devicetree@vger.kernel.org,
	davem@davemloft.net, mchehab@kernel.org,
	daniel.thompson@linaro.org, amit.kucheria@linaro.org,
	viresh.kumar@linaro.org, hzhang@ucrobotics.com,
	bdong@ucrobotics.com, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	manivannanece23@gmail.com,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: Re: [PATCH v5 08/12] clk: actions: Add factor clock support
Date: Mon, 19 Mar 2018 18:11:32 -0700	[thread overview]
Message-ID: <152150829204.254778.2737344357539002182@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20180317100952.28538-9-manivannan.sadhasivam@linaro.org>

Quoting Manivannan Sadhasivam (2018-03-17 03:09:48)
> +
> +static int clk_val_best(struct clk_hw *hw, unsigned long rate,
> +                       unsigned long *best_parent_rate)
> +{
[...]
> +               }
> +
> +               parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw),
> +                               try_parent_rate);
> +               cur_rate = DIV_ROUND_UP(parent_rate, clkt->div) * clkt->mul;
> +               if (cur_rate <= rate && cur_rate > best) {
> +                       bestval = clkt->val;
> +                       best = cur_rate;
> +                       *best_parent_rate = parent_rate;
> +               }
> +       }
> +
> +       if (!bestval) {
> +               bestval = _get_table_maxval(clkt);
> +               *best_parent_rate = clk_hw_round_rate(
> +                               clk_hw_get_parent(hw), 1);
> +       }
> +
> +       return bestval;

Also, if this is largely copy/paste from the factor clk code then
perhaps those functions can be exported to here and reused instead of
copy/paste.

> +}

WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@kernel.org>
To: afaerber@suse.de, mark.rutland@arm.com, mturquette@baylibre.com,
	robh+dt@kernel.org
Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com,
	96boards@ucrobotics.com, devicetree@vger.kernel.org,
	davem@davemloft.net, mchehab@kernel.org,
	daniel.thompson@linaro.org, amit.kucheria@linaro.org,
	viresh.kumar@linaro.org, hzhang@ucrobotics.com,
	bdong@ucrobotics.com, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	manivannanece23@gmail.com,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: Re: [PATCH v5 08/12] clk: actions: Add factor clock support
Date: Mon, 19 Mar 2018 18:11:32 -0700	[thread overview]
Message-ID: <152150829204.254778.2737344357539002182@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20180317100952.28538-9-manivannan.sadhasivam@linaro.org>

Quoting Manivannan Sadhasivam (2018-03-17 03:09:48)
> +
> +static int clk_val_best(struct clk_hw *hw, unsigned long rate,
> +                       unsigned long *best_parent_rate)
> +{
[...]
> +               }
> +
> +               parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw),
> +                               try_parent_rate);
> +               cur_rate = DIV_ROUND_UP(parent_rate, clkt->div) * clkt->mul;
> +               if (cur_rate <= rate && cur_rate > best) {
> +                       bestval = clkt->val;
> +                       best = cur_rate;
> +                       *best_parent_rate = parent_rate;
> +               }
> +       }
> +
> +       if (!bestval) {
> +               bestval = _get_table_maxval(clkt);
> +               *best_parent_rate = clk_hw_round_rate(
> +                               clk_hw_get_parent(hw), 1);
> +       }
> +
> +       return bestval;

Also, if this is largely copy/paste from the factor clk code then
perhaps those functions can be exported to here and reused instead of
copy/paste.

> +}

WARNING: multiple messages have this Message-ID (diff)
From: Stephen Boyd <sboyd@kernel.org>
To: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>,
	afaerber@suse.de, mark.rutland@arm.com, mturquette@baylibre.com,
	robh+dt@kernel.org
Cc: liuwei@actions-semi.com, mp-cs@actions-semi.com,
	96boards@ucrobotics.com, devicetree@vger.kernel.org,
	davem@davemloft.net, mchehab@kernel.org,
	daniel.thompson@linaro.org, amit.kucheria@linaro.org,
	viresh.kumar@linaro.org, hzhang@ucrobotics.com,
	bdong@ucrobotics.com, linux-kernel@vger.kernel.org,
	linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
	manivannanece23@gmail.com,
	Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Subject: Re: [PATCH v5 08/12] clk: actions: Add factor clock support
Date: Mon, 19 Mar 2018 18:11:32 -0700	[thread overview]
Message-ID: <152150829204.254778.2737344357539002182@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20180317100952.28538-9-manivannan.sadhasivam@linaro.org>

Quoting Manivannan Sadhasivam (2018-03-17 03:09:48)
> +
> +static int clk_val_best(struct clk_hw *hw, unsigned long rate,
> +                       unsigned long *best_parent_rate)
> +{
[...]
> +               }
> +
> +               parent_rate =3D clk_hw_round_rate(clk_hw_get_parent(hw),
> +                               try_parent_rate);
> +               cur_rate =3D DIV_ROUND_UP(parent_rate, clkt->div) * clkt-=
>mul;
> +               if (cur_rate <=3D rate && cur_rate > best) {
> +                       bestval =3D clkt->val;
> +                       best =3D cur_rate;
> +                       *best_parent_rate =3D parent_rate;
> +               }
> +       }
> +
> +       if (!bestval) {
> +               bestval =3D _get_table_maxval(clkt);
> +               *best_parent_rate =3D clk_hw_round_rate(
> +                               clk_hw_get_parent(hw), 1);
> +       }
> +
> +       return bestval;

Also, if this is largely copy/paste from the factor clk code then
perhaps those functions can be exported to here and reused instead of
copy/paste.

> +}

WARNING: multiple messages have this Message-ID (diff)
From: sboyd@kernel.org (Stephen Boyd)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v5 08/12] clk: actions: Add factor clock support
Date: Mon, 19 Mar 2018 18:11:32 -0700	[thread overview]
Message-ID: <152150829204.254778.2737344357539002182@swboyd.mtv.corp.google.com> (raw)
In-Reply-To: <20180317100952.28538-9-manivannan.sadhasivam@linaro.org>

Quoting Manivannan Sadhasivam (2018-03-17 03:09:48)
> +
> +static int clk_val_best(struct clk_hw *hw, unsigned long rate,
> +                       unsigned long *best_parent_rate)
> +{
[...]
> +               }
> +
> +               parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw),
> +                               try_parent_rate);
> +               cur_rate = DIV_ROUND_UP(parent_rate, clkt->div) * clkt->mul;
> +               if (cur_rate <= rate && cur_rate > best) {
> +                       bestval = clkt->val;
> +                       best = cur_rate;
> +                       *best_parent_rate = parent_rate;
> +               }
> +       }
> +
> +       if (!bestval) {
> +               bestval = _get_table_maxval(clkt);
> +               *best_parent_rate = clk_hw_round_rate(
> +                               clk_hw_get_parent(hw), 1);
> +       }
> +
> +       return bestval;

Also, if this is largely copy/paste from the factor clk code then
perhaps those functions can be exported to here and reused instead of
copy/paste.

> +}

  parent reply	other threads:[~2018-03-20  1:11 UTC|newest]

Thread overview: 80+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-03-17 10:09 [PATCH v5 00/12] Add clock driver for Actions S900 SoC Manivannan Sadhasivam
2018-03-17 10:09 ` Manivannan Sadhasivam
2018-03-17 10:09 ` [PATCH v5 01/12] dt-bindings: clock: Add Actions S900 clock bindings Manivannan Sadhasivam
2018-03-17 10:09   ` Manivannan Sadhasivam
2018-03-20  0:59   ` Stephen Boyd
2018-03-20  0:59     ` Stephen Boyd
2018-03-20  0:59     ` Stephen Boyd
2018-03-20  0:59     ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 02/12] arm64: dts: actions: Add S900 clock management unit nodes Manivannan Sadhasivam
2018-03-17 10:09   ` Manivannan Sadhasivam
2018-03-17 10:09 ` [PATCH v5 03/12] arm64: dts: actions: Source CMU clock for UART5 Manivannan Sadhasivam
2018-03-17 10:09   ` Manivannan Sadhasivam
2018-03-17 10:09   ` Manivannan Sadhasivam
2018-03-17 10:09 ` [PATCH v5 04/12] clk: actions: Add common clock driver support Manivannan Sadhasivam
2018-03-17 10:09   ` Manivannan Sadhasivam
2018-03-20  1:02   ` Stephen Boyd
2018-03-20  1:02     ` Stephen Boyd
2018-03-20  1:02     ` Stephen Boyd
2018-03-20  1:02     ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 05/12] clk: actions: Add gate clock support Manivannan Sadhasivam
2018-03-17 10:09   ` Manivannan Sadhasivam
2018-03-20  1:04   ` Stephen Boyd
2018-03-20  1:04     ` Stephen Boyd
2018-03-20  1:04     ` Stephen Boyd
2018-03-20  1:04     ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 06/12] clk: actions: Add mux " Manivannan Sadhasivam
2018-03-17 10:09   ` Manivannan Sadhasivam
2018-03-20  1:05   ` Stephen Boyd
2018-03-20  1:05     ` Stephen Boyd
2018-03-20  1:05     ` Stephen Boyd
2018-03-20  1:05     ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 07/12] clk: actions: Add divider " Manivannan Sadhasivam
2018-03-17 10:09   ` Manivannan Sadhasivam
2018-03-20  1:06   ` Stephen Boyd
2018-03-20  1:06     ` Stephen Boyd
2018-03-20  1:06     ` Stephen Boyd
2018-03-20  1:06     ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 08/12] clk: actions: Add factor " Manivannan Sadhasivam
2018-03-17 10:09   ` Manivannan Sadhasivam
2018-03-18 20:31   ` kbuild test robot
2018-03-18 20:31     ` kbuild test robot
2018-03-18 20:31     ` kbuild test robot
2018-03-20  1:08   ` Stephen Boyd
2018-03-20  1:08     ` Stephen Boyd
2018-03-20  1:08     ` Stephen Boyd
2018-03-20  1:08     ` Stephen Boyd
2018-03-20  1:11   ` Stephen Boyd [this message]
2018-03-20  1:11     ` Stephen Boyd
2018-03-20  1:11     ` Stephen Boyd
2018-03-20  1:11     ` Stephen Boyd
2018-03-20  1:41   ` kbuild test robot
2018-03-20  1:41     ` kbuild test robot
2018-03-20  1:41     ` kbuild test robot
2018-03-17 10:09 ` [PATCH v5 09/12] clk: actions: Add fixed " Manivannan Sadhasivam
2018-03-17 10:09   ` Manivannan Sadhasivam
2018-03-20  1:10   ` Stephen Boyd
2018-03-20  1:10     ` Stephen Boyd
2018-03-20  1:10     ` Stephen Boyd
2018-03-20  1:10     ` Stephen Boyd
2018-03-20  9:04     ` Manivannan Sadhasivam
2018-03-20  9:04       ` Manivannan Sadhasivam
2018-03-20 17:15       ` Stephen Boyd
2018-03-20 17:15         ` Stephen Boyd
2018-03-20 17:15         ` Stephen Boyd
2018-03-17 10:09 ` [PATCH v5 10/12] clk: actions: Add composite " Manivannan Sadhasivam
2018-03-17 10:09   ` Manivannan Sadhasivam
2018-03-17 10:09 ` [PATCH v5 11/12] clk: actions: Add pll " Manivannan Sadhasivam
2018-03-17 10:09   ` Manivannan Sadhasivam
2018-03-17 10:09 ` [PATCH v5 12/12] clk: actions: Add S900 SoC " Manivannan Sadhasivam
2018-03-17 10:09   ` Manivannan Sadhasivam
2018-03-18 20:38   ` kbuild test robot
2018-03-18 20:38     ` kbuild test robot
2018-03-18 20:38     ` kbuild test robot
2018-03-18 21:28   ` kbuild test robot
2018-03-18 21:28     ` kbuild test robot
2018-03-18 21:28     ` kbuild test robot
2018-03-20  7:16   ` Stephen Boyd
2018-03-20  7:16     ` Stephen Boyd
2018-03-20  7:16     ` Stephen Boyd
2018-03-20  7:16     ` Stephen Boyd

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