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From: Julien Thierry <julien.thierry@arm.com>
To: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org, daniel.thompson@linaro.org,
	joel@joelfernandes.org, marc.zyngier@arm.com,
	christoffer.dall@arm.com, james.morse@arm.com,
	catalin.marinas@arm.com, will.deacon@arm.com,
	Julien Thierry <julien.thierry@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Marc Zyngier <Marc.Zyngier@arm.com>,
	Christoffer Dall <Christoffer.Dall@arm.com>
Subject: [PATCH v6 12/24] arm64: alternative: Allow alternative status checking per cpufeature
Date: Mon, 12 Nov 2018 11:57:03 +0000	[thread overview]
Message-ID: <1542023835-21446-13-git-send-email-julien.thierry@arm.com> (raw)
In-Reply-To: <1542023835-21446-1-git-send-email-julien.thierry@arm.com>

In preparation for the application of alternatives at different points
during the boot process, provide the possibility to check whether
alternatives for a feature of interest was already applied instead of
having a global boolean for all alternatives.

Make VHE enablement code check for the VHE feature instead of considering
all alternatives.

Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Marc Zyngier <Marc.Zyngier@arm.com>
Cc: Christoffer Dall <Christoffer.Dall@arm.com>
---
 arch/arm64/include/asm/alternative.h |  3 +--
 arch/arm64/kernel/alternative.c      | 21 +++++++++++++++++----
 arch/arm64/kernel/cpufeature.c       |  2 +-
 3 files changed, 19 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/include/asm/alternative.h b/arch/arm64/include/asm/alternative.h
index 4b650ec..9806a23 100644
--- a/arch/arm64/include/asm/alternative.h
+++ b/arch/arm64/include/asm/alternative.h
@@ -14,8 +14,6 @@
 #include <linux/stddef.h>
 #include <linux/stringify.h>
 
-extern int alternatives_applied;
-
 struct alt_instr {
 	s32 orig_offset;	/* offset to original instruction */
 	s32 alt_offset;		/* offset to replacement instruction */
@@ -28,6 +26,7 @@ typedef void (*alternative_cb_t)(struct alt_instr *alt,
 				 __le32 *origptr, __le32 *updptr, int nr_inst);
 
 void __init apply_alternatives_all(void);
+bool alternative_is_applied(u16 cpufeature);
 
 #ifdef CONFIG_MODULES
 void apply_alternatives_module(void *start, size_t length);
diff --git a/arch/arm64/kernel/alternative.c b/arch/arm64/kernel/alternative.c
index b5d6039..c947d22 100644
--- a/arch/arm64/kernel/alternative.c
+++ b/arch/arm64/kernel/alternative.c
@@ -32,13 +32,23 @@
 #define ALT_ORIG_PTR(a)		__ALT_PTR(a, orig_offset)
 #define ALT_REPL_PTR(a)		__ALT_PTR(a, alt_offset)
 
-int alternatives_applied;
+static int all_alternatives_applied;
+
+static DECLARE_BITMAP(applied_alternatives, ARM64_NCAPS);
 
 struct alt_region {
 	struct alt_instr *begin;
 	struct alt_instr *end;
 };
 
+bool alternative_is_applied(u16 cpufeature)
+{
+	if (WARN_ON(cpufeature >= ARM64_NCAPS))
+		return false;
+
+	return test_bit(cpufeature, applied_alternatives);
+}
+
 /*
  * Check if the target PC is within an alternative block.
  */
@@ -192,6 +202,9 @@ static void __apply_alternatives(void *alt_region, bool is_module)
 		dsb(ish);
 		__flush_icache_all();
 		isb();
+
+		/* We applied all that was available */
+		bitmap_copy(applied_alternatives, cpu_hwcaps, ARM64_NCAPS);
 	}
 }
 
@@ -208,14 +221,14 @@ static int __apply_alternatives_multi_stop(void *unused)
 
 	/* We always have a CPU 0 at this point (__init) */
 	if (smp_processor_id()) {
-		while (!READ_ONCE(alternatives_applied))
+		while (!READ_ONCE(all_alternatives_applied))
 			cpu_relax();
 		isb();
 	} else {
-		BUG_ON(alternatives_applied);
+		BUG_ON(all_alternatives_applied);
 		__apply_alternatives(&region, false);
 		/* Barriers provided by the cache flushing */
-		WRITE_ONCE(alternatives_applied, 1);
+		WRITE_ONCE(all_alternatives_applied, 1);
 	}
 
 	return 0;
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 1b5b553..dcf5d14 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -1068,7 +1068,7 @@ static void cpu_copy_el2regs(const struct arm64_cpu_capabilities *__unused)
 	 * that, freshly-onlined CPUs will set tpidr_el2, so we don't need to
 	 * do anything here.
 	 */
-	if (!alternatives_applied)
+	if (!alternative_is_applied(ARM64_HAS_VIRT_HOST_EXTN))
 		write_sysreg(read_sysreg(tpidr_el1), tpidr_el2);
 }
 #endif
-- 
1.9.1


WARNING: multiple messages have this Message-ID (diff)
From: julien.thierry@arm.com (Julien Thierry)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v6 12/24] arm64: alternative: Allow alternative status checking per cpufeature
Date: Mon, 12 Nov 2018 11:57:03 +0000	[thread overview]
Message-ID: <1542023835-21446-13-git-send-email-julien.thierry@arm.com> (raw)
In-Reply-To: <1542023835-21446-1-git-send-email-julien.thierry@arm.com>

In preparation for the application of alternatives at different points
during the boot process, provide the possibility to check whether
alternatives for a feature of interest was already applied instead of
having a global boolean for all alternatives.

Make VHE enablement code check for the VHE feature instead of considering
all alternatives.

Signed-off-by: Julien Thierry <julien.thierry@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Will Deacon <will.deacon@arm.com>
Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Marc Zyngier <Marc.Zyngier@arm.com>
Cc: Christoffer Dall <Christoffer.Dall@arm.com>
---
 arch/arm64/include/asm/alternative.h |  3 +--
 arch/arm64/kernel/alternative.c      | 21 +++++++++++++++++----
 arch/arm64/kernel/cpufeature.c       |  2 +-
 3 files changed, 19 insertions(+), 7 deletions(-)

diff --git a/arch/arm64/include/asm/alternative.h b/arch/arm64/include/asm/alternative.h
index 4b650ec..9806a23 100644
--- a/arch/arm64/include/asm/alternative.h
+++ b/arch/arm64/include/asm/alternative.h
@@ -14,8 +14,6 @@
 #include <linux/stddef.h>
 #include <linux/stringify.h>
 
-extern int alternatives_applied;
-
 struct alt_instr {
 	s32 orig_offset;	/* offset to original instruction */
 	s32 alt_offset;		/* offset to replacement instruction */
@@ -28,6 +26,7 @@ typedef void (*alternative_cb_t)(struct alt_instr *alt,
 				 __le32 *origptr, __le32 *updptr, int nr_inst);
 
 void __init apply_alternatives_all(void);
+bool alternative_is_applied(u16 cpufeature);
 
 #ifdef CONFIG_MODULES
 void apply_alternatives_module(void *start, size_t length);
diff --git a/arch/arm64/kernel/alternative.c b/arch/arm64/kernel/alternative.c
index b5d6039..c947d22 100644
--- a/arch/arm64/kernel/alternative.c
+++ b/arch/arm64/kernel/alternative.c
@@ -32,13 +32,23 @@
 #define ALT_ORIG_PTR(a)		__ALT_PTR(a, orig_offset)
 #define ALT_REPL_PTR(a)		__ALT_PTR(a, alt_offset)
 
-int alternatives_applied;
+static int all_alternatives_applied;
+
+static DECLARE_BITMAP(applied_alternatives, ARM64_NCAPS);
 
 struct alt_region {
 	struct alt_instr *begin;
 	struct alt_instr *end;
 };
 
+bool alternative_is_applied(u16 cpufeature)
+{
+	if (WARN_ON(cpufeature >= ARM64_NCAPS))
+		return false;
+
+	return test_bit(cpufeature, applied_alternatives);
+}
+
 /*
  * Check if the target PC is within an alternative block.
  */
@@ -192,6 +202,9 @@ static void __apply_alternatives(void *alt_region, bool is_module)
 		dsb(ish);
 		__flush_icache_all();
 		isb();
+
+		/* We applied all that was available */
+		bitmap_copy(applied_alternatives, cpu_hwcaps, ARM64_NCAPS);
 	}
 }
 
@@ -208,14 +221,14 @@ static int __apply_alternatives_multi_stop(void *unused)
 
 	/* We always have a CPU 0 at this point (__init) */
 	if (smp_processor_id()) {
-		while (!READ_ONCE(alternatives_applied))
+		while (!READ_ONCE(all_alternatives_applied))
 			cpu_relax();
 		isb();
 	} else {
-		BUG_ON(alternatives_applied);
+		BUG_ON(all_alternatives_applied);
 		__apply_alternatives(&region, false);
 		/* Barriers provided by the cache flushing */
-		WRITE_ONCE(alternatives_applied, 1);
+		WRITE_ONCE(all_alternatives_applied, 1);
 	}
 
 	return 0;
diff --git a/arch/arm64/kernel/cpufeature.c b/arch/arm64/kernel/cpufeature.c
index 1b5b553..dcf5d14 100644
--- a/arch/arm64/kernel/cpufeature.c
+++ b/arch/arm64/kernel/cpufeature.c
@@ -1068,7 +1068,7 @@ static void cpu_copy_el2regs(const struct arm64_cpu_capabilities *__unused)
 	 * that, freshly-onlined CPUs will set tpidr_el2, so we don't need to
 	 * do anything here.
 	 */
-	if (!alternatives_applied)
+	if (!alternative_is_applied(ARM64_HAS_VIRT_HOST_EXTN))
 		write_sysreg(read_sysreg(tpidr_el1), tpidr_el2);
 }
 #endif
-- 
1.9.1

  parent reply	other threads:[~2018-11-12 11:57 UTC|newest]

Thread overview: 125+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-11-12 11:56 [PATCH v6 00/24] arm64: provide pseudo NMI with GICv3 Julien Thierry
2018-11-12 11:56 ` Julien Thierry
2018-11-12 11:56 ` [PATCH v6 01/24] arm64: Remove unused daif related functions/macros Julien Thierry
2018-11-12 11:56   ` Julien Thierry
2018-11-29 16:26   ` Mark Rutland
2018-11-29 16:26     ` Mark Rutland
2018-11-30 18:03   ` Catalin Marinas
2018-11-30 18:03     ` Catalin Marinas
2018-11-12 11:56 ` [PATCH v6 02/24] arm64: cpufeature: Set SYSREG_GIC_CPUIF as a boot system feature Julien Thierry
2018-11-12 11:56   ` Julien Thierry
2018-11-12 18:00   ` Suzuki K Poulose
2018-11-12 18:00     ` Suzuki K Poulose
2018-11-29 16:27   ` Mark Rutland
2018-11-29 16:27     ` Mark Rutland
2018-11-30 18:07   ` Catalin Marinas
2018-11-30 18:07     ` Catalin Marinas
2018-11-12 11:56 ` [PATCH v6 03/24] arm64: cpufeature: Add cpufeature for IRQ priority masking Julien Thierry
2018-11-12 11:56   ` Julien Thierry
2018-11-12 18:02   ` Suzuki K Poulose
2018-11-12 18:02     ` Suzuki K Poulose
2018-11-29 17:12   ` Mark Rutland
2018-11-29 17:12     ` Mark Rutland
2018-12-03 10:33     ` Julien Thierry
2018-12-03 10:33       ` Julien Thierry
2018-11-30 18:07   ` Catalin Marinas
2018-11-30 18:07     ` Catalin Marinas
2018-11-12 11:56 ` [PATCH v6 04/24] arm/arm64: gic-v3: Add PMR and RPR accessors Julien Thierry
2018-11-12 11:56   ` Julien Thierry
2018-11-29 16:32   ` Mark Rutland
2018-11-29 16:32     ` Mark Rutland
2018-11-30 18:07   ` Catalin Marinas
2018-11-30 18:07     ` Catalin Marinas
2018-11-12 11:56 ` [PATCH v6 05/24] irqchip/gic-v3: Switch to PMR masking before calling IRQ handler Julien Thierry
2018-11-12 11:56   ` Julien Thierry
2018-11-29 18:12   ` Mark Rutland
2018-11-29 18:12     ` Mark Rutland
2018-11-30  9:18     ` Julien Thierry
2018-11-30  9:18       ` Julien Thierry
2018-12-04 16:21   ` Catalin Marinas
2018-12-04 16:21     ` Catalin Marinas
2018-11-12 11:56 ` [PATCH v6 06/24] arm64: ptrace: Provide definitions for PMR values Julien Thierry
2018-11-12 11:56   ` Julien Thierry
2018-11-29 16:40   ` Mark Rutland
2018-11-29 16:40     ` Mark Rutland
2018-11-30  8:53     ` Julien Thierry
2018-11-30  8:53       ` Julien Thierry
2018-11-30 10:38       ` Daniel Thompson
2018-11-30 10:38         ` Daniel Thompson
2018-11-30 11:03         ` Julien Thierry
2018-11-30 11:03           ` Julien Thierry
2018-11-12 11:56 ` [PATCH v6 07/24] arm64: Make PMR part of task context Julien Thierry
2018-11-12 11:56   ` Julien Thierry
2018-11-29 16:46   ` Mark Rutland
2018-11-29 16:46     ` Mark Rutland
2018-11-30  9:25     ` Julien Thierry
2018-11-30  9:25       ` Julien Thierry
2018-12-04 17:09   ` Catalin Marinas
2018-12-04 17:09     ` Catalin Marinas
2018-12-04 17:30     ` Julien Thierry
2018-12-04 17:30       ` Julien Thierry
2018-11-12 11:56 ` [PATCH v6 08/24] arm64: Unmask PMR before going idle Julien Thierry
2018-11-12 11:56   ` Julien Thierry
2018-11-29 17:44   ` Mark Rutland
2018-11-29 17:44     ` Mark Rutland
2018-11-30 10:55     ` Julien Thierry
2018-11-30 10:55       ` Julien Thierry
2018-11-30 13:37       ` Mark Rutland
2018-11-30 13:37         ` Mark Rutland
2018-12-03 10:38         ` Julien Thierry
2018-12-03 10:38           ` Julien Thierry
2018-11-12 11:57 ` [PATCH v6 09/24] arm64: kvm: Unmask PMR before entering guest Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-11-12 11:57 ` [PATCH v6 10/24] arm64: irqflags: Use ICC_PMR_EL1 for interrupt masking Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-12-04 17:36   ` Catalin Marinas
2018-12-04 17:36     ` Catalin Marinas
2018-12-05 16:55     ` Julien Thierry
2018-12-05 16:55       ` Julien Thierry
2018-12-05 18:26       ` Catalin Marinas
2018-12-05 18:26         ` Catalin Marinas
2018-12-06  9:50         ` Julien Thierry
2018-12-06  9:50           ` Julien Thierry
2018-12-10 14:39           ` Catalin Marinas
2018-12-10 14:39             ` Catalin Marinas
2018-11-12 11:57 ` [PATCH v6 11/24] arm64: daifflags: Include PMR in daifflags restore operations Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-11-12 11:57 ` Julien Thierry [this message]
2018-11-12 11:57   ` [PATCH v6 12/24] arm64: alternative: Allow alternative status checking per cpufeature Julien Thierry
2018-11-12 11:57 ` [PATCH v6 13/24] arm64: alternative: Apply alternatives early in boot process Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-11-12 11:57 ` [PATCH v6 14/24] irqchip/gic-v3: Factor group0 detection into functions Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-11-12 11:57 ` [PATCH v6 15/24] arm64: Switch to PMR masking when starting CPUs Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-12-04 17:51   ` Catalin Marinas
2018-12-04 17:51     ` Catalin Marinas
2018-12-04 18:11     ` Julien Thierry
2018-12-04 18:11       ` Julien Thierry
2018-11-12 11:57 ` [PATCH v6 16/24] arm64: gic-v3: Implement arch support for priority masking Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-11-12 11:57 ` [PATCH v6 17/24] irqchip/gic-v3: Detect if GIC can support pseudo-NMIs Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-11-12 11:57 ` [PATCH v6 18/24] irqchip/gic-v3: Handle pseudo-NMIs Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-11-12 11:57 ` [PATCH v6 19/24] irqchip/gic: Add functions to access irq priorities Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-11-12 11:57 ` [PATCH v6 20/24] irqchip/gic-v3: Allow interrupts to be set as pseudo-NMI Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-11-12 11:57 ` [PATCH v6 21/24] arm64: Handle serror in NMI context Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-12-04 18:09   ` Catalin Marinas
2018-12-04 18:09     ` Catalin Marinas
2018-12-05 13:02     ` James Morse
2018-12-05 13:02       ` James Morse
2018-11-12 11:57 ` [PATCH v6 22/24] arm64: Skip preemption when exiting an NMI Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-11-12 11:57 ` [PATCH v6 23/24] arm64: Skip irqflags tracing for NMI in IRQs disabled context Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-11-12 11:57 ` [PATCH v6 24/24] arm64: Enable the support of pseudo-NMIs Julien Thierry
2018-11-12 11:57   ` Julien Thierry
2018-11-12 12:00 ` [PATCH v6 00/24] arm64: provide pseudo NMI with GICv3 Julien Thierry
2018-11-12 12:00   ` Julien Thierry
2018-11-13 14:43 ` Julien Thierry
2018-11-13 14:43   ` Julien Thierry

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