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From: Sumit Garg <sumit.garg@linaro.org>
To: linux-arm-kernel@lists.infradead.org
Cc: catalin.marinas@arm.com, will@kernel.org, tglx@linutronix.de,
	jason@lakedaemon.net, maz@kernel.org,
	julien.thierry.kdev@gmail.com, dianders@chromium.org,
	daniel.thompson@linaro.org, jason.wessel@windriver.com,
	kgdb-bugreport@lists.sourceforge.net,
	linux-kernel@vger.kernel.org, Sumit Garg <sumit.garg@linaro.org>
Subject: [RFC Patch v1 2/4] irqchip/gic-v3: Add support to handle SGI as pseudo NMI
Date: Fri, 24 Apr 2020 16:39:12 +0530	[thread overview]
Message-ID: <1587726554-32018-3-git-send-email-sumit.garg@linaro.org> (raw)
In-Reply-To: <1587726554-32018-1-git-send-email-sumit.garg@linaro.org>

With pseudo NMIs enabled, interrupt controller can be configured to
deliver SGI as a pseudo NMI. So add corresponding handling for SGIs.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
---
 drivers/irqchip/irq-gic-v3.c | 22 +++++++++++++++++-----
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index d7006ef..be361bf 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -609,17 +609,29 @@ static inline void gic_handle_nmi(u32 irqnr, struct pt_regs *regs)
 	if (irqs_enabled)
 		nmi_enter();
 
-	if (static_branch_likely(&supports_deactivate_key))
-		gic_write_eoir(irqnr);
 	/*
 	 * Leave the PSR.I bit set to prevent other NMIs to be
 	 * received while handling this one.
 	 * PSR.I will be restored when we ERET to the
 	 * interrupted context.
 	 */
-	err = handle_domain_nmi(gic_data.domain, irqnr, regs);
-	if (err)
-		gic_deactivate_unhandled(irqnr);
+	if (likely(irqnr > 15)) {
+		if (static_branch_likely(&supports_deactivate_key))
+			gic_write_eoir(irqnr);
+
+		err = handle_domain_nmi(gic_data.domain, irqnr, regs);
+		if (err)
+			gic_deactivate_unhandled(irqnr);
+	} else {
+		gic_write_eoir(irqnr);
+		if (static_branch_likely(&supports_deactivate_key))
+			gic_write_dir(irqnr);
+#ifdef CONFIG_SMP
+		handle_IPI(irqnr, regs);
+#else
+		WARN_ONCE(true, "Unexpected SGI received!\n");
+#endif
+	}
 
 	if (irqs_enabled)
 		nmi_exit();
-- 
2.7.4


WARNING: multiple messages have this Message-ID (diff)
From: Sumit Garg <sumit.garg@linaro.org>
To: linux-arm-kernel@lists.infradead.org
Cc: Sumit Garg <sumit.garg@linaro.org>,
	daniel.thompson@linaro.org, jason@lakedaemon.net,
	catalin.marinas@arm.com, jason.wessel@windriver.com,
	dianders@chromium.org, linux-kernel@vger.kernel.org,
	maz@kernel.org, kgdb-bugreport@lists.sourceforge.net,
	tglx@linutronix.de, will@kernel.org,
	julien.thierry.kdev@gmail.com
Subject: [RFC Patch v1 2/4] irqchip/gic-v3: Add support to handle SGI as pseudo NMI
Date: Fri, 24 Apr 2020 16:39:12 +0530	[thread overview]
Message-ID: <1587726554-32018-3-git-send-email-sumit.garg@linaro.org> (raw)
In-Reply-To: <1587726554-32018-1-git-send-email-sumit.garg@linaro.org>

With pseudo NMIs enabled, interrupt controller can be configured to
deliver SGI as a pseudo NMI. So add corresponding handling for SGIs.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
---
 drivers/irqchip/irq-gic-v3.c | 22 +++++++++++++++++-----
 1 file changed, 17 insertions(+), 5 deletions(-)

diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index d7006ef..be361bf 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -609,17 +609,29 @@ static inline void gic_handle_nmi(u32 irqnr, struct pt_regs *regs)
 	if (irqs_enabled)
 		nmi_enter();
 
-	if (static_branch_likely(&supports_deactivate_key))
-		gic_write_eoir(irqnr);
 	/*
 	 * Leave the PSR.I bit set to prevent other NMIs to be
 	 * received while handling this one.
 	 * PSR.I will be restored when we ERET to the
 	 * interrupted context.
 	 */
-	err = handle_domain_nmi(gic_data.domain, irqnr, regs);
-	if (err)
-		gic_deactivate_unhandled(irqnr);
+	if (likely(irqnr > 15)) {
+		if (static_branch_likely(&supports_deactivate_key))
+			gic_write_eoir(irqnr);
+
+		err = handle_domain_nmi(gic_data.domain, irqnr, regs);
+		if (err)
+			gic_deactivate_unhandled(irqnr);
+	} else {
+		gic_write_eoir(irqnr);
+		if (static_branch_likely(&supports_deactivate_key))
+			gic_write_dir(irqnr);
+#ifdef CONFIG_SMP
+		handle_IPI(irqnr, regs);
+#else
+		WARN_ONCE(true, "Unexpected SGI received!\n");
+#endif
+	}
 
 	if (irqs_enabled)
 		nmi_exit();
-- 
2.7.4


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  parent reply	other threads:[~2020-04-24 11:11 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-24 11:09 [RFC Patch v1 0/4] arm64: Introduce new IPI as IPI_CALL_NMI_FUNC Sumit Garg
2020-04-24 11:09 ` Sumit Garg
2020-04-24 11:09 ` [RFC Patch v1 1/4] arm64: smp: Introduce a " Sumit Garg
2020-04-24 11:09   ` Sumit Garg
2020-04-24 11:09 ` Sumit Garg [this message]
2020-04-24 11:09   ` [RFC Patch v1 2/4] irqchip/gic-v3: Add support to handle SGI as pseudo NMI Sumit Garg
2020-04-25 10:29   ` Marc Zyngier
2020-04-25 10:29     ` Marc Zyngier
2020-04-25 14:32     ` Marc Zyngier
2020-04-25 14:32       ` Marc Zyngier
2020-04-28 14:11       ` Sumit Garg
2020-04-28 14:11         ` Sumit Garg
2020-04-29  8:23         ` Marc Zyngier
2020-04-29  8:23           ` Marc Zyngier
2020-04-30  7:20           ` Sumit Garg
2020-04-30  7:20             ` Sumit Garg
2020-04-30  9:13             ` Marc Zyngier
2020-04-30  9:13               ` Marc Zyngier
2020-04-30 12:13               ` Sumit Garg
2020-04-30 12:13                 ` Sumit Garg
2020-05-01 13:03                 ` Sumit Garg
2020-05-01 13:03                   ` Sumit Garg
2020-05-05  4:09                   ` Sumit Garg
2020-05-05  4:09                     ` Sumit Garg
2020-05-05 10:08                     ` Marc Zyngier
2020-05-05 10:08                       ` Marc Zyngier
2020-05-05 11:33                       ` Sumit Garg
2020-05-05 11:33                         ` Sumit Garg
2020-05-13 10:02                         ` Sumit Garg
2020-05-13 10:02                           ` Sumit Garg
2020-05-19 14:51                           ` Marc Zyngier
2020-05-19 14:51                             ` Marc Zyngier
2020-04-24 11:09 ` [RFC Patch v1 3/4] irqchip/gic-v3: Enable arch specific IPI " Sumit Garg
2020-04-24 11:09   ` Sumit Garg
2020-04-24 11:09 ` [RFC Patch v1 4/4] arm64: kgdb: Round up cpus using IPI_CALL_NMI_FUNC Sumit Garg
2020-04-24 11:09   ` Sumit Garg
2020-04-24 20:46   ` Doug Anderson
2020-04-24 20:46     ` Doug Anderson
2020-04-27  4:52     ` Sumit Garg
2020-04-27  4:52       ` Sumit Garg
2020-04-24 20:49 ` [RFC Patch v1 0/4] arm64: Introduce new IPI as IPI_CALL_NMI_FUNC Doug Anderson
2020-04-24 20:49   ` Doug Anderson
2020-04-27  4:54   ` Sumit Garg
2020-04-27  4:54     ` Sumit Garg

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