Re: [RFC Patch v1 2/4] irqchip/gic-v3: Add support to handle SGI as pseudo NMI

From: Marc Zyngier <maz@kernel.org>
To: Sumit Garg <sumit.garg@linaro.org>
Cc: daniel.thompson@linaro.org, jason@lakedaemon.net,
	catalin.marinas@arm.com, dianders@chromium.org,
	linux-kernel@vger.kernel.org,
	linux-arm-kernel@lists.infradead.org, jason.wessel@windriver.com,
	kgdb-bugreport@lists.sourceforge.net, tglx@linutronix.de,
	will@kernel.org, julien.thierry.kdev@gmail.com
Subject: Re: [RFC Patch v1 2/4] irqchip/gic-v3: Add support to handle SGI as pseudo NMI
Date: Sat, 25 Apr 2020 15:32:01 +0100	[thread overview]
Message-ID: <6fd3d96181ec53f735ef1b6a79d28da1@kernel.org> (raw)
In-Reply-To: <20200425112950.3a4815b6@why>

On 2020-04-25 11:29, Marc Zyngier wrote:
> On Fri, 24 Apr 2020 16:39:12 +0530
> Sumit Garg <sumit.garg@linaro.org> wrote:
> 
> Hi Sumit,
> 
>> With pseudo NMIs enabled, interrupt controller can be configured to
>> deliver SGI as a pseudo NMI. So add corresponding handling for SGIs.
>> 
>> Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
>> ---
>>  drivers/irqchip/irq-gic-v3.c | 22 +++++++++++++++++-----
>>  1 file changed, 17 insertions(+), 5 deletions(-)
>> 
>> diff --git a/drivers/irqchip/irq-gic-v3.c 
>> b/drivers/irqchip/irq-gic-v3.c
>> index d7006ef..be361bf 100644
>> --- a/drivers/irqchip/irq-gic-v3.c
>> +++ b/drivers/irqchip/irq-gic-v3.c
>> @@ -609,17 +609,29 @@ static inline void gic_handle_nmi(u32 irqnr, 
>> struct pt_regs *regs)
>>  	if (irqs_enabled)
>>  		nmi_enter();
>> 
>> -	if (static_branch_likely(&supports_deactivate_key))
>> -		gic_write_eoir(irqnr);
>>  	/*
>>  	 * Leave the PSR.I bit set to prevent other NMIs to be
>>  	 * received while handling this one.
>>  	 * PSR.I will be restored when we ERET to the
>>  	 * interrupted context.
>>  	 */
>> -	err = handle_domain_nmi(gic_data.domain, irqnr, regs);
>> -	if (err)
>> -		gic_deactivate_unhandled(irqnr);
>> +	if (likely(irqnr > 15)) {
>> +		if (static_branch_likely(&supports_deactivate_key))
>> +			gic_write_eoir(irqnr);
>> +
>> +		err = handle_domain_nmi(gic_data.domain, irqnr, regs);
>> +		if (err)
>> +			gic_deactivate_unhandled(irqnr);
>> +	} else {
>> +		gic_write_eoir(irqnr);
>> +		if (static_branch_likely(&supports_deactivate_key))
>> +			gic_write_dir(irqnr);
>> +#ifdef CONFIG_SMP
>> +		handle_IPI(irqnr, regs);
>> +#else
>> +		WARN_ONCE(true, "Unexpected SGI received!\n");
>> +#endif
>> +	}
>> 
>>  	if (irqs_enabled)
>>  		nmi_exit();
> 
> If there is one thing I would like to avoid, it is to add more ugly
> hacks to the way we handle SGIs. There is very little reason why SGIs
> should be handled differently from all other interrupts. They have the
> same properties, and it is only because of the 32bit legacy that we 
> deal
> with them in such a cumbersome way. Nothing that we cannot fix though.
> 
> What I would really like to see is first a conversion of the SGIs to
> normal, full fat interrupts. These interrupts can then be configured as
> NMI using the normal API.
> 
> I think Julien had something along these lines (or was that limited to
> the PMU?). Otherwise, I'll happily help you with that.

OK, to give you an idea of what I am after, here's a small series[1] 
that
can be used as a base (it has been booted exactly *once* on a model, and
is thus absolutely perfect ;-).

There is still a bit of work to be able to actually request a SGI (they
are hard-wired as chained interrupts so far, as this otherwise changes
the output of /proc/interrupts, among other things), but you will
hopefully see what I'm aiming for.

Thanks,

         M.

[1] 
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms.git/log/?h=irq/gic-sgi
-- 
Jazz is not dead. It just smells funny...