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From: Sumit Garg <sumit.garg@linaro.org>
To: linux-arm-kernel@lists.infradead.org
Cc: catalin.marinas@arm.com, will@kernel.org, tglx@linutronix.de,
	jason@lakedaemon.net, maz@kernel.org,
	julien.thierry.kdev@gmail.com, dianders@chromium.org,
	daniel.thompson@linaro.org, jason.wessel@windriver.com,
	kgdb-bugreport@lists.sourceforge.net,
	linux-kernel@vger.kernel.org, Sumit Garg <sumit.garg@linaro.org>
Subject: [RFC Patch v1 3/4] irqchip/gic-v3: Enable arch specific IPI as pseudo NMI
Date: Fri, 24 Apr 2020 16:39:13 +0530	[thread overview]
Message-ID: <1587726554-32018-4-git-send-email-sumit.garg@linaro.org> (raw)
In-Reply-To: <1587726554-32018-1-git-send-email-sumit.garg@linaro.org>

Add support to mark arch specific IPI as pseudo NMI. Currently its used
to allows arm64 specific IPI_CALL_NMI_FUNC to be marked as pseudo NMI.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
---
 arch/arm64/kernel/smp.c      |  5 +++++
 drivers/irqchip/irq-gic-v3.c | 14 ++++++++++++++
 2 files changed, 19 insertions(+)

diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 42fe7bb..27c8ee1 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -802,6 +802,11 @@ static const char *ipi_types[NR_IPI] __tracepoint_string = {
 	S(IPI_CALL_NMI_FUNC, "NMI function call interrupts"),
 };
 
+int arch_get_ipinr_nmi(void)
+{
+	return IPI_CALL_NMI_FUNC;
+}
+
 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
 {
 	trace_ipi_raise(target, ipi_types[ipinr]);
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index be361bf..a3d2cf3 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -1048,6 +1048,11 @@ static int gic_dist_supports_lpis(void)
 		!gicv3_nolpi);
 }
 
+int __weak arch_get_ipinr_nmi(void)
+{
+	return -1;
+}
+
 static void gic_cpu_init(void)
 {
 	void __iomem *rbase;
@@ -1072,6 +1077,15 @@ static void gic_cpu_init(void)
 
 	gic_cpu_config(rbase, gic_data.ppi_nr + 16, gic_redist_wait_for_rwp);
 
+	if (gic_supports_nmi()) {
+		int ipinr;
+
+		ipinr = arch_get_ipinr_nmi();
+		if (ipinr >= 0 && ipinr < 16)
+			writeb_relaxed(GICD_INT_NMI_PRI,
+				       rbase + GICD_IPRIORITYR + ipinr);
+	}
+
 	/* initialise system registers */
 	gic_cpu_sys_reg_init();
 }
-- 
2.7.4


WARNING: multiple messages have this Message-ID (diff)
From: Sumit Garg <sumit.garg@linaro.org>
To: linux-arm-kernel@lists.infradead.org
Cc: Sumit Garg <sumit.garg@linaro.org>,
	daniel.thompson@linaro.org, jason@lakedaemon.net,
	catalin.marinas@arm.com, jason.wessel@windriver.com,
	dianders@chromium.org, linux-kernel@vger.kernel.org,
	maz@kernel.org, kgdb-bugreport@lists.sourceforge.net,
	tglx@linutronix.de, will@kernel.org,
	julien.thierry.kdev@gmail.com
Subject: [RFC Patch v1 3/4] irqchip/gic-v3: Enable arch specific IPI as pseudo NMI
Date: Fri, 24 Apr 2020 16:39:13 +0530	[thread overview]
Message-ID: <1587726554-32018-4-git-send-email-sumit.garg@linaro.org> (raw)
In-Reply-To: <1587726554-32018-1-git-send-email-sumit.garg@linaro.org>

Add support to mark arch specific IPI as pseudo NMI. Currently its used
to allows arm64 specific IPI_CALL_NMI_FUNC to be marked as pseudo NMI.

Signed-off-by: Sumit Garg <sumit.garg@linaro.org>
---
 arch/arm64/kernel/smp.c      |  5 +++++
 drivers/irqchip/irq-gic-v3.c | 14 ++++++++++++++
 2 files changed, 19 insertions(+)

diff --git a/arch/arm64/kernel/smp.c b/arch/arm64/kernel/smp.c
index 42fe7bb..27c8ee1 100644
--- a/arch/arm64/kernel/smp.c
+++ b/arch/arm64/kernel/smp.c
@@ -802,6 +802,11 @@ static const char *ipi_types[NR_IPI] __tracepoint_string = {
 	S(IPI_CALL_NMI_FUNC, "NMI function call interrupts"),
 };
 
+int arch_get_ipinr_nmi(void)
+{
+	return IPI_CALL_NMI_FUNC;
+}
+
 static void smp_cross_call(const struct cpumask *target, unsigned int ipinr)
 {
 	trace_ipi_raise(target, ipi_types[ipinr]);
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index be361bf..a3d2cf3 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -1048,6 +1048,11 @@ static int gic_dist_supports_lpis(void)
 		!gicv3_nolpi);
 }
 
+int __weak arch_get_ipinr_nmi(void)
+{
+	return -1;
+}
+
 static void gic_cpu_init(void)
 {
 	void __iomem *rbase;
@@ -1072,6 +1077,15 @@ static void gic_cpu_init(void)
 
 	gic_cpu_config(rbase, gic_data.ppi_nr + 16, gic_redist_wait_for_rwp);
 
+	if (gic_supports_nmi()) {
+		int ipinr;
+
+		ipinr = arch_get_ipinr_nmi();
+		if (ipinr >= 0 && ipinr < 16)
+			writeb_relaxed(GICD_INT_NMI_PRI,
+				       rbase + GICD_IPRIORITYR + ipinr);
+	}
+
 	/* initialise system registers */
 	gic_cpu_sys_reg_init();
 }
-- 
2.7.4


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  parent reply	other threads:[~2020-04-24 11:11 UTC|newest]

Thread overview: 44+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-24 11:09 [RFC Patch v1 0/4] arm64: Introduce new IPI as IPI_CALL_NMI_FUNC Sumit Garg
2020-04-24 11:09 ` Sumit Garg
2020-04-24 11:09 ` [RFC Patch v1 1/4] arm64: smp: Introduce a " Sumit Garg
2020-04-24 11:09   ` Sumit Garg
2020-04-24 11:09 ` [RFC Patch v1 2/4] irqchip/gic-v3: Add support to handle SGI as pseudo NMI Sumit Garg
2020-04-24 11:09   ` Sumit Garg
2020-04-25 10:29   ` Marc Zyngier
2020-04-25 10:29     ` Marc Zyngier
2020-04-25 14:32     ` Marc Zyngier
2020-04-25 14:32       ` Marc Zyngier
2020-04-28 14:11       ` Sumit Garg
2020-04-28 14:11         ` Sumit Garg
2020-04-29  8:23         ` Marc Zyngier
2020-04-29  8:23           ` Marc Zyngier
2020-04-30  7:20           ` Sumit Garg
2020-04-30  7:20             ` Sumit Garg
2020-04-30  9:13             ` Marc Zyngier
2020-04-30  9:13               ` Marc Zyngier
2020-04-30 12:13               ` Sumit Garg
2020-04-30 12:13                 ` Sumit Garg
2020-05-01 13:03                 ` Sumit Garg
2020-05-01 13:03                   ` Sumit Garg
2020-05-05  4:09                   ` Sumit Garg
2020-05-05  4:09                     ` Sumit Garg
2020-05-05 10:08                     ` Marc Zyngier
2020-05-05 10:08                       ` Marc Zyngier
2020-05-05 11:33                       ` Sumit Garg
2020-05-05 11:33                         ` Sumit Garg
2020-05-13 10:02                         ` Sumit Garg
2020-05-13 10:02                           ` Sumit Garg
2020-05-19 14:51                           ` Marc Zyngier
2020-05-19 14:51                             ` Marc Zyngier
2020-04-24 11:09 ` Sumit Garg [this message]
2020-04-24 11:09   ` [RFC Patch v1 3/4] irqchip/gic-v3: Enable arch specific IPI " Sumit Garg
2020-04-24 11:09 ` [RFC Patch v1 4/4] arm64: kgdb: Round up cpus using IPI_CALL_NMI_FUNC Sumit Garg
2020-04-24 11:09   ` Sumit Garg
2020-04-24 20:46   ` Doug Anderson
2020-04-24 20:46     ` Doug Anderson
2020-04-27  4:52     ` Sumit Garg
2020-04-27  4:52       ` Sumit Garg
2020-04-24 20:49 ` [RFC Patch v1 0/4] arm64: Introduce new IPI as IPI_CALL_NMI_FUNC Doug Anderson
2020-04-24 20:49   ` Doug Anderson
2020-04-27  4:54   ` Sumit Garg
2020-04-27  4:54     ` Sumit Garg

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