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From: Patchwork <patchwork@emeril.freedesktop.org>
To: "Ville Syrjala" <ville.syrjala@linux.intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Plane register cleanup
Date: Wed, 01 Dec 2021 18:47:18 -0000	[thread overview]
Message-ID: <163838443894.14892.15570859861767496368@emeril.freedesktop.org> (raw)
In-Reply-To: <20211201152552.7821-1-ville.syrjala@linux.intel.com>

== Series Details ==

Series: drm/i915: Plane register cleanup
URL   : https://patchwork.freedesktop.org/series/97467/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
2a489c8cf0ae drm/i915: Get rid of the 64bit PLANE_CC_VAL mmio
-:69: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#69: FILE: drivers/gpu/drm/i915/i915_reg.h:7368:
+#define _PLANE_CC_VAL_1(pipe, dw)	(_PIPE(pipe, _PLANE_CC_VAL_1_A, _PLANE_CC_VAL_1_B) + (dw) * 4)

-:70: WARNING:LONG_LINE: line length of 102 exceeds 100 columns
#70: FILE: drivers/gpu/drm/i915/i915_reg.h:7369:
+#define _PLANE_CC_VAL_2(pipe, dw)	(_PIPE(pipe, _PLANE_CC_VAL_2_A, _PLANE_CC_VAL_2_B) + (dw) * 4)

-:71: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'pipe' - possible side-effects?
#71: FILE: drivers/gpu/drm/i915/i915_reg.h:7370:
+#define PLANE_CC_VAL(pipe, plane, dw) \
+	_MMIO_PLANE((plane), _PLANE_CC_VAL_1((pipe), (dw)), _PLANE_CC_VAL_2((pipe), (dw)))

-:71: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'dw' - possible side-effects?
#71: FILE: drivers/gpu/drm/i915/i915_reg.h:7370:
+#define PLANE_CC_VAL(pipe, plane, dw) \
+	_MMIO_PLANE((plane), _PLANE_CC_VAL_1((pipe), (dw)), _PLANE_CC_VAL_2((pipe), (dw)))

total: 0 errors, 2 warnings, 2 checks, 41 lines checked
cace02264ed4 drm/i915: Rename plane YUV order bits
fd4e986084c5 drm/i915: Get rid of the "sizes are 0 based" stuff
fb774f7bdbf7 drm/i915: Sipmplify PLANE_STRIDE masking
0ae6611ab3f7 drm/i915: Rename PLANE_CUS_CTL Y plane bits
f2f7a1963976 drm/i915: Use REG_BIT() & co. for universal plane bits
08836e799b35 drm/i915: Clean up pre-skl primary plane registers
b7bd2fa19c5d drm/i915: Clean up ivb+ sprite plane registers
-:114: WARNING:LONG_LINE_COMMENT: line length of 106 exceeds 100 columns
#114: FILE: drivers/gpu/drm/i915/i915_reg.h:7058:
+#define   SPRITE_FORMAT_XR_BGR101010		REG_FIELD_PREP(SPRITE_FORMAT_MASK, 5) /* Extended range */

total: 0 errors, 1 warnings, 0 checks, 150 lines checked
b2a43d32eb81 drm/i915: Clean up vlv/chv sprite plane registers
e86cd1d175b5 drm/i915: Clean up g4x+ sprite plane registers
f5a56e525f98 drm/i915: Clean up cursor registers
-:144: WARNING:LONG_LINE_COMMENT: line length of 103 exceeds 100 columns
#144: FILE: drivers/gpu/drm/i915/i915_reg.h:6767:
+#define   CURSOR_STRIDE(stride)	REG_FIELD_PREP(CURSOR_STRIDE_MASK, ffs(stride) - 9) /* 256,512,1k,2k */

total: 0 errors, 1 warnings, 0 checks, 182 lines checked
0008f4a39e22 drm/i915: Extract skl_plane_aux_dist()
79283225eb38 drm/i915: Declutter color key register stuff
7f07412a683b drm/i915: Nuke pointless middle men for skl+ plane programming



  parent reply	other threads:[~2021-12-01 18:47 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-01 15:25 [Intel-gfx] [PATCH 00/14] drm/i915: Plane register cleanup Ville Syrjala
2021-12-01 15:25 ` [Intel-gfx] [PATCH 01/14] drm/i915: Get rid of the 64bit PLANE_CC_VAL mmio Ville Syrjala
2021-12-01 17:13   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 02/14] drm/i915: Rename plane YUV order bits Ville Syrjala
2021-12-01 17:14   ` Souza, Jose
2021-12-02 11:53     ` Ville Syrjälä
2021-12-06 13:13   ` kernel test robot
2021-12-06 13:13     ` kernel test robot
2021-12-01 15:25 ` [Intel-gfx] [PATCH 03/14] drm/i915: Get rid of the "sizes are 0 based" stuff Ville Syrjala
2021-12-01 17:18   ` Souza, Jose
2021-12-02 11:56     ` Ville Syrjälä
2021-12-03 13:40       ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 04/14] drm/i915: Sipmplify PLANE_STRIDE masking Ville Syrjala
2022-01-12 19:50   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 05/14] drm/i915: Rename PLANE_CUS_CTL Y plane bits Ville Syrjala
2021-12-01 17:17   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 06/14] drm/i915: Use REG_BIT() & co. for universal " Ville Syrjala
2021-12-01 17:26   ` Souza, Jose
2021-12-02 11:57     ` Ville Syrjälä
2022-01-12 19:52       ` Souza, Jose
2021-12-06 15:57   ` kernel test robot
2021-12-06 15:57     ` kernel test robot
2021-12-01 15:25 ` [Intel-gfx] [PATCH 07/14] drm/i915: Clean up pre-skl primary plane registers Ville Syrjala
2021-12-06 19:22   ` kernel test robot
2021-12-06 19:22     ` kernel test robot
2022-01-12 20:12   ` Souza, Jose
2022-01-18  0:55     ` Ville Syrjälä
2022-01-18 13:40       ` Souza, Jose
2022-01-18 16:27         ` Ville Syrjälä
2021-12-01 15:25 ` [Intel-gfx] [PATCH 08/14] drm/i915: Clean up ivb+ sprite " Ville Syrjala
2022-01-14 16:26   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 09/14] drm/i915: Clean up vlv/chv " Ville Syrjala
2022-01-14 16:34   ` Souza, Jose
2022-01-18  1:11     ` Ville Syrjälä
2021-12-01 15:25 ` [Intel-gfx] [PATCH 10/14] drm/i915: Clean up g4x+ " Ville Syrjala
2022-01-14 16:38   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 11/14] drm/i915: Clean up cursor registers Ville Syrjala
2022-01-14 16:45   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 12/14] drm/i915: Extract skl_plane_aux_dist() Ville Syrjala
2021-12-01 17:28   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 13/14] drm/i915: Declutter color key register stuff Ville Syrjala
2021-12-01 17:31   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 14/14] drm/i915: Nuke pointless middle men for skl+ plane programming Ville Syrjala
2021-12-01 17:32   ` Souza, Jose
2021-12-01 18:47 ` Patchwork [this message]
2021-12-01 18:48 ` [Intel-gfx] ✗ Fi.CI.SPARSE: warning for drm/i915: Plane register cleanup Patchwork
2021-12-01 19:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-12-02  1:57 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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