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From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: "Souza, Jose" <jose.souza@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 07/14] drm/i915: Clean up pre-skl primary plane registers
Date: Tue, 18 Jan 2022 18:27:05 +0200	[thread overview]
Message-ID: <YebqWZkvKJiQxnzQ@intel.com> (raw)
In-Reply-To: <a48b322c7bc9930348f999a9372205020dbb4f23.camel@intel.com>

On Tue, Jan 18, 2022 at 01:40:41PM +0000, Souza, Jose wrote:
> On Tue, 2022-01-18 at 02:55 +0200, Ville Syrjälä wrote:
> > On Wed, Jan 12, 2022 at 08:12:31PM +0000, Souza, Jose wrote:
> > > On Wed, 2021-12-01 at 17:25 +0200, Ville Syrjala wrote:
> > > > @@ -427,9 +427,9 @@ static void i9xx_plane_update_noarm(struct intel_plane *plane,
> > > >  		 * program whatever is there.
> > > >  		 */
> > > >  		intel_de_write_fw(dev_priv, DSPPOS(i9xx_plane),
> > > > -				  (crtc_y << 16) | crtc_x);
> > > > +				  DSP_POS_Y(crtc_y) | DSP_POS_X(crtc_x));
> > > >  		intel_de_write_fw(dev_priv, DSPSIZE(i9xx_plane),
> > > > -				  ((crtc_h - 1) << 16) | (crtc_w - 1));
> > > > +				  DSP_HEIGHT(crtc_h - 1) | DSP_POS_X(crtc_w - 1));
> > > 
> > > DSP_HEIGHT(crtc_h - 1) | DSP_WIDTH(crtc_w - 1));
> > 
> > Whoops. Thanks for cathcing that.
> > 
> > <snip>
> > > > +#define   DSP_ENABLE			REG_BIT(31)
> > > 
> > > I really don't like DSP, it is broadly used acronym to Digital Signal Processors.
> > > Would prefer to have DISPLAY or DISP.
> > 
> > The registers are called DSP<foo>, so the spec makes the case for DSP_.
> > The problem with DISP_/etc. is that the namespace then makes it a bit
> > hard to figure out what register the defines belong to.
> > 
> > > 
> > > Anyways, DSP_ENABLE should have also have plane on it.
> > 
> > DSP==display plane. Any more would be redundant.
> 
> Damn, even worst, thought it was DiSPlay.

Well I guess it might be that too. I think the old docs tend to use
"display A" vs. "display plane A" etc. interchangeably when talking
about planes.

> But if this is the BSpec name, go ahead with it. 

I guess I could be convinced to use DISP_ just to raise a few less
eyebrows. Just a bit sad that the namespace won't match the register
name then. But I suppose we have that sort of thing going on in other
places too.

-- 
Ville Syrjälä
Intel

  reply	other threads:[~2022-01-18 16:27 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-01 15:25 [Intel-gfx] [PATCH 00/14] drm/i915: Plane register cleanup Ville Syrjala
2021-12-01 15:25 ` [Intel-gfx] [PATCH 01/14] drm/i915: Get rid of the 64bit PLANE_CC_VAL mmio Ville Syrjala
2021-12-01 17:13   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 02/14] drm/i915: Rename plane YUV order bits Ville Syrjala
2021-12-01 17:14   ` Souza, Jose
2021-12-02 11:53     ` Ville Syrjälä
2021-12-06 13:13   ` kernel test robot
2021-12-06 13:13     ` kernel test robot
2021-12-01 15:25 ` [Intel-gfx] [PATCH 03/14] drm/i915: Get rid of the "sizes are 0 based" stuff Ville Syrjala
2021-12-01 17:18   ` Souza, Jose
2021-12-02 11:56     ` Ville Syrjälä
2021-12-03 13:40       ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 04/14] drm/i915: Sipmplify PLANE_STRIDE masking Ville Syrjala
2022-01-12 19:50   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 05/14] drm/i915: Rename PLANE_CUS_CTL Y plane bits Ville Syrjala
2021-12-01 17:17   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 06/14] drm/i915: Use REG_BIT() & co. for universal " Ville Syrjala
2021-12-01 17:26   ` Souza, Jose
2021-12-02 11:57     ` Ville Syrjälä
2022-01-12 19:52       ` Souza, Jose
2021-12-06 15:57   ` kernel test robot
2021-12-06 15:57     ` kernel test robot
2021-12-01 15:25 ` [Intel-gfx] [PATCH 07/14] drm/i915: Clean up pre-skl primary plane registers Ville Syrjala
2021-12-06 19:22   ` kernel test robot
2021-12-06 19:22     ` kernel test robot
2022-01-12 20:12   ` Souza, Jose
2022-01-18  0:55     ` Ville Syrjälä
2022-01-18 13:40       ` Souza, Jose
2022-01-18 16:27         ` Ville Syrjälä [this message]
2021-12-01 15:25 ` [Intel-gfx] [PATCH 08/14] drm/i915: Clean up ivb+ sprite " Ville Syrjala
2022-01-14 16:26   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 09/14] drm/i915: Clean up vlv/chv " Ville Syrjala
2022-01-14 16:34   ` Souza, Jose
2022-01-18  1:11     ` Ville Syrjälä
2021-12-01 15:25 ` [Intel-gfx] [PATCH 10/14] drm/i915: Clean up g4x+ " Ville Syrjala
2022-01-14 16:38   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 11/14] drm/i915: Clean up cursor registers Ville Syrjala
2022-01-14 16:45   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 12/14] drm/i915: Extract skl_plane_aux_dist() Ville Syrjala
2021-12-01 17:28   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 13/14] drm/i915: Declutter color key register stuff Ville Syrjala
2021-12-01 17:31   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 14/14] drm/i915: Nuke pointless middle men for skl+ plane programming Ville Syrjala
2021-12-01 17:32   ` Souza, Jose
2021-12-01 18:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Plane register cleanup Patchwork
2021-12-01 18:48 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-12-01 19:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-12-02  1:57 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

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