All of lore.kernel.org
 help / color / mirror / Atom feed
From: "Souza, Jose" <jose.souza@intel.com>
To: "ville.syrjala@linux.intel.com" <ville.syrjala@linux.intel.com>,
	"intel-gfx@lists.freedesktop.org"
	<intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 13/14] drm/i915: Declutter color key register stuff
Date: Wed, 1 Dec 2021 17:31:34 +0000	[thread overview]
Message-ID: <79e88d427a6e6d21d187597034eedde63a845f39.camel@intel.com> (raw)
In-Reply-To: <20211201152552.7821-14-ville.syrjala@linux.intel.com>

On Wed, 2021-12-01 at 17:25 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> 
> Add a few small helpers to calculate the color key register
> values. Cleans up skl_program_plane_arm() a bit.

Reviewed-by: José Roberto de Souza <jose.souza@intel.com>

> 
> Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> ---
>  .../drm/i915/display/skl_universal_plane.c    | 45 +++++++++++++------
>  1 file changed, 32 insertions(+), 13 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/skl_universal_plane.c b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> index c7de643d16dd..92270679a99c 100644
> --- a/drivers/gpu/drm/i915/display/skl_universal_plane.c
> +++ b/drivers/gpu/drm/i915/display/skl_universal_plane.c
> @@ -1001,6 +1001,34 @@ static u32 skl_plane_aux_dist(const struct intel_plane_state *plane_state,
>  	return aux_dist;
>  }
>  
> +static u32 skl_plane_keyval(const struct intel_plane_state *plane_state)
> +{
> +	const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
> +
> +	return key->min_value;
> +}
> +
> +static u32 skl_plane_keymax(const struct intel_plane_state *plane_state)
> +{
> +	const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
> +	u8 alpha = plane_state->hw.alpha >> 8;
> +
> +	return (key->max_value & 0xffffff) | PLANE_KEYMAX_ALPHA(alpha);
> +}
> +
> +static u32 skl_plane_keymsk(const struct intel_plane_state *plane_state)
> +{
> +	const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
> +	u8 alpha = plane_state->hw.alpha >> 8;
> +	u32 keymsk;
> +
> +	keymsk = key->channel_mask & 0x7ffffff;
> +	if (alpha < 0xff)
> +		keymsk |= PLANE_KEYMSK_ALPHA_ENABLE;
> +
> +	return keymsk;
> +}
> +
>  static void icl_plane_csc_load_black(struct intel_plane *plane)
>  {
>  	struct drm_i915_private *i915 = to_i915(plane->base.dev);
> @@ -1094,11 +1122,9 @@ skl_program_plane_arm(struct intel_plane *plane,
>  	struct drm_i915_private *dev_priv = to_i915(plane->base.dev);
>  	enum plane_id plane_id = plane->id;
>  	enum pipe pipe = plane->pipe;
> -	const struct drm_intel_sprite_colorkey *key = &plane_state->ckey;
>  	u32 x = plane_state->view.color_plane[color_plane].x;
>  	u32 y = plane_state->view.color_plane[color_plane].y;
> -	u32 keymsk, keymax, plane_color_ctl = 0;
> -	u8 alpha = plane_state->hw.alpha >> 8;
> +	u32 plane_color_ctl = 0;
>  	u32 plane_ctl = plane_state->ctl;
>  	unsigned long irqflags;
>  
> @@ -1108,18 +1134,11 @@ skl_program_plane_arm(struct intel_plane *plane,
>  		plane_color_ctl = plane_state->color_ctl |
>  			glk_plane_color_ctl_crtc(crtc_state);
>  
> -	keymax = (key->max_value & 0xffffff) | PLANE_KEYMAX_ALPHA(alpha);
> -
> -	keymsk = key->channel_mask & 0x7ffffff;
> -	if (alpha < 0xff)
> -		keymsk |= PLANE_KEYMSK_ALPHA_ENABLE;
> -
>  	spin_lock_irqsave(&dev_priv->uncore.lock, irqflags);
>  
> -	intel_de_write_fw(dev_priv, PLANE_KEYVAL(pipe, plane_id),
> -			  key->min_value);
> -	intel_de_write_fw(dev_priv, PLANE_KEYMSK(pipe, plane_id), keymsk);
> -	intel_de_write_fw(dev_priv, PLANE_KEYMAX(pipe, plane_id), keymax);
> +	intel_de_write_fw(dev_priv, PLANE_KEYVAL(pipe, plane_id), skl_plane_keyval(plane_state));
> +	intel_de_write_fw(dev_priv, PLANE_KEYMSK(pipe, plane_id), skl_plane_keymsk(plane_state));
> +	intel_de_write_fw(dev_priv, PLANE_KEYMAX(pipe, plane_id), skl_plane_keymax(plane_state));
>  
>  	intel_de_write_fw(dev_priv, PLANE_OFFSET(pipe, plane_id),
>  			  PLANE_OFFSET_Y(y) | PLANE_OFFSET_X(x));


  reply	other threads:[~2021-12-01 17:32 UTC|newest]

Thread overview: 48+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-12-01 15:25 [Intel-gfx] [PATCH 00/14] drm/i915: Plane register cleanup Ville Syrjala
2021-12-01 15:25 ` [Intel-gfx] [PATCH 01/14] drm/i915: Get rid of the 64bit PLANE_CC_VAL mmio Ville Syrjala
2021-12-01 17:13   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 02/14] drm/i915: Rename plane YUV order bits Ville Syrjala
2021-12-01 17:14   ` Souza, Jose
2021-12-02 11:53     ` Ville Syrjälä
2021-12-06 13:13   ` kernel test robot
2021-12-06 13:13     ` kernel test robot
2021-12-01 15:25 ` [Intel-gfx] [PATCH 03/14] drm/i915: Get rid of the "sizes are 0 based" stuff Ville Syrjala
2021-12-01 17:18   ` Souza, Jose
2021-12-02 11:56     ` Ville Syrjälä
2021-12-03 13:40       ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 04/14] drm/i915: Sipmplify PLANE_STRIDE masking Ville Syrjala
2022-01-12 19:50   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 05/14] drm/i915: Rename PLANE_CUS_CTL Y plane bits Ville Syrjala
2021-12-01 17:17   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 06/14] drm/i915: Use REG_BIT() & co. for universal " Ville Syrjala
2021-12-01 17:26   ` Souza, Jose
2021-12-02 11:57     ` Ville Syrjälä
2022-01-12 19:52       ` Souza, Jose
2021-12-06 15:57   ` kernel test robot
2021-12-06 15:57     ` kernel test robot
2021-12-01 15:25 ` [Intel-gfx] [PATCH 07/14] drm/i915: Clean up pre-skl primary plane registers Ville Syrjala
2021-12-06 19:22   ` kernel test robot
2021-12-06 19:22     ` kernel test robot
2022-01-12 20:12   ` Souza, Jose
2022-01-18  0:55     ` Ville Syrjälä
2022-01-18 13:40       ` Souza, Jose
2022-01-18 16:27         ` Ville Syrjälä
2021-12-01 15:25 ` [Intel-gfx] [PATCH 08/14] drm/i915: Clean up ivb+ sprite " Ville Syrjala
2022-01-14 16:26   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 09/14] drm/i915: Clean up vlv/chv " Ville Syrjala
2022-01-14 16:34   ` Souza, Jose
2022-01-18  1:11     ` Ville Syrjälä
2021-12-01 15:25 ` [Intel-gfx] [PATCH 10/14] drm/i915: Clean up g4x+ " Ville Syrjala
2022-01-14 16:38   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 11/14] drm/i915: Clean up cursor registers Ville Syrjala
2022-01-14 16:45   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 12/14] drm/i915: Extract skl_plane_aux_dist() Ville Syrjala
2021-12-01 17:28   ` Souza, Jose
2021-12-01 15:25 ` [Intel-gfx] [PATCH 13/14] drm/i915: Declutter color key register stuff Ville Syrjala
2021-12-01 17:31   ` Souza, Jose [this message]
2021-12-01 15:25 ` [Intel-gfx] [PATCH 14/14] drm/i915: Nuke pointless middle men for skl+ plane programming Ville Syrjala
2021-12-01 17:32   ` Souza, Jose
2021-12-01 18:47 ` [Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Plane register cleanup Patchwork
2021-12-01 18:48 ` [Intel-gfx] ✗ Fi.CI.SPARSE: " Patchwork
2021-12-01 19:14 ` [Intel-gfx] ✓ Fi.CI.BAT: success " Patchwork
2021-12-02  1:57 ` [Intel-gfx] ✓ Fi.CI.IGT: " Patchwork

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=79e88d427a6e6d21d187597034eedde63a845f39.camel@intel.com \
    --to=jose.souza@intel.com \
    --cc=intel-gfx@lists.freedesktop.org \
    --cc=ville.syrjala@linux.intel.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.