Re: [FOR DISCUSSION 0/9] Dove PMU support

From: "Rafael J. Wysocki" <rjw@rjwysocki.net>
To: Russell King - ARM Linux <linux@arm.linux.org.uk>
Cc: Andrew Lunn <andrew@lunn.ch>, Jason Cooper <jason@lakedaemon.net>,
	Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>,
	Mark Rutland <mark.rutland@arm.com>,
	devicetree@vger.kernel.org, Pawel Moll <pawel.moll@arm.com>,
	Len Brown <len.brown@intel.com>,
	Ian Campbell <ijc+devicetree@hellion.org.uk>,
	Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
	linux-pm@vger.kernel.org, Rob Herring <robh+dt@kernel.org>,
	Kumar Gala <galak@codeaurora.org>,
	linux-arm-kernel@lists.infradead.org
Subject: Re: [FOR DISCUSSION 0/9] Dove PMU support
Date: Thu, 19 Mar 2015 23:02:35 +0100	[thread overview]
Message-ID: <1824813.kJQ02QuMbA@vostro.rjw.lan> (raw)
In-Reply-To: <1575145.KH9tPKGaeR@vostro.rjw.lan>

On Thursday, March 19, 2015 10:59:20 PM Rafael J. Wysocki wrote:
> On Thursday, March 12, 2015 06:30:21 PM Russell King - ARM Linux wrote:
> > This is a re-posting of the patch set which I posted almost 10 months
> > ago to support the Dove PMU, with a few additional changes.  This set
> > is based upon 3.19.
> > 
> > In this set are:
> > 
> > * two patches which Rafael originally acked, but there was indecision
> >   last time around how to handle them due to potential conflicts with
> >   work that Ulf was doing.  These patches have been updated to apply
> >   cleanly to 3.19.  I don't know if people want to take these as
> >   fixes to the PM domain code or not (hence why I'm posting this
> >   series during the merge window - if it weren't for this, I'd hold
> >   it off.)
> > 
> > * what I regard as a fix to the PM domain code; as a result of a
> >   previous commit, the PM domain code mismatches the runtime PM state,
> >   which leads to the PM domain being unexpectedly left on.  This patch
> >   has been re-worked to try an alternative approach, syncing the PM
> >   domain state with the runtime PM state after the probe has completed.
> > 
> > * the addition of the core Dove PMU driver, which consists of a reset,
> >   IRQ controller, and power domains.  The reset and power domain code
> >   has to be closely related due to the power up/down requirements of
> >   the GPU/VPU subsystems needing to be performed atomically.  (This
> >   requirement prevents it using the MFD infrastructure, because we
> >   would need to hold spinlocks while calling several different
> >   sub-drivers.)
> > 
> > * addition of the RTC interrupt, so we can now receive and act on
> >   alarms generated by the Dove RTC.
> > 
> > * addition of the DT descriptions for the GPU and VPU power domains.
> >   These patches do not themselves add the DT descriptions for these
> >   units, so these patches serve as illustrations how these should be
> >   described.
> > 
> 
> I can apply patches [1-3/9] from this series if that helps.

I mean from the next version of it ([FOR DISCUSSION 0/10] Dove PMU support).

These patches to be precise:

https://patchwork.kernel.org/patch/6006991/
https://patchwork.kernel.org/patch/6007001/
https://patchwork.kernel.org/patch/6007021/

unless there are objectsions (which I haven't seen).

Rafael