* [PATCH] drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring
@ 2016-10-27 14:39 Andrzej Lawrynowicz
2016-10-27 15:19 ` ✗ Fi.CI.BAT: warning for " Patchwork
` (2 more replies)
0 siblings, 3 replies; 5+ messages in thread
From: Andrzej Lawrynowicz @ 2016-10-27 14:39 UTC (permalink / raw)
To: intel-gfx; +Cc: andrzej.lawrynowicz
Since gen9 timestamp can be read from BLT ring (TIMESTAMP_BCSUNIT).
Add this register to reg_read ioctl whitelist.
cc=chris@chris-wilson.co.uk
cc=arkadiusz.hiler@intel.com
cc=michal.winiarski@intel.com
Signed-off-by: Andrzej Lawrynowicz <andrzej.lawrynowicz@intel.com>
---
drivers/gpu/drm/i915/intel_uncore.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index e2b188d..c2c3fe6 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1354,6 +1354,9 @@ static const struct register_whitelist {
{ .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),
.offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE),
.size = 8, .gen_bitmask = GEN_RANGE(4, 9) },
+ { .offset_ldw = RING_TIMESTAMP(BLT_RING_BASE),
+ .offset_udw = RING_TIMESTAMP_UDW(BLT_RING_BASE),
+ .size = 8, .gen_bitmask = GEN_RANGE(9, 9) },
};
int i915_reg_read_ioctl(struct drm_device *dev,
--
2.10.1
--------------------------------------------------------------------
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* ✗ Fi.CI.BAT: warning for drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring
2016-10-27 14:39 [PATCH] drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring Andrzej Lawrynowicz
@ 2016-10-27 15:19 ` Patchwork
2016-10-28 10:49 ` [PATCH v2] drm/i915: Whitelist TIMESTAMP register from BLT ring for gen9+ Arkadiusz Hiler
2016-10-28 11:46 ` ✗ Fi.CI.BAT: warning for drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring (rev2) Patchwork
2 siblings, 0 replies; 5+ messages in thread
From: Patchwork @ 2016-10-27 15:19 UTC (permalink / raw)
To: Andrzej Lawrynowicz; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring
URL : https://patchwork.freedesktop.org/series/14482/
State : warning
== Summary ==
Series 14482v1 drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring
https://patchwork.freedesktop.org/api/1.0/series/14482/revisions/1/mbox/
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-a:
pass -> DMESG-WARN (fi-ilk-650)
fi-bdw-5557u total:246 pass:231 dwarn:0 dfail:0 fail:0 skip:15
fi-bsw-n3050 total:246 pass:204 dwarn:0 dfail:0 fail:0 skip:42
fi-bxt-t5700 total:246 pass:216 dwarn:0 dfail:0 fail:0 skip:30
fi-byt-j1900 total:246 pass:215 dwarn:0 dfail:0 fail:0 skip:31
fi-byt-n2820 total:246 pass:211 dwarn:0 dfail:0 fail:0 skip:35
fi-hsw-4770 total:246 pass:224 dwarn:0 dfail:0 fail:0 skip:22
fi-hsw-4770r total:246 pass:223 dwarn:0 dfail:0 fail:0 skip:23
fi-ilk-650 total:246 pass:184 dwarn:1 dfail:0 fail:0 skip:61
fi-ivb-3520m total:246 pass:220 dwarn:0 dfail:0 fail:0 skip:26
fi-ivb-3770 total:246 pass:220 dwarn:0 dfail:0 fail:0 skip:26
fi-kbl-7200u total:246 pass:222 dwarn:0 dfail:0 fail:0 skip:24
fi-skl-6260u total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14
fi-skl-6700hq total:246 pass:223 dwarn:0 dfail:0 fail:0 skip:23
fi-skl-6700k total:246 pass:222 dwarn:1 dfail:0 fail:0 skip:23
fi-skl-6770hq total:246 pass:232 dwarn:0 dfail:0 fail:0 skip:14
fi-snb-2520m total:246 pass:209 dwarn:0 dfail:0 fail:0 skip:37
fi-snb-2600 total:246 pass:208 dwarn:0 dfail:0 fail:0 skip:38
0fb1abf5eac2230894a7352e36022066f88a9b19 drm-intel-nightly: 2016y-10m-27d-14h-09m-00s UTC integration manifest
a6368f3 drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_2841/
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^ permalink raw reply [flat|nested] 5+ messages in thread
* [PATCH v2] drm/i915: Whitelist TIMESTAMP register from BLT ring for gen9+
2016-10-27 14:39 [PATCH] drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring Andrzej Lawrynowicz
2016-10-27 15:19 ` ✗ Fi.CI.BAT: warning for " Patchwork
@ 2016-10-28 10:49 ` Arkadiusz Hiler
2016-10-28 11:46 ` ✗ Fi.CI.BAT: warning for drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring (rev2) Patchwork
2 siblings, 0 replies; 5+ messages in thread
From: Arkadiusz Hiler @ 2016-10-28 10:49 UTC (permalink / raw)
To: intel-gfx
From: Andrzej Lawrynowicz <andrzej.lawrynowicz@intel.com>
Since gen9 timestamp can be read from BLT ring (TIMESTAMP_BCSUNIT).
Add this register to reg_read ioctl whitelist.
v2: commit message change (Arkadiusz Hiler)
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
Cc: Michal Winiarski <michal.winiarski@intel.com>
Signed-off-by: Andrzej Lawrynowicz <andrzej.lawrynowicz@intel.com>
Signed-off-by: Arkadiusz Hiler <arkadiusz.hiler@intel.com>
---
drivers/gpu/drm/i915/intel_uncore.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index e2b188d..c2c3fe6 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1354,6 +1354,9 @@ static const struct register_whitelist {
{ .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),
.offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE),
.size = 8, .gen_bitmask = GEN_RANGE(4, 9) },
+ { .offset_ldw = RING_TIMESTAMP(BLT_RING_BASE),
+ .offset_udw = RING_TIMESTAMP_UDW(BLT_RING_BASE),
+ .size = 8, .gen_bitmask = GEN_RANGE(9, 9) },
};
int i915_reg_read_ioctl(struct drm_device *dev,
--
2.7.4
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^ permalink raw reply related [flat|nested] 5+ messages in thread
* ✗ Fi.CI.BAT: warning for drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring (rev2)
2016-10-27 14:39 [PATCH] drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring Andrzej Lawrynowicz
2016-10-27 15:19 ` ✗ Fi.CI.BAT: warning for " Patchwork
2016-10-28 10:49 ` [PATCH v2] drm/i915: Whitelist TIMESTAMP register from BLT ring for gen9+ Arkadiusz Hiler
@ 2016-10-28 11:46 ` Patchwork
2016-10-31 13:20 ` Andrzej Lawrynowicz
2 siblings, 1 reply; 5+ messages in thread
From: Patchwork @ 2016-10-28 11:46 UTC (permalink / raw)
To: Arkadiusz Hiler; +Cc: intel-gfx
== Series Details ==
Series: drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring (rev2)
URL : https://patchwork.freedesktop.org/series/14482/
State : warning
== Summary ==
Series 14482v2 drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring
https://patchwork.freedesktop.org/api/1.0/series/14482/revisions/2/mbox/
Test kms_flip:
Subgroup basic-flip-vs-wf_vblank:
fail -> SKIP (fi-ivb-3770)
Test kms_pipe_crc_basic:
Subgroup nonblocking-crc-pipe-a:
pass -> DMESG-WARN (fi-ilk-650)
fi-bdw-5557u total:239 pass:224 dwarn:0 dfail:0 fail:0 skip:15
fi-bsw-n3050 total:239 pass:199 dwarn:0 dfail:0 fail:0 skip:40
fi-bxt-t5700 total:239 pass:211 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-j1900 total:239 pass:211 dwarn:0 dfail:0 fail:0 skip:28
fi-byt-n2820 total:239 pass:207 dwarn:0 dfail:0 fail:0 skip:32
fi-hsw-4770 total:239 pass:219 dwarn:0 dfail:0 fail:0 skip:20
fi-hsw-4770r total:239 pass:218 dwarn:0 dfail:0 fail:0 skip:21
fi-ilk-650 total:239 pass:184 dwarn:1 dfail:0 fail:0 skip:54
fi-ivb-3520m total:239 pass:216 dwarn:0 dfail:0 fail:0 skip:23
fi-ivb-3770 total:239 pass:216 dwarn:0 dfail:0 fail:0 skip:23
fi-kbl-7200u total:239 pass:217 dwarn:0 dfail:0 fail:0 skip:22
fi-skl-6260u total:239 pass:225 dwarn:0 dfail:0 fail:0 skip:14
fi-skl-6700hq total:239 pass:218 dwarn:0 dfail:0 fail:0 skip:21
fi-skl-6700k total:239 pass:217 dwarn:1 dfail:0 fail:0 skip:21
fi-skl-6770hq total:239 pass:225 dwarn:0 dfail:0 fail:0 skip:14
fi-snb-2520m total:239 pass:206 dwarn:0 dfail:0 fail:0 skip:33
fi-snb-2600 total:239 pass:205 dwarn:0 dfail:0 fail:0 skip:34
fdc2de7ae3cf48c2eaee3fb05b63848790725361 drm-intel-nightly: 2016y-10m-28d-10h-48m-07s UTC integration manifest
8690c14 drm/i915: Whitelist TIMESTAMP register from BLT ring for gen9+
== Logs ==
For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_2846/
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
* Re: ✗ Fi.CI.BAT: warning for drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring (rev2)
2016-10-28 11:46 ` ✗ Fi.CI.BAT: warning for drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring (rev2) Patchwork
@ 2016-10-31 13:20 ` Andrzej Lawrynowicz
0 siblings, 0 replies; 5+ messages in thread
From: Andrzej Lawrynowicz @ 2016-10-31 13:20 UTC (permalink / raw)
To: intel-gfx
On Fri, Oct 28, 2016 at 11:46:20AM +0000, Patchwork wrote:
> == Series Details ==
>
> Series: drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring (rev2)
> URL : https://patchwork.freedesktop.org/series/14482/
> State : warning
>
> == Summary ==
>
> Series 14482v2 drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring
> https://patchwork.freedesktop.org/api/1.0/series/14482/revisions/2/mbox/
>
> Test kms_flip:
> Subgroup basic-flip-vs-wf_vblank:
> fail -> SKIP (fi-ivb-3770)
This result change is not connected to this commit.
This is orginal fail:
(kms_flip:8484) INFO: Expected frametime: 16666us; measured 16717.2us +-
14.529us accuracy 0.52%
(kms_flip:8484) CRITICAL: Test assertion failure function calibrate_ts,
file kms_flip.c:1362:
This is skip message:
Expected frametime: 16666us; measured 16717.3us +- 5.209us accuracy
0.19%
Test requirement not met in function calibrate_ts, file kms_flip.c:1367:
Test requirement: fabs(mean - expected) < 2*stddev
vblank interval differs from modeline! expected 16665.6us, measured
16717us +- 5.209us, difference 51.7us (9.9 sigma)
This looks like the same message but occured in different stages.
> Test kms_pipe_crc_basic:
> Subgroup nonblocking-crc-pipe-a:
> pass -> DMESG-WARN (fi-ilk-650)
>
[ 326.380087] [drm:intel_pch_fifo_underrun_irq_handler [i915]] *ERROR* PCH transcoder B FIFO underrun
This warning is not connected to this change. This is sporadic that we
often see.
>
> fdc2de7ae3cf48c2eaee3fb05b63848790725361 drm-intel-nightly: 2016y-10m-28d-10h-48m-07s UTC integration manifest
> 8690c14 drm/i915: Whitelist TIMESTAMP register from BLT ring for gen9+
>
> == Logs ==
>
> For more details see: https://intel-gfx-ci.01.org/CI/Patchwork_2846/
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 5+ messages in thread
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2016-10-27 14:39 [PATCH] drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring Andrzej Lawrynowicz
2016-10-27 15:19 ` ✗ Fi.CI.BAT: warning for " Patchwork
2016-10-28 10:49 ` [PATCH v2] drm/i915: Whitelist TIMESTAMP register from BLT ring for gen9+ Arkadiusz Hiler
2016-10-28 11:46 ` ✗ Fi.CI.BAT: warning for drm/i915/gen9+: Whitelist TIMESTAMP register from BLT ring (rev2) Patchwork
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