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From: Stafford Horne <shorne@gmail.com>
To: Richard Henderson <rth@twiddle.net>
Cc: Jia Liu <proljc@gmail.com>,
	qemu-devel@nongnu.org, openrisc@lists.librecores.org
Subject: Re: [Qemu-devel] [PATCH] target-openrisc: Fix exception handling status registers
Date: Thu, 26 Jan 2017 22:12:29 +0900	[thread overview]
Message-ID: <20170126131229.GB16014@lianli.shorne-pla.net> (raw)
In-Reply-To: <39f927aa-26fe-0e43-7c6b-efe1b70bc5fa@twiddle.net>

On Wed, Jan 25, 2017 at 09:27:29AM -0800, Richard Henderson wrote:
> On 01/25/2017 04:34 AM, Stafford Horne wrote:
> > Hmm, I just tried your qemu branch and mine:
> > 
> >   git@github.com:stffrdhrn/qemu.git or1k-fix-sigill
> > 
> > Both of them were able to boot fine.
> > 
> > The opencores,or1200-rtlsvn481 cpu node is in the or1ksim device tree
> > definition.  Are you sure your kernel config has this in it?
> > 
> >   CONFIG_OPENRISC_BUILTIN_DTB="or1ksim"
> > 
> > Could you send your kernel config?
> > 
> > I have attached mine, just in case.  For next-20170124
> 
> Curious.  The entire diff between our configs is just
> 
> --- ../or-config        2017-01-24 09:14:51.918059107 -0800
> +++ .config     2017-01-25 09:18:14.153999754 -0800
> @@ -18,7 +18,7 @@
>  #
>  CONFIG_BROKEN_ON_SMP=y
>  CONFIG_INIT_ENV_ARG_LIMIT=32
> -CONFIG_CROSS_COMPILE="or1k-linux-musl-"
> +CONFIG_CROSS_COMPILE="or1k-musl-linux-"
>  # CONFIG_COMPILE_TEST is not set
>  CONFIG_LOCALVERSION=""
>  CONFIG_LOCALVERSION_AUTO=y
> 
> So you're saying you *do* get serial port output?
> 
> Perhaps you can just send me your kernel...

I just sent you a mail with a link to my kernel for download.

One thing I noticed is you passed '-append console=ttyS0' I think that
does nothing on openrisc since as far as I know openrisc only gets boot
params from the device tree file. I tried with and without it and got no
differences.

Another thing, I am using a 'late' version of gcc built with musl cross [1]
, I dont think it would make a difference, but maybe?

$ or1k-musl-linux-as --version
GNU assembler (GNU Binutils) 2.26.20160125
Copyright (C) 2015 Free Software Foundation, Inc.
This program is free software; you may redistribute it under the terms of
the GNU General Public License version 3 or later.
This program has absolutely no warranty.
This assembler was configured for a target of `or1k-linux-musl'.

$ or1k-musl-linux-gcc --version
or1k-musl-linux-gcc (GCC) 5.4.0
Copyright (C) 2015 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR
PURPOSE.


[1] https://github.com/openrisc/musl-cross/tree/or1k

Boot sequence I am seeing, this comes out to stdout when running the
qemu command. The panic at the end is expected, if I add initrd it
goes away.

Compiled-in FDT at c03ad120
Linux version 4.10.0-rc5-next-20170124 (shorne@lianli.shorne-pla.net) (gcc version 5.4.0 (GCC) ) #406 Thu Jan 26 22:04:20 JST 2017
CPU: OpenRISC-0 (revision 0) @20 MHz
-- dcache disabled
-- icache disabled
-- dmmu:   64 entries, 1 way(s)
-- immu:   64 entries, 1 way(s)
-- additional features:
-- power management
-- timer
setup_memory: Memory: 0x0-0x2000000
Setting up paging and PTEs.
map_ram: Memory: 0x0-0x2000000
itlb_miss_handler c0002160
dtlb_miss_handler c0002000
OpenRISC Linux -- http://openrisc.io
Built 1 zonelists in Zone order, mobility grouping off.  Total pages: 4080
Kernel command line: console=uart,mmio,0x90000000,115200
earlycon: uart0 at MMIO 0x90000000 (options '115200')
bootconsole [uart0] enabled
PID hash table entries: 128 (order: -4, 512 bytes)
Dentry cache hash table entries: 4096 (order: 1, 16384 bytes)
Inode-cache hash table entries: 2048 (order: 0, 8192 bytes)
Sorting __ex_table...
Memory: 28672K/32768K available (2883K kernel code, 116K rwdata, 640K rodata, 128K init, 94K bss, 4096K reserved, 0K cma-reserved)
mem_init_done ...........................................
NR_IRQS:32 nr_irqs:32 0
clocksource: openrisc_timer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 95563022313 ns
40.00 BogoMIPS (lpj=200000)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 2048 (order: 0, 8192 bytes)
Mountpoint-cache hash table entries: 2048 (order: 0, 8192 bytes)
devtmpfs: initialized
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
NET: Registered protocol family 16
clocksource: Switched to clocksource openrisc_timer
NET: Registered protocol family 2
TCP established hash table entries: 2048 (order: 0, 8192 bytes)
TCP bind hash table entries: 2048 (order: 0, 8192 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
UDP hash table entries: 512 (order: 0, 8192 bytes)
UDP-Lite hash table entries: 512 (order: 0, 8192 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
futex hash table entries: 256 (order: -2, 3072 bytes)
workingset: timestamp_bits=30 max_order=12 bucket_order=0
Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
90000000.serial: ttyS0 at MMIO 0x90000000 (irq = 2, base_baud = 1250000) is a 16550A
console [ttyS0] enabled
console [ttyS0] enabled
bootconsole [uart0] disabled
bootconsole [uart0] disabled
libphy: Fixed MDIO Bus: probed
NET: Registered protocol family 17
devtmpfs: mounted
Freeing unused kernel memory: 128K
This architecture does not have kernel memory protection.
Kernel panic - not syncing: No working init found.  Try passing init= option to kernel. See Linux Documentation/admin-guide/init.rst for guidance.
---[ end Kernel panic - not syncing: No working init found.  Try passing init= option to kernel. See Linux Documentation/admin-guide/init.rst for guidance.

WARNING: multiple messages have this Message-ID (diff)
From: Stafford Horne <shorne@gmail.com>
To: openrisc@lists.librecores.org
Subject: [OpenRISC] [Qemu-devel] [PATCH] target-openrisc: Fix exception handling status registers
Date: Thu, 26 Jan 2017 22:12:29 +0900	[thread overview]
Message-ID: <20170126131229.GB16014@lianli.shorne-pla.net> (raw)
In-Reply-To: <39f927aa-26fe-0e43-7c6b-efe1b70bc5fa@twiddle.net>

On Wed, Jan 25, 2017 at 09:27:29AM -0800, Richard Henderson wrote:
> On 01/25/2017 04:34 AM, Stafford Horne wrote:
> > Hmm, I just tried your qemu branch and mine:
> > 
> >   git at github.com:stffrdhrn/qemu.git or1k-fix-sigill
> > 
> > Both of them were able to boot fine.
> > 
> > The opencores,or1200-rtlsvn481 cpu node is in the or1ksim device tree
> > definition.  Are you sure your kernel config has this in it?
> > 
> >   CONFIG_OPENRISC_BUILTIN_DTB="or1ksim"
> > 
> > Could you send your kernel config?
> > 
> > I have attached mine, just in case.  For next-20170124
> 
> Curious.  The entire diff between our configs is just
> 
> --- ../or-config        2017-01-24 09:14:51.918059107 -0800
> +++ .config     2017-01-25 09:18:14.153999754 -0800
> @@ -18,7 +18,7 @@
>  #
>  CONFIG_BROKEN_ON_SMP=y
>  CONFIG_INIT_ENV_ARG_LIMIT=32
> -CONFIG_CROSS_COMPILE="or1k-linux-musl-"
> +CONFIG_CROSS_COMPILE="or1k-musl-linux-"
>  # CONFIG_COMPILE_TEST is not set
>  CONFIG_LOCALVERSION=""
>  CONFIG_LOCALVERSION_AUTO=y
> 
> So you're saying you *do* get serial port output?
> 
> Perhaps you can just send me your kernel...

I just sent you a mail with a link to my kernel for download.

One thing I noticed is you passed '-append console=ttyS0' I think that
does nothing on openrisc since as far as I know openrisc only gets boot
params from the device tree file. I tried with and without it and got no
differences.

Another thing, I am using a 'late' version of gcc built with musl cross [1]
, I dont think it would make a difference, but maybe?

$ or1k-musl-linux-as --version
GNU assembler (GNU Binutils) 2.26.20160125
Copyright (C) 2015 Free Software Foundation, Inc.
This program is free software; you may redistribute it under the terms of
the GNU General Public License version 3 or later.
This program has absolutely no warranty.
This assembler was configured for a target of `or1k-linux-musl'.

$ or1k-musl-linux-gcc --version
or1k-musl-linux-gcc (GCC) 5.4.0
Copyright (C) 2015 Free Software Foundation, Inc.
This is free software; see the source for copying conditions.  There is NO
warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR
PURPOSE.


[1] https://github.com/openrisc/musl-cross/tree/or1k

Boot sequence I am seeing, this comes out to stdout when running the
qemu command. The panic at the end is expected, if I add initrd it
goes away.

Compiled-in FDT at c03ad120
Linux version 4.10.0-rc5-next-20170124 (shorne at lianli.shorne-pla.net) (gcc version 5.4.0 (GCC) ) #406 Thu Jan 26 22:04:20 JST 2017
CPU: OpenRISC-0 (revision 0) @20 MHz
-- dcache disabled
-- icache disabled
-- dmmu:   64 entries, 1 way(s)
-- immu:   64 entries, 1 way(s)
-- additional features:
-- power management
-- timer
setup_memory: Memory: 0x0-0x2000000
Setting up paging and PTEs.
map_ram: Memory: 0x0-0x2000000
itlb_miss_handler c0002160
dtlb_miss_handler c0002000
OpenRISC Linux -- http://openrisc.io
Built 1 zonelists in Zone order, mobility grouping off.  Total pages: 4080
Kernel command line: console=uart,mmio,0x90000000,115200
earlycon: uart0 at MMIO 0x90000000 (options '115200')
bootconsole [uart0] enabled
PID hash table entries: 128 (order: -4, 512 bytes)
Dentry cache hash table entries: 4096 (order: 1, 16384 bytes)
Inode-cache hash table entries: 2048 (order: 0, 8192 bytes)
Sorting __ex_table...
Memory: 28672K/32768K available (2883K kernel code, 116K rwdata, 640K rodata, 128K init, 94K bss, 4096K reserved, 0K cma-reserved)
mem_init_done ...........................................
NR_IRQS:32 nr_irqs:32 0
clocksource: openrisc_timer: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 95563022313 ns
40.00 BogoMIPS (lpj=200000)
pid_max: default: 32768 minimum: 301
Mount-cache hash table entries: 2048 (order: 0, 8192 bytes)
Mountpoint-cache hash table entries: 2048 (order: 0, 8192 bytes)
devtmpfs: initialized
clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns
NET: Registered protocol family 16
clocksource: Switched to clocksource openrisc_timer
NET: Registered protocol family 2
TCP established hash table entries: 2048 (order: 0, 8192 bytes)
TCP bind hash table entries: 2048 (order: 0, 8192 bytes)
TCP: Hash tables configured (established 2048 bind 2048)
UDP hash table entries: 512 (order: 0, 8192 bytes)
UDP-Lite hash table entries: 512 (order: 0, 8192 bytes)
NET: Registered protocol family 1
RPC: Registered named UNIX socket transport module.
RPC: Registered udp transport module.
RPC: Registered tcp transport module.
RPC: Registered tcp NFSv4.1 backchannel transport module.
futex hash table entries: 256 (order: -2, 3072 bytes)
workingset: timestamp_bits=30 max_order=12 bucket_order=0
Serial: 8250/16550 driver, 4 ports, IRQ sharing disabled
90000000.serial: ttyS0 at MMIO 0x90000000 (irq = 2, base_baud = 1250000) is a 16550A
console [ttyS0] enabled
console [ttyS0] enabled
bootconsole [uart0] disabled
bootconsole [uart0] disabled
libphy: Fixed MDIO Bus: probed
NET: Registered protocol family 17
devtmpfs: mounted
Freeing unused kernel memory: 128K
This architecture does not have kernel memory protection.
Kernel panic - not syncing: No working init found.  Try passing init= option to kernel. See Linux Documentation/admin-guide/init.rst for guidance.
---[ end Kernel panic - not syncing: No working init found.  Try passing init= option to kernel. See Linux Documentation/admin-guide/init.rst for guidance.

  reply	other threads:[~2017-01-26 13:12 UTC|newest]

Thread overview: 45+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-01-13 21:57 [OpenRISC] [PATCH] target-openrisc: Fix exception handling status registers Stafford Horne
2017-01-13 22:02 ` Stafford Horne
2017-01-14  4:29   ` Jia Liu
2017-01-14  8:04     ` [Qemu-devel] " Stafford Horne
2017-01-14  8:04       ` [OpenRISC] " Stafford Horne
2017-01-20 16:39       ` [Qemu-devel] " Stafford Horne
2017-01-20 16:39         ` [OpenRISC] " Stafford Horne
2017-01-23 18:08         ` [Qemu-devel] " Richard Henderson
2017-01-23 18:08           ` [OpenRISC] " Richard Henderson
2017-01-24 10:26           ` Stafford Horne
2017-01-24 10:26             ` [OpenRISC] " Stafford Horne
2017-01-24 18:32             ` Richard Henderson
2017-01-24 18:32               ` [OpenRISC] " Richard Henderson
2017-01-25 12:34               ` Stafford Horne
2017-01-25 12:34                 ` [OpenRISC] " Stafford Horne
2017-01-25 17:27                 ` Richard Henderson
2017-01-25 17:27                   ` [OpenRISC] " Richard Henderson
2017-01-26 13:12                   ` Stafford Horne [this message]
2017-01-26 13:12                     ` Stafford Horne
2017-01-26 17:26                     ` Richard Henderson
2017-01-26 17:26                       ` [OpenRISC] " Richard Henderson
2017-01-26 22:01                       ` Stafford Horne
2017-01-26 22:01                         ` [OpenRISC] " Stafford Horne
2017-02-01 10:04                       ` Stafford Horne
2017-02-01 10:04                         ` [OpenRISC] " Stafford Horne
2017-02-01 18:15                         ` Richard Henderson
2017-02-01 18:15                           ` [OpenRISC] " Richard Henderson
2017-02-02 14:34                           ` Stafford Horne
2017-02-02 14:34                             ` [OpenRISC] " Stafford Horne
2017-02-03 15:14                             ` Stafford Horne
2017-02-03 15:14                               ` [OpenRISC] " Stafford Horne
2017-02-07  2:36                               ` Richard Henderson
2017-02-07  2:36                                 ` [OpenRISC] " Richard Henderson
2017-02-06 20:44                             ` Richard Henderson
2017-02-07  0:31                               ` Stafford Horne
2017-02-07  5:48                                 ` Richard Henderson
2017-02-07  5:53                         ` Richard Henderson
2017-02-07  5:53                           ` [OpenRISC] " Richard Henderson
2017-02-08 14:01                           ` Stafford Horne
2017-02-08 14:01                             ` [OpenRISC] " Stafford Horne
2017-02-08 16:38                             ` Stafford Horne
2017-02-08 16:38                               ` [OpenRISC] " Stafford Horne
2017-02-08 20:38                             ` Richard Henderson
2017-02-08 20:38                               ` [OpenRISC] " Richard Henderson
2017-01-13 22:00 Stafford Horne

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