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From: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
To: Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>,
	Maxime Ripard
	<maxime.ripard-wi1+55ScJUtKEb57/3fJTNBPR1lH4CV8@public.gmane.org>,
	Chen-Yu Tsai <wens-jdAy2FN1RRM@public.gmane.org>
Cc: devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	linux-sunxi-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org,
	Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
Subject: [PATCH v2 3/5] arm64: allwinner: a64: add r_ccu node
Date: Thu, 16 Mar 2017 01:28:06 +0800	[thread overview]
Message-ID: <20170315172808.64011-4-icenowy@aosc.xyz> (raw)
In-Reply-To: <20170315172808.64011-1-icenowy-ymACFijhrKM@public.gmane.org>

A64 SoC have a CCU (r_ccu) in PRCM block.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy-ymACFijhrKM@public.gmane.org>
---
Changes in v2:
- Add osc32000.

 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 1c64ea2d23f9..dbeba43386f6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -43,8 +43,10 @@
  */
 
 #include <dt-bindings/clock/sun50i-a64-ccu.h>
+#include <dt-bindings/clock/sun8i-r-ccu.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset/sun50i-a64-ccu.h>
+#include <dt-bindings/reset/sun8i-r-ccu.h>
 
 / {
 	interrupt-parent = <&gic>;
@@ -98,6 +100,13 @@
 		clock-output-names = "osc32k";
 	};
 
+	osc32000: osc32000_clk {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <32000>;
+		clock-output-names = "osc32000";
+	};
+
 	psci {
 		compatible = "arm,psci-0.2";
 		method = "smc";
@@ -392,5 +401,14 @@
 			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 		};
+
+		r_ccu: clock@1f01400 {
+			compatible = "allwinner,sun50i-a64-r-ccu";
+			reg = <0x01f01400 0x100>;
+			clocks = <&osc24M>, <&osc32k>, <&osc32000>;
+			clock-names = "hosc", "losc", "iosc";
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
 	};
 };
-- 
2.12.0

WARNING: multiple messages have this Message-ID (diff)
From: icenowy@aosc.xyz (Icenowy Zheng)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH v2 3/5] arm64: allwinner: a64: add r_ccu node
Date: Thu, 16 Mar 2017 01:28:06 +0800	[thread overview]
Message-ID: <20170315172808.64011-4-icenowy@aosc.xyz> (raw)
In-Reply-To: <20170315172808.64011-1-icenowy@aosc.xyz>

A64 SoC have a CCU (r_ccu) in PRCM block.

Add support for it.

Signed-off-by: Icenowy Zheng <icenowy@aosc.xyz>
---
Changes in v2:
- Add osc32000.

 arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
index 1c64ea2d23f9..dbeba43386f6 100644
--- a/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
+++ b/arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi
@@ -43,8 +43,10 @@
  */
 
 #include <dt-bindings/clock/sun50i-a64-ccu.h>
+#include <dt-bindings/clock/sun8i-r-ccu.h>
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset/sun50i-a64-ccu.h>
+#include <dt-bindings/reset/sun8i-r-ccu.h>
 
 / {
 	interrupt-parent = <&gic>;
@@ -98,6 +100,13 @@
 		clock-output-names = "osc32k";
 	};
 
+	osc32000: osc32000_clk {
+		#clock-cells = <0>;
+		compatible = "fixed-clock";
+		clock-frequency = <32000>;
+		clock-output-names = "osc32000";
+	};
+
 	psci {
 		compatible = "arm,psci-0.2";
 		method = "smc";
@@ -392,5 +401,14 @@
 			interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 				     <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
 		};
+
+		r_ccu: clock at 1f01400 {
+			compatible = "allwinner,sun50i-a64-r-ccu";
+			reg = <0x01f01400 0x100>;
+			clocks = <&osc24M>, <&osc32k>, <&osc32000>;
+			clock-names = "hosc", "losc", "iosc";
+			#clock-cells = <1>;
+			#reset-cells = <1>;
+		};
 	};
 };
-- 
2.12.0

  parent reply	other threads:[~2017-03-15 17:28 UTC|newest]

Thread overview: 25+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-03-15 17:28 [PATCH v2 0/5] Add support for the R_CCU on Allwinner H3/A64 SoCs Icenowy Zheng
2017-03-15 17:28 ` Icenowy Zheng
     [not found] ` <20170315172808.64011-1-icenowy-ymACFijhrKM@public.gmane.org>
2017-03-15 17:28   ` [PATCH v2 1/5] dt-bindings: update device tree binding for Allwinner PRCM CCUs Icenowy Zheng
2017-03-15 17:28     ` Icenowy Zheng
2017-03-21  7:41     ` Maxime Ripard
2017-03-21  7:41       ` Maxime Ripard
2017-03-21  7:41       ` Maxime Ripard
2017-03-21 18:22       ` Icenowy Zheng
2017-03-21 18:22         ` Icenowy Zheng
2017-03-22 20:09         ` Maxime Ripard
2017-03-22 20:09           ` Maxime Ripard
2017-03-22 20:09           ` Maxime Ripard
2017-03-22 23:17           ` Icenowy Zheng
2017-03-22 23:17             ` Icenowy Zheng
2017-03-26 13:10             ` Maxime Ripard
2017-03-26 13:10               ` Maxime Ripard
2017-03-26 13:10               ` Maxime Ripard
2017-03-15 17:28   ` [PATCH v2 2/5] clk: sunxi-ng: add support for " Icenowy Zheng
2017-03-15 17:28     ` Icenowy Zheng
2017-03-15 17:28   ` Icenowy Zheng [this message]
2017-03-15 17:28     ` [PATCH v2 3/5] arm64: allwinner: a64: add r_ccu node Icenowy Zheng
2017-03-15 17:28   ` [PATCH v2 4/5] ARM: sun8i: h3: switch apb0-related clocks to r_ccu Icenowy Zheng
2017-03-15 17:28     ` Icenowy Zheng
2017-03-15 17:28   ` [PATCH v2 5/5] arm64: allwinner: a64: add R_PIO pinctrl node Icenowy Zheng
2017-03-15 17:28     ` Icenowy Zheng

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