From: "Andreas Färber" <afaerber@suse.de> To: linux-arm-kernel@lists.infradead.org Cc: mp-cs@actions-semi.com, "Thomas Liau" <thomas.liau@actions-semi.com>, 张东风 <zhangdf@actions-semi.com>, 刘炜 <liuwei@actions-semi.com>, 张天益 <tyzhang@actions-semi.com>, 96boards@ucrobotics.com, support@lemaker.org, linux-kernel@vger.kernel.org, "Andreas Färber" <afaerber@suse.de>, "Daniel Lezcano" <daniel.lezcano@linaro.org>, "Thomas Gleixner" <tglx@linutronix.de> Subject: [PATCH v4 04/28] clocksource: Add Owl timer Date: Tue, 6 Jun 2017 02:54:02 +0200 [thread overview] Message-ID: <20170606005426.26446-5-afaerber@suse.de> (raw) In-Reply-To: <20170606005426.26446-1-afaerber@suse.de> The Actions Semi S500 SoC provides four timers, 2Hz0/1 and 32-bit TIMER0/1. Use TIMER0 as clocksource and TIMER1 as clockevents. Based on LeMaker linux-actions tree. An S500 datasheet can be found on the LeMaker Guitar pages: http://www.lemaker.org/product-guitar-download-29.html Signed-off-by: Andreas Färber <afaerber@suse.de> --- v3 -> v4: * Dropped DT-dependent node iteration (Daniel) * Introduced owl_timer_set_enabled() (Daniel) * Fixed one timer reset v2 -> v3: * Cleared interrupt pending flag for Timer1 * Adopted named interrupts for Timer1 * Extended commit message (Daniel) * Adopted BIT() macros (Daniel) * Adopted PTR_ERR() (Daniel) * Adopted request_irq() (Daniel) * Factored timer reset out (Daniel) * Adopted CLOCK_EVT_FEAT_DYNIRQ (Daniel) * Adopted clk input for rate (Daniel) * Prepared for S900, adopting S500 DT compatible v2: new drivers/clocksource/Kconfig | 7 ++ drivers/clocksource/Makefile | 1 + drivers/clocksource/owl-timer.c | 171 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 179 insertions(+) create mode 100644 drivers/clocksource/owl-timer.c diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 4ba230d8e679..da3f1d926c6b 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -102,6 +102,13 @@ config ORION_TIMER help Enables the support for the Orion timer driver +config OWL_TIMER + bool "Owl timer driver" if COMPILE_TEST + depends on GENERIC_CLOCKEVENTS + select CLKSRC_MMIO + help + Enables the support for the Actions Semi Owl timer driver. + config SUN4I_TIMER bool "Sun4i timer driver" if COMPILE_TEST depends on GENERIC_CLOCKEVENTS diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index ec559212edf6..90309d4a719e 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -51,6 +51,7 @@ obj-$(CONFIG_CLKSRC_PISTACHIO) += time-pistachio.o obj-$(CONFIG_CLKSRC_TI_32K) += timer-ti-32k.o obj-$(CONFIG_CLKSRC_NPS) += timer-nps.o obj-$(CONFIG_OXNAS_RPS_TIMER) += timer-oxnas-rps.o +obj-$(CONFIG_OWL_TIMER) += owl-timer.o obj-$(CONFIG_ARC_TIMERS) += arc_timer.o obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o diff --git a/drivers/clocksource/owl-timer.c b/drivers/clocksource/owl-timer.c new file mode 100644 index 000000000000..4609363a79a6 --- /dev/null +++ b/drivers/clocksource/owl-timer.c @@ -0,0 +1,171 @@ +/* + * Actions Semi Owl timer + * + * Copyright 2012 Actions Semi Inc. + * Author: Actions Semi, Inc. + * + * Copyright (c) 2017 SUSE Linux GmbH + * Author: Andreas Färber + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/clk.h> +#include <linux/clockchips.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/irqreturn.h> +#include <linux/sched_clock.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> + +#define OWL_Tx_CTL 0x0 +#define OWL_Tx_CMP 0x4 +#define OWL_Tx_VAL 0x8 + +#define OWL_Tx_CTL_PD BIT(0) +#define OWL_Tx_CTL_INTEN BIT(1) +#define OWL_Tx_CTL_EN BIT(2) + +static void __iomem *owl_timer_base; +static void __iomem *owl_clksrc_base; +static void __iomem *owl_clkevt_base; + +static inline void owl_timer_reset(void __iomem *base) +{ + writel(0, base + OWL_Tx_CTL); + writel(0, base + OWL_Tx_VAL); + writel(0, base + OWL_Tx_CMP); +} + +static inline void owl_timer_set_enabled(void __iomem *base, bool enabled) +{ + u32 ctl = readl(base + OWL_Tx_CTL); + + /* PD bit is cleared when set */ + ctl &= ~OWL_Tx_CTL_PD; + + if (enabled) + ctl |= OWL_Tx_CTL_EN; + else + ctl &= ~OWL_Tx_CTL_EN; + + writel(ctl, base + OWL_Tx_CTL); +} + +static u64 notrace owl_timer_sched_read(void) +{ + return (u64)readl(owl_clksrc_base + OWL_Tx_VAL); +} + +static int owl_timer_set_state_shutdown(struct clock_event_device *evt) +{ + owl_timer_set_enabled(owl_clkevt_base, false); + + return 0; +} + +static int owl_timer_set_state_oneshot(struct clock_event_device *evt) +{ + owl_timer_reset(owl_clkevt_base); + + return 0; +} + +static int owl_timer_tick_resume(struct clock_event_device *evt) +{ + return 0; +} + +static int owl_timer_set_next_event(unsigned long evt, + struct clock_event_device *ev) +{ + void __iomem *base = owl_clkevt_base; + + owl_timer_set_enabled(base, false); + writel(OWL_Tx_CTL_INTEN, base + OWL_Tx_CTL); + writel(0, base + OWL_Tx_VAL); + writel(evt, base + OWL_Tx_CMP); + owl_timer_set_enabled(base, true); + + return 0; +} + +static struct clock_event_device owl_clockevent = { + .name = "owl_tick", + .rating = 200, + .features = CLOCK_EVT_FEAT_ONESHOT | + CLOCK_EVT_FEAT_DYNIRQ, + .set_state_shutdown = owl_timer_set_state_shutdown, + .set_state_oneshot = owl_timer_set_state_oneshot, + .tick_resume = owl_timer_tick_resume, + .set_next_event = owl_timer_set_next_event, +}; + +static irqreturn_t owl_timer1_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *evt = (struct clock_event_device *)dev_id; + + writel(OWL_Tx_CTL_PD, owl_clkevt_base + OWL_Tx_CTL); + + evt->event_handler(evt); + + return IRQ_HANDLED; +} + +static int __init owl_timer_init(struct device_node *node) +{ + struct clk *clk; + unsigned long rate; + int timer1_irq, ret; + + owl_timer_base = of_io_request_and_map(node, 0, "owl-timer"); + if (IS_ERR(owl_timer_base)) { + pr_err("Can't map timer registers"); + return PTR_ERR(owl_timer_base); + } + + owl_clksrc_base = owl_timer_base + 0x08; + owl_clkevt_base = owl_timer_base + 0x14; + + timer1_irq = of_irq_get_byname(node, "timer1"); + if (timer1_irq <= 0) { + pr_err("Can't parse timer1 IRQ"); + return -EINVAL; + } + + clk = of_clk_get(node, 0); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + rate = clk_get_rate(clk); + + owl_timer_reset(owl_clksrc_base); + owl_timer_set_enabled(owl_clksrc_base, true); + + sched_clock_register(owl_timer_sched_read, 32, rate); + clocksource_mmio_init(owl_clksrc_base + OWL_Tx_VAL, node->name, + rate, 200, 32, clocksource_mmio_readl_up); + + owl_timer_reset(owl_clkevt_base); + + ret = request_irq(timer1_irq, owl_timer1_interrupt, IRQF_TIMER, + "owl-timer", &owl_clockevent); + if (ret) { + pr_err("failed to request irq %d\n", timer1_irq); + return ret; + } + + owl_clockevent.cpumask = cpumask_of(0); + owl_clockevent.irq = timer1_irq; + + clockevents_config_and_register(&owl_clockevent, rate, + 0xf, 0xffffffff); + + return 0; +} +CLOCKSOURCE_OF_DECLARE(owl_s500, "actions,s500-timer", owl_timer_init); -- 2.12.3
WARNING: multiple messages have this Message-ID (diff)
From: afaerber@suse.de (Andreas Färber) To: linux-arm-kernel@lists.infradead.org Subject: [PATCH v4 04/28] clocksource: Add Owl timer Date: Tue, 6 Jun 2017 02:54:02 +0200 [thread overview] Message-ID: <20170606005426.26446-5-afaerber@suse.de> (raw) In-Reply-To: <20170606005426.26446-1-afaerber@suse.de> The Actions Semi S500 SoC provides four timers, 2Hz0/1 and 32-bit TIMER0/1. Use TIMER0 as clocksource and TIMER1 as clockevents. Based on LeMaker linux-actions tree. An S500 datasheet can be found on the LeMaker Guitar pages: http://www.lemaker.org/product-guitar-download-29.html Signed-off-by: Andreas F?rber <afaerber@suse.de> --- v3 -> v4: * Dropped DT-dependent node iteration (Daniel) * Introduced owl_timer_set_enabled() (Daniel) * Fixed one timer reset v2 -> v3: * Cleared interrupt pending flag for Timer1 * Adopted named interrupts for Timer1 * Extended commit message (Daniel) * Adopted BIT() macros (Daniel) * Adopted PTR_ERR() (Daniel) * Adopted request_irq() (Daniel) * Factored timer reset out (Daniel) * Adopted CLOCK_EVT_FEAT_DYNIRQ (Daniel) * Adopted clk input for rate (Daniel) * Prepared for S900, adopting S500 DT compatible v2: new drivers/clocksource/Kconfig | 7 ++ drivers/clocksource/Makefile | 1 + drivers/clocksource/owl-timer.c | 171 ++++++++++++++++++++++++++++++++++++++++ 3 files changed, 179 insertions(+) create mode 100644 drivers/clocksource/owl-timer.c diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig index 4ba230d8e679..da3f1d926c6b 100644 --- a/drivers/clocksource/Kconfig +++ b/drivers/clocksource/Kconfig @@ -102,6 +102,13 @@ config ORION_TIMER help Enables the support for the Orion timer driver +config OWL_TIMER + bool "Owl timer driver" if COMPILE_TEST + depends on GENERIC_CLOCKEVENTS + select CLKSRC_MMIO + help + Enables the support for the Actions Semi Owl timer driver. + config SUN4I_TIMER bool "Sun4i timer driver" if COMPILE_TEST depends on GENERIC_CLOCKEVENTS diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile index ec559212edf6..90309d4a719e 100644 --- a/drivers/clocksource/Makefile +++ b/drivers/clocksource/Makefile @@ -51,6 +51,7 @@ obj-$(CONFIG_CLKSRC_PISTACHIO) += time-pistachio.o obj-$(CONFIG_CLKSRC_TI_32K) += timer-ti-32k.o obj-$(CONFIG_CLKSRC_NPS) += timer-nps.o obj-$(CONFIG_OXNAS_RPS_TIMER) += timer-oxnas-rps.o +obj-$(CONFIG_OWL_TIMER) += owl-timer.o obj-$(CONFIG_ARC_TIMERS) += arc_timer.o obj-$(CONFIG_ARM_ARCH_TIMER) += arm_arch_timer.o diff --git a/drivers/clocksource/owl-timer.c b/drivers/clocksource/owl-timer.c new file mode 100644 index 000000000000..4609363a79a6 --- /dev/null +++ b/drivers/clocksource/owl-timer.c @@ -0,0 +1,171 @@ +/* + * Actions Semi Owl timer + * + * Copyright 2012 Actions Semi Inc. + * Author: Actions Semi, Inc. + * + * Copyright (c) 2017 SUSE Linux GmbH + * Author: Andreas F?rber + * + * This program is free software; you can redistribute it and/or modify it + * under the terms of the GNU General Public License as published by the + * Free Software Foundation; either version 2 of the License, or (at your + * option) any later version. + */ + +#include <linux/clk.h> +#include <linux/clockchips.h> +#include <linux/interrupt.h> +#include <linux/irq.h> +#include <linux/irqreturn.h> +#include <linux/sched_clock.h> +#include <linux/of.h> +#include <linux/of_address.h> +#include <linux/of_irq.h> + +#define OWL_Tx_CTL 0x0 +#define OWL_Tx_CMP 0x4 +#define OWL_Tx_VAL 0x8 + +#define OWL_Tx_CTL_PD BIT(0) +#define OWL_Tx_CTL_INTEN BIT(1) +#define OWL_Tx_CTL_EN BIT(2) + +static void __iomem *owl_timer_base; +static void __iomem *owl_clksrc_base; +static void __iomem *owl_clkevt_base; + +static inline void owl_timer_reset(void __iomem *base) +{ + writel(0, base + OWL_Tx_CTL); + writel(0, base + OWL_Tx_VAL); + writel(0, base + OWL_Tx_CMP); +} + +static inline void owl_timer_set_enabled(void __iomem *base, bool enabled) +{ + u32 ctl = readl(base + OWL_Tx_CTL); + + /* PD bit is cleared when set */ + ctl &= ~OWL_Tx_CTL_PD; + + if (enabled) + ctl |= OWL_Tx_CTL_EN; + else + ctl &= ~OWL_Tx_CTL_EN; + + writel(ctl, base + OWL_Tx_CTL); +} + +static u64 notrace owl_timer_sched_read(void) +{ + return (u64)readl(owl_clksrc_base + OWL_Tx_VAL); +} + +static int owl_timer_set_state_shutdown(struct clock_event_device *evt) +{ + owl_timer_set_enabled(owl_clkevt_base, false); + + return 0; +} + +static int owl_timer_set_state_oneshot(struct clock_event_device *evt) +{ + owl_timer_reset(owl_clkevt_base); + + return 0; +} + +static int owl_timer_tick_resume(struct clock_event_device *evt) +{ + return 0; +} + +static int owl_timer_set_next_event(unsigned long evt, + struct clock_event_device *ev) +{ + void __iomem *base = owl_clkevt_base; + + owl_timer_set_enabled(base, false); + writel(OWL_Tx_CTL_INTEN, base + OWL_Tx_CTL); + writel(0, base + OWL_Tx_VAL); + writel(evt, base + OWL_Tx_CMP); + owl_timer_set_enabled(base, true); + + return 0; +} + +static struct clock_event_device owl_clockevent = { + .name = "owl_tick", + .rating = 200, + .features = CLOCK_EVT_FEAT_ONESHOT | + CLOCK_EVT_FEAT_DYNIRQ, + .set_state_shutdown = owl_timer_set_state_shutdown, + .set_state_oneshot = owl_timer_set_state_oneshot, + .tick_resume = owl_timer_tick_resume, + .set_next_event = owl_timer_set_next_event, +}; + +static irqreturn_t owl_timer1_interrupt(int irq, void *dev_id) +{ + struct clock_event_device *evt = (struct clock_event_device *)dev_id; + + writel(OWL_Tx_CTL_PD, owl_clkevt_base + OWL_Tx_CTL); + + evt->event_handler(evt); + + return IRQ_HANDLED; +} + +static int __init owl_timer_init(struct device_node *node) +{ + struct clk *clk; + unsigned long rate; + int timer1_irq, ret; + + owl_timer_base = of_io_request_and_map(node, 0, "owl-timer"); + if (IS_ERR(owl_timer_base)) { + pr_err("Can't map timer registers"); + return PTR_ERR(owl_timer_base); + } + + owl_clksrc_base = owl_timer_base + 0x08; + owl_clkevt_base = owl_timer_base + 0x14; + + timer1_irq = of_irq_get_byname(node, "timer1"); + if (timer1_irq <= 0) { + pr_err("Can't parse timer1 IRQ"); + return -EINVAL; + } + + clk = of_clk_get(node, 0); + if (IS_ERR(clk)) + return PTR_ERR(clk); + + rate = clk_get_rate(clk); + + owl_timer_reset(owl_clksrc_base); + owl_timer_set_enabled(owl_clksrc_base, true); + + sched_clock_register(owl_timer_sched_read, 32, rate); + clocksource_mmio_init(owl_clksrc_base + OWL_Tx_VAL, node->name, + rate, 200, 32, clocksource_mmio_readl_up); + + owl_timer_reset(owl_clkevt_base); + + ret = request_irq(timer1_irq, owl_timer1_interrupt, IRQF_TIMER, + "owl-timer", &owl_clockevent); + if (ret) { + pr_err("failed to request irq %d\n", timer1_irq); + return ret; + } + + owl_clockevent.cpumask = cpumask_of(0); + owl_clockevent.irq = timer1_irq; + + clockevents_config_and_register(&owl_clockevent, rate, + 0xf, 0xffffffff); + + return 0; +} +CLOCKSOURCE_OF_DECLARE(owl_s500, "actions,s500-timer", owl_timer_init); -- 2.12.3
next prev parent reply other threads:[~2017-06-06 1:01 UTC|newest] Thread overview: 222+ messages / expand[flat|nested] mbox.gz Atom feed top 2017-06-06 0:53 [PATCH v4 00/28] ARM: Initial Actions Semi S500 and S900 enablement Andreas Färber 2017-06-06 0:53 ` Andreas Färber 2017-06-06 0:53 ` Andreas Färber 2017-06-06 0:53 ` [PATCH v4 01/28] dt-bindings: Add vendor prefix for Actions Semi Andreas Färber 2017-06-06 0:53 ` Andreas Färber 2017-06-06 0:53 ` Andreas Färber 2017-06-18 18:46 ` Andreas Färber 2017-06-18 18:46 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 02/28] dt-bindings: arm: Document Actions Semi S500 Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-18 18:48 ` Andreas Färber 2017-06-18 18:48 ` Andreas Färber 2017-06-18 18:48 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 03/28] dt-bindings: timer: Document Owl timer Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-18 20:18 ` Andreas Färber 2017-06-18 20:18 ` Andreas Färber 2017-06-18 20:18 ` Andreas Färber 2017-06-06 0:54 ` Andreas Färber [this message] 2017-06-06 0:54 ` [PATCH v4 04/28] clocksource: Add " Andreas Färber 2017-06-06 16:33 ` Daniel Lezcano 2017-06-06 16:33 ` Daniel Lezcano 2017-06-18 20:43 ` Andreas Färber 2017-06-18 20:43 ` Andreas Färber 2017-06-19 13:53 ` Daniel Lezcano 2017-06-19 13:53 ` Daniel Lezcano 2017-06-19 14:31 ` Andreas Färber 2017-06-19 14:31 ` Andreas Färber 2017-06-21 11:57 ` Daniel Lezcano 2017-06-21 11:57 ` Daniel Lezcano 2017-06-06 0:54 ` [PATCH v4 05/28] clocksource: owl: Add S900 support Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-06 16:34 ` Daniel Lezcano 2017-06-06 16:34 ` Daniel Lezcano 2017-06-18 20:50 ` Andreas Färber 2017-06-18 20:50 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 06/28] ARM: Prepare Actions Semi S500 Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-18 21:21 ` Andreas Färber 2017-06-18 21:21 ` Andreas Färber 2017-07-01 21:41 ` [PATCH] ARM: owl: Drop custom machine Andreas Färber 2017-07-01 21:41 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 07/28] ARM64: Prepare Actions Semi S900 Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-11 13:04 ` Andreas Färber 2017-06-11 13:04 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 08/28] dt-bindings: serial: Document Actions Semi Owl UARTs Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 09/28] tty: serial: Add Actions Semi Owl UART earlycon Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-18 21:45 ` Andreas Färber 2017-06-18 21:45 ` Andreas Färber 2017-06-19 1:16 ` Greg Kroah-Hartman 2017-06-19 1:16 ` Greg Kroah-Hartman 2017-06-19 1:24 ` Andreas Färber 2017-06-19 1:24 ` Andreas Färber 2017-06-19 1:46 ` [PATCH v5 07/26] dt-bindings: serial: Document Actions Semi Owl UARTs Andreas Färber 2017-06-19 1:46 ` Andreas Färber 2017-06-19 1:46 ` Andreas Färber 2017-06-19 1:46 ` [PATCH v5 08/26] tty: serial: Add Actions Semi Owl UART earlycon Andreas Färber 2017-06-19 1:46 ` Andreas Färber 2017-06-19 2:12 ` [PATCH v4 09/28] " Greg Kroah-Hartman 2017-06-19 2:12 ` Greg Kroah-Hartman 2017-06-19 2:26 ` Andreas Färber 2017-06-19 2:26 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 10/28] Documentation: kernel-parameters: Document owl earlycon Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 11/28] ARM: dts: Add Actions Semi S500 and LeMaker Guitar Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-18 22:10 ` Andreas Färber 2017-06-18 22:10 ` Andreas Färber 2017-06-18 22:10 ` Andreas Färber 2017-06-19 1:08 ` [PATCH v5 10/27] " Andreas Färber 2017-06-19 1:08 ` Andreas Färber 2017-06-19 1:08 ` Andreas Färber 2017-06-19 2:01 ` Andreas Färber 2017-06-19 2:01 ` Andreas Färber 2017-06-19 2:01 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 12/28] dt-bindings: Add vendor prefix for uCRobotics Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-18 22:19 ` Andreas Färber 2017-06-18 22:19 ` Andreas Färber 2017-06-18 22:19 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 13/28] dt-bindings: arm: Document Actions Semi S900 Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-18 22:29 ` Andreas Färber 2017-06-18 22:29 ` Andreas Färber 2017-06-18 22:29 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 14/28] ARM64: dts: Add Actions Semi S900 and Bubblegum-96 Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-18 22:40 ` Andreas Färber 2017-06-18 22:40 ` Andreas Färber 2017-06-18 22:40 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 15/28] MAINTAINERS: Add Actions Semi Owl section Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-18 22:49 ` Andreas Färber 2017-06-18 22:49 ` Andreas Färber 2017-06-19 2:44 ` [PATCH v5 13/26] " Andreas Färber 2017-06-19 2:44 ` Andreas Färber 2017-06-26 6:56 ` 答复: " 张天益 2017-06-26 6:56 ` 张天益 2017-06-06 0:54 ` [PATCH v4 16/28] tty: serial: owl: Implement console driver Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-06 13:34 ` Alan Cox 2017-06-06 13:34 ` Alan Cox 2017-06-06 13:34 ` Alan Cox 2017-07-02 20:27 ` Andreas Färber 2017-07-02 20:27 ` Andreas Färber 2017-06-07 14:37 ` Andy Shevchenko 2017-06-07 14:37 ` Andy Shevchenko 2017-06-07 14:37 ` Andy Shevchenko 2017-07-02 22:36 ` Andreas Färber 2017-07-02 22:36 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 17/28] ARM64: dts: actions: s900-bubblegum-96: Add fake uart5 clock Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-09-05 21:29 ` Andreas Färber 2017-09-05 21:29 ` Andreas Färber 2017-09-05 21:29 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 18/28] ARM: dts: s500-guitar-bb-rev-b: Add fake uart3 clock Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-09-05 21:37 ` Andreas Färber 2017-09-05 21:37 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 19/28] dt-bindings: arm: cpus: Add S500 enable-method Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-19 2:09 ` Andreas Färber 2017-06-19 2:09 ` Andreas Färber 2017-06-19 2:09 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 20/28] ARM: owl: Implement CPU enable-method for S500 Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-19 2:11 ` Andreas Färber 2017-06-19 2:11 ` Andreas Färber 2017-06-21 8:16 ` Arnd Bergmann 2017-06-21 8:16 ` Arnd Bergmann 2017-06-21 10:25 ` Arnd Bergmann 2017-06-21 10:25 ` Arnd Bergmann 2017-06-21 16:48 ` Andreas Färber 2017-06-21 16:48 ` Andreas Färber 2017-06-21 18:02 ` Arnd Bergmann 2017-06-21 18:02 ` Arnd Bergmann 2017-06-29 15:07 ` Arnd Bergmann 2017-06-29 15:07 ` Arnd Bergmann 2017-06-29 15:22 ` Andreas Färber 2017-06-29 15:22 ` Andreas Färber 2017-06-29 15:50 ` Arnd Bergmann 2017-06-29 15:50 ` Arnd Bergmann 2017-07-01 21:29 ` [PATCH] ARM: owl: smp: Drop bogus holding pen Andreas Färber 2017-07-01 21:29 ` Andreas Färber 2017-07-03 12:35 ` Arnd Bergmann 2017-07-03 12:35 ` Arnd Bergmann 2017-07-01 4:42 ` 答复: [PATCH v4 20/28] ARM: owl: Implement CPU enable-method for S500 刘炜 2017-07-01 4:42 ` 刘炜 2017-07-01 19:56 ` Andreas Färber 2017-07-01 19:56 ` Andreas Färber 2017-07-03 8:13 ` 刘炜 2017-07-03 8:13 ` 刘炜 2017-07-04 23:32 ` [PATCH] ARM: owl: smp: Drop owl_secondary_boot() Andreas Färber 2017-07-04 23:32 ` Andreas Färber 2017-07-05 2:36 ` Florian Fainelli 2017-07-05 2:36 ` Florian Fainelli 2017-07-06 17:17 ` Andreas Färber 2017-07-06 17:17 ` Andreas Färber 2017-07-06 17:38 ` Alexandre Belloni 2017-07-06 17:38 ` Alexandre Belloni 2017-07-06 19:47 ` Florian Fainelli 2017-07-06 19:47 ` Florian Fainelli 2017-07-07 7:34 ` Gregory CLEMENT 2017-07-07 7:34 ` Gregory CLEMENT 2017-07-07 17:32 ` Florian Fainelli 2017-07-07 17:32 ` Florian Fainelli 2017-07-06 17:39 ` Mark Rutland 2017-07-06 17:39 ` Mark Rutland 2017-07-06 21:16 ` Florian Fainelli 2017-07-06 21:16 ` Florian Fainelli 2017-07-09 21:55 ` Andreas Färber 2017-07-09 21:55 ` Andreas Färber 2017-07-10 4:27 ` Florian Fainelli 2017-07-10 4:27 ` Florian Fainelli 2017-06-06 0:54 ` [PATCH v4 21/28] ARM: dts: s500: Set CPU enable-method Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-19 2:09 ` Andreas Färber 2017-06-19 2:09 ` Andreas Färber 2017-06-19 2:09 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 22/28] dt-bindings: power: Add Owl SPS power domains Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-19 3:36 ` [PATCH v5 20/26] " Andreas Färber 2017-06-19 3:36 ` Andreas Färber 2017-06-19 3:36 ` Andreas Färber 2017-06-19 3:57 ` Andreas Färber 2017-06-19 3:57 ` Andreas Färber 2017-06-19 3:57 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 23/28] soc: actions: Add Owl SPS Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-19 3:40 ` [PATCH v5 21/26] " Andreas Färber 2017-06-19 3:40 ` Andreas Färber 2017-06-19 3:59 ` Andreas Färber 2017-06-19 3:59 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 24/28] MAINTAINERS: Update Actions Semi section with SPS Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-19 3:44 ` [PATCH v5 22/26] " Andreas Färber 2017-06-19 3:44 ` Andreas Färber 2017-06-19 4:00 ` Andreas Färber 2017-06-19 4:00 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 25/28] ARM: dts: s500: Add SPS node Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-19 4:01 ` Andreas Färber 2017-06-19 4:01 ` Andreas Färber 2017-06-19 4:01 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 26/28] ARM: dts: s500: Set power domains for CPU2 and CPU3 Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-07-27 20:58 ` Andreas Färber 2017-07-27 20:58 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 27/28] soc: actions: owl-sps: Factor out owl_sps_set_pg() for power-gating Andreas Färber 2017-06-06 0:54 ` Andreas Färber 2017-06-19 4:12 ` Andreas Färber 2017-06-19 4:12 ` Andreas Färber 2017-06-06 0:54 ` [PATCH v4 28/28] ARM: owl: smp: Implement SPS power-gating for CPU2 and CPU3 Andreas Färber 2017-06-06 0:54 ` Andreas Färber
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