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From: Rob Herring <robh@kernel.org>
To: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
Cc: Thomas Gleixner <tglx@linutronix.de>,
	Jason Cooper <jason@lakedaemon.net>,
	Marc Zyngier <marc.zyngier@arm.com>,
	Mark Rutland <mark.rutland@arm.com>,
	Alexander Stein <alexander.stein@systec-electronic.com>,
	linux-kernel@vger.kernel.org, devicetree@vger.kernel.org
Subject: Re: [RFC] irqchip: add support for LS1021A external interrupt lines
Date: Tue, 12 Dec 2017 17:28:39 -0600	[thread overview]
Message-ID: <20171212232839.yy3jtn6amktqjo4g@rob-hp-laptop> (raw)
In-Reply-To: <1512743580-15358-1-git-send-email-rasmus.villemoes@prevas.dk>

On Fri, Dec 08, 2017 at 03:33:00PM +0100, Rasmus Villemoes wrote:
> The LS1021A allows inverting the polarity of six interrupt lines
> IRQ[0:5] via the scfg_intpcr register, effectively allowing
> IRQ_TYPE_LEVEL_LOW and IRQ_TYPE_EDGE_FALLING for those. We just need to
> check the type, set the relevant bit in INTPCR accordingly, and fixup
> the type argument before calling the GIC's irq_set_type.
> 
> In fact, the power-on-reset value of the INTPCR register is so that all
> six lines have their polarity inverted. Hence any hardware connected to
> those lines is unusable without this: If the line is indeed active low,
> the generic GIC code will reject an irq spec with IRQ_TYPE_LEVEL_LOW,
> while if the line is active high, we must obviously disable the polarity
> inversion before unmasking the interrupt.
> 
> I suspect other layerscape SOCs may have something similar, but I have
> neither hardware nor documentation.
> 
> Since we only need to keep a single pointer in the chip_data (the syscon
> regmap), the code could be a little simpler by dropping the struct
> extirq_chip_data and just store the regmap directly - but I don't know
> if I do need to add a lock or something else to the chip_data, so for
> this RFC I've kept the struct.
> 
> Signed-off-by: Rasmus Villemoes <rasmus.villemoes@prevas.dk>
> ---
> Marc, Alexander, thanks a lot for your hints. This is what I came up
> with, mostly just copy-pasted from the mtk-sysirq case. I've tested
> that it works as expected on my board.
> 
>  .../interrupt-controller/fsl,ls1021a-extirq.txt    |  19 +++

Please split to separate patch.

>  drivers/irqchip/Makefile                           |   1 +
>  drivers/irqchip/irq-ls1021a.c                      | 157 +++++++++++++++++++++
>  3 files changed, 177 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,ls1021a-extirq.txt
>  create mode 100644 drivers/irqchip/irq-ls1021a.c
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls1021a-extirq.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls1021a-extirq.txt
> new file mode 100644
> index 000000000000..53b04b6e1a80
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls1021a-extirq.txt
> @@ -0,0 +1,19 @@
> +* Freescale LS1021A external IRQs
> +
> +The LS1021A supports inverting the polarity of six external interrupt lines.
> +
> +Required properties:
> +- compatible: should be "fsl,ls1021a-extirq"
> +- interrupt-controller: Identifies the node as an interrupt controller
> +- #interrupt-cells: Use the same format as specified by GIC in arm,gic.txt.
> +- interrupt-parent: phandle of GIC.
> +- syscon: phandle of Supplemental Configuration Unit (scfg).

Can this be a child of that node instead?

> +
> +Example:
> +		extirq: interrupt-controller@15701ac {

Unit-address without reg is not valid. Building with W=1 will tell you 
this.

> +			compatible = "fsl,ls1021a-extirq";
> +			#interrupt-cells = <3>;
> +			interrupt-controller;
> +			interrupt-parent = <&gic>;
> +			syscon = <&scfg>;
> +		};

WARNING: multiple messages have this Message-ID (diff)
From: Rob Herring <robh-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>
To: Rasmus Villemoes
	<rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
Cc: Thomas Gleixner <tglx-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>,
	Jason Cooper <jason-NLaQJdtUoK4Be96aLqz0jA@public.gmane.org>,
	Marc Zyngier <marc.zyngier-5wv7dgnIgG8@public.gmane.org>,
	Mark Rutland <mark.rutland-5wv7dgnIgG8@public.gmane.org>,
	Alexander Stein
	<alexander.stein-93q1YBGzJSMe9JSWTWOYM3xStJ4P+DSV@public.gmane.org>,
	linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org,
	devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org
Subject: Re: [RFC] irqchip: add support for LS1021A external interrupt lines
Date: Tue, 12 Dec 2017 17:28:39 -0600	[thread overview]
Message-ID: <20171212232839.yy3jtn6amktqjo4g@rob-hp-laptop> (raw)
In-Reply-To: <1512743580-15358-1-git-send-email-rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>

On Fri, Dec 08, 2017 at 03:33:00PM +0100, Rasmus Villemoes wrote:
> The LS1021A allows inverting the polarity of six interrupt lines
> IRQ[0:5] via the scfg_intpcr register, effectively allowing
> IRQ_TYPE_LEVEL_LOW and IRQ_TYPE_EDGE_FALLING for those. We just need to
> check the type, set the relevant bit in INTPCR accordingly, and fixup
> the type argument before calling the GIC's irq_set_type.
> 
> In fact, the power-on-reset value of the INTPCR register is so that all
> six lines have their polarity inverted. Hence any hardware connected to
> those lines is unusable without this: If the line is indeed active low,
> the generic GIC code will reject an irq spec with IRQ_TYPE_LEVEL_LOW,
> while if the line is active high, we must obviously disable the polarity
> inversion before unmasking the interrupt.
> 
> I suspect other layerscape SOCs may have something similar, but I have
> neither hardware nor documentation.
> 
> Since we only need to keep a single pointer in the chip_data (the syscon
> regmap), the code could be a little simpler by dropping the struct
> extirq_chip_data and just store the regmap directly - but I don't know
> if I do need to add a lock or something else to the chip_data, so for
> this RFC I've kept the struct.
> 
> Signed-off-by: Rasmus Villemoes <rasmus.villemoes-rjjw5hvvQKZaa/9Udqfwiw@public.gmane.org>
> ---
> Marc, Alexander, thanks a lot for your hints. This is what I came up
> with, mostly just copy-pasted from the mtk-sysirq case. I've tested
> that it works as expected on my board.
> 
>  .../interrupt-controller/fsl,ls1021a-extirq.txt    |  19 +++

Please split to separate patch.

>  drivers/irqchip/Makefile                           |   1 +
>  drivers/irqchip/irq-ls1021a.c                      | 157 +++++++++++++++++++++
>  3 files changed, 177 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/interrupt-controller/fsl,ls1021a-extirq.txt
>  create mode 100644 drivers/irqchip/irq-ls1021a.c
> 
> diff --git a/Documentation/devicetree/bindings/interrupt-controller/fsl,ls1021a-extirq.txt b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls1021a-extirq.txt
> new file mode 100644
> index 000000000000..53b04b6e1a80
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/interrupt-controller/fsl,ls1021a-extirq.txt
> @@ -0,0 +1,19 @@
> +* Freescale LS1021A external IRQs
> +
> +The LS1021A supports inverting the polarity of six external interrupt lines.
> +
> +Required properties:
> +- compatible: should be "fsl,ls1021a-extirq"
> +- interrupt-controller: Identifies the node as an interrupt controller
> +- #interrupt-cells: Use the same format as specified by GIC in arm,gic.txt.
> +- interrupt-parent: phandle of GIC.
> +- syscon: phandle of Supplemental Configuration Unit (scfg).

Can this be a child of that node instead?

> +
> +Example:
> +		extirq: interrupt-controller@15701ac {

Unit-address without reg is not valid. Building with W=1 will tell you 
this.

> +			compatible = "fsl,ls1021a-extirq";
> +			#interrupt-cells = <3>;
> +			interrupt-controller;
> +			interrupt-parent = <&gic>;
> +			syscon = <&scfg>;
> +		};
--
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  parent reply	other threads:[~2017-12-12 23:28 UTC|newest]

Thread overview: 60+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-12-04 15:11 polarity inversion on LS1021a Rasmus Villemoes
2017-12-04 15:23 ` Marc Zyngier
2017-12-08 14:33   ` [RFC] irqchip: add support for LS1021A external interrupt lines Rasmus Villemoes
2017-12-08 14:33     ` Rasmus Villemoes
2017-12-08 15:11     ` Alexander Stein
2017-12-08 15:11       ` Alexander Stein
2017-12-08 16:09       ` Marc Zyngier
2017-12-08 16:09         ` Marc Zyngier
2017-12-11  9:08         ` Rasmus Villemoes
2017-12-11  9:08           ` Rasmus Villemoes
2017-12-11  9:45           ` Alexander Stein
2017-12-11  9:45             ` Alexander Stein
2017-12-11 10:02             ` Alexander Stein
2017-12-11 10:02               ` Alexander Stein
2017-12-11 13:45               ` Rasmus Villemoes
2017-12-11 13:45                 ` Rasmus Villemoes
2017-12-11 14:06                 ` Rasmus Villemoes
2017-12-11 14:06                   ` Rasmus Villemoes
2017-12-11 14:38                   ` Alexander Stein
2017-12-11 14:38                     ` Alexander Stein
2017-12-08 16:02     ` Marc Zyngier
2017-12-08 16:02       ` Marc Zyngier
2017-12-11  9:30       ` Rasmus Villemoes
2017-12-11  9:30         ` Rasmus Villemoes
2017-12-11 18:29         ` Marc Zyngier
2017-12-11 18:29           ` Marc Zyngier
2017-12-12 23:28     ` Rob Herring [this message]
2017-12-12 23:28       ` Rob Herring
2017-12-15 22:55       ` Rasmus Villemoes
2017-12-15 22:55         ` Rasmus Villemoes
2017-12-21 22:45         ` Rob Herring
2017-12-21 22:45           ` Rob Herring
2017-12-20  8:30     ` [PATCH v2 1/2] irqchip: add support for Layerscape " Rasmus Villemoes
2017-12-20  8:30       ` [PATCH v2 2/2] dt/bindings: Add bindings for Layerscape external irqs Rasmus Villemoes
2017-12-20  8:30         ` Rasmus Villemoes
2017-12-21 22:44         ` Rob Herring
2017-12-21 22:44           ` Rob Herring
2018-01-22  9:21       ` [PATCH v3 1/2] irqchip: add support for Layerscape external interrupt lines Rasmus Villemoes
2018-01-22  9:21         ` [PATCH v3 2/2] dt/bindings: Add bindings for Layerscape external irqs Rasmus Villemoes
2018-01-22  9:21           ` Rasmus Villemoes
2018-01-24 15:28           ` Marc Zyngier
2018-01-25 15:02         ` [PATCH v4 1/2] irqchip: add support for Layerscape external interrupt lines Rasmus Villemoes
2018-01-25 15:02           ` [PATCH v4 2/2] dt/bindings: Add bindings for Layerscape external irqs Rasmus Villemoes
2018-01-25 15:02             ` Rasmus Villemoes
2018-02-05  6:07             ` Rob Herring
2018-02-05  6:07               ` Rob Herring
2018-02-08 15:08               ` Rasmus Villemoes
2018-02-09  9:47                 ` Marc Zyngier
2018-02-09  9:47                   ` Marc Zyngier
2018-02-23 21:08           ` [PATCH v5 0/2] irqchip: add support for Layerscape external interrupt lines Rasmus Villemoes
2018-02-23 21:08             ` [PATCH v5 1/2] " Rasmus Villemoes
2018-03-01 12:16               ` Thomas Gleixner
2018-05-04  7:44                 ` Rasmus Villemoes
2019-09-17  9:39                   ` Kurt Kanzenbach
2018-02-23 21:09             ` [PATCH v5 2/2] dt/bindings: Add bindings for Layerscape external irqs Rasmus Villemoes
2018-03-02 19:49               ` Rob Herring
2018-05-04  8:07                 ` Rasmus Villemoes
2017-12-04 15:31 ` polarity inversion on LS1021a Alexander Stein
2017-12-04 15:37   ` Marc Zyngier
2017-12-04 16:04     ` Alexander Stein

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