From: Luis Araneda <luaraneda@gmail.com>
To: u-boot@lists.denx.de
Subject: [U-Boot] [RFC PATCH 2/4] drivers: fpga: zynqpl: fix compilation with SPL
Date: Wed, 18 Jul 2018 03:41:39 -0400 [thread overview]
Message-ID: <20180718074141.16539-3-luaraneda@gmail.com> (raw)
In-Reply-To: <20180718074141.16539-1-luaraneda@gmail.com>
Disable the use of function zynq_loadfs when compiling
the driver for the SPL, as the following filesystem
functions are not found by the linker:
- fs_set_blk_dev
- fs_read
- fs_set_blk_dev
- fs_read
- fs_read
Signed-off-by: Luis Araneda <luaraneda@gmail.com>
---
drivers/fpga/zynqpl.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/fpga/zynqpl.c b/drivers/fpga/zynqpl.c
index fd37d18c7f..8e49c7010e 100644
--- a/drivers/fpga/zynqpl.c
+++ b/drivers/fpga/zynqpl.c
@@ -410,7 +410,7 @@ static int zynq_load(xilinx_desc *desc, const void *buf, size_t bsize,
return FPGA_SUCCESS;
}
-#if defined(CONFIG_CMD_FPGA_LOADFS)
+#if defined(CONFIG_CMD_FPGA_LOADFS) && !defined(CONFIG_SPL_BUILD)
static int zynq_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
fpga_fs_info *fsinfo)
{
@@ -493,7 +493,7 @@ static int zynq_loadfs(xilinx_desc *desc, const void *buf, size_t bsize,
struct xilinx_fpga_op zynq_op = {
.load = zynq_load,
-#if defined(CONFIG_CMD_FPGA_LOADFS)
+#if defined(CONFIG_CMD_FPGA_LOADFS) && !defined(CONFIG_SPL_BUILD)
.loadfs = zynq_loadfs,
#endif
};
--
2.18.0
next prev parent reply other threads:[~2018-07-18 7:41 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-18 7:41 [U-Boot] [RFC PATCH 0/4] arm: zynq: implement FPGA load from SPL Luis Araneda
2018-07-18 7:41 ` [U-Boot] [RFC PATCH 1/4] spl: fit: display a message when an FPGA image is loaded Luis Araneda
2018-07-18 13:55 ` Michal Simek
2018-07-18 7:41 ` Luis Araneda [this message]
2018-07-18 13:55 ` [U-Boot] [RFC PATCH 2/4] drivers: fpga: zynqpl: fix compilation with SPL Michal Simek
2018-07-18 7:41 ` [U-Boot] [RFC PATCH 3/4] arm: zynq: spl: fix FPGA initialization Luis Araneda
2018-07-18 13:55 ` Michal Simek
2018-07-18 7:41 ` [U-Boot] [RFC PATCH 4/4] arm: zynq: spl: implement FPGA load from FIT Luis Araneda
2018-07-18 13:22 ` Michal Simek
2018-07-18 18:14 ` Luis Araneda
2018-07-19 6:15 ` Michal Simek
2018-07-19 17:22 ` Luis Araneda
2018-07-20 10:34 ` Michal Simek
2018-07-18 8:00 ` [U-Boot] [RFC PATCH 0/4] arm: zynq: implement FPGA load from SPL Michal Simek
2018-07-18 18:02 ` Luis Araneda
2018-07-19 6:22 ` Michal Simek
2018-07-19 23:37 ` Luis Araneda
2018-07-20 10:38 ` Michal Simek
2018-07-20 16:17 ` Luis Araneda
2018-07-24 13:42 ` Michal Simek
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