[U-Boot] [RFC PATCH 0/4] arm: zynq: implement FPGA load from SPL

[Michal Simek <michal.simek@xilinx.com>]

On 18.7.2018 20:02, Luis Araneda wrote:
> Hi Michal,
> 
> On Wed, Jul 18, 2018 at 4:00 AM Michal Simek <michal.simek@xilinx.com> wrote:
>> Can you please also send defconfig/config changes?
>> Separate patch is fine.
> 
> The changes required to the defconfigs test/support this are:
> CONFIG_SPL_LOAD_FIT=y
> CONFIG_SPL_FPGA_SUPPORT=y
> 
> I didn't send them because just changing the defconfig isn't enough,

It should be enough. It is configuration option and just enabling that
feature. You should still be able to use just u-boot.img in legacy or
fit format without any issue.


> I
> had to manually create a FIT image to replace the default u-boot.img,
> which is generated
> by U-Boot's Makefile.
> The .its file (to generate the FIT image) has the following FPGA node:
> fpga-1 {
>   description = "Zybo Z7-20 FPGA image";
>   data = /incbin/("zybo-z7-20-preboot.bin");
>   type = "fpga";
>   arch = "arm";
>   compression = "none";
>   load = <0x30000000>;
> };

But that's separate issue how to automate building image which contain
fpga.
I think it will be good if you can look at my patch and also compare
boot up time when you setup compression to gzip. I expect some changes
in connection to this code.

	if (IS_ENABLED(CONFIG_SPL_OS_BOOT)	&&
	    IS_ENABLED(CONFIG_SPL_GZIP)		&&
	    image_comp == IH_COMP_GZIP		&&
	    type == IH_TYPE_KERNEL) {

And I would expect that copying smaller fit with unziping bitstream will
be faster then what you have now. Especially on boards which bigger fpga.


> I run-tested the changes on a Zybo Z7-20, and compile-tested on a Zybo.
> 
> I have an idea to automate the FIT generation. The build system could
> scan for the existence of a file, for example
> "board/xilinx/zynq/<board>/preboot.bin", and add the fpga node
> automatically (to .its) if the file exists. Because I think that
> storing .bin files in the U-Boot repository is infeasible. That will
> require additions and modifications to the current way the build
> system works, and I'm still thinking how to implement them.

Take a look at pmufw handling for zynqmp for inspiration. But again
that's different issue and there shouldn't be a problem to enable this
feature without fit generation.

> 
> By the way, sorry for changing the subject, but I realized that you
> use two e-mail accounts. Do you have a preferred one? I'm asking
> because I sent the Zybo-Z7 support series (and the I2C DM one) to the
> @monstr.eu account, which you hasn't responded yet, and this series to
> the @xilinx.com account, which you replied quickly. Maybe you are just
> waiting for other people to review/test it.

My reactions on xilinx.com should be much faster because I am trying to
keep number of emails low compare to my second email where all mailing
lists are coming.
I will look at eeprom series.

Thanks,
Michal