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From: Patchwork <patchwork@emeril.freedesktop.org>
To: Manasi Navare <manasi.d.navare@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.CHECKPATCH: warning for Display Stream Compression enabling on eDP/DP (rev6)
Date: Wed, 24 Oct 2018 22:39:48 -0000	[thread overview]
Message-ID: <20181024223948.6734.44182@emeril.freedesktop.org> (raw)
In-Reply-To: <20181024222840.25683-1-manasi.d.navare@intel.com>

== Series Details ==

Series: Display Stream Compression enabling on eDP/DP (rev6)
URL   : https://patchwork.freedesktop.org/series/47514/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
505058122024 drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming
65c4be454ee2 drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT
3297b44e5b4a drm/i915/dp: Cache the DP/eDP DSC DPCD register set on Hotplug/eDP Init
b2e562b367de drm/dp: DRM DP helper/macros to get DP sink DSC parameters
e2aa0523be2a drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC
-:27: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#27: 
* rename it as SMALL_JOINER since we are not enabling big joiner yet (Anusha)

total: 0 errors, 1 warnings, 0 checks, 132 lines checked
46330d716de4 drm/i915/dp: Validate modes using max Output BPP and slice count when DSC supported
1a54cc15e603 drm/dp: Define payload size for DP SDP PPS packet
bd10384561a7 drm/dsc: Define Display Stream Compression PPS infoframe
-:27: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#27: 
new file mode 100644

total: 0 errors, 1 warnings, 0 checks, 347 lines checked
09e060ef0218 drm/dsc: Define VESA Display Stream Compression Capabilities
-:34: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-developed-by:
#34: 
Co-developed-by: Manasi Navare <manasi.d.navare@intel.com>

-:73: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#73: FILE: include/drm/drm_dsc.h:40:
+	bool convert_rgb;

-:83: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#83: FILE: include/drm/drm_dsc.h:50:
+	bool enable422;

-:108: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#108: FILE: include/drm/drm_dsc.h:75:
+	bool block_pred_enable;

-:136: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#136: FILE: include/drm/drm_dsc.h:103:
+	bool vbr_enable;

-:151: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#151: FILE: include/drm/drm_dsc.h:118:
+	bool native_422;

-:153: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#153: FILE: include/drm/drm_dsc.h:120:
+	bool native_420;

total: 0 errors, 1 warnings, 6 checks, 121 lines checked
00284849c0ea drm/dsc: Define Rate Control values that do not change over configurations
-:42: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Srivatsa, Anusha <anusha.srivatsa@intel.com>'

total: 0 errors, 1 warnings, 0 checks, 12 lines checked
7a5170588817 drm/dsc: Add helpers for DSC picture parameter set infoframes
-:23: WARNING:COMMIT_LOG_LONG_LINE: Possible unwrapped commit description (prefer a maximum 75 chars per line)
#23: 
* Add reference to added kernel-docs in Documentation/gpu/drm-kms-helpers.rst

-:74: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#74: 
new file mode 100644

total: 0 errors, 2 warnings, 0 checks, 287 lines checked
582b014a0f5e drm/i915/dp: Add DSC params and DSC config to intel_crtc_state
-:49: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#49: FILE: drivers/gpu/drm/i915/intel_drv.h:937:
+		bool compression_enable;

-:50: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#50: FILE: drivers/gpu/drm/i915/intel_drv.h:938:
+		bool dsc_split;

total: 0 errors, 0 warnings, 2 checks, 22 lines checked
20570f6b293a drm/i915/dp: Compute DSC pipe config in atomic check
440712b2da5b drm/i915/dp: Do not enable PSR2 if DSC is enabled
195fcfce9a89 drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants
9f0f36374af7 drm/i915/dsc: Define & Compute VESA DSC params
-:65: WARNING:BAD_SIGN_OFF: Non-standard signature: Co-developed-by:
#65: 
Co-developed-by: Manasi Navare <manasi.d.navare@intel.com>

-:92: WARNING:MISSING_SPACE: break quoted strings at a space character
#92: FILE: drivers/gpu/drm/i915/intel_dp.c:2108:
+		DRM_ERROR("Cannot compute valid DSC parameters for Input Bpp = %d"
+			  "Compressed BPP = %d\n",

-:116: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#116: 
new file mode 100644

-:402: CHECK:LINE_SPACING: Please use a blank line after function/struct/union/enum declarations
#402: FILE: drivers/gpu/drm/i915/intel_vdsc.c:282:
+}
+};

total: 0 errors, 3 warnings, 1 checks, 496 lines checked
d6b6d6978a59 drm/i915/dsc: Compute Rate Control parameters for DSC
-:138: CHECK:SPACING: space preferred before that '*' (ctx:VxE)
#138: FILE: drivers/gpu/drm/i915/intel_vdsc.c:411:
+				vdsc_cfg->slice_bpg_offset)*
 				                           ^

-:170: CHECK:LINE_SPACING: Please don't use multiple blank lines
#170: FILE: drivers/gpu/drm/i915/intel_vdsc.c:443:
+
+

total: 0 errors, 0 warnings, 2 checks, 138 lines checked
56c7d38bb119 drm/i915/dp: Enable/Disable DSC in DP Sink
a865b5379b76 drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
3c721d22e6b7 drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling
-:41: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files
#41: FILE: drivers/gpu/drm/i915/i915_drv.h:3490:
+extern void intel_dsc_enable(struct intel_encoder *encoder,

-:109: WARNING:TABSTOP: Statements should start on a tabstop
#109: FILE: drivers/gpu/drm/i915/intel_vdsc.c:621:
+	 if (cpu_transcoder == TRANSCODER_EDP) {

-:353: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#353: FILE: drivers/gpu/drm/i915/intel_vdsc.c:865:
+		rc_buf_thresh_dword[i/4] |= (u32)(vdsc_cfg->rc_buf_thresh[i] <<
 		                     ^

-:356: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#356: FILE: drivers/gpu/drm/i915/intel_vdsc.c:868:
+			 rc_buf_thresh_dword[i/4]);
 			                      ^

-:397: WARNING:LONG_LINE: line over 100 characters
#397: FILE: drivers/gpu/drm/i915/intel_vdsc.c:909:
+		rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset <<

-:397: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#397: FILE: drivers/gpu/drm/i915/intel_vdsc.c:909:
+		rc_range_params_dword[i/2] |= (u32)(((vdsc_cfg->rc_range_params[i].range_bpg_offset <<
 		                       ^

-:404: CHECK:SPACING: spaces preferred around that '/' (ctx:VxV)
#404: FILE: drivers/gpu/drm/i915/intel_vdsc.c:916:
+			 rc_range_params_dword[i/2]);
 			                        ^

-:482: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#482: FILE: drivers/gpu/drm/i915/intel_vdsc.c:994:
+{
+

-:489: WARNING:RETURN_VOID: void function return statements are not generally useful
#489: FILE: drivers/gpu/drm/i915/intel_vdsc.c:1001:
+	return;
+}

total: 0 errors, 3 warnings, 6 checks, 442 lines checked
fb717c355546 drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs
da844dee6b19 drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
230dbd9930ac drm/i915/icl: Add Display Stream Splitter control registers
-:68: WARNING:NO_AUTHOR_SIGN_OFF: Missing Signed-off-by: line by nominal patch author 'Srivatsa, Anusha <anusha.srivatsa@intel.com>'

total: 0 errors, 1 warnings, 0 checks, 39 lines checked
b62bb4e85604 drm/i915/dp: Configure Display stream splitter registers during DSC enable
9200945a117c drm/i915/dp: Disable DSC in source by disabling DSS CTL bits
-:33: CHECK:AVOID_EXTERNS: extern prototypes should be avoided in .h files
#33: FILE: drivers/gpu/drm/i915/i915_drv.h:3492:
+extern void intel_dsc_disable(struct intel_encoder *encoder,

-:109: CHECK:BRACES: Blank lines aren't necessary before a close brace '}'
#109: FILE: drivers/gpu/drm/i915/intel_vdsc.c:1077:
+
+}

total: 0 errors, 0 warnings, 2 checks, 69 lines checked
53854c11c5b4 drm/i915/dsc: Enable and disable appropriate power wells for VDSC
71c628fb823d drm/i915/dsc: Add Per connector debugfs node for DSC support/enable
-:107: WARNING:SYMBOLIC_PERMS: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal permissions '0444'.
#107: FILE: drivers/gpu/drm/i915/i915_debugfs.c:5089:
+		debugfs_create_file("i915_dsc_support", S_IRUGO, root,

-:135: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
#135: FILE: drivers/gpu/drm/i915/intel_drv.h:1201:
+	bool force_dsc_en;

total: 0 errors, 1 warnings, 1 checks, 101 lines checked
0bdf5927b4a1 drm/i915/dsc: Force DSC enable if requested by IGT/userspace

_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  parent reply	other threads:[~2018-10-24 22:39 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-24 22:28 [PATCH v6 00/28] Display Stream Compression enabling on eDP/DP Manasi Navare
2018-10-24 22:28 ` [PATCH v6 01/28] drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming Manasi Navare
2018-10-24 22:28 ` [PATCH v6 02/28] drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT Manasi Navare
2018-10-24 22:28 ` [PATCH v6 03/28] drm/i915/dp: Cache the DP/eDP DSC DPCD register set on Hotplug/eDP Init Manasi Navare
2018-10-24 22:28 ` [PATCH v6 04/28] drm/dp: DRM DP helper/macros to get DP sink DSC parameters Manasi Navare
2018-12-19 18:54   ` [Intel-gfx] " Daniel Vetter
2019-01-30 11:06     ` Daniel Vetter
2019-01-30 18:06       ` Sean Paul
2019-01-30 18:27         ` Manasi Navare
2019-01-30 18:26       ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 05/28] drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC Manasi Navare
2018-10-24 22:28 ` [PATCH v6 06/28] drm/i915/dp: Validate modes using max Output BPP and slice count when DSC supported Manasi Navare
2018-10-24 22:28 ` [PATCH v6 07/28] drm/dp: Define payload size for DP SDP PPS packet Manasi Navare
2018-10-24 22:28 ` [PATCH v6 08/28] drm/dsc: Define Display Stream Compression PPS infoframe Manasi Navare
2018-11-01 16:42   ` Ville Syrjälä
2018-11-01 16:53     ` Ville Syrjälä
2018-11-01 21:48     ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 09/28] drm/dsc: Define VESA Display Stream Compression Capabilities Manasi Navare
2018-10-24 22:28 ` [PATCH v6 10/28] drm/dsc: Define Rate Control values that do not change over configurations Manasi Navare
2018-10-24 22:28 ` [PATCH v6 11/28] drm/dsc: Add helpers for DSC picture parameter set infoframes Manasi Navare
2018-11-01 16:46   ` Ville Syrjälä
2018-11-01 23:54     ` Manasi Navare
2018-11-02  0:23       ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 12/28] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state Manasi Navare
2018-10-30 23:53   ` Manasi Navare
2018-10-31 13:10     ` Ville Syrjälä
2018-10-31 16:05       ` Manasi Navare
2018-10-31 16:13         ` Ville Syrjälä
2018-10-24 22:28 ` [PATCH v6 13/28] drm/i915/dp: Compute DSC pipe config in atomic check Manasi Navare
2018-10-29 20:30   ` Ville Syrjälä
2018-10-29 20:34     ` Ville Syrjälä
2018-10-29 23:08       ` Manasi Navare
2018-10-30 11:46         ` Ville Syrjälä
2018-10-29 21:42     ` Manasi Navare
2018-10-29 22:12     ` Manasi Navare
2018-10-30 11:41       ` Ville Syrjälä
2018-10-24 22:28 ` [PATCH v6 14/28] drm/i915/dp: Do not enable PSR2 if DSC is enabled Manasi Navare
2018-10-24 22:28 ` [PATCH v6 15/28] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants Manasi Navare
2018-10-24 22:28 ` [PATCH v6 16/28] drm/i915/dsc: Define & Compute VESA DSC params Manasi Navare
2018-10-24 22:28 ` [PATCH v6 17/28] drm/i915/dsc: Compute Rate Control parameters for DSC Manasi Navare
2018-10-24 22:28 ` [PATCH v6 18/28] drm/i915/dp: Enable/Disable DSC in DP Sink Manasi Navare
2018-10-25 14:03   ` Ville Syrjälä
2018-10-25 20:11     ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 19/28] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI Manasi Navare
2018-10-24 22:28 ` [PATCH v6 20/28] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling Manasi Navare
2018-10-24 22:28 ` [PATCH v6 21/28] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs Manasi Navare
2018-10-25 14:08   ` Ville Syrjälä
2018-10-29 19:24     ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 22/28] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes Manasi Navare
2018-10-25 14:09   ` Ville Syrjälä
2018-10-25 20:07     ` Manasi Navare
2018-10-30 23:45     ` Manasi Navare
2018-10-31 13:09       ` Ville Syrjälä
2018-10-24 22:28 ` [PATCH v6 23/28] drm/i915/icl: Add Display Stream Splitter control registers Manasi Navare
2018-10-24 22:28 ` [PATCH v6 24/28] drm/i915/dp: Configure Display stream splitter registers during DSC enable Manasi Navare
2018-10-25 14:15   ` Ville Syrjälä
2018-10-25 20:05     ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 25/28] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits Manasi Navare
2018-10-25 14:16   ` Ville Syrjälä
2018-10-25 19:55     ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 26/28] drm/i915/dsc: Enable and disable appropriate power wells for VDSC Manasi Navare
2018-10-25 14:22   ` Ville Syrjälä
2018-10-25 19:41     ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 27/28] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable Manasi Navare
2018-10-24 22:28   ` Lyude Paul
2018-10-25 20:12     ` Manasi Navare
2018-10-29 20:39   ` Ville Syrjälä
2018-10-29 21:35     ` Manasi Navare
2018-10-30 11:26       ` Ville Syrjälä
2018-10-24 22:28 ` [PATCH v6 28/28] drm/i915/dsc: Force DSC enable if requested by IGT/userspace Manasi Navare
2018-10-24 22:39 ` Patchwork [this message]
2018-10-24 22:50 ` ✗ Fi.CI.SPARSE: warning for Display Stream Compression enabling on eDP/DP (rev6) Patchwork
2018-10-24 23:02 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-10-31 23:36 ` [PATCH v6 00/28] Display Stream Compression enabling on eDP/DP Manasi Navare

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