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From: Patchwork <patchwork@emeril.freedesktop.org>
To: Manasi Navare <manasi.d.navare@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.SPARSE: warning for Display Stream Compression enabling on eDP/DP (rev6)
Date: Wed, 24 Oct 2018 22:50:24 -0000	[thread overview]
Message-ID: <20181024225024.6731.37397@emeril.freedesktop.org> (raw)
In-Reply-To: <20181024222840.25683-1-manasi.d.navare@intel.com>

== Series Details ==

Series: Display Stream Compression enabling on eDP/DP (rev6)
URL   : https://patchwork.freedesktop.org/series/47514/
State : warning

== Summary ==

$ dim sparse origin/drm-tip
Sparse version: v0.5.2
Commit: drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming
Okay!

Commit: drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT
Okay!

Commit: drm/i915/dp: Cache the DP/eDP DSC DPCD register set on Hotplug/eDP Init
Okay!

Commit: drm/dp: DRM DP helper/macros to get DP sink DSC parameters
Okay!

Commit: drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC
+drivers/gpu/drm/i915/intel_dp.c:4208:26: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_dp.c:4208:26: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_dp.c:4251:27: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/intel_dp.c:4251:27: warning: expression using sizeof(void)

Commit: drm/i915/dp: Validate modes using max Output BPP and slice count when DSC supported
Okay!

Commit: drm/dp: Define payload size for DP SDP PPS packet
Okay!

Commit: drm/dsc: Define Display Stream Compression PPS infoframe
Okay!

Commit: drm/dsc: Define VESA Display Stream Compression Capabilities
Okay!

Commit: drm/dsc: Define Rate Control values that do not change over configurations
Okay!

Commit: drm/dsc: Add helpers for DSC picture parameter set infoframes
-
+drivers/gpu/drm/drm_dsc.c:195:61:    expected restricted __be16 <noident>
+drivers/gpu/drm/drm_dsc.c:195:61:    got unsigned short [unsigned] [usertype] <noident>
+drivers/gpu/drm/drm_dsc.c:195:61: warning: incorrect type in assignment (different base types)
+drivers/gpu/drm/drm_dsc.c:202:25:    expected unsigned short [unsigned] [usertype] val
+drivers/gpu/drm/drm_dsc.c:202:25:    got restricted __be16 <noident>
+drivers/gpu/drm/drm_dsc.c:202:25: warning: cast from restricted __be16
+drivers/gpu/drm/drm_dsc.c:202:25: warning: cast from restricted __be16
+drivers/gpu/drm/drm_dsc.c:202:25: warning: cast from restricted __be16
+drivers/gpu/drm/drm_dsc.c:202:25: warning: incorrect type in argument 1 (different base types)

Commit: drm/i915/dp: Add DSC params and DSC config to intel_crtc_state
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3707:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3708:16: warning: expression using sizeof(void)

Commit: drm/i915/dp: Compute DSC pipe config in atomic check
+drivers/gpu/drm/i915/intel_dp.c:1932:23: warning: expression using sizeof(void)

Commit: drm/i915/dp: Do not enable PSR2 if DSC is enabled
Okay!

Commit: drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants
Okay!

Commit: drm/i915/dsc: Define & Compute VESA DSC params
+drivers/gpu/drm/i915/intel_vdsc.c:351:17: warning: expression using sizeof(void)
+./include/uapi/linux/perf_event.h:147:56: warning: cast truncates bits from constant value (8000000000000000 becomes 0)

Commit: drm/i915/dsc: Compute Rate Control parameters for DSC
Okay!

Commit: drm/i915/dp: Enable/Disable DSC in DP Sink
Okay!

Commit: drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI
Okay!

Commit: drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3708:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3710:16: warning: expression using sizeof(void)

Commit: drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs
Okay!

Commit: drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes
Okay!

Commit: drm/i915/icl: Add Display Stream Splitter control registers
Okay!

Commit: drm/i915/dp: Configure Display stream splitter registers during DSC enable
Okay!

Commit: drm/i915/dp: Disable DSC in source by disabling DSS CTL bits
-drivers/gpu/drm/i915/selftests/../i915_drv.h:3710:16: warning: expression using sizeof(void)
+drivers/gpu/drm/i915/selftests/../i915_drv.h:3712:16: warning: expression using sizeof(void)

Commit: drm/i915/dsc: Enable and disable appropriate power wells for VDSC
Okay!

Commit: drm/i915/dsc: Add Per connector debugfs node for DSC support/enable
Okay!

Commit: drm/i915/dsc: Force DSC enable if requested by IGT/userspace
Okay!

_______________________________________________
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Intel-gfx@lists.freedesktop.org
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  parent reply	other threads:[~2018-10-24 22:50 UTC|newest]

Thread overview: 74+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-10-24 22:28 [PATCH v6 00/28] Display Stream Compression enabling on eDP/DP Manasi Navare
2018-10-24 22:28 ` [PATCH v6 01/28] drm/i915/dsc: Add slice_row_per_frame in DSC PPS programming Manasi Navare
2018-10-24 22:28 ` [PATCH v6 02/28] drm/dp: Add DP DSC DPCD receiver capability size define and missing SHIFT Manasi Navare
2018-10-24 22:28 ` [PATCH v6 03/28] drm/i915/dp: Cache the DP/eDP DSC DPCD register set on Hotplug/eDP Init Manasi Navare
2018-10-24 22:28 ` [PATCH v6 04/28] drm/dp: DRM DP helper/macros to get DP sink DSC parameters Manasi Navare
2018-12-19 18:54   ` [Intel-gfx] " Daniel Vetter
2019-01-30 11:06     ` Daniel Vetter
2019-01-30 18:06       ` Sean Paul
2019-01-30 18:27         ` Manasi Navare
2019-01-30 18:26       ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 05/28] drm/i915/dp: Add helpers for Compressed BPP and Slice Count for DSC Manasi Navare
2018-10-24 22:28 ` [PATCH v6 06/28] drm/i915/dp: Validate modes using max Output BPP and slice count when DSC supported Manasi Navare
2018-10-24 22:28 ` [PATCH v6 07/28] drm/dp: Define payload size for DP SDP PPS packet Manasi Navare
2018-10-24 22:28 ` [PATCH v6 08/28] drm/dsc: Define Display Stream Compression PPS infoframe Manasi Navare
2018-11-01 16:42   ` Ville Syrjälä
2018-11-01 16:53     ` Ville Syrjälä
2018-11-01 21:48     ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 09/28] drm/dsc: Define VESA Display Stream Compression Capabilities Manasi Navare
2018-10-24 22:28 ` [PATCH v6 10/28] drm/dsc: Define Rate Control values that do not change over configurations Manasi Navare
2018-10-24 22:28 ` [PATCH v6 11/28] drm/dsc: Add helpers for DSC picture parameter set infoframes Manasi Navare
2018-11-01 16:46   ` Ville Syrjälä
2018-11-01 23:54     ` Manasi Navare
2018-11-02  0:23       ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 12/28] drm/i915/dp: Add DSC params and DSC config to intel_crtc_state Manasi Navare
2018-10-30 23:53   ` Manasi Navare
2018-10-31 13:10     ` Ville Syrjälä
2018-10-31 16:05       ` Manasi Navare
2018-10-31 16:13         ` Ville Syrjälä
2018-10-24 22:28 ` [PATCH v6 13/28] drm/i915/dp: Compute DSC pipe config in atomic check Manasi Navare
2018-10-29 20:30   ` Ville Syrjälä
2018-10-29 20:34     ` Ville Syrjälä
2018-10-29 23:08       ` Manasi Navare
2018-10-30 11:46         ` Ville Syrjälä
2018-10-29 21:42     ` Manasi Navare
2018-10-29 22:12     ` Manasi Navare
2018-10-30 11:41       ` Ville Syrjälä
2018-10-24 22:28 ` [PATCH v6 14/28] drm/i915/dp: Do not enable PSR2 if DSC is enabled Manasi Navare
2018-10-24 22:28 ` [PATCH v6 15/28] drm/dsc: Define the DSC 1.1 and 1.2 Line Buffer depth constants Manasi Navare
2018-10-24 22:28 ` [PATCH v6 16/28] drm/i915/dsc: Define & Compute VESA DSC params Manasi Navare
2018-10-24 22:28 ` [PATCH v6 17/28] drm/i915/dsc: Compute Rate Control parameters for DSC Manasi Navare
2018-10-24 22:28 ` [PATCH v6 18/28] drm/i915/dp: Enable/Disable DSC in DP Sink Manasi Navare
2018-10-25 14:03   ` Ville Syrjälä
2018-10-25 20:11     ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 19/28] drm/i915/dsc: Add a power domain for VDSC on eDP/MIPI DSI Manasi Navare
2018-10-24 22:28 ` [PATCH v6 20/28] drm/i915/dp: Configure i915 Picture parameter Set registers during DSC enabling Manasi Navare
2018-10-24 22:28 ` [PATCH v6 21/28] drm/i915/dp: Use the existing write_infoframe() for DSC PPS SDPs Manasi Navare
2018-10-25 14:08   ` Ville Syrjälä
2018-10-29 19:24     ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 22/28] drm/i915/dp: Populate DSC PPS SDP and send PPS infoframes Manasi Navare
2018-10-25 14:09   ` Ville Syrjälä
2018-10-25 20:07     ` Manasi Navare
2018-10-30 23:45     ` Manasi Navare
2018-10-31 13:09       ` Ville Syrjälä
2018-10-24 22:28 ` [PATCH v6 23/28] drm/i915/icl: Add Display Stream Splitter control registers Manasi Navare
2018-10-24 22:28 ` [PATCH v6 24/28] drm/i915/dp: Configure Display stream splitter registers during DSC enable Manasi Navare
2018-10-25 14:15   ` Ville Syrjälä
2018-10-25 20:05     ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 25/28] drm/i915/dp: Disable DSC in source by disabling DSS CTL bits Manasi Navare
2018-10-25 14:16   ` Ville Syrjälä
2018-10-25 19:55     ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 26/28] drm/i915/dsc: Enable and disable appropriate power wells for VDSC Manasi Navare
2018-10-25 14:22   ` Ville Syrjälä
2018-10-25 19:41     ` Manasi Navare
2018-10-24 22:28 ` [PATCH v6 27/28] drm/i915/dsc: Add Per connector debugfs node for DSC support/enable Manasi Navare
2018-10-24 22:28   ` Lyude Paul
2018-10-25 20:12     ` Manasi Navare
2018-10-29 20:39   ` Ville Syrjälä
2018-10-29 21:35     ` Manasi Navare
2018-10-30 11:26       ` Ville Syrjälä
2018-10-24 22:28 ` [PATCH v6 28/28] drm/i915/dsc: Force DSC enable if requested by IGT/userspace Manasi Navare
2018-10-24 22:39 ` ✗ Fi.CI.CHECKPATCH: warning for Display Stream Compression enabling on eDP/DP (rev6) Patchwork
2018-10-24 22:50 ` Patchwork [this message]
2018-10-24 23:02 ` ✗ Fi.CI.BAT: failure " Patchwork
2018-10-31 23:36 ` [PATCH v6 00/28] Display Stream Compression enabling on eDP/DP Manasi Navare

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