* [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
@ 2018-11-25 16:18 ` Hao Zhang
0 siblings, 0 replies; 25+ messages in thread
From: Hao Zhang @ 2018-11-25 16:18 UTC (permalink / raw)
To: linux-arm-kernel
This patch adds Allwinner sun8i pwm binding document.
Signed-off-by: Hao Zhang <hao5781286@gmail.com>
---
.../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
1 file changed, 24 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
new file mode 100644
index 0000000..7531d85
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
@@ -0,0 +1,24 @@
+Allwinner sun8i R40/V40/T3 SoC PWM controller
+
+Required properties:
+ - compatible: Should be one of:
+ - "allwinner,sun8i-r40-pwm"
+ - reg: Physical base address and length of the controller's registers
+ - interrupts: Should contain interrupt.
+ - clocks: From common clock binding, handle to the parent clock.
+ - clock-names: Must contain the clock names described just above.
+ - pwm-channels: PWM channels of the controller.
+ - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
+ the cells format.
+
+Example:
+
+pwm: pwm at 1c23400 {
+ compatible = "allwinner,sun8i-r40-pwm";
+ reg = <0x01c23400 0x400>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc24M>, <&ccu CLK_APB1>;
+ clock-names = "mux-0", "mux-1";
+ pwm-channels = <8>;
+ #pwm-cells = <3>;
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 25+ messages in thread
* [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
@ 2018-11-25 16:18 ` Hao Zhang
0 siblings, 0 replies; 25+ messages in thread
From: Hao Zhang @ 2018-11-25 16:18 UTC (permalink / raw)
To: robh+dt, mark.rutland, maxime.ripard, wens, mturquette, sboyd,
thierry.reding
Cc: linux-gpio, linux-kernel, devicetree, linux-arm-kernel,
linux-pwm, linux-sunxi, hao5781286
This patch adds Allwinner sun8i pwm binding document.
Signed-off-by: Hao Zhang <hao5781286@gmail.com>
---
.../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
1 file changed, 24 insertions(+)
create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
new file mode 100644
index 0000000..7531d85
--- /dev/null
+++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
@@ -0,0 +1,24 @@
+Allwinner sun8i R40/V40/T3 SoC PWM controller
+
+Required properties:
+ - compatible: Should be one of:
+ - "allwinner,sun8i-r40-pwm"
+ - reg: Physical base address and length of the controller's registers
+ - interrupts: Should contain interrupt.
+ - clocks: From common clock binding, handle to the parent clock.
+ - clock-names: Must contain the clock names described just above.
+ - pwm-channels: PWM channels of the controller.
+ - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
+ the cells format.
+
+Example:
+
+pwm: pwm@1c23400 {
+ compatible = "allwinner,sun8i-r40-pwm";
+ reg = <0x01c23400 0x400>;
+ interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&osc24M>, <&ccu CLK_APB1>;
+ clock-names = "mux-0", "mux-1";
+ pwm-channels = <8>;
+ #pwm-cells = <3>;
+};
--
2.7.4
^ permalink raw reply related [flat|nested] 25+ messages in thread
* Re: [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
2018-11-25 16:18 ` Hao Zhang
(?)
@ 2018-11-27 1:57 ` Rob Herring
-1 siblings, 0 replies; 25+ messages in thread
From: Rob Herring @ 2018-11-27 1:57 UTC (permalink / raw)
Cc: robh+dt, mark.rutland, maxime.ripard, wens, mturquette, sboyd,
thierry.reding, linux-gpio, linux-kernel, devicetree,
linux-arm-kernel, linux-pwm, linux-sunxi, hao5781286
On Mon, 26 Nov 2018 00:18:59 +0800, Hao Zhang wrote:
> This patch adds Allwinner sun8i pwm binding document.
>
> Signed-off-by: Hao Zhang <hao5781286@gmail.com>
> ---
> .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
@ 2018-11-27 1:57 ` Rob Herring
0 siblings, 0 replies; 25+ messages in thread
From: Rob Herring @ 2018-11-27 1:57 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, 26 Nov 2018 00:18:59 +0800, Hao Zhang wrote:
> This patch adds Allwinner sun8i pwm binding document.
>
> Signed-off-by: Hao Zhang <hao5781286@gmail.com>
> ---
> .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
@ 2018-11-27 1:57 ` Rob Herring
0 siblings, 0 replies; 25+ messages in thread
From: Rob Herring @ 2018-11-27 1:57 UTC (permalink / raw)
To: Hao Zhang
Cc: robh+dt, mark.rutland, maxime.ripard, wens, mturquette, sboyd,
thierry.reding, linux-gpio, linux-kernel, devicetree,
linux-arm-kernel, linux-pwm, linux-sunxi, hao5781286
On Mon, 26 Nov 2018 00:18:59 +0800, Hao Zhang wrote:
> This patch adds Allwinner sun8i pwm binding document.
>
> Signed-off-by: Hao Zhang <hao5781286@gmail.com>
> ---
> .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
>
Reviewed-by: Rob Herring <robh@kernel.org>
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
2018-11-25 16:18 ` Hao Zhang
@ 2018-11-27 7:04 ` Uwe Kleine-König
-1 siblings, 0 replies; 25+ messages in thread
From: Uwe Kleine-König @ 2018-11-27 7:04 UTC (permalink / raw)
To: Hao Zhang
Cc: robh+dt, mark.rutland, maxime.ripard, wens, mturquette, sboyd,
thierry.reding, linux-gpio, linux-kernel, devicetree,
linux-arm-kernel, linux-pwm, linux-sunxi
Hello,
On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> This patch adds Allwinner sun8i pwm binding document.
>
> Signed-off-by: Hao Zhang <hao5781286@gmail.com>
> ---
> .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> new file mode 100644
> index 0000000..7531d85
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> @@ -0,0 +1,24 @@
> +Allwinner sun8i R40/V40/T3 SoC PWM controller
> +
> +Required properties:
> + - compatible: Should be one of:
> + - "allwinner,sun8i-r40-pwm"
> + - reg: Physical base address and length of the controller's registers
> + - interrupts: Should contain interrupt.
> + - clocks: From common clock binding, handle to the parent clock.
> + - clock-names: Must contain the clock names described just above.
> + - pwm-channels: PWM channels of the controller.
> + - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
> + the cells format.
I wonder why "interrupts" is needed here. I guess this is only needed
for waveform capture? Is this only "optional"? The driver doesn't use
it.
Apart from this interrupts property this is all pretty standard and I
wonder if we could merge several documents into one.
For example Documentation/devicetree/bindings/pwm/pwm-st.txt looks
identically apart from "pwm-channels" being called "st,pwm-num-chan"
there. (It even has an interrupts property. Should the st driver move to
"pwm-channels", too?)
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
@ 2018-11-27 7:04 ` Uwe Kleine-König
0 siblings, 0 replies; 25+ messages in thread
From: Uwe Kleine-König @ 2018-11-27 7:04 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> This patch adds Allwinner sun8i pwm binding document.
>
> Signed-off-by: Hao Zhang <hao5781286@gmail.com>
> ---
> .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> new file mode 100644
> index 0000000..7531d85
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> @@ -0,0 +1,24 @@
> +Allwinner sun8i R40/V40/T3 SoC PWM controller
> +
> +Required properties:
> + - compatible: Should be one of:
> + - "allwinner,sun8i-r40-pwm"
> + - reg: Physical base address and length of the controller's registers
> + - interrupts: Should contain interrupt.
> + - clocks: From common clock binding, handle to the parent clock.
> + - clock-names: Must contain the clock names described just above.
> + - pwm-channels: PWM channels of the controller.
> + - #pwm-cells: Should be 3. See pwm.txt in this directory for a description of
> + the cells format.
I wonder why "interrupts" is needed here. I guess this is only needed
for waveform capture? Is this only "optional"? The driver doesn't use
it.
Apart from this interrupts property this is all pretty standard and I
wonder if we could merge several documents into one.
For example Documentation/devicetree/bindings/pwm/pwm-st.txt looks
identically apart from "pwm-channels" being called "st,pwm-num-chan"
there. (It even has an interrupts property. Should the st driver move to
"pwm-channels", too?)
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
2018-11-25 16:18 ` Hao Zhang
(?)
@ 2018-11-27 7:52 ` Maxime Ripard
-1 siblings, 0 replies; 25+ messages in thread
From: Maxime Ripard @ 2018-11-27 7:52 UTC (permalink / raw)
To: Hao Zhang
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
wens-jdAy2FN1RRM, mturquette-rdvid1DuHRBWk0Htik3J/w,
sboyd-DgEjT+Ai2ygdnm+yROfE0A,
thierry.reding-Re5JQEeQqe8AvxtiuMwx3w,
linux-gpio-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-pwm-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> This patch adds Allwinner sun8i pwm binding document.
>
> Signed-off-by: Hao Zhang <hao5781286-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> new file mode 100644
> index 0000000..7531d85
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> @@ -0,0 +1,24 @@
> +Allwinner sun8i R40/V40/T3 SoC PWM controller
> +
> +Required properties:
> + - compatible: Should be one of:
> + - "allwinner,sun8i-r40-pwm"
> + - reg: Physical base address and length of the controller's registers
> + - interrupts: Should contain interrupt.
> + - clocks: From common clock binding, handle to the parent clock.
> + - clock-names: Must contain the clock names described just above.
You didn't describe those names in that document.
You seem to have used mux-0 and mux-1 for the clock names. I guess we
don't have to use a name there, we can simply use the position to find
out (as long as it's documented in the binding)
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
@ 2018-11-27 7:52 ` Maxime Ripard
0 siblings, 0 replies; 25+ messages in thread
From: Maxime Ripard @ 2018-11-27 7:52 UTC (permalink / raw)
To: linux-arm-kernel
On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> This patch adds Allwinner sun8i pwm binding document.
>
> Signed-off-by: Hao Zhang <hao5781286@gmail.com>
> ---
> .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> new file mode 100644
> index 0000000..7531d85
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> @@ -0,0 +1,24 @@
> +Allwinner sun8i R40/V40/T3 SoC PWM controller
> +
> +Required properties:
> + - compatible: Should be one of:
> + - "allwinner,sun8i-r40-pwm"
> + - reg: Physical base address and length of the controller's registers
> + - interrupts: Should contain interrupt.
> + - clocks: From common clock binding, handle to the parent clock.
> + - clock-names: Must contain the clock names described just above.
You didn't describe those names in that document.
You seem to have used mux-0 and mux-1 for the clock names. I guess we
don't have to use a name there, we can simply use the position to find
out (as long as it's documented in the binding)
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
@ 2018-11-27 7:52 ` Maxime Ripard
0 siblings, 0 replies; 25+ messages in thread
From: Maxime Ripard @ 2018-11-27 7:52 UTC (permalink / raw)
To: Hao Zhang
Cc: robh+dt, mark.rutland, wens, mturquette, sboyd, thierry.reding,
linux-gpio, linux-kernel, devicetree, linux-arm-kernel,
linux-pwm, linux-sunxi
On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> This patch adds Allwinner sun8i pwm binding document.
>
> Signed-off-by: Hao Zhang <hao5781286@gmail.com>
> ---
> .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> new file mode 100644
> index 0000000..7531d85
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> @@ -0,0 +1,24 @@
> +Allwinner sun8i R40/V40/T3 SoC PWM controller
> +
> +Required properties:
> + - compatible: Should be one of:
> + - "allwinner,sun8i-r40-pwm"
> + - reg: Physical base address and length of the controller's registers
> + - interrupts: Should contain interrupt.
> + - clocks: From common clock binding, handle to the parent clock.
> + - clock-names: Must contain the clock names described just above.
You didn't describe those names in that document.
You seem to have used mux-0 and mux-1 for the clock names. I guess we
don't have to use a name there, we can simply use the position to find
out (as long as it's documented in the binding)
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
2018-11-27 7:52 ` Maxime Ripard
@ 2018-11-27 8:35 ` Uwe Kleine-König
-1 siblings, 0 replies; 25+ messages in thread
From: Uwe Kleine-König @ 2018-11-27 8:35 UTC (permalink / raw)
To: Maxime Ripard
Cc: Hao Zhang, robh+dt, mark.rutland, wens, mturquette, sboyd,
thierry.reding, linux-gpio, linux-kernel, devicetree,
linux-arm-kernel, linux-pwm, linux-sunxi
Hello,
On Tue, Nov 27, 2018 at 08:52:26AM +0100, Maxime Ripard wrote:
> On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> > + - clocks: From common clock binding, handle to the parent clock.
> > + - clock-names: Must contain the clock names described just above.
>
> [...]
>
> You seem to have used mux-0 and mux-1 for the clock names. I guess we
> don't have to use a name there, we can simply use the position to find
> out (as long as it's documented in the binding)
I also wondered if the driver relies on the fact that the second clock
is the faster running one. Is this sensible?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-König |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
@ 2018-11-27 8:35 ` Uwe Kleine-König
0 siblings, 0 replies; 25+ messages in thread
From: Uwe Kleine-König @ 2018-11-27 8:35 UTC (permalink / raw)
To: linux-arm-kernel
Hello,
On Tue, Nov 27, 2018 at 08:52:26AM +0100, Maxime Ripard wrote:
> On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> > + - clocks: From common clock binding, handle to the parent clock.
> > + - clock-names: Must contain the clock names described just above.
>
> [...]
>
> You seem to have used mux-0 and mux-1 for the clock names. I guess we
> don't have to use a name there, we can simply use the position to find
> out (as long as it's documented in the binding)
I also wondered if the driver relies on the fact that the second clock
is the faster running one. Is this sensible?
Best regards
Uwe
--
Pengutronix e.K. | Uwe Kleine-K?nig |
Industrial Linux Solutions | http://www.pengutronix.de/ |
^ permalink raw reply [flat|nested] 25+ messages in thread
[parent not found: <20181127083523.pciie2gyaplrwiey-bIcnvbaLZ9MEGnE8C9+IrQ@public.gmane.org>]
* Re: [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
2018-11-27 8:35 ` Uwe Kleine-König
(?)
@ 2018-11-27 10:32 ` Maxime Ripard
-1 siblings, 0 replies; 25+ messages in thread
From: Maxime Ripard @ 2018-11-27 10:32 UTC (permalink / raw)
To: Uwe Kleine-König
Cc: Hao Zhang, robh+dt-DgEjT+Ai2ygdnm+yROfE0A,
mark.rutland-5wv7dgnIgG8, wens-jdAy2FN1RRM,
mturquette-rdvid1DuHRBWk0Htik3J/w, sboyd-DgEjT+Ai2ygdnm+yROfE0A,
thierry.reding-Re5JQEeQqe8AvxtiuMwx3w,
linux-gpio-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-pwm-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
[-- Attachment #1: Type: text/plain, Size: 1269 bytes --]
On Tue, Nov 27, 2018 at 09:35:23AM +0100, Uwe Kleine-König wrote:
> Hello,
>
> On Tue, Nov 27, 2018 at 08:52:26AM +0100, Maxime Ripard wrote:
> > On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> > > + - clocks: From common clock binding, handle to the parent clock.
> > > + - clock-names: Must contain the clock names described just above.
> >
> > [...]
> >
> > You seem to have used mux-0 and mux-1 for the clock names. I guess we
> > don't have to use a name there, we can simply use the position to find
> > out (as long as it's documented in the binding)
>
> I also wondered if the driver relies on the fact that the second clock
> is the faster running one. Is this sensible?
Not really, I'm not sure we can make those expectations in the DT
binding, especially since clock rate can change at runtime.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
--
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[-- Attachment #2: signature.asc --]
[-- Type: application/pgp-signature, Size: 228 bytes --]
^ permalink raw reply [flat|nested] 25+ messages in thread
* [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
@ 2018-11-27 10:32 ` Maxime Ripard
0 siblings, 0 replies; 25+ messages in thread
From: Maxime Ripard @ 2018-11-27 10:32 UTC (permalink / raw)
To: linux-arm-kernel
On Tue, Nov 27, 2018 at 09:35:23AM +0100, Uwe Kleine-K?nig wrote:
> Hello,
>
> On Tue, Nov 27, 2018 at 08:52:26AM +0100, Maxime Ripard wrote:
> > On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> > > + - clocks: From common clock binding, handle to the parent clock.
> > > + - clock-names: Must contain the clock names described just above.
> >
> > [...]
> >
> > You seem to have used mux-0 and mux-1 for the clock names. I guess we
> > don't have to use a name there, we can simply use the position to find
> > out (as long as it's documented in the binding)
>
> I also wondered if the driver relies on the fact that the second clock
> is the faster running one. Is this sensible?
Not really, I'm not sure we can make those expectations in the DT
binding, especially since clock rate can change at runtime.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
@ 2018-11-27 10:32 ` Maxime Ripard
0 siblings, 0 replies; 25+ messages in thread
From: Maxime Ripard @ 2018-11-27 10:32 UTC (permalink / raw)
To: Uwe Kleine-König
Cc: Hao Zhang, robh+dt, mark.rutland, wens, mturquette, sboyd,
thierry.reding, linux-gpio, linux-kernel, devicetree,
linux-arm-kernel, linux-pwm, linux-sunxi
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On Tue, Nov 27, 2018 at 09:35:23AM +0100, Uwe Kleine-König wrote:
> Hello,
>
> On Tue, Nov 27, 2018 at 08:52:26AM +0100, Maxime Ripard wrote:
> > On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> > > + - clocks: From common clock binding, handle to the parent clock.
> > > + - clock-names: Must contain the clock names described just above.
> >
> > [...]
> >
> > You seem to have used mux-0 and mux-1 for the clock names. I guess we
> > don't have to use a name there, we can simply use the position to find
> > out (as long as it's documented in the binding)
>
> I also wondered if the driver relies on the fact that the second clock
> is the faster running one. Is this sensible?
Not really, I'm not sure we can make those expectations in the DT
binding, especially since clock rate can change at runtime.
Maxime
--
Maxime Ripard, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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^ permalink raw reply [flat|nested] 25+ messages in thread
[parent not found: <CAJeuY79RRzTqLpaXSe5d8TuNKGeQeYLbXraRVrZk9HBMYBf1+A@mail.gmail.com>]
* Re: [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
2018-11-25 16:18 ` Hao Zhang
(?)
@ 2018-12-20 17:50 ` Thierry Reding
-1 siblings, 0 replies; 25+ messages in thread
From: Thierry Reding @ 2018-12-20 17:50 UTC (permalink / raw)
To: Hao Zhang
Cc: robh+dt-DgEjT+Ai2ygdnm+yROfE0A, mark.rutland-5wv7dgnIgG8,
maxime.ripard-LDxbnhwyfcJBDgjK7y7TUQ, wens-jdAy2FN1RRM,
mturquette-rdvid1DuHRBWk0Htik3J/w, sboyd-DgEjT+Ai2ygdnm+yROfE0A,
linux-gpio-u79uwXL29TY76Z2rM5mHXA,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
devicetree-u79uwXL29TY76Z2rM5mHXA,
linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r,
linux-pwm-u79uwXL29TY76Z2rM5mHXA,
linux-sunxi-/JYPxA39Uh5TLH3MbocFFw
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On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> This patch adds Allwinner sun8i pwm binding document.
>
> Signed-off-by: Hao Zhang <hao5781286-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> new file mode 100644
> index 0000000..7531d85
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> @@ -0,0 +1,24 @@
> +Allwinner sun8i R40/V40/T3 SoC PWM controller
> +
> +Required properties:
> + - compatible: Should be one of:
> + - "allwinner,sun8i-r40-pwm"
> + - reg: Physical base address and length of the controller's registers
> + - interrupts: Should contain interrupt.
> + - clocks: From common clock binding, handle to the parent clock.
> + - clock-names: Must contain the clock names described just above.
> + - pwm-channels: PWM channels of the controller.
Why do you need this? In the cover letter you say:
"The sun8i R40/T3/V40 PWM has 8 PWM channals ..."
Why does this need to be specified in the DT?
Thierry
^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
@ 2018-12-20 17:50 ` Thierry Reding
0 siblings, 0 replies; 25+ messages in thread
From: Thierry Reding @ 2018-12-20 17:50 UTC (permalink / raw)
To: Hao Zhang
Cc: mark.rutland, devicetree, linux-gpio, maxime.ripard, mturquette,
linux-sunxi, linux-kernel, linux-pwm, sboyd, wens, robh+dt,
linux-arm-kernel
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On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> This patch adds Allwinner sun8i pwm binding document.
>
> Signed-off-by: Hao Zhang <hao5781286@gmail.com>
> ---
> .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> new file mode 100644
> index 0000000..7531d85
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> @@ -0,0 +1,24 @@
> +Allwinner sun8i R40/V40/T3 SoC PWM controller
> +
> +Required properties:
> + - compatible: Should be one of:
> + - "allwinner,sun8i-r40-pwm"
> + - reg: Physical base address and length of the controller's registers
> + - interrupts: Should contain interrupt.
> + - clocks: From common clock binding, handle to the parent clock.
> + - clock-names: Must contain the clock names described just above.
> + - pwm-channels: PWM channels of the controller.
Why do you need this? In the cover letter you say:
"The sun8i R40/T3/V40 PWM has 8 PWM channals ..."
Why does this need to be specified in the DT?
Thierry
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^ permalink raw reply [flat|nested] 25+ messages in thread
* Re: [PATCH v3 1/6] Documentation: ARM: sunxi: pwm: add Allwinner sun8i.
@ 2018-12-20 17:50 ` Thierry Reding
0 siblings, 0 replies; 25+ messages in thread
From: Thierry Reding @ 2018-12-20 17:50 UTC (permalink / raw)
To: Hao Zhang
Cc: robh+dt, mark.rutland, maxime.ripard, wens, mturquette, sboyd,
linux-gpio, linux-kernel, devicetree, linux-arm-kernel,
linux-pwm, linux-sunxi
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On Mon, Nov 26, 2018 at 12:18:59AM +0800, Hao Zhang wrote:
> This patch adds Allwinner sun8i pwm binding document.
>
> Signed-off-by: Hao Zhang <hao5781286@gmail.com>
> ---
> .../devicetree/bindings/pwm/pwm-sun8i.txt | 24 ++++++++++++++++++++++
> 1 file changed, 24 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
>
> diff --git a/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> new file mode 100644
> index 0000000..7531d85
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/pwm/pwm-sun8i.txt
> @@ -0,0 +1,24 @@
> +Allwinner sun8i R40/V40/T3 SoC PWM controller
> +
> +Required properties:
> + - compatible: Should be one of:
> + - "allwinner,sun8i-r40-pwm"
> + - reg: Physical base address and length of the controller's registers
> + - interrupts: Should contain interrupt.
> + - clocks: From common clock binding, handle to the parent clock.
> + - clock-names: Must contain the clock names described just above.
> + - pwm-channels: PWM channels of the controller.
Why do you need this? In the cover letter you say:
"The sun8i R40/T3/V40 PWM has 8 PWM channals ..."
Why does this need to be specified in the DT?
Thierry
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^ permalink raw reply [flat|nested] 25+ messages in thread
[parent not found: <CAJeuY7-StNNDpBPyw1JH5Jmc-NhDw67F6Veh0S2tBTmENCTY8Q@mail.gmail.com>]