From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [PATCH 09/12] drm/i915: Clean up integer types in color code
Date: Thu, 7 Nov 2019 17:17:22 +0200 [thread overview]
Message-ID: <20191107151725.10507-10-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20191107151725.10507-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
A variable called 'i' having an unsigned type is just looking for
trouble, and using a sized type generally makes no sense either.
Change all of them to just plain old int. And do the same for some
'lut_size' variables which generally provide the loop end codition
for 'i'.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 42 ++++++++++------------
1 file changed, 19 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 30c0b939620c..d6a20d7522a9 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -713,9 +713,8 @@ static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state)
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
- const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
const struct drm_color_lut *lut = crtc_state->hw.degamma_lut->data;
- u32 i;
/*
* When setting the auto-increment bit, the hardware seems to
@@ -752,8 +751,7 @@ static void glk_load_degamma_lut_linear(const struct intel_crtc_state *crtc_stat
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
- const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
- u32 i;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
/*
* When setting the auto-increment bit, the hardware seems to
@@ -837,7 +835,7 @@ icl_program_gamma_superfine_segment(const struct intel_crtc_state *crtc_state)
const struct drm_color_lut *lut = blob->data;
struct intel_dsb *dsb = intel_dsb_get(crtc);
enum pipe pipe = crtc->pipe;
- u32 i;
+ int i;
/*
* Program Super Fine segment (let's call it seg1)...
@@ -870,7 +868,7 @@ icl_program_gamma_multi_segment(const struct intel_crtc_state *crtc_state)
const struct drm_color_lut *entry;
struct intel_dsb *dsb = intel_dsb_get(crtc);
enum pipe pipe = crtc->pipe;
- u32 i;
+ int i;
/*
* Program Fine segment (let's call it seg2)...
@@ -1643,7 +1641,7 @@ bool intel_color_lut_equal(struct drm_property_blob *blob1,
}
/* convert hw value with given bit_precision to lut property val */
-static u32 intel_color_lut_pack(u32 val, u32 bit_precision)
+static u32 intel_color_lut_pack(u32 val, int bit_precision)
{
u32 max = 0xffff >> (16 - bit_precision);
@@ -1663,7 +1661,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
+ int i;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * LEGACY_LUT_LENGTH,
@@ -1674,7 +1672,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
- val = I915_READ(PALETTE(pipe, i));
+ u32 val = I915_READ(PALETTE(pipe, i));
lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_RED_MASK, val), 8);
@@ -1700,11 +1698,10 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val1, val2;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * lut_size,
@@ -1715,8 +1712,8 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < lut_size - 1; i++) {
- val1 = I915_READ(PALETTE(pipe, 2 * i + 0));
- val2 = I915_READ(PALETTE(pipe, 2 * i + 1));
+ u32 val1 = I915_READ(PALETTE(pipe, 2 * i + 0));
+ u32 val2 = I915_READ(PALETTE(pipe, 2 * i + 1));
lut[i].red = REG_FIELD_GET(PALETTE_RED_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_RED_MASK, val1);
@@ -1752,11 +1749,10 @@ chv_read_cgm_gamma(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * lut_size,
@@ -1767,6 +1763,8 @@ chv_read_cgm_gamma(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < lut_size; i++) {
+ u32 val;
+
val = I915_READ(CGM_PIPE_GAMMA(pipe, i, 0));
lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
CGM_PIPE_GAMMA_GREEN_MASK, val), 10);
@@ -1797,7 +1795,7 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
+ int i;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * LEGACY_LUT_LENGTH,
@@ -1808,7 +1806,7 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
- val = I915_READ(LGC_PALETTE(pipe, i));
+ u32 val = I915_READ(LGC_PALETTE(pipe, i));
lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_RED_MASK, val), 8);
@@ -1826,11 +1824,10 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * lut_size,
@@ -1841,7 +1838,7 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < lut_size; i++) {
- val = I915_READ(PREC_PALETTE(pipe, i));
+ u32 val = I915_READ(PREC_PALETTE(pipe, i));
lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
PREC_PALETTE_RED_MASK, val), 10);
@@ -1873,11 +1870,10 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- int hw_lut_size = ivb_lut_10_size(prec_index);
+ int i, hw_lut_size = ivb_lut_10_size(prec_index);
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * hw_lut_size,
@@ -1891,7 +1887,7 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
PAL_PREC_AUTO_INCREMENT);
for (i = 0; i < hw_lut_size; i++) {
- val = I915_READ(PREC_PAL_DATA(pipe));
+ u32 val = I915_READ(PREC_PAL_DATA(pipe));
lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
PREC_PAL_DATA_RED_MASK, val), 10);
--
2.23.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
WARNING: multiple messages have this Message-ID (diff)
From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Swati Sharma <swati2.sharma@intel.com>, dri-devel@lists.freedesktop.org
Subject: [PATCH 09/12] drm/i915: Clean up integer types in color code
Date: Thu, 7 Nov 2019 17:17:22 +0200 [thread overview]
Message-ID: <20191107151725.10507-10-ville.syrjala@linux.intel.com> (raw)
Message-ID: <20191107151722.YTNmPqIyrPm85XH9uQgzXQcSMgacbcSWYbTzZLAR98I@z> (raw)
In-Reply-To: <20191107151725.10507-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
A variable called 'i' having an unsigned type is just looking for
trouble, and using a sized type generally makes no sense either.
Change all of them to just plain old int. And do the same for some
'lut_size' variables which generally provide the loop end codition
for 'i'.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 42 ++++++++++------------
1 file changed, 19 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 30c0b939620c..d6a20d7522a9 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -713,9 +713,8 @@ static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state)
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
- const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
const struct drm_color_lut *lut = crtc_state->hw.degamma_lut->data;
- u32 i;
/*
* When setting the auto-increment bit, the hardware seems to
@@ -752,8 +751,7 @@ static void glk_load_degamma_lut_linear(const struct intel_crtc_state *crtc_stat
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
- const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
- u32 i;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
/*
* When setting the auto-increment bit, the hardware seems to
@@ -837,7 +835,7 @@ icl_program_gamma_superfine_segment(const struct intel_crtc_state *crtc_state)
const struct drm_color_lut *lut = blob->data;
struct intel_dsb *dsb = intel_dsb_get(crtc);
enum pipe pipe = crtc->pipe;
- u32 i;
+ int i;
/*
* Program Super Fine segment (let's call it seg1)...
@@ -870,7 +868,7 @@ icl_program_gamma_multi_segment(const struct intel_crtc_state *crtc_state)
const struct drm_color_lut *entry;
struct intel_dsb *dsb = intel_dsb_get(crtc);
enum pipe pipe = crtc->pipe;
- u32 i;
+ int i;
/*
* Program Fine segment (let's call it seg2)...
@@ -1643,7 +1641,7 @@ bool intel_color_lut_equal(struct drm_property_blob *blob1,
}
/* convert hw value with given bit_precision to lut property val */
-static u32 intel_color_lut_pack(u32 val, u32 bit_precision)
+static u32 intel_color_lut_pack(u32 val, int bit_precision)
{
u32 max = 0xffff >> (16 - bit_precision);
@@ -1663,7 +1661,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
+ int i;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * LEGACY_LUT_LENGTH,
@@ -1674,7 +1672,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
- val = I915_READ(PALETTE(pipe, i));
+ u32 val = I915_READ(PALETTE(pipe, i));
lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_RED_MASK, val), 8);
@@ -1700,11 +1698,10 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val1, val2;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * lut_size,
@@ -1715,8 +1712,8 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < lut_size - 1; i++) {
- val1 = I915_READ(PALETTE(pipe, 2 * i + 0));
- val2 = I915_READ(PALETTE(pipe, 2 * i + 1));
+ u32 val1 = I915_READ(PALETTE(pipe, 2 * i + 0));
+ u32 val2 = I915_READ(PALETTE(pipe, 2 * i + 1));
lut[i].red = REG_FIELD_GET(PALETTE_RED_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_RED_MASK, val1);
@@ -1752,11 +1749,10 @@ chv_read_cgm_gamma(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * lut_size,
@@ -1767,6 +1763,8 @@ chv_read_cgm_gamma(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < lut_size; i++) {
+ u32 val;
+
val = I915_READ(CGM_PIPE_GAMMA(pipe, i, 0));
lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
CGM_PIPE_GAMMA_GREEN_MASK, val), 10);
@@ -1797,7 +1795,7 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
+ int i;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * LEGACY_LUT_LENGTH,
@@ -1808,7 +1806,7 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
- val = I915_READ(LGC_PALETTE(pipe, i));
+ u32 val = I915_READ(LGC_PALETTE(pipe, i));
lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_RED_MASK, val), 8);
@@ -1826,11 +1824,10 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * lut_size,
@@ -1841,7 +1838,7 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < lut_size; i++) {
- val = I915_READ(PREC_PALETTE(pipe, i));
+ u32 val = I915_READ(PREC_PALETTE(pipe, i));
lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
PREC_PALETTE_RED_MASK, val), 10);
@@ -1873,11 +1870,10 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- int hw_lut_size = ivb_lut_10_size(prec_index);
+ int i, hw_lut_size = ivb_lut_10_size(prec_index);
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * hw_lut_size,
@@ -1891,7 +1887,7 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
PAL_PREC_AUTO_INCREMENT);
for (i = 0; i < hw_lut_size; i++) {
- val = I915_READ(PREC_PAL_DATA(pipe));
+ u32 val = I915_READ(PREC_PAL_DATA(pipe));
lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
PREC_PAL_DATA_RED_MASK, val), 10);
--
2.23.0
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 09/12] drm/i915: Clean up integer types in color code
Date: Thu, 7 Nov 2019 17:17:22 +0200 [thread overview]
Message-ID: <20191107151725.10507-10-ville.syrjala@linux.intel.com> (raw)
Message-ID: <20191107151722.grGpf9OHh0sWI8ApnN4NwBmr0ILzTzrybj66pyh7G4s@z> (raw)
In-Reply-To: <20191107151725.10507-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
A variable called 'i' having an unsigned type is just looking for
trouble, and using a sized type generally makes no sense either.
Change all of them to just plain old int. And do the same for some
'lut_size' variables which generally provide the loop end codition
for 'i'.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 42 ++++++++++------------
1 file changed, 19 insertions(+), 23 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 30c0b939620c..d6a20d7522a9 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -713,9 +713,8 @@ static void glk_load_degamma_lut(const struct intel_crtc_state *crtc_state)
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
- const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
const struct drm_color_lut *lut = crtc_state->hw.degamma_lut->data;
- u32 i;
/*
* When setting the auto-increment bit, the hardware seems to
@@ -752,8 +751,7 @@ static void glk_load_degamma_lut_linear(const struct intel_crtc_state *crtc_stat
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
- const u32 lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
- u32 i;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.degamma_lut_size;
/*
* When setting the auto-increment bit, the hardware seems to
@@ -837,7 +835,7 @@ icl_program_gamma_superfine_segment(const struct intel_crtc_state *crtc_state)
const struct drm_color_lut *lut = blob->data;
struct intel_dsb *dsb = intel_dsb_get(crtc);
enum pipe pipe = crtc->pipe;
- u32 i;
+ int i;
/*
* Program Super Fine segment (let's call it seg1)...
@@ -870,7 +868,7 @@ icl_program_gamma_multi_segment(const struct intel_crtc_state *crtc_state)
const struct drm_color_lut *entry;
struct intel_dsb *dsb = intel_dsb_get(crtc);
enum pipe pipe = crtc->pipe;
- u32 i;
+ int i;
/*
* Program Fine segment (let's call it seg2)...
@@ -1643,7 +1641,7 @@ bool intel_color_lut_equal(struct drm_property_blob *blob1,
}
/* convert hw value with given bit_precision to lut property val */
-static u32 intel_color_lut_pack(u32 val, u32 bit_precision)
+static u32 intel_color_lut_pack(u32 val, int bit_precision)
{
u32 max = 0xffff >> (16 - bit_precision);
@@ -1663,7 +1661,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
+ int i;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * LEGACY_LUT_LENGTH,
@@ -1674,7 +1672,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
- val = I915_READ(PALETTE(pipe, i));
+ u32 val = I915_READ(PALETTE(pipe, i));
lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_RED_MASK, val), 8);
@@ -1700,11 +1698,10 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val1, val2;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * lut_size,
@@ -1715,8 +1712,8 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < lut_size - 1; i++) {
- val1 = I915_READ(PALETTE(pipe, 2 * i + 0));
- val2 = I915_READ(PALETTE(pipe, 2 * i + 1));
+ u32 val1 = I915_READ(PALETTE(pipe, 2 * i + 0));
+ u32 val2 = I915_READ(PALETTE(pipe, 2 * i + 1));
lut[i].red = REG_FIELD_GET(PALETTE_RED_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_RED_MASK, val1);
@@ -1752,11 +1749,10 @@ chv_read_cgm_gamma(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * lut_size,
@@ -1767,6 +1763,8 @@ chv_read_cgm_gamma(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < lut_size; i++) {
+ u32 val;
+
val = I915_READ(CGM_PIPE_GAMMA(pipe, i, 0));
lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
CGM_PIPE_GAMMA_GREEN_MASK, val), 10);
@@ -1797,7 +1795,7 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
+ int i;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * LEGACY_LUT_LENGTH,
@@ -1808,7 +1806,7 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
- val = I915_READ(LGC_PALETTE(pipe, i));
+ u32 val = I915_READ(LGC_PALETTE(pipe, i));
lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_RED_MASK, val), 8);
@@ -1826,11 +1824,10 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
+ int i, lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * lut_size,
@@ -1841,7 +1838,7 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
lut = blob->data;
for (i = 0; i < lut_size; i++) {
- val = I915_READ(PREC_PALETTE(pipe, i));
+ u32 val = I915_READ(PREC_PALETTE(pipe, i));
lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
PREC_PALETTE_RED_MASK, val), 10);
@@ -1873,11 +1870,10 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
{
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
- int hw_lut_size = ivb_lut_10_size(prec_index);
+ int i, hw_lut_size = ivb_lut_10_size(prec_index);
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
struct drm_color_lut *lut;
- u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
sizeof(struct drm_color_lut) * hw_lut_size,
@@ -1891,7 +1887,7 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
PAL_PREC_AUTO_INCREMENT);
for (i = 0; i < hw_lut_size; i++) {
- val = I915_READ(PREC_PAL_DATA(pipe));
+ u32 val = I915_READ(PREC_PAL_DATA(pipe));
lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
PREC_PAL_DATA_RED_MASK, val), 10);
--
2.23.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
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next prev parent reply other threads:[~2019-11-07 15:17 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-07 15:17 [PATCH 00/12] drm/i915: Gamma cleanups Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 01/12] drm: Inline drm_color_lut_extract() Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:31 ` Kazlauskas, Nicholas
2019-11-07 15:31 ` [Intel-gfx] " Kazlauskas, Nicholas
2019-11-07 15:43 ` Ville Syrjälä
2019-11-07 15:43 ` [Intel-gfx] " Ville Syrjälä
2019-11-07 15:47 ` Kazlauskas, Nicholas
2019-11-07 15:47 ` [Intel-gfx] " Kazlauskas, Nicholas
2019-11-07 17:40 ` Daniel Vetter
2019-11-07 17:40 ` Daniel Vetter
2019-11-08 13:36 ` Ville Syrjälä
2019-11-08 13:36 ` [Intel-gfx] " Ville Syrjälä
2019-11-08 13:36 ` Ville Syrjälä
2019-11-08 16:41 ` Daniel Vetter
2019-11-08 16:41 ` [Intel-gfx] " Daniel Vetter
2019-11-08 16:41 ` Daniel Vetter
2019-11-08 13:56 ` [PATCH v2 " Ville Syrjala
2019-11-08 13:56 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` [PATCH 02/12] drm/i915: Polish CHV .load_luts() a bit Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2020-03-03 14:18 ` Sharma, Swati2
2020-03-03 14:18 ` [Intel-gfx] " Sharma, Swati2
2019-11-07 15:17 ` [PATCH 03/12] drm/i915: Polish CHV CGM CSC loading Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 04/12] drm/i915: Add i9xx_lut_8() Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2020-02-20 11:20 ` Emil Velikov
2020-02-20 11:20 ` Emil Velikov
2020-02-20 13:56 ` Ville Syrjälä
2020-02-20 13:56 ` Ville Syrjälä
2019-11-07 15:17 ` [PATCH 05/12] drm/i915: Clean up i9xx_load_luts_internal() Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 06/12] drm/i915: Split i9xx_read_lut_8() to gmch vs. ilk variants Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 07/12] drm/i915: s/blob_data/lut/ Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 08/12] drm/i915: s/chv_read_cgm_lut/chv_read_cgm_gamma/ Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala [this message]
2019-11-07 15:17 ` [Intel-gfx] [PATCH 09/12] drm/i915: Clean up integer types in color code Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 10/12] drm/i915: Refactor LUT read functions Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` [PATCH 11/12] drm/i915: Fix readout of PIPEGCMAX Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` [PATCH 12/12] drm/i915: Pass the crtc to the low level read_lut() funcs Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 19:17 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Gamma cleanups Patchwork
2019-11-07 19:17 ` [Intel-gfx] " Patchwork
2019-11-07 19:22 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-11-07 19:22 ` [Intel-gfx] " Patchwork
2019-11-07 19:39 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-11-07 19:39 ` [Intel-gfx] " Patchwork
2019-11-08 17:48 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Gamma cleanups (rev2) Patchwork
2019-11-08 17:48 ` [Intel-gfx] " Patchwork
2019-11-08 17:53 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-11-08 17:53 ` [Intel-gfx] " Patchwork
2019-11-08 18:09 ` ✓ Fi.CI.BAT: success " Patchwork
2019-11-08 18:09 ` [Intel-gfx] " Patchwork
2019-11-10 12:13 ` ✓ Fi.CI.IGT: " Patchwork
2019-11-10 12:13 ` [Intel-gfx] " Patchwork
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