From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [PATCH 07/12] drm/i915: s/blob_data/lut/
Date: Thu, 7 Nov 2019 17:17:20 +0200 [thread overview]
Message-ID: <20191107151725.10507-8-ville.syrjala@linux.intel.com> (raw)
In-Reply-To: <20191107151725.10507-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We're talking about LUT contents here so let's call the thing
'lut' rather than 'blob_data'. This is the name the load_lut()
code used before already.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 66 +++++++++++-----------
1 file changed, 33 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 5890e3896f8d..43435ed343f2 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1662,7 +1662,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1671,16 +1671,16 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
val = I915_READ(PALETTE(pipe, i));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_RED_MASK, val), 8);
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_GREEN_MASK, val), 8);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_BLUE_MASK, val), 8);
}
@@ -1703,7 +1703,7 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val1, val2;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1712,25 +1712,25 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < lut_size - 1; i++) {
val1 = I915_READ(PALETTE(pipe, 2 * i + 0));
val2 = I915_READ(PALETTE(pipe, 2 * i + 1));
- blob_data[i].red = REG_FIELD_GET(PALETTE_RED_MASK, val2) << 8 |
+ lut[i].red = REG_FIELD_GET(PALETTE_RED_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_RED_MASK, val1);
- blob_data[i].green = REG_FIELD_GET(PALETTE_GREEN_MASK, val2) << 8 |
+ lut[i].green = REG_FIELD_GET(PALETTE_GREEN_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_GREEN_MASK, val1);
- blob_data[i].blue = REG_FIELD_GET(PALETTE_BLUE_MASK, val2) << 8 |
+ lut[i].blue = REG_FIELD_GET(PALETTE_BLUE_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_BLUE_MASK, val1);
}
- blob_data[i].red = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
+ lut[i].red = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
I915_READ(PIPEGCMAX(pipe, 0)));
- blob_data[i].green = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
+ lut[i].green = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
I915_READ(PIPEGCMAX(pipe, 1)));
- blob_data[i].blue = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
+ lut[i].blue = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
I915_READ(PIPEGCMAX(pipe, 2)));
return blob;
@@ -1755,7 +1755,7 @@ chv_read_cgm_lut(const struct intel_crtc_state *crtc_state)
u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1764,17 +1764,17 @@ chv_read_cgm_lut(const struct intel_crtc_state *crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < lut_size; i++) {
val = I915_READ(CGM_PIPE_GAMMA(pipe, i, 0));
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
CGM_PIPE_GAMMA_GREEN_MASK, val), 10);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
CGM_PIPE_GAMMA_BLUE_MASK, val), 10);
val = I915_READ(CGM_PIPE_GAMMA(pipe, i, 1));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
CGM_PIPE_GAMMA_RED_MASK, val), 10);
}
@@ -1796,7 +1796,7 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1805,16 +1805,16 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
val = I915_READ(LGC_PALETTE(pipe, i));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_RED_MASK, val), 8);
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_GREEN_MASK, val), 8);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_BLUE_MASK, val), 8);
}
@@ -1829,7 +1829,7 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1838,16 +1838,16 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < lut_size; i++) {
val = I915_READ(PREC_PALETTE(pipe, i));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
PREC_PALETTE_RED_MASK, val), 10);
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
PREC_PALETTE_GREEN_MASK, val), 10);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
PREC_PALETTE_BLUE_MASK, val), 10);
}
@@ -1876,7 +1876,7 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
int hw_lut_size = ivb_lut_10_size(prec_index);
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1885,7 +1885,7 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
I915_WRITE(PREC_PAL_INDEX(pipe), prec_index |
PAL_PREC_AUTO_INCREMENT);
@@ -1893,11 +1893,11 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
for (i = 0; i < hw_lut_size; i++) {
val = I915_READ(PREC_PAL_DATA(pipe));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
PREC_PAL_DATA_RED_MASK, val), 10);
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
PREC_PAL_DATA_GREEN_MASK, val), 10);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
PREC_PAL_DATA_BLUE_MASK, val), 10);
}
--
2.23.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
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WARNING: multiple messages have this Message-ID (diff)
From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: Swati Sharma <swati2.sharma@intel.com>, dri-devel@lists.freedesktop.org
Subject: [PATCH 07/12] drm/i915: s/blob_data/lut/
Date: Thu, 7 Nov 2019 17:17:20 +0200 [thread overview]
Message-ID: <20191107151725.10507-8-ville.syrjala@linux.intel.com> (raw)
Message-ID: <20191107151720.8yD8WdcZiNlefwXUmhT3hZTKkAH_rOLRDvU1Hr6ABaA@z> (raw)
In-Reply-To: <20191107151725.10507-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We're talking about LUT contents here so let's call the thing
'lut' rather than 'blob_data'. This is the name the load_lut()
code used before already.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 66 +++++++++++-----------
1 file changed, 33 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 5890e3896f8d..43435ed343f2 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1662,7 +1662,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1671,16 +1671,16 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
val = I915_READ(PALETTE(pipe, i));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_RED_MASK, val), 8);
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_GREEN_MASK, val), 8);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_BLUE_MASK, val), 8);
}
@@ -1703,7 +1703,7 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val1, val2;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1712,25 +1712,25 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < lut_size - 1; i++) {
val1 = I915_READ(PALETTE(pipe, 2 * i + 0));
val2 = I915_READ(PALETTE(pipe, 2 * i + 1));
- blob_data[i].red = REG_FIELD_GET(PALETTE_RED_MASK, val2) << 8 |
+ lut[i].red = REG_FIELD_GET(PALETTE_RED_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_RED_MASK, val1);
- blob_data[i].green = REG_FIELD_GET(PALETTE_GREEN_MASK, val2) << 8 |
+ lut[i].green = REG_FIELD_GET(PALETTE_GREEN_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_GREEN_MASK, val1);
- blob_data[i].blue = REG_FIELD_GET(PALETTE_BLUE_MASK, val2) << 8 |
+ lut[i].blue = REG_FIELD_GET(PALETTE_BLUE_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_BLUE_MASK, val1);
}
- blob_data[i].red = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
+ lut[i].red = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
I915_READ(PIPEGCMAX(pipe, 0)));
- blob_data[i].green = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
+ lut[i].green = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
I915_READ(PIPEGCMAX(pipe, 1)));
- blob_data[i].blue = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
+ lut[i].blue = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
I915_READ(PIPEGCMAX(pipe, 2)));
return blob;
@@ -1755,7 +1755,7 @@ chv_read_cgm_lut(const struct intel_crtc_state *crtc_state)
u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1764,17 +1764,17 @@ chv_read_cgm_lut(const struct intel_crtc_state *crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < lut_size; i++) {
val = I915_READ(CGM_PIPE_GAMMA(pipe, i, 0));
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
CGM_PIPE_GAMMA_GREEN_MASK, val), 10);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
CGM_PIPE_GAMMA_BLUE_MASK, val), 10);
val = I915_READ(CGM_PIPE_GAMMA(pipe, i, 1));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
CGM_PIPE_GAMMA_RED_MASK, val), 10);
}
@@ -1796,7 +1796,7 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1805,16 +1805,16 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
val = I915_READ(LGC_PALETTE(pipe, i));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_RED_MASK, val), 8);
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_GREEN_MASK, val), 8);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_BLUE_MASK, val), 8);
}
@@ -1829,7 +1829,7 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1838,16 +1838,16 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < lut_size; i++) {
val = I915_READ(PREC_PALETTE(pipe, i));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
PREC_PALETTE_RED_MASK, val), 10);
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
PREC_PALETTE_GREEN_MASK, val), 10);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
PREC_PALETTE_BLUE_MASK, val), 10);
}
@@ -1876,7 +1876,7 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
int hw_lut_size = ivb_lut_10_size(prec_index);
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1885,7 +1885,7 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
I915_WRITE(PREC_PAL_INDEX(pipe), prec_index |
PAL_PREC_AUTO_INCREMENT);
@@ -1893,11 +1893,11 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
for (i = 0; i < hw_lut_size; i++) {
val = I915_READ(PREC_PAL_DATA(pipe));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
PREC_PAL_DATA_RED_MASK, val), 10);
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
PREC_PAL_DATA_GREEN_MASK, val), 10);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
PREC_PAL_DATA_BLUE_MASK, val), 10);
}
--
2.23.0
_______________________________________________
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dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: Ville Syrjala <ville.syrjala@linux.intel.com>
To: intel-gfx@lists.freedesktop.org
Cc: dri-devel@lists.freedesktop.org
Subject: [Intel-gfx] [PATCH 07/12] drm/i915: s/blob_data/lut/
Date: Thu, 7 Nov 2019 17:17:20 +0200 [thread overview]
Message-ID: <20191107151725.10507-8-ville.syrjala@linux.intel.com> (raw)
Message-ID: <20191107151720.clzN9h3toll5eGMYfKtzJHAs2MmXL2mo8I_k5pP0j_4@z> (raw)
In-Reply-To: <20191107151725.10507-1-ville.syrjala@linux.intel.com>
From: Ville Syrjälä <ville.syrjala@linux.intel.com>
We're talking about LUT contents here so let's call the thing
'lut' rather than 'blob_data'. This is the name the load_lut()
code used before already.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
---
drivers/gpu/drm/i915/display/intel_color.c | 66 +++++++++++-----------
1 file changed, 33 insertions(+), 33 deletions(-)
diff --git a/drivers/gpu/drm/i915/display/intel_color.c b/drivers/gpu/drm/i915/display/intel_color.c
index 5890e3896f8d..43435ed343f2 100644
--- a/drivers/gpu/drm/i915/display/intel_color.c
+++ b/drivers/gpu/drm/i915/display/intel_color.c
@@ -1662,7 +1662,7 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1671,16 +1671,16 @@ i9xx_read_lut_8(const struct intel_crtc_state *crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
val = I915_READ(PALETTE(pipe, i));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_RED_MASK, val), 8);
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_GREEN_MASK, val), 8);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_BLUE_MASK, val), 8);
}
@@ -1703,7 +1703,7 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val1, val2;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1712,25 +1712,25 @@ i965_read_lut_10p6(const struct intel_crtc_state *crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < lut_size - 1; i++) {
val1 = I915_READ(PALETTE(pipe, 2 * i + 0));
val2 = I915_READ(PALETTE(pipe, 2 * i + 1));
- blob_data[i].red = REG_FIELD_GET(PALETTE_RED_MASK, val2) << 8 |
+ lut[i].red = REG_FIELD_GET(PALETTE_RED_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_RED_MASK, val1);
- blob_data[i].green = REG_FIELD_GET(PALETTE_GREEN_MASK, val2) << 8 |
+ lut[i].green = REG_FIELD_GET(PALETTE_GREEN_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_GREEN_MASK, val1);
- blob_data[i].blue = REG_FIELD_GET(PALETTE_BLUE_MASK, val2) << 8 |
+ lut[i].blue = REG_FIELD_GET(PALETTE_BLUE_MASK, val2) << 8 |
REG_FIELD_GET(PALETTE_BLUE_MASK, val1);
}
- blob_data[i].red = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
+ lut[i].red = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
I915_READ(PIPEGCMAX(pipe, 0)));
- blob_data[i].green = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
+ lut[i].green = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
I915_READ(PIPEGCMAX(pipe, 1)));
- blob_data[i].blue = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
+ lut[i].blue = REG_FIELD_GET(PIPEGCMAX_RGB_MASK,
I915_READ(PIPEGCMAX(pipe, 2)));
return blob;
@@ -1755,7 +1755,7 @@ chv_read_cgm_lut(const struct intel_crtc_state *crtc_state)
u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1764,17 +1764,17 @@ chv_read_cgm_lut(const struct intel_crtc_state *crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < lut_size; i++) {
val = I915_READ(CGM_PIPE_GAMMA(pipe, i, 0));
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
CGM_PIPE_GAMMA_GREEN_MASK, val), 10);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
CGM_PIPE_GAMMA_BLUE_MASK, val), 10);
val = I915_READ(CGM_PIPE_GAMMA(pipe, i, 1));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
CGM_PIPE_GAMMA_RED_MASK, val), 10);
}
@@ -1796,7 +1796,7 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1805,16 +1805,16 @@ ilk_read_lut_8(const struct intel_crtc_state *crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < LEGACY_LUT_LENGTH; i++) {
val = I915_READ(LGC_PALETTE(pipe, i));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_RED_MASK, val), 8);
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_GREEN_MASK, val), 8);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
LGC_PALETTE_BLUE_MASK, val), 8);
}
@@ -1829,7 +1829,7 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
u32 lut_size = INTEL_INFO(dev_priv)->color.gamma_lut_size;
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1838,16 +1838,16 @@ ilk_read_lut_10(const struct intel_crtc_state *crtc_state)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
for (i = 0; i < lut_size; i++) {
val = I915_READ(PREC_PALETTE(pipe, i));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
PREC_PALETTE_RED_MASK, val), 10);
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
PREC_PALETTE_GREEN_MASK, val), 10);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
PREC_PALETTE_BLUE_MASK, val), 10);
}
@@ -1876,7 +1876,7 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
int hw_lut_size = ivb_lut_10_size(prec_index);
enum pipe pipe = crtc->pipe;
struct drm_property_blob *blob;
- struct drm_color_lut *blob_data;
+ struct drm_color_lut *lut;
u32 i, val;
blob = drm_property_create_blob(&dev_priv->drm,
@@ -1885,7 +1885,7 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
if (IS_ERR(blob))
return NULL;
- blob_data = blob->data;
+ lut = blob->data;
I915_WRITE(PREC_PAL_INDEX(pipe), prec_index |
PAL_PREC_AUTO_INCREMENT);
@@ -1893,11 +1893,11 @@ glk_read_lut_10(const struct intel_crtc_state *crtc_state, u32 prec_index)
for (i = 0; i < hw_lut_size; i++) {
val = I915_READ(PREC_PAL_DATA(pipe));
- blob_data[i].red = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].red = intel_color_lut_pack(REG_FIELD_GET(
PREC_PAL_DATA_RED_MASK, val), 10);
- blob_data[i].green = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].green = intel_color_lut_pack(REG_FIELD_GET(
PREC_PAL_DATA_GREEN_MASK, val), 10);
- blob_data[i].blue = intel_color_lut_pack(REG_FIELD_GET(
+ lut[i].blue = intel_color_lut_pack(REG_FIELD_GET(
PREC_PAL_DATA_BLUE_MASK, val), 10);
}
--
2.23.0
_______________________________________________
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next prev parent reply other threads:[~2019-11-07 15:17 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-07 15:17 [PATCH 00/12] drm/i915: Gamma cleanups Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 01/12] drm: Inline drm_color_lut_extract() Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:31 ` Kazlauskas, Nicholas
2019-11-07 15:31 ` [Intel-gfx] " Kazlauskas, Nicholas
2019-11-07 15:43 ` Ville Syrjälä
2019-11-07 15:43 ` [Intel-gfx] " Ville Syrjälä
2019-11-07 15:47 ` Kazlauskas, Nicholas
2019-11-07 15:47 ` [Intel-gfx] " Kazlauskas, Nicholas
2019-11-07 17:40 ` Daniel Vetter
2019-11-07 17:40 ` Daniel Vetter
2019-11-08 13:36 ` Ville Syrjälä
2019-11-08 13:36 ` [Intel-gfx] " Ville Syrjälä
2019-11-08 13:36 ` Ville Syrjälä
2019-11-08 16:41 ` Daniel Vetter
2019-11-08 16:41 ` [Intel-gfx] " Daniel Vetter
2019-11-08 16:41 ` Daniel Vetter
2019-11-08 13:56 ` [PATCH v2 " Ville Syrjala
2019-11-08 13:56 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` [PATCH 02/12] drm/i915: Polish CHV .load_luts() a bit Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2020-03-03 14:18 ` Sharma, Swati2
2020-03-03 14:18 ` [Intel-gfx] " Sharma, Swati2
2019-11-07 15:17 ` [PATCH 03/12] drm/i915: Polish CHV CGM CSC loading Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 04/12] drm/i915: Add i9xx_lut_8() Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2020-02-20 11:20 ` Emil Velikov
2020-02-20 11:20 ` Emil Velikov
2020-02-20 13:56 ` Ville Syrjälä
2020-02-20 13:56 ` Ville Syrjälä
2019-11-07 15:17 ` [PATCH 05/12] drm/i915: Clean up i9xx_load_luts_internal() Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 06/12] drm/i915: Split i9xx_read_lut_8() to gmch vs. ilk variants Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala [this message]
2019-11-07 15:17 ` [Intel-gfx] [PATCH 07/12] drm/i915: s/blob_data/lut/ Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 08/12] drm/i915: s/chv_read_cgm_lut/chv_read_cgm_gamma/ Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 09/12] drm/i915: Clean up integer types in color code Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 10/12] drm/i915: Refactor LUT read functions Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` [PATCH 11/12] drm/i915: Fix readout of PIPEGCMAX Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` [PATCH 12/12] drm/i915: Pass the crtc to the low level read_lut() funcs Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 19:17 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Gamma cleanups Patchwork
2019-11-07 19:17 ` [Intel-gfx] " Patchwork
2019-11-07 19:22 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-11-07 19:22 ` [Intel-gfx] " Patchwork
2019-11-07 19:39 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-11-07 19:39 ` [Intel-gfx] " Patchwork
2019-11-08 17:48 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Gamma cleanups (rev2) Patchwork
2019-11-08 17:48 ` [Intel-gfx] " Patchwork
2019-11-08 17:53 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-11-08 17:53 ` [Intel-gfx] " Patchwork
2019-11-08 18:09 ` ✓ Fi.CI.BAT: success " Patchwork
2019-11-08 18:09 ` [Intel-gfx] " Patchwork
2019-11-10 12:13 ` ✓ Fi.CI.IGT: " Patchwork
2019-11-10 12:13 ` [Intel-gfx] " Patchwork
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