From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Emil Velikov <emil.l.velikov@gmail.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>,
ML dri-devel <dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 04/12] drm/i915: Add i9xx_lut_8()
Date: Thu, 20 Feb 2020 15:56:32 +0200 [thread overview]
Message-ID: <20200220135632.GZ13686@intel.com> (raw)
In-Reply-To: <CACvgo53oWVf2=DGCopMrk0kjqZ+5ULXApEfj99xWZxD8vSUyMA@mail.gmail.com>
On Thu, Feb 20, 2020 at 11:20:05AM +0000, Emil Velikov wrote:
> On Thu, 7 Nov 2019 at 15:17, Ville Syrjala
> <ville.syrjala@linux.intel.com> wrote:
> >
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > We have a nice little helper to compute a single LUT entry
> > for everything except the 8bpc legacy gamma mode. Let's
> > complete the set.
> >
> At a later stage one could rename this & the 10bit one, moving them to
> include/drm/.
> There are other drivers doing the same thing... not sure if that's
> worth it though.
I'd say no. These are specifically about formatting the LUT entry for
the hw register. I don't really see much benefit from sharing code to
compute hw register values across totally different hardware, even if
the bits happen to match by accident.
The only good exception I can think of are cases where said
register value comes more or less straight from some cross
vendor spec.
--
Ville Syrjälä
Intel
_______________________________________________
dri-devel mailing list
dri-devel@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/dri-devel
WARNING: multiple messages have this Message-ID (diff)
From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Emil Velikov <emil.l.velikov@gmail.com>
Cc: Intel Graphics Development <intel-gfx@lists.freedesktop.org>,
ML dri-devel <dri-devel@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 04/12] drm/i915: Add i9xx_lut_8()
Date: Thu, 20 Feb 2020 15:56:32 +0200 [thread overview]
Message-ID: <20200220135632.GZ13686@intel.com> (raw)
In-Reply-To: <CACvgo53oWVf2=DGCopMrk0kjqZ+5ULXApEfj99xWZxD8vSUyMA@mail.gmail.com>
On Thu, Feb 20, 2020 at 11:20:05AM +0000, Emil Velikov wrote:
> On Thu, 7 Nov 2019 at 15:17, Ville Syrjala
> <ville.syrjala@linux.intel.com> wrote:
> >
> > From: Ville Syrjälä <ville.syrjala@linux.intel.com>
> >
> > We have a nice little helper to compute a single LUT entry
> > for everything except the 8bpc legacy gamma mode. Let's
> > complete the set.
> >
> At a later stage one could rename this & the 10bit one, moving them to
> include/drm/.
> There are other drivers doing the same thing... not sure if that's
> worth it though.
I'd say no. These are specifically about formatting the LUT entry for
the hw register. I don't really see much benefit from sharing code to
compute hw register values across totally different hardware, even if
the bits happen to match by accident.
The only good exception I can think of are cases where said
register value comes more or less straight from some cross
vendor spec.
--
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
next prev parent reply other threads:[~2020-02-20 13:56 UTC|newest]
Thread overview: 72+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-11-07 15:17 [PATCH 00/12] drm/i915: Gamma cleanups Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 01/12] drm: Inline drm_color_lut_extract() Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:31 ` Kazlauskas, Nicholas
2019-11-07 15:31 ` [Intel-gfx] " Kazlauskas, Nicholas
2019-11-07 15:43 ` Ville Syrjälä
2019-11-07 15:43 ` [Intel-gfx] " Ville Syrjälä
2019-11-07 15:47 ` Kazlauskas, Nicholas
2019-11-07 15:47 ` [Intel-gfx] " Kazlauskas, Nicholas
2019-11-07 17:40 ` Daniel Vetter
2019-11-07 17:40 ` Daniel Vetter
2019-11-08 13:36 ` Ville Syrjälä
2019-11-08 13:36 ` [Intel-gfx] " Ville Syrjälä
2019-11-08 13:36 ` Ville Syrjälä
2019-11-08 16:41 ` Daniel Vetter
2019-11-08 16:41 ` [Intel-gfx] " Daniel Vetter
2019-11-08 16:41 ` Daniel Vetter
2019-11-08 13:56 ` [PATCH v2 " Ville Syrjala
2019-11-08 13:56 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` [PATCH 02/12] drm/i915: Polish CHV .load_luts() a bit Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2020-03-03 14:18 ` Sharma, Swati2
2020-03-03 14:18 ` [Intel-gfx] " Sharma, Swati2
2019-11-07 15:17 ` [PATCH 03/12] drm/i915: Polish CHV CGM CSC loading Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 04/12] drm/i915: Add i9xx_lut_8() Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2020-02-20 11:20 ` Emil Velikov
2020-02-20 11:20 ` Emil Velikov
2020-02-20 13:56 ` Ville Syrjälä [this message]
2020-02-20 13:56 ` Ville Syrjälä
2019-11-07 15:17 ` [PATCH 05/12] drm/i915: Clean up i9xx_load_luts_internal() Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 06/12] drm/i915: Split i9xx_read_lut_8() to gmch vs. ilk variants Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 07/12] drm/i915: s/blob_data/lut/ Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 08/12] drm/i915: s/chv_read_cgm_lut/chv_read_cgm_gamma/ Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 09/12] drm/i915: Clean up integer types in color code Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 15:17 ` [PATCH 10/12] drm/i915: Refactor LUT read functions Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` [PATCH 11/12] drm/i915: Fix readout of PIPEGCMAX Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` [PATCH 12/12] drm/i915: Pass the crtc to the low level read_lut() funcs Ville Syrjala
2019-11-07 15:17 ` [Intel-gfx] " Ville Syrjala
2019-11-07 15:17 ` Ville Syrjala
2019-11-07 19:17 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Gamma cleanups Patchwork
2019-11-07 19:17 ` [Intel-gfx] " Patchwork
2019-11-07 19:22 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-11-07 19:22 ` [Intel-gfx] " Patchwork
2019-11-07 19:39 ` ✗ Fi.CI.BAT: failure " Patchwork
2019-11-07 19:39 ` [Intel-gfx] " Patchwork
2019-11-08 17:48 ` ✗ Fi.CI.CHECKPATCH: warning for drm/i915: Gamma cleanups (rev2) Patchwork
2019-11-08 17:48 ` [Intel-gfx] " Patchwork
2019-11-08 17:53 ` ✗ Fi.CI.SPARSE: " Patchwork
2019-11-08 17:53 ` [Intel-gfx] " Patchwork
2019-11-08 18:09 ` ✓ Fi.CI.BAT: success " Patchwork
2019-11-08 18:09 ` [Intel-gfx] " Patchwork
2019-11-10 12:13 ` ✓ Fi.CI.IGT: " Patchwork
2019-11-10 12:13 ` [Intel-gfx] " Patchwork
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