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From: Lucas De Marchi <lucas.demarchi@intel.com>
To: Ramalingam C <ramalingam.c@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>,
	intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH 1/1] drm/i915/tgl: Implement Wa_1604555607
Date: Thu, 21 Nov 2019 10:29:09 -0800	[thread overview]
Message-ID: <20191121182909.g2qajp2nqtrirms4@ldmartin-desk1> (raw)
In-Reply-To: <20191121111231.9552-1-ramalingam.c@intel.com>

On Thu, Nov 21, 2019 at 04:42:31PM +0530, Ramalingam C wrote:
>+	/* Wa_1604555607:tgl */
>+	val = intel_uncore_read(engine->uncore, FF_MODE2);
>+	val &= ~FF_MODE2_TDS_TIMER_MASK;
>+	val |= FF_MODE2_TDS_TIMER_128;
>+	__wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val,
>+			     IS_TGL_REVID(engine->i915, 0, TGL_REVID_A0) ? 0:

isn't it broken until B0 rather than only on A0? I think we could just
disable the read back for all revs and then selectively enable it
for later.

Lucas De Marchi
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

WARNING: multiple messages have this Message-ID (diff)
From: Lucas De Marchi <lucas.demarchi@intel.com>
To: Ramalingam C <ramalingam.c@intel.com>
Cc: Michel Thierry <michel.thierry@intel.com>,
	intel-gfx <intel-gfx@lists.freedesktop.org>
Subject: Re: [Intel-gfx] [PATCH 1/1] drm/i915/tgl: Implement Wa_1604555607
Date: Thu, 21 Nov 2019 10:29:09 -0800	[thread overview]
Message-ID: <20191121182909.g2qajp2nqtrirms4@ldmartin-desk1> (raw)
Message-ID: <20191121182909.sy_5zvzMJ-UVf4zWk1EmX6-b3pye2-pvcPgIxf1peLY@z> (raw)
In-Reply-To: <20191121111231.9552-1-ramalingam.c@intel.com>

On Thu, Nov 21, 2019 at 04:42:31PM +0530, Ramalingam C wrote:
>+	/* Wa_1604555607:tgl */
>+	val = intel_uncore_read(engine->uncore, FF_MODE2);
>+	val &= ~FF_MODE2_TDS_TIMER_MASK;
>+	val |= FF_MODE2_TDS_TIMER_128;
>+	__wa_write_masked_or(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val,
>+			     IS_TGL_REVID(engine->i915, 0, TGL_REVID_A0) ? 0:

isn't it broken until B0 rather than only on A0? I think we could just
disable the read back for all revs and then selectively enable it
for later.

Lucas De Marchi
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx

  reply	other threads:[~2019-11-21 18:29 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2019-11-21 10:12 [PATCH 0/1] Wa_1604555607 implementation and verification skip Ramalingam C
2019-11-21 10:12 ` [Intel-gfx] " Ramalingam C
2019-11-21 10:12 ` [PATCH 1/1] drm/i915/tgl: Implement Wa_1604555607 Ramalingam C
2019-11-21 10:12   ` [Intel-gfx] " Ramalingam C
2019-11-21 10:19   ` Chris Wilson
2019-11-21 10:19     ` [Intel-gfx] " Chris Wilson
2019-11-21 10:51     ` Ramalingam C
2019-11-21 10:51       ` [Intel-gfx] " Ramalingam C
2019-11-21 10:19   ` Tvrtko Ursulin
2019-11-21 10:19     ` [Intel-gfx] " Tvrtko Ursulin
2019-11-21 11:12   ` Ramalingam C
2019-11-21 11:12     ` [Intel-gfx] " Ramalingam C
2019-11-21 18:29     ` Lucas De Marchi [this message]
2019-11-21 18:29       ` Lucas De Marchi
2019-11-22  3:27       ` Ramalingam C
2019-11-22  3:27         ` [Intel-gfx] " Ramalingam C
2019-11-21 14:32 ` ✗ Fi.CI.CHECKPATCH: warning for Wa_1604555607 implementation and verification skip (rev5) Patchwork
2019-11-21 14:32   ` [Intel-gfx] " Patchwork
2019-11-21 15:03 ` ✓ Fi.CI.BAT: success " Patchwork
2019-11-21 15:03   ` [Intel-gfx] " Patchwork
2019-11-22  4:02 [PATCH 0/1] Wa_1604555607 implementation and verification skip Ramalingam C
2019-11-22  4:02 ` [PATCH 1/1] drm/i915/tgl: Implement Wa_1604555607 Ramalingam C
2019-11-22  9:21   ` Tvrtko Ursulin
2019-11-22  9:29     ` Chris Wilson
2019-11-26  8:00       ` Ramalingam C
2019-11-26  9:38       ` Lucas De Marchi
2019-11-26 10:10         ` Ramalingam C

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