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From: "Ramuthevar,Vadivel MuruganX"  <vadivel.muruganx.ramuthevar@linux.intel.com>
To: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
	devicetree@vger.kernel.org
Cc: miquel.raynal@bootlin.com, richard@nod.at, vigneshr@ti.com,
	arnd@arndb.de, brendanhiggins@google.com, tglx@linutronix.de,
	boris.brezillon@collabora.com, anders.roxell@linaro.org,
	masonccyang@mxic.com.tw, piotrs@cadence.com, robh+dt@kernel.org,
	andriy.shevchenko@intel.com, qi-ming.wu@intel.com,
	cheol.yong.kim@intel.com,
	"Ramuthevar,Vadivel MuruganX" 
	<vadivel.muruganx.ramuthevar@linux.intel.com>
Subject: [PATCH v1 0/2]  mtd: rawnand: Add NAND controller support on Intel LGM SoC
Date: Tue, 14 Apr 2020 10:24:31 +0800	[thread overview]
Message-ID: <20200414022433.36622-1-vadivel.muruganx.ramuthevar@linux.intel.com> (raw)

This patch adds the new IP of NAND Flash Controller support on Intel's
Lightning Mountain(LGM) SoC.

DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8 supported,Data register used to support the read/write
operation from/to device.

The NAND controller Subsystem consisting of LGM + ECC-NAND controller supports:
NAND Flash Features :
-16/8-bit data bus
  Page + OOB Bytes
- 512  + (2 - 13) bytes per page page
- 2048 + (7 - 210) bytes per page
- 4096 + (13 - 420) bytes per page
- 8192 + (26 - 840) bytes per page

- Support 32/64/128/256/512/1024/2048/4096/8192/16384/32768 Mbytes flash device
- ECC calculation/generation and verification on-the-fly

Ramuthevar Vadivel Murugan (2):
  dt-bindings: mtd: Add YAML for Nand Flash Controller support
  mtd: rawnand: Add NAND controller support on Intel LGM SoC

 .../devicetree/bindings/mtd/intel,lgm-nand.yaml    |  61 ++
 drivers/mtd/nand/raw/Kconfig                       |   7 +
 drivers/mtd/nand/raw/Makefile                      |   1 +
 drivers/mtd/nand/raw/intel_lgm_nand.c              | 678 +++++++++++++++++++++
 4 files changed, 747 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml
 create mode 100644 drivers/mtd/nand/raw/intel_lgm_nand.c

-- 
2.11.0


WARNING: multiple messages have this Message-ID (diff)
From: "Ramuthevar, Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>
To: linux-kernel@vger.kernel.org, linux-mtd@lists.infradead.org,
	devicetree@vger.kernel.org
Cc: cheol.yong.kim@intel.com, andriy.shevchenko@intel.com,
	qi-ming.wu@intel.com, anders.roxell@linaro.org, vigneshr@ti.com,
	arnd@arndb.de, richard@nod.at, brendanhiggins@google.com,
	robh+dt@kernel.org, "Ramuthevar,
	Vadivel MuruganX" <vadivel.muruganx.ramuthevar@linux.intel.com>,
	boris.brezillon@collabora.com, miquel.raynal@bootlin.com,
	tglx@linutronix.de, masonccyang@mxic.com.tw, piotrs@cadence.com
Subject: [PATCH v1 0/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC
Date: Tue, 14 Apr 2020 10:24:31 +0800	[thread overview]
Message-ID: <20200414022433.36622-1-vadivel.muruganx.ramuthevar@linux.intel.com> (raw)

This patch adds the new IP of NAND Flash Controller support on Intel's
Lightning Mountain(LGM) SoC.

DMA is used for burst data transfer operation, also DMA HW supports
aligned 32bit memory address and aligned data access by default.
DMA burst of 8 supported,Data register used to support the read/write
operation from/to device.

The NAND controller Subsystem consisting of LGM + ECC-NAND controller supports:
NAND Flash Features :
-16/8-bit data bus
  Page + OOB Bytes
- 512  + (2 - 13) bytes per page page
- 2048 + (7 - 210) bytes per page
- 4096 + (13 - 420) bytes per page
- 8192 + (26 - 840) bytes per page

- Support 32/64/128/256/512/1024/2048/4096/8192/16384/32768 Mbytes flash device
- ECC calculation/generation and verification on-the-fly

Ramuthevar Vadivel Murugan (2):
  dt-bindings: mtd: Add YAML for Nand Flash Controller support
  mtd: rawnand: Add NAND controller support on Intel LGM SoC

 .../devicetree/bindings/mtd/intel,lgm-nand.yaml    |  61 ++
 drivers/mtd/nand/raw/Kconfig                       |   7 +
 drivers/mtd/nand/raw/Makefile                      |   1 +
 drivers/mtd/nand/raw/intel_lgm_nand.c              | 678 +++++++++++++++++++++
 4 files changed, 747 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mtd/intel,lgm-nand.yaml
 create mode 100644 drivers/mtd/nand/raw/intel_lgm_nand.c

-- 
2.11.0


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

             reply	other threads:[~2020-04-14  2:25 UTC|newest]

Thread overview: 52+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-14  2:24 Ramuthevar,Vadivel MuruganX [this message]
2020-04-14  2:24 ` [PATCH v1 0/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC Ramuthevar, Vadivel MuruganX
2020-04-14  2:24 ` [PATCH v1 1/2] dt-bindings: mtd: Add YAML for Nand Flash Controller support Ramuthevar,Vadivel MuruganX
2020-04-14  2:24   ` Ramuthevar, Vadivel MuruganX
2020-04-14  7:04   ` Boris Brezillon
2020-04-14  7:04     ` Boris Brezillon
2020-04-15  1:51     ` Ramuthevar, Vadivel MuruganX
2020-04-15  1:51       ` Ramuthevar, Vadivel MuruganX
2020-04-14  2:24 ` [PATCH v1 2/2] mtd: rawnand: Add NAND controller support on Intel LGM SoC Ramuthevar,Vadivel MuruganX
2020-04-14  2:24   ` Ramuthevar, Vadivel MuruganX
2020-04-14  7:21   ` Boris Brezillon
2020-04-14  7:21     ` Boris Brezillon
2020-04-15  6:01     ` Ramuthevar, Vadivel MuruganX
2020-04-15  6:01       ` Ramuthevar, Vadivel MuruganX
2020-04-15 22:05   ` Martin Blumenstingl
2020-04-15 22:05     ` Martin Blumenstingl
2020-04-16  9:35     ` Ramuthevar, Vadivel MuruganX
2020-04-16  9:35       ` Ramuthevar, Vadivel MuruganX
2020-04-16  9:38       ` Boris Brezillon
2020-04-16  9:38         ` Boris Brezillon
2020-04-16  9:45         ` Ramuthevar, Vadivel MuruganX
2020-04-16  9:45           ` Ramuthevar, Vadivel MuruganX
2020-04-16 10:26           ` Boris Brezillon
2020-04-16 10:26             ` Boris Brezillon
2020-04-16 10:40             ` Ramuthevar, Vadivel MuruganX
2020-04-16 10:40               ` Ramuthevar, Vadivel MuruganX
2020-04-16 11:17               ` Boris Brezillon
2020-04-16 11:17                 ` Boris Brezillon
2020-04-16 11:32                 ` Andy Shevchenko
2020-04-16 11:32                   ` Andy Shevchenko
2020-04-17  5:10                   ` Ramuthevar, Vadivel MuruganX
2020-04-17  5:10                     ` Ramuthevar, Vadivel MuruganX
     [not found]                 ` <de9f50b8-9215-d294-9914-e49701552185@linux.intel.com>
2020-04-16 11:57                   ` Boris Brezillon
2020-04-16 11:57                     ` Boris Brezillon
2020-04-16 12:26                     ` Andy Shevchenko
2020-04-16 12:26                       ` Andy Shevchenko
2020-04-16 12:40                       ` Boris Brezillon
2020-04-16 12:40                         ` Boris Brezillon
2020-04-16 13:20                         ` Arnd Bergmann
2020-04-16 13:20                           ` Arnd Bergmann
2020-04-16 13:51                           ` John Crispin
2020-04-16 13:51                             ` John Crispin
2020-04-20  1:09                           ` Ramuthevar, Vadivel MuruganX
2020-04-20  1:09                             ` Ramuthevar, Vadivel MuruganX
2020-04-16 18:08                     ` Martin Blumenstingl
2020-04-16 18:08                       ` Martin Blumenstingl
2020-04-17  5:21                     ` Ramuthevar, Vadivel MuruganX
2020-04-17  5:21                       ` Ramuthevar, Vadivel MuruganX
2020-04-17  7:02                       ` Boris Brezillon
2020-04-17  7:02                         ` Boris Brezillon
2020-04-17  7:53                         ` Ramuthevar, Vadivel MuruganX
2020-04-17  7:53                           ` Ramuthevar, Vadivel MuruganX

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