From: Joerg Roedel <joro@8bytes.org> To: x86@kernel.org Cc: hpa@zytor.com, Andy Lutomirski <luto@kernel.org>, Dave Hansen <dave.hansen@linux.intel.com>, Peter Zijlstra <peterz@infradead.org>, Thomas Hellstrom <thellstrom@vmware.com>, Jiri Slaby <jslaby@suse.cz>, Dan Williams <dan.j.williams@intel.com>, Tom Lendacky <thomas.lendacky@amd.com>, Juergen Gross <jgross@suse.com>, Kees Cook <keescook@chromium.org>, David Rientjes <rientjes@google.com>, Cfir Cohen <cfir@google.com>, Erdem Aktas <erdemaktas@google.com>, Masami Hiramatsu <mhiramat@kernel.org>, Mike Stunes <mstunes@vmware.com>, Joerg Roedel <joro@8bytes.org>, Joerg Roedel <jroedel@suse.de>, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, virtualization@lists.linux-foundation.org Subject: [PATCH v3 38/75] x86/sev-es: Add SEV-ES Feature Detection Date: Tue, 28 Apr 2020 17:16:48 +0200 [thread overview] Message-ID: <20200428151725.31091-39-joro@8bytes.org> (raw) In-Reply-To: <20200428151725.31091-1-joro@8bytes.org> From: Joerg Roedel <jroedel@suse.de> Add the sev_es_active function for checking whether SEV-ES is enabled. Also cache the value of MSR_AMD64_SEV at boot to speed up the feature checking in the running code. Signed-off-by: Joerg Roedel <jroedel@suse.de> --- arch/x86/include/asm/mem_encrypt.h | 3 +++ arch/x86/include/asm/msr-index.h | 2 ++ arch/x86/mm/mem_encrypt.c | 10 +++++++++- arch/x86/mm/mem_encrypt_identity.c | 3 +++ 4 files changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h index 848ce43b9040..6f61bb93366a 100644 --- a/arch/x86/include/asm/mem_encrypt.h +++ b/arch/x86/include/asm/mem_encrypt.h @@ -19,6 +19,7 @@ #ifdef CONFIG_AMD_MEM_ENCRYPT extern u64 sme_me_mask; +extern u64 sev_status; extern bool sev_enabled; void sme_encrypt_execute(unsigned long encrypted_kernel_vaddr, @@ -49,6 +50,7 @@ void __init mem_encrypt_free_decrypted_mem(void); bool sme_active(void); bool sev_active(void); +bool sev_es_active(void); #define __bss_decrypted __attribute__((__section__(".bss..decrypted"))) @@ -71,6 +73,7 @@ static inline void __init sme_enable(struct boot_params *bp) { } static inline bool sme_active(void) { return false; } static inline bool sev_active(void) { return false; } +static inline bool sev_es_active(void) { return false; } static inline int __init early_set_memory_decrypted(unsigned long vaddr, unsigned long size) { return 0; } diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 198aa06778ce..22b35e15b8e0 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -444,7 +444,9 @@ #define MSR_AMD64_SEV_ES_GHCB 0xc0010130 #define MSR_AMD64_SEV 0xc0010131 #define MSR_AMD64_SEV_ENABLED_BIT 0 +#define MSR_AMD64_SEV_ES_ENABLED_BIT 1 #define MSR_AMD64_SEV_ENABLED BIT_ULL(MSR_AMD64_SEV_ENABLED_BIT) +#define MSR_AMD64_SEV_ES_ENABLED BIT_ULL(MSR_AMD64_SEV_ES_ENABLED_BIT) #define MSR_AMD64_VIRT_SPEC_CTRL 0xc001011f diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index a03614bd3e1a..3e59fcd7f9ac 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -38,6 +38,7 @@ * section is later cleared. */ u64 sme_me_mask __section(.data) = 0; +u64 sev_status __section(.data) = 0; EXPORT_SYMBOL(sme_me_mask); DEFINE_STATIC_KEY_FALSE(sev_enable_key); EXPORT_SYMBOL_GPL(sev_enable_key); @@ -347,9 +348,16 @@ bool sme_active(void) bool sev_active(void) { - return sme_me_mask && sev_enabled; + return !!(sev_status & MSR_AMD64_SEV_ENABLED); } +bool sev_es_active(void) +{ + return !!(sev_status & MSR_AMD64_SEV_ES_ENABLED); +} +EXPORT_SYMBOL_GPL(sev_es_active); + + /* Override for DMA direct allocation check - ARCH_HAS_FORCE_DMA_UNENCRYPTED */ bool force_dma_unencrypted(struct device *dev) { diff --git a/arch/x86/mm/mem_encrypt_identity.c b/arch/x86/mm/mem_encrypt_identity.c index e2b0e2ac07bb..68d75379e06a 100644 --- a/arch/x86/mm/mem_encrypt_identity.c +++ b/arch/x86/mm/mem_encrypt_identity.c @@ -540,6 +540,9 @@ void __init sme_enable(struct boot_params *bp) if (!(msr & MSR_AMD64_SEV_ENABLED)) return; + /* Save SEV_STATUS to avoid reading MSR again */ + sev_status = msr; + /* SEV state cannot be controlled by a command line option */ sme_me_mask = me_mask; sev_enabled = true; -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Joerg Roedel <joro@8bytes.org> To: x86@kernel.org Cc: Juergen Gross <jgross@suse.com>, Tom Lendacky <thomas.lendacky@amd.com>, Thomas Hellstrom <thellstrom@vmware.com>, Joerg Roedel <jroedel@suse.de>, Mike Stunes <mstunes@vmware.com>, Kees Cook <keescook@chromium.org>, kvm@vger.kernel.org, Peter Zijlstra <peterz@infradead.org>, Cfir Cohen <cfir@google.com>, Joerg Roedel <joro@8bytes.org>, Dave Hansen <dave.hansen@linux.intel.com>, linux-kernel@vger.kernel.org, virtualization@lists.linux-foundation.org, Masami Hiramatsu <mhiramat@kernel.org>, Andy Lutomirski <luto@kernel.org>, hpa@zytor.com, Erdem Aktas <erdemaktas@google.com>, David Rientjes <rientjes@google.com>, Dan Williams <dan.j.williams@intel.com>, Jiri Slaby <jslaby@suse.cz> Subject: [PATCH v3 38/75] x86/sev-es: Add SEV-ES Feature Detection Date: Tue, 28 Apr 2020 17:16:48 +0200 [thread overview] Message-ID: <20200428151725.31091-39-joro@8bytes.org> (raw) In-Reply-To: <20200428151725.31091-1-joro@8bytes.org> From: Joerg Roedel <jroedel@suse.de> Add the sev_es_active function for checking whether SEV-ES is enabled. Also cache the value of MSR_AMD64_SEV at boot to speed up the feature checking in the running code. Signed-off-by: Joerg Roedel <jroedel@suse.de> --- arch/x86/include/asm/mem_encrypt.h | 3 +++ arch/x86/include/asm/msr-index.h | 2 ++ arch/x86/mm/mem_encrypt.c | 10 +++++++++- arch/x86/mm/mem_encrypt_identity.c | 3 +++ 4 files changed, 17 insertions(+), 1 deletion(-) diff --git a/arch/x86/include/asm/mem_encrypt.h b/arch/x86/include/asm/mem_encrypt.h index 848ce43b9040..6f61bb93366a 100644 --- a/arch/x86/include/asm/mem_encrypt.h +++ b/arch/x86/include/asm/mem_encrypt.h @@ -19,6 +19,7 @@ #ifdef CONFIG_AMD_MEM_ENCRYPT extern u64 sme_me_mask; +extern u64 sev_status; extern bool sev_enabled; void sme_encrypt_execute(unsigned long encrypted_kernel_vaddr, @@ -49,6 +50,7 @@ void __init mem_encrypt_free_decrypted_mem(void); bool sme_active(void); bool sev_active(void); +bool sev_es_active(void); #define __bss_decrypted __attribute__((__section__(".bss..decrypted"))) @@ -71,6 +73,7 @@ static inline void __init sme_enable(struct boot_params *bp) { } static inline bool sme_active(void) { return false; } static inline bool sev_active(void) { return false; } +static inline bool sev_es_active(void) { return false; } static inline int __init early_set_memory_decrypted(unsigned long vaddr, unsigned long size) { return 0; } diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 198aa06778ce..22b35e15b8e0 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h @@ -444,7 +444,9 @@ #define MSR_AMD64_SEV_ES_GHCB 0xc0010130 #define MSR_AMD64_SEV 0xc0010131 #define MSR_AMD64_SEV_ENABLED_BIT 0 +#define MSR_AMD64_SEV_ES_ENABLED_BIT 1 #define MSR_AMD64_SEV_ENABLED BIT_ULL(MSR_AMD64_SEV_ENABLED_BIT) +#define MSR_AMD64_SEV_ES_ENABLED BIT_ULL(MSR_AMD64_SEV_ES_ENABLED_BIT) #define MSR_AMD64_VIRT_SPEC_CTRL 0xc001011f diff --git a/arch/x86/mm/mem_encrypt.c b/arch/x86/mm/mem_encrypt.c index a03614bd3e1a..3e59fcd7f9ac 100644 --- a/arch/x86/mm/mem_encrypt.c +++ b/arch/x86/mm/mem_encrypt.c @@ -38,6 +38,7 @@ * section is later cleared. */ u64 sme_me_mask __section(.data) = 0; +u64 sev_status __section(.data) = 0; EXPORT_SYMBOL(sme_me_mask); DEFINE_STATIC_KEY_FALSE(sev_enable_key); EXPORT_SYMBOL_GPL(sev_enable_key); @@ -347,9 +348,16 @@ bool sme_active(void) bool sev_active(void) { - return sme_me_mask && sev_enabled; + return !!(sev_status & MSR_AMD64_SEV_ENABLED); } +bool sev_es_active(void) +{ + return !!(sev_status & MSR_AMD64_SEV_ES_ENABLED); +} +EXPORT_SYMBOL_GPL(sev_es_active); + + /* Override for DMA direct allocation check - ARCH_HAS_FORCE_DMA_UNENCRYPTED */ bool force_dma_unencrypted(struct device *dev) { diff --git a/arch/x86/mm/mem_encrypt_identity.c b/arch/x86/mm/mem_encrypt_identity.c index e2b0e2ac07bb..68d75379e06a 100644 --- a/arch/x86/mm/mem_encrypt_identity.c +++ b/arch/x86/mm/mem_encrypt_identity.c @@ -540,6 +540,9 @@ void __init sme_enable(struct boot_params *bp) if (!(msr & MSR_AMD64_SEV_ENABLED)) return; + /* Save SEV_STATUS to avoid reading MSR again */ + sev_status = msr; + /* SEV state cannot be controlled by a command line option */ sme_me_mask = me_mask; sev_enabled = true; -- 2.17.1
next prev parent reply other threads:[~2020-04-28 15:22 UTC|newest] Thread overview: 210+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-04-28 15:16 [PATCH v3 00/75] x86: SEV-ES Guest Support Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 01/75] KVM: SVM: Add GHCB definitions Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 02/75] KVM: SVM: Add GHCB Accessor functions Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 03/75] KVM: SVM: Use __packed shorthand Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-29 10:12 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 04/75] x86/cpufeatures: Add SEV-ES CPU feature Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 05/75] x86/traps: Move some definitions to <asm/trap_defs.h> Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 06/75] x86/insn: Make inat-tables.c suitable for pre-decompression code Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 07/75] x86/umip: Factor out instruction fetch Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 08/75] x86/umip: Factor out instruction decoding Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-30 16:31 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 09/75] x86/insn: Add insn_get_modrm_reg_off() Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 10/75] x86/insn: Add insn_rep_prefix() helper Joerg Roedel 2020-05-04 8:46 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 11/75] x86/boot/compressed/64: Disable red-zone usage Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 12/75] x86/boot/compressed/64: Switch to __KERNEL_CS after GDT is loaded Joerg Roedel 2020-05-04 10:41 ` Borislav Petkov 2020-05-04 11:27 ` Joerg Roedel 2020-05-04 18:30 ` [tip: x86/boot] " tip-bot2 for Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 13/75] x86/boot/compressed/64: Add IDT Infrastructure Joerg Roedel 2020-05-04 10:54 ` Borislav Petkov 2020-05-04 11:28 ` Joerg Roedel 2020-06-03 9:06 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 14/75] x86/boot/compressed/64: Rename kaslr_64.c to ident_map_64.c Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 15/75] x86/boot/compressed/64: Add page-fault handler Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 16/75] x86/boot/compressed/64: Always switch to own page-table Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 17/75] x86/boot/compressed/64: Don't pre-map memory in KASLR code Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 18/75] x86/boot/compressed/64: Change add_identity_map() to take start and end Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 19/75] x86/boot/compressed/64: Add stage1 #VC handler Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-09 9:05 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 20/75] x86/boot/compressed/64: Call set_sev_encryption_mask earlier Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 21/75] x86/boot/compressed/64: Check return value of kernel_ident_mapping_init() Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 22/75] x86/boot/compressed/64: Add set_page_en/decrypted() helpers Joerg Roedel 2020-05-11 10:02 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 23/75] x86/boot/compressed/64: Setup GHCB Based VC Exception handler Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-11 20:07 ` Borislav Petkov 2020-06-03 10:08 ` Joerg Roedel 2020-05-12 18:11 ` Borislav Petkov 2020-05-12 21:08 ` Joerg Roedel 2020-05-13 8:59 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 24/75] x86/boot/compressed/64: Unmap GHCB page before booting the kernel Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-13 11:13 ` Borislav Petkov 2020-05-13 11:30 ` Joerg Roedel 2020-05-13 11:46 ` Borislav Petkov 2020-06-03 10:40 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 25/75] x86/sev-es: Add support for handling IOIO exceptions Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-13 17:58 ` Borislav Petkov 2020-05-16 7:57 ` Borislav Petkov 2020-06-03 14:19 ` Joerg Roedel 2020-05-20 6:20 ` Sean Christopherson 2020-06-03 14:23 ` Joerg Roedel 2020-06-03 23:07 ` Sean Christopherson 2020-06-04 10:15 ` Joerg Roedel 2020-06-04 10:15 ` Joerg Roedel 2020-06-04 14:59 ` Sean Christopherson 2020-06-04 14:59 ` Sean Christopherson 2020-06-11 10:03 ` Joerg Roedel 2020-06-11 10:03 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 26/75] x86/fpu: Move xgetbv()/xsetbv() into separate header Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 27/75] x86/sev-es: Add CPUID handling to #VC handler Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 28/75] x86/idt: Move IDT to data segment Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 29/75] x86/idt: Split idt_data setup out of set_intr_gate() Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 30/75] x86/idt: Move two function from k/idt.c to i/a/desc.h Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 31/75] x86/head/64: Install boot GDT Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-18 8:23 ` Borislav Petkov 2020-06-04 11:48 ` Joerg Roedel 2020-06-04 14:13 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 32/75] x86/head/64: Reload GDT after switch to virtual addresses Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 33/75] x86/head/64: Load segment registers earlier Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 34/75] x86/head/64: Switch to initial stack earlier Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 35/75] x86/head/64: Build k/head64.c with -fno-stack-protector Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-19 9:15 ` Borislav Petkov 2020-06-03 15:21 ` Joerg Roedel 2020-05-19 13:58 ` Brian Gerst 2020-05-19 13:58 ` Brian Gerst 2020-06-03 15:18 ` Joerg Roedel 2020-06-03 15:18 ` Joerg Roedel 2020-06-03 17:14 ` Brian Gerst 2020-06-03 17:14 ` Brian Gerst 2020-04-28 15:16 ` [PATCH v3 36/75] x86/head/64: Load IDT earlier Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 37/75] x86/head/64: Move early exception dispatch to C code Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel [this message] 2020-04-28 15:16 ` [PATCH v3 38/75] x86/sev-es: Add SEV-ES Feature Detection Joerg Roedel 2020-05-20 8:39 ` Borislav Petkov 2020-06-03 15:24 ` Joerg Roedel 2020-06-03 15:24 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 39/75] x86/sev-es: Print SEV-ES info into kernel log Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 40/75] x86/sev-es: Compile early handler code into kernel image Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-20 9:14 ` Borislav Petkov 2020-06-04 11:54 ` Joerg Roedel 2020-06-04 15:19 ` Borislav Petkov 2020-06-11 10:05 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 41/75] x86/sev-es: Setup early #VC handler Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 42/75] x86/sev-es: Setup GHCB based boot " Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-20 19:22 ` Borislav Petkov 2020-06-04 12:07 ` Joerg Roedel 2020-06-04 15:30 ` Borislav Petkov 2020-06-04 15:30 ` Borislav Petkov 2020-06-11 10:14 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 43/75] x86/sev-es: Setup per-cpu GHCBs for the runtime handler Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-22 8:33 ` Borislav Petkov 2020-05-22 8:33 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 44/75] x86/sev-es: Allocate and Map IST stacks for #VC handler Joerg Roedel 2020-05-22 9:49 ` Borislav Petkov 2020-05-22 9:49 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 45/75] x86/dumpstack/64: Handle #VC exception stacks Joerg Roedel 2020-05-22 13:06 ` Borislav Petkov 2020-05-22 13:06 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 46/75] x86/sev-es: Shift #VC IST Stack in nmi_enter()/nmi_exit() Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 47/75] x86/sev-es: Add Runtime #VC Exception Handler Joerg Roedel 2020-05-23 7:59 ` Borislav Petkov 2020-06-11 11:48 ` Joerg Roedel 2020-06-11 17:38 ` Sean Christopherson 2020-06-11 17:38 ` Sean Christopherson 2020-06-11 18:16 ` Joerg Roedel 2020-06-12 13:13 ` Borislav Petkov 2020-06-11 11:53 ` Joerg Roedel 2020-06-11 11:53 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 48/75] x86/sev-es: Wire up existing #VC exit-code handlers Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 49/75] x86/sev-es: Handle instruction fetches from user-space Joerg Roedel 2020-05-23 9:23 ` Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 50/75] x86/sev-es: Do not crash on #VC exceptions " Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 51/75] x86/sev-es: Handle MMIO events Joerg Roedel 2020-05-20 6:32 ` Sean Christopherson 2020-06-11 12:40 ` Joerg Roedel 2020-05-25 8:02 ` Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 52/75] x86/sev-es: Handle MMIO String Instructions Joerg Roedel 2020-05-25 9:47 ` Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 53/75] x86/sev-es: Handle MSR events Joerg Roedel 2020-05-25 9:53 ` Borislav Petkov 2020-05-25 9:53 ` Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 54/75] x86/sev-es: Handle DR7 read/write events Joerg Roedel 2020-05-25 10:59 ` Borislav Petkov 2020-06-11 13:06 ` Joerg Roedel 2020-06-11 13:06 ` Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 55/75] x86/sev-es: Handle WBINVD Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 56/75] x86/sev-es: Handle RDTSC(P) Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 57/75] x86/sev-es: Handle RDPMC Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 58/75] x86/sev-es: Handle INVD Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 59/75] x86/sev-es: Handle MONITOR/MONITORX Events Joerg Roedel 2020-05-20 6:38 ` Sean Christopherson 2020-06-11 13:10 ` Joerg Roedel 2020-06-11 17:13 ` Sean Christopherson 2020-06-11 19:33 ` Tom Lendacky 2020-06-12 9:25 ` Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 60/75] x86/sev-es: Handle MWAIT/MWAITX Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 61/75] x86/sev-es: Handle VMMCALL Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 62/75] x86/sev-es: Handle #AC Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 63/75] x86/sev-es: Handle #DB Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 64/75] x86/sev-es: Cache CPUID results for improved performance Joerg Roedel 2020-05-06 18:08 ` Mike Stunes 2020-05-06 18:08 ` Mike Stunes 2020-05-06 23:02 ` Tom Lendacky 2020-05-06 23:02 ` Tom Lendacky 2020-05-20 5:16 ` Sean Christopherson 2020-05-26 9:19 ` Borislav Petkov 2020-05-27 17:49 ` Tom Lendacky 2020-05-27 15:34 ` Tom Lendacky 2020-06-12 9:12 ` Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 65/75] x86/paravirt: Allow hypervisor specific VMMCALL handling under SEV-ES Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 66/75] x86/kvm: Add KVM " Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 67/75] x86/vmware: Add VMware specific handling for VMMCALL " Joerg Roedel 2020-05-28 12:38 ` Borislav Petkov 2020-05-28 12:38 ` Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 68/75] x86/realmode: Add SEV-ES specific trampoline entry point Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 69/75] x86/realmode: Setup AP jump table Joerg Roedel 2020-05-29 9:02 ` Borislav Petkov 2020-05-29 16:21 ` Tom Lendacky 2020-04-28 15:17 ` [PATCH v3 70/75] x86/head/64: Setup TSS early for secondary CPUs Joerg Roedel 2020-05-07 10:51 ` [x86/head/64] e5a6f186af: BUG:kernel_hang_in_boot_stage kernel test robot 2020-05-07 10:51 ` kernel test robot 2020-05-07 10:51 ` kernel test robot 2020-06-02 15:46 ` [PATCH v3 70/75] x86/head/64: Setup TSS early for secondary CPUs Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 71/75] x86/head/64: Don't call verify_cpu() on starting APs Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 72/75] x86/head/64: Rename start_cpu0 Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 73/75] x86/sev-es: Support CPU offline/online Joerg Roedel 2020-06-03 9:54 ` Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 74/75] x86/sev-es: Handle NMI State Joerg Roedel 2020-06-03 9:59 ` Borislav Petkov 2020-06-03 9:59 ` Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 75/75] x86/efi: Add GHCB mappings when SEV-ES is active Joerg Roedel 2020-06-03 13:52 ` Borislav Petkov
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