From: Joerg Roedel <joro@8bytes.org> To: x86@kernel.org Cc: hpa@zytor.com, Andy Lutomirski <luto@kernel.org>, Dave Hansen <dave.hansen@linux.intel.com>, Peter Zijlstra <peterz@infradead.org>, Thomas Hellstrom <thellstrom@vmware.com>, Jiri Slaby <jslaby@suse.cz>, Dan Williams <dan.j.williams@intel.com>, Tom Lendacky <thomas.lendacky@amd.com>, Juergen Gross <jgross@suse.com>, Kees Cook <keescook@chromium.org>, David Rientjes <rientjes@google.com>, Cfir Cohen <cfir@google.com>, Erdem Aktas <erdemaktas@google.com>, Masami Hiramatsu <mhiramat@kernel.org>, Mike Stunes <mstunes@vmware.com>, Joerg Roedel <joro@8bytes.org>, Joerg Roedel <jroedel@suse.de>, linux-kernel@vger.kernel.org, kvm@vger.kernel.org, virtualization@lists.linux-foundation.org Subject: [PATCH v3 41/75] x86/sev-es: Setup early #VC handler Date: Tue, 28 Apr 2020 17:16:51 +0200 [thread overview] Message-ID: <20200428151725.31091-42-joro@8bytes.org> (raw) In-Reply-To: <20200428151725.31091-1-joro@8bytes.org> From: Joerg Roedel <jroedel@suse.de> Setup an early handler for #VC exceptions. There is no GHCB mapped yet, so just re-use the vc_no_ghcb_handler. It can only handle CPUID exit-codes, but that should be enough to get the kernel through verify_cpu() and __startup_64() until it runs on virtual addresses. Signed-off-by: Joerg Roedel <jroedel@suse.de> --- arch/x86/include/asm/desc.h | 1 + arch/x86/include/asm/processor.h | 1 + arch/x86/include/asm/sev-es.h | 2 ++ arch/x86/kernel/head64.c | 17 +++++++++++++++ arch/x86/kernel/head_64.S | 36 ++++++++++++++++++++++++++++++++ arch/x86/kernel/idt.c | 10 +++++++++ 6 files changed, 67 insertions(+) diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h index 80bf63c08007..30e2a0e863b6 100644 --- a/arch/x86/include/asm/desc.h +++ b/arch/x86/include/asm/desc.h @@ -388,6 +388,7 @@ static inline void set_desc_limit(struct desc_struct *desc, unsigned long limit) void update_intr_gate(unsigned int n, const void *addr); void alloc_intr_gate(unsigned int n, const void *addr); +void set_early_idt_handler(gate_desc *idt, int n, void *handler); static inline void init_idt_data(struct idt_data *data, unsigned int n, const void *addr) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 3bcf27caf6c9..e369271bfd33 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -757,6 +757,7 @@ extern int sysenter_setup(void); /* Defined in head.S */ extern struct desc_ptr early_gdt_descr; +extern struct desc_ptr early_idt_descr; extern void switch_to_new_gdt(int); extern void load_direct_gdt(int); diff --git a/arch/x86/include/asm/sev-es.h b/arch/x86/include/asm/sev-es.h index 7c0807b84546..b2cbcd40b52e 100644 --- a/arch/x86/include/asm/sev-es.h +++ b/arch/x86/include/asm/sev-es.h @@ -73,4 +73,6 @@ static inline u64 lower_bits(u64 val, unsigned int bits) return (val & mask); } +extern void vc_no_ghcb(void); + #endif diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index 474f121d50f6..9586522bfcb3 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -38,6 +38,7 @@ #include <asm/fixmap.h> #include <asm/extable.h> #include <asm/trap_defs.h> +#include <asm/sev-es.h> /* * Manage page tables very early on. @@ -515,3 +516,19 @@ void __head early_idt_setup_early_handler(unsigned long physaddr) native_write_idt_entry(idt, i, &desc); } } + +void __head early_idt_setup(unsigned long physbase) +{ + gate_desc *idt = fixup_pointer(idt_table, physbase); + void __maybe_unused *handler; + +#ifdef CONFIG_AMD_MEM_ENCRYPT + /* VMM Communication Exception */ + handler = fixup_pointer(vc_no_ghcb, physbase); + set_early_idt_handler(idt, X86_TRAP_VC, handler); +#endif + + /* Initialize IDT descriptor and load IDT */ + early_idt_descr.address = (unsigned long)idt; + native_load_idt(&early_idt_descr); +} diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index aca3beb336ce..4d84a0c72e36 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -92,6 +92,12 @@ SYM_CODE_START_NOALIGN(startup_64) .Lon_kernel_cs: UNWIND_HINT_EMPTY + /* Setup IDT - Needed for SEV-ES */ + leaq _text(%rip), %rdi + pushq %rsi + call early_idt_setup + popq %rsi + /* Sanitize CPU configuration */ call verify_cpu @@ -370,6 +376,33 @@ SYM_CODE_START_LOCAL(early_idt_handler_common) jmp restore_regs_and_return_to_kernel SYM_CODE_END(early_idt_handler_common) +#ifdef CONFIG_AMD_MEM_ENCRYPT +/* + * VC Exception handler used during very early boot. The + * early_idt_handler_array can't be used because it returns via the + * paravirtualized INTERRUPT_RETURN and pv-ops don't work that early. + */ +SYM_CODE_START_NOALIGN(vc_no_ghcb) + UNWIND_HINT_IRET_REGS offset=8 + + /* Build pt_regs */ + PUSH_AND_CLEAR_REGS + + /* Call C handler */ + movq %rsp, %rdi + movq ORIG_RAX(%rsp), %rsi + call do_vc_no_ghcb + + /* Unwind pt_regs */ + POP_REGS + + /* Remove Error Code */ + addq $8, %rsp + + /* Pure iret required here - don't use INTERRUPT_RETURN */ + iretq +SYM_CODE_END(vc_no_ghcb) +#endif #define SYM_DATA_START_PAGE_ALIGNED(name) \ SYM_START(name, SYM_L_GLOBAL, .balign PAGE_SIZE) @@ -511,6 +544,9 @@ SYM_DATA_END(level1_fixmap_pgt) SYM_DATA(early_gdt_descr, .word GDT_ENTRIES*8-1) SYM_DATA_LOCAL(early_gdt_descr_base, .quad INIT_PER_CPU_VAR(gdt_page)) +SYM_DATA(early_idt_descr, .word NUM_EXCEPTION_VECTORS * 16) +SYM_DATA_LOCAL(early_idt_descr_base, .quad 0) + .align 16 /* This must match the first entry in level2_kernel_pgt */ SYM_DATA(phys_base, .quad 0x0) diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c index 4a2c7791c697..135d208a2d38 100644 --- a/arch/x86/kernel/idt.c +++ b/arch/x86/kernel/idt.c @@ -341,3 +341,13 @@ void alloc_intr_gate(unsigned int n, const void *addr) if (!test_and_set_bit(n, system_vectors)) set_intr_gate(n, addr); } + +void set_early_idt_handler(gate_desc *idt, int n, void *handler) +{ + struct idt_data data; + gate_desc desc; + + init_idt_data(&data, n, handler); + idt_init_desc(&desc, &data); + native_write_idt_entry(idt, n, &desc); +} -- 2.17.1
WARNING: multiple messages have this Message-ID (diff)
From: Joerg Roedel <joro@8bytes.org> To: x86@kernel.org Cc: Juergen Gross <jgross@suse.com>, Tom Lendacky <thomas.lendacky@amd.com>, Thomas Hellstrom <thellstrom@vmware.com>, Joerg Roedel <jroedel@suse.de>, Mike Stunes <mstunes@vmware.com>, Kees Cook <keescook@chromium.org>, kvm@vger.kernel.org, Peter Zijlstra <peterz@infradead.org>, Cfir Cohen <cfir@google.com>, Joerg Roedel <joro@8bytes.org>, Dave Hansen <dave.hansen@linux.intel.com>, linux-kernel@vger.kernel.org, virtualization@lists.linux-foundation.org, Masami Hiramatsu <mhiramat@kernel.org>, Andy Lutomirski <luto@kernel.org>, hpa@zytor.com, Erdem Aktas <erdemaktas@google.com>, David Rientjes <rientjes@google.com>, Dan Williams <dan.j.williams@intel.com>, Jiri Slaby <jslaby@suse.cz> Subject: [PATCH v3 41/75] x86/sev-es: Setup early #VC handler Date: Tue, 28 Apr 2020 17:16:51 +0200 [thread overview] Message-ID: <20200428151725.31091-42-joro@8bytes.org> (raw) In-Reply-To: <20200428151725.31091-1-joro@8bytes.org> From: Joerg Roedel <jroedel@suse.de> Setup an early handler for #VC exceptions. There is no GHCB mapped yet, so just re-use the vc_no_ghcb_handler. It can only handle CPUID exit-codes, but that should be enough to get the kernel through verify_cpu() and __startup_64() until it runs on virtual addresses. Signed-off-by: Joerg Roedel <jroedel@suse.de> --- arch/x86/include/asm/desc.h | 1 + arch/x86/include/asm/processor.h | 1 + arch/x86/include/asm/sev-es.h | 2 ++ arch/x86/kernel/head64.c | 17 +++++++++++++++ arch/x86/kernel/head_64.S | 36 ++++++++++++++++++++++++++++++++ arch/x86/kernel/idt.c | 10 +++++++++ 6 files changed, 67 insertions(+) diff --git a/arch/x86/include/asm/desc.h b/arch/x86/include/asm/desc.h index 80bf63c08007..30e2a0e863b6 100644 --- a/arch/x86/include/asm/desc.h +++ b/arch/x86/include/asm/desc.h @@ -388,6 +388,7 @@ static inline void set_desc_limit(struct desc_struct *desc, unsigned long limit) void update_intr_gate(unsigned int n, const void *addr); void alloc_intr_gate(unsigned int n, const void *addr); +void set_early_idt_handler(gate_desc *idt, int n, void *handler); static inline void init_idt_data(struct idt_data *data, unsigned int n, const void *addr) diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 3bcf27caf6c9..e369271bfd33 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h @@ -757,6 +757,7 @@ extern int sysenter_setup(void); /* Defined in head.S */ extern struct desc_ptr early_gdt_descr; +extern struct desc_ptr early_idt_descr; extern void switch_to_new_gdt(int); extern void load_direct_gdt(int); diff --git a/arch/x86/include/asm/sev-es.h b/arch/x86/include/asm/sev-es.h index 7c0807b84546..b2cbcd40b52e 100644 --- a/arch/x86/include/asm/sev-es.h +++ b/arch/x86/include/asm/sev-es.h @@ -73,4 +73,6 @@ static inline u64 lower_bits(u64 val, unsigned int bits) return (val & mask); } +extern void vc_no_ghcb(void); + #endif diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c index 474f121d50f6..9586522bfcb3 100644 --- a/arch/x86/kernel/head64.c +++ b/arch/x86/kernel/head64.c @@ -38,6 +38,7 @@ #include <asm/fixmap.h> #include <asm/extable.h> #include <asm/trap_defs.h> +#include <asm/sev-es.h> /* * Manage page tables very early on. @@ -515,3 +516,19 @@ void __head early_idt_setup_early_handler(unsigned long physaddr) native_write_idt_entry(idt, i, &desc); } } + +void __head early_idt_setup(unsigned long physbase) +{ + gate_desc *idt = fixup_pointer(idt_table, physbase); + void __maybe_unused *handler; + +#ifdef CONFIG_AMD_MEM_ENCRYPT + /* VMM Communication Exception */ + handler = fixup_pointer(vc_no_ghcb, physbase); + set_early_idt_handler(idt, X86_TRAP_VC, handler); +#endif + + /* Initialize IDT descriptor and load IDT */ + early_idt_descr.address = (unsigned long)idt; + native_load_idt(&early_idt_descr); +} diff --git a/arch/x86/kernel/head_64.S b/arch/x86/kernel/head_64.S index aca3beb336ce..4d84a0c72e36 100644 --- a/arch/x86/kernel/head_64.S +++ b/arch/x86/kernel/head_64.S @@ -92,6 +92,12 @@ SYM_CODE_START_NOALIGN(startup_64) .Lon_kernel_cs: UNWIND_HINT_EMPTY + /* Setup IDT - Needed for SEV-ES */ + leaq _text(%rip), %rdi + pushq %rsi + call early_idt_setup + popq %rsi + /* Sanitize CPU configuration */ call verify_cpu @@ -370,6 +376,33 @@ SYM_CODE_START_LOCAL(early_idt_handler_common) jmp restore_regs_and_return_to_kernel SYM_CODE_END(early_idt_handler_common) +#ifdef CONFIG_AMD_MEM_ENCRYPT +/* + * VC Exception handler used during very early boot. The + * early_idt_handler_array can't be used because it returns via the + * paravirtualized INTERRUPT_RETURN and pv-ops don't work that early. + */ +SYM_CODE_START_NOALIGN(vc_no_ghcb) + UNWIND_HINT_IRET_REGS offset=8 + + /* Build pt_regs */ + PUSH_AND_CLEAR_REGS + + /* Call C handler */ + movq %rsp, %rdi + movq ORIG_RAX(%rsp), %rsi + call do_vc_no_ghcb + + /* Unwind pt_regs */ + POP_REGS + + /* Remove Error Code */ + addq $8, %rsp + + /* Pure iret required here - don't use INTERRUPT_RETURN */ + iretq +SYM_CODE_END(vc_no_ghcb) +#endif #define SYM_DATA_START_PAGE_ALIGNED(name) \ SYM_START(name, SYM_L_GLOBAL, .balign PAGE_SIZE) @@ -511,6 +544,9 @@ SYM_DATA_END(level1_fixmap_pgt) SYM_DATA(early_gdt_descr, .word GDT_ENTRIES*8-1) SYM_DATA_LOCAL(early_gdt_descr_base, .quad INIT_PER_CPU_VAR(gdt_page)) +SYM_DATA(early_idt_descr, .word NUM_EXCEPTION_VECTORS * 16) +SYM_DATA_LOCAL(early_idt_descr_base, .quad 0) + .align 16 /* This must match the first entry in level2_kernel_pgt */ SYM_DATA(phys_base, .quad 0x0) diff --git a/arch/x86/kernel/idt.c b/arch/x86/kernel/idt.c index 4a2c7791c697..135d208a2d38 100644 --- a/arch/x86/kernel/idt.c +++ b/arch/x86/kernel/idt.c @@ -341,3 +341,13 @@ void alloc_intr_gate(unsigned int n, const void *addr) if (!test_and_set_bit(n, system_vectors)) set_intr_gate(n, addr); } + +void set_early_idt_handler(gate_desc *idt, int n, void *handler) +{ + struct idt_data data; + gate_desc desc; + + init_idt_data(&data, n, handler); + idt_init_desc(&desc, &data); + native_write_idt_entry(idt, n, &desc); +} -- 2.17.1
next prev parent reply other threads:[~2020-04-28 15:19 UTC|newest] Thread overview: 210+ messages / expand[flat|nested] mbox.gz Atom feed top 2020-04-28 15:16 [PATCH v3 00/75] x86: SEV-ES Guest Support Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 01/75] KVM: SVM: Add GHCB definitions Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 02/75] KVM: SVM: Add GHCB Accessor functions Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 03/75] KVM: SVM: Use __packed shorthand Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-29 10:12 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 04/75] x86/cpufeatures: Add SEV-ES CPU feature Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 05/75] x86/traps: Move some definitions to <asm/trap_defs.h> Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 06/75] x86/insn: Make inat-tables.c suitable for pre-decompression code Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 07/75] x86/umip: Factor out instruction fetch Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 08/75] x86/umip: Factor out instruction decoding Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-30 16:31 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 09/75] x86/insn: Add insn_get_modrm_reg_off() Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 10/75] x86/insn: Add insn_rep_prefix() helper Joerg Roedel 2020-05-04 8:46 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 11/75] x86/boot/compressed/64: Disable red-zone usage Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 12/75] x86/boot/compressed/64: Switch to __KERNEL_CS after GDT is loaded Joerg Roedel 2020-05-04 10:41 ` Borislav Petkov 2020-05-04 11:27 ` Joerg Roedel 2020-05-04 18:30 ` [tip: x86/boot] " tip-bot2 for Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 13/75] x86/boot/compressed/64: Add IDT Infrastructure Joerg Roedel 2020-05-04 10:54 ` Borislav Petkov 2020-05-04 11:28 ` Joerg Roedel 2020-06-03 9:06 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 14/75] x86/boot/compressed/64: Rename kaslr_64.c to ident_map_64.c Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 15/75] x86/boot/compressed/64: Add page-fault handler Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 16/75] x86/boot/compressed/64: Always switch to own page-table Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 17/75] x86/boot/compressed/64: Don't pre-map memory in KASLR code Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 18/75] x86/boot/compressed/64: Change add_identity_map() to take start and end Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 19/75] x86/boot/compressed/64: Add stage1 #VC handler Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-09 9:05 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 20/75] x86/boot/compressed/64: Call set_sev_encryption_mask earlier Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 21/75] x86/boot/compressed/64: Check return value of kernel_ident_mapping_init() Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 22/75] x86/boot/compressed/64: Add set_page_en/decrypted() helpers Joerg Roedel 2020-05-11 10:02 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 23/75] x86/boot/compressed/64: Setup GHCB Based VC Exception handler Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-11 20:07 ` Borislav Petkov 2020-06-03 10:08 ` Joerg Roedel 2020-05-12 18:11 ` Borislav Petkov 2020-05-12 21:08 ` Joerg Roedel 2020-05-13 8:59 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 24/75] x86/boot/compressed/64: Unmap GHCB page before booting the kernel Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-13 11:13 ` Borislav Petkov 2020-05-13 11:30 ` Joerg Roedel 2020-05-13 11:46 ` Borislav Petkov 2020-06-03 10:40 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 25/75] x86/sev-es: Add support for handling IOIO exceptions Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-13 17:58 ` Borislav Petkov 2020-05-16 7:57 ` Borislav Petkov 2020-06-03 14:19 ` Joerg Roedel 2020-05-20 6:20 ` Sean Christopherson 2020-06-03 14:23 ` Joerg Roedel 2020-06-03 23:07 ` Sean Christopherson 2020-06-04 10:15 ` Joerg Roedel 2020-06-04 10:15 ` Joerg Roedel 2020-06-04 14:59 ` Sean Christopherson 2020-06-04 14:59 ` Sean Christopherson 2020-06-11 10:03 ` Joerg Roedel 2020-06-11 10:03 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 26/75] x86/fpu: Move xgetbv()/xsetbv() into separate header Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 27/75] x86/sev-es: Add CPUID handling to #VC handler Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 28/75] x86/idt: Move IDT to data segment Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 29/75] x86/idt: Split idt_data setup out of set_intr_gate() Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 30/75] x86/idt: Move two function from k/idt.c to i/a/desc.h Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 31/75] x86/head/64: Install boot GDT Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-18 8:23 ` Borislav Petkov 2020-06-04 11:48 ` Joerg Roedel 2020-06-04 14:13 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 32/75] x86/head/64: Reload GDT after switch to virtual addresses Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 33/75] x86/head/64: Load segment registers earlier Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 34/75] x86/head/64: Switch to initial stack earlier Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 35/75] x86/head/64: Build k/head64.c with -fno-stack-protector Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-19 9:15 ` Borislav Petkov 2020-06-03 15:21 ` Joerg Roedel 2020-05-19 13:58 ` Brian Gerst 2020-05-19 13:58 ` Brian Gerst 2020-06-03 15:18 ` Joerg Roedel 2020-06-03 15:18 ` Joerg Roedel 2020-06-03 17:14 ` Brian Gerst 2020-06-03 17:14 ` Brian Gerst 2020-04-28 15:16 ` [PATCH v3 36/75] x86/head/64: Load IDT earlier Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 37/75] x86/head/64: Move early exception dispatch to C code Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 38/75] x86/sev-es: Add SEV-ES Feature Detection Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-20 8:39 ` Borislav Petkov 2020-06-03 15:24 ` Joerg Roedel 2020-06-03 15:24 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 39/75] x86/sev-es: Print SEV-ES info into kernel log Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 40/75] x86/sev-es: Compile early handler code into kernel image Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-20 9:14 ` Borislav Petkov 2020-06-04 11:54 ` Joerg Roedel 2020-06-04 15:19 ` Borislav Petkov 2020-06-11 10:05 ` Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel [this message] 2020-04-28 15:16 ` [PATCH v3 41/75] x86/sev-es: Setup early #VC handler Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 42/75] x86/sev-es: Setup GHCB based boot " Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-20 19:22 ` Borislav Petkov 2020-06-04 12:07 ` Joerg Roedel 2020-06-04 15:30 ` Borislav Petkov 2020-06-04 15:30 ` Borislav Petkov 2020-06-11 10:14 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 43/75] x86/sev-es: Setup per-cpu GHCBs for the runtime handler Joerg Roedel 2020-04-28 15:16 ` Joerg Roedel 2020-05-22 8:33 ` Borislav Petkov 2020-05-22 8:33 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 44/75] x86/sev-es: Allocate and Map IST stacks for #VC handler Joerg Roedel 2020-05-22 9:49 ` Borislav Petkov 2020-05-22 9:49 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 45/75] x86/dumpstack/64: Handle #VC exception stacks Joerg Roedel 2020-05-22 13:06 ` Borislav Petkov 2020-05-22 13:06 ` Borislav Petkov 2020-04-28 15:16 ` [PATCH v3 46/75] x86/sev-es: Shift #VC IST Stack in nmi_enter()/nmi_exit() Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 47/75] x86/sev-es: Add Runtime #VC Exception Handler Joerg Roedel 2020-05-23 7:59 ` Borislav Petkov 2020-06-11 11:48 ` Joerg Roedel 2020-06-11 17:38 ` Sean Christopherson 2020-06-11 17:38 ` Sean Christopherson 2020-06-11 18:16 ` Joerg Roedel 2020-06-12 13:13 ` Borislav Petkov 2020-06-11 11:53 ` Joerg Roedel 2020-06-11 11:53 ` Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 48/75] x86/sev-es: Wire up existing #VC exit-code handlers Joerg Roedel 2020-04-28 15:16 ` [PATCH v3 49/75] x86/sev-es: Handle instruction fetches from user-space Joerg Roedel 2020-05-23 9:23 ` Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 50/75] x86/sev-es: Do not crash on #VC exceptions " Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 51/75] x86/sev-es: Handle MMIO events Joerg Roedel 2020-05-20 6:32 ` Sean Christopherson 2020-06-11 12:40 ` Joerg Roedel 2020-05-25 8:02 ` Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 52/75] x86/sev-es: Handle MMIO String Instructions Joerg Roedel 2020-05-25 9:47 ` Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 53/75] x86/sev-es: Handle MSR events Joerg Roedel 2020-05-25 9:53 ` Borislav Petkov 2020-05-25 9:53 ` Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 54/75] x86/sev-es: Handle DR7 read/write events Joerg Roedel 2020-05-25 10:59 ` Borislav Petkov 2020-06-11 13:06 ` Joerg Roedel 2020-06-11 13:06 ` Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 55/75] x86/sev-es: Handle WBINVD Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 56/75] x86/sev-es: Handle RDTSC(P) Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 57/75] x86/sev-es: Handle RDPMC Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 58/75] x86/sev-es: Handle INVD Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 59/75] x86/sev-es: Handle MONITOR/MONITORX Events Joerg Roedel 2020-05-20 6:38 ` Sean Christopherson 2020-06-11 13:10 ` Joerg Roedel 2020-06-11 17:13 ` Sean Christopherson 2020-06-11 19:33 ` Tom Lendacky 2020-06-12 9:25 ` Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 60/75] x86/sev-es: Handle MWAIT/MWAITX Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 61/75] x86/sev-es: Handle VMMCALL Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 62/75] x86/sev-es: Handle #AC Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 63/75] x86/sev-es: Handle #DB Events Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 64/75] x86/sev-es: Cache CPUID results for improved performance Joerg Roedel 2020-05-06 18:08 ` Mike Stunes 2020-05-06 18:08 ` Mike Stunes 2020-05-06 23:02 ` Tom Lendacky 2020-05-06 23:02 ` Tom Lendacky 2020-05-20 5:16 ` Sean Christopherson 2020-05-26 9:19 ` Borislav Petkov 2020-05-27 17:49 ` Tom Lendacky 2020-05-27 15:34 ` Tom Lendacky 2020-06-12 9:12 ` Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 65/75] x86/paravirt: Allow hypervisor specific VMMCALL handling under SEV-ES Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 66/75] x86/kvm: Add KVM " Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 67/75] x86/vmware: Add VMware specific handling for VMMCALL " Joerg Roedel 2020-05-28 12:38 ` Borislav Petkov 2020-05-28 12:38 ` Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 68/75] x86/realmode: Add SEV-ES specific trampoline entry point Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 69/75] x86/realmode: Setup AP jump table Joerg Roedel 2020-05-29 9:02 ` Borislav Petkov 2020-05-29 16:21 ` Tom Lendacky 2020-04-28 15:17 ` [PATCH v3 70/75] x86/head/64: Setup TSS early for secondary CPUs Joerg Roedel 2020-05-07 10:51 ` [x86/head/64] e5a6f186af: BUG:kernel_hang_in_boot_stage kernel test robot 2020-05-07 10:51 ` kernel test robot 2020-05-07 10:51 ` kernel test robot 2020-06-02 15:46 ` [PATCH v3 70/75] x86/head/64: Setup TSS early for secondary CPUs Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 71/75] x86/head/64: Don't call verify_cpu() on starting APs Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 72/75] x86/head/64: Rename start_cpu0 Joerg Roedel 2020-04-28 15:17 ` [PATCH v3 73/75] x86/sev-es: Support CPU offline/online Joerg Roedel 2020-06-03 9:54 ` Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 74/75] x86/sev-es: Handle NMI State Joerg Roedel 2020-06-03 9:59 ` Borislav Petkov 2020-06-03 9:59 ` Borislav Petkov 2020-04-28 15:17 ` [PATCH v3 75/75] x86/efi: Add GHCB mappings when SEV-ES is active Joerg Roedel 2020-06-03 13:52 ` Borislav Petkov
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