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From: Joerg Roedel <joro@8bytes.org>
To: x86@kernel.org
Cc: hpa@zytor.com, Andy Lutomirski <luto@kernel.org>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	Peter Zijlstra <peterz@infradead.org>,
	Thomas Hellstrom <thellstrom@vmware.com>,
	Jiri Slaby <jslaby@suse.cz>,
	Dan Williams <dan.j.williams@intel.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	Juergen Gross <jgross@suse.com>,
	Kees Cook <keescook@chromium.org>,
	David Rientjes <rientjes@google.com>,
	Cfir Cohen <cfir@google.com>, Erdem Aktas <erdemaktas@google.com>,
	Masami Hiramatsu <mhiramat@kernel.org>,
	Mike Stunes <mstunes@vmware.com>, Joerg Roedel <joro@8bytes.org>,
	Joerg Roedel <jroedel@suse.de>,
	linux-kernel@vger.kernel.org, kvm@vger.kernel.org,
	virtualization@lists.linux-foundation.org
Subject: [PATCH v3 42/75] x86/sev-es: Setup GHCB based boot #VC handler
Date: Tue, 28 Apr 2020 17:16:52 +0200	[thread overview]
Message-ID: <20200428151725.31091-43-joro@8bytes.org> (raw)
In-Reply-To: <20200428151725.31091-1-joro@8bytes.org>

From: Joerg Roedel <jroedel@suse.de>

Add the infrastructure to handle #VC exceptions when the kernel runs
on virtual addresses and has a GHCB mapped. This handler will be used
until the runtime #VC handler takes over.

Signed-off-by: Joerg Roedel <jroedel@suse.de>
---
 arch/x86/include/asm/segment.h  |   2 +-
 arch/x86/include/asm/sev-es.h   |   1 +
 arch/x86/kernel/head64.c        |   6 ++
 arch/x86/kernel/sev-es-shared.c |  14 ++--
 arch/x86/kernel/sev-es.c        | 116 ++++++++++++++++++++++++++++++++
 arch/x86/mm/extable.c           |   1 +
 6 files changed, 132 insertions(+), 8 deletions(-)

diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
index 6669164abadc..5b648066504c 100644
--- a/arch/x86/include/asm/segment.h
+++ b/arch/x86/include/asm/segment.h
@@ -230,7 +230,7 @@
 #define NUM_EXCEPTION_VECTORS		32
 
 /* Bitmask of exception vectors which push an error code on the stack: */
-#define EXCEPTION_ERRCODE_MASK		0x00027d00
+#define EXCEPTION_ERRCODE_MASK		0x20027d00
 
 #define GDT_SIZE			(GDT_ENTRIES*8)
 #define GDT_ENTRY_TLS_ENTRIES		3
diff --git a/arch/x86/include/asm/sev-es.h b/arch/x86/include/asm/sev-es.h
index b2cbcd40b52e..e1ed963a57ec 100644
--- a/arch/x86/include/asm/sev-es.h
+++ b/arch/x86/include/asm/sev-es.h
@@ -74,5 +74,6 @@ static inline u64 lower_bits(u64 val, unsigned int bits)
 }
 
 extern void vc_no_ghcb(void);
+extern bool vc_boot_ghcb(struct pt_regs *regs);
 
 #endif
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 9586522bfcb3..d83d59c15548 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -386,6 +386,12 @@ void __init do_early_exception(struct pt_regs *regs, int trapnr)
 	    early_make_pgtable(native_read_cr2()))
 		return;
 
+#ifdef CONFIG_AMD_MEM_ENCRYPT
+	if (trapnr == X86_TRAP_VC &&
+	    vc_boot_ghcb(regs))
+		return;
+#endif
+
 	early_fixup_exception(regs, trapnr);
 }
 
diff --git a/arch/x86/kernel/sev-es-shared.c b/arch/x86/kernel/sev-es-shared.c
index 5703f9b17e70..3d2299fb5e3f 100644
--- a/arch/x86/kernel/sev-es-shared.c
+++ b/arch/x86/kernel/sev-es-shared.c
@@ -9,7 +9,7 @@
  * and is included directly into both code-bases.
  */
 
-static void __maybe_unused sev_es_terminate(unsigned int reason)
+static void sev_es_terminate(unsigned int reason)
 {
 	u64 val = GHCB_SEV_TERMINATE;
 
@@ -27,7 +27,7 @@ static void __maybe_unused sev_es_terminate(unsigned int reason)
 		asm volatile("hlt\n" : : : "memory");
 }
 
-static bool __maybe_unused sev_es_negotiate_protocol(void)
+static bool sev_es_negotiate_protocol(void)
 {
 	u64 val;
 
@@ -46,7 +46,7 @@ static bool __maybe_unused sev_es_negotiate_protocol(void)
 	return true;
 }
 
-static void __maybe_unused vc_ghcb_invalidate(struct ghcb *ghcb)
+static void vc_ghcb_invalidate(struct ghcb *ghcb)
 {
 	memset(ghcb->save.valid_bitmap, 0, sizeof(ghcb->save.valid_bitmap));
 }
@@ -58,9 +58,9 @@ static bool vc_decoding_needed(unsigned long exit_code)
 		 exit_code <= SVM_EXIT_LAST_EXCP);
 }
 
-static enum es_result __maybe_unused vc_init_em_ctxt(struct es_em_ctxt *ctxt,
-						     struct pt_regs *regs,
-						     unsigned long exit_code)
+static enum es_result vc_init_em_ctxt(struct es_em_ctxt *ctxt,
+				      struct pt_regs *regs,
+				      unsigned long exit_code)
 {
 	enum es_result ret = ES_OK;
 
@@ -73,7 +73,7 @@ static enum es_result __maybe_unused vc_init_em_ctxt(struct es_em_ctxt *ctxt,
 	return ret;
 }
 
-static void __maybe_unused vc_finish_insn(struct es_em_ctxt *ctxt)
+static void vc_finish_insn(struct es_em_ctxt *ctxt)
 {
 	ctxt->regs->ip += ctxt->insn.length;
 }
diff --git a/arch/x86/kernel/sev-es.c b/arch/x86/kernel/sev-es.c
index 0d20770decce..9de5bb23cb0a 100644
--- a/arch/x86/kernel/sev-es.c
+++ b/arch/x86/kernel/sev-es.c
@@ -7,7 +7,9 @@
  * Author: Joerg Roedel <jroedel@suse.de>
  */
 
+#include <linux/sched/debug.h>	/* For show_regs() */
 #include <linux/kernel.h>
+#include <linux/printk.h>
 #include <linux/mm.h>
 
 #include <asm/trap_defs.h>
@@ -15,8 +17,21 @@
 #include <asm/insn-eval.h>
 #include <asm/fpu/internal.h>
 #include <asm/processor.h>
+#include <asm/trap_defs.h>
 #include <asm/svm.h>
 
+/* For early boot hypervisor communication in SEV-ES enabled guests */
+static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE);
+
+/*
+ * Needs to be in the .data section because we need it NULL before bss is
+ * cleared
+ */
+static struct ghcb __initdata *boot_ghcb;
+
+/* Needed in vc_early_vc_forward_exception */
+void do_early_exception(struct pt_regs *regs, int trapnr);
+
 static inline u64 sev_es_rd_ghcb_msr(void)
 {
 	return native_read_msr(MSR_AMD64_SEV_ES_GHCB);
@@ -161,3 +176,104 @@ static enum es_result vc_read_mem(struct es_em_ctxt *ctxt,
 
 /* Include code shared with pre-decompression boot stage */
 #include "sev-es-shared.c"
+
+/*
+ * This function runs on the first #VC exception after the kernel
+ * switched to virtual addresses.
+ */
+static bool __init sev_es_setup_ghcb(void)
+{
+	/* First make sure the hypervisor talks a supported protocol. */
+	if (!sev_es_negotiate_protocol())
+		return false;
+	/*
+	 * Clear the boot_ghcb. The first exception comes in before the bss
+	 * section is cleared.
+	 */
+	memset(&boot_ghcb_page, 0, PAGE_SIZE);
+
+	/* Alright - Make the boot-ghcb public */
+	boot_ghcb = &boot_ghcb_page;
+
+	return true;
+}
+
+static void __init vc_early_vc_forward_exception(struct es_em_ctxt *ctxt)
+{
+	int trapnr = ctxt->fi.vector;
+
+	if (trapnr == X86_TRAP_PF)
+		native_write_cr2(ctxt->fi.cr2);
+
+	ctxt->regs->orig_ax = ctxt->fi.error_code;
+	do_early_exception(ctxt->regs, trapnr);
+}
+
+static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt,
+					 struct ghcb *ghcb,
+					 unsigned long exit_code)
+{
+	enum es_result result;
+
+	switch (exit_code) {
+	default:
+		/*
+		 * Unexpected #VC exception
+		 */
+		result = ES_UNSUPPORTED;
+	}
+
+	return result;
+}
+
+bool __init vc_boot_ghcb(struct pt_regs *regs)
+{
+	unsigned long exit_code = regs->orig_ax;
+	struct es_em_ctxt ctxt;
+	enum es_result result;
+
+	/* Do initial setup or terminate the guest */
+	if (unlikely(boot_ghcb == NULL && !sev_es_setup_ghcb()))
+		sev_es_terminate(GHCB_SEV_ES_REASON_GENERAL_REQUEST);
+
+	vc_ghcb_invalidate(boot_ghcb);
+	result = vc_init_em_ctxt(&ctxt, regs, exit_code);
+
+	if (result == ES_OK)
+		result = vc_handle_exitcode(&ctxt, boot_ghcb, exit_code);
+
+	/* Done - now check the result */
+	switch (result) {
+	case ES_OK:
+		vc_finish_insn(&ctxt);
+		break;
+	case ES_UNSUPPORTED:
+		early_printk("PANIC: Unsupported exit-code 0x%02lx in early #VC exception (IP: 0x%lx)\n",
+				exit_code, regs->ip);
+		goto fail;
+	case ES_VMM_ERROR:
+		early_printk("PANIC: Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n",
+				exit_code, regs->ip);
+		goto fail;
+	case ES_DECODE_FAILED:
+		early_printk("PANIC: Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n",
+				exit_code, regs->ip);
+		goto fail;
+	case ES_EXCEPTION:
+		vc_early_vc_forward_exception(&ctxt);
+		break;
+	case ES_RETRY:
+		/* Nothing to do */
+		break;
+	default:
+		BUG();
+	}
+
+	return true;
+
+fail:
+	show_regs(regs);
+
+	while (true)
+		halt();
+}
diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c
index b991aa4bdfae..5bcbd413b409 100644
--- a/arch/x86/mm/extable.c
+++ b/arch/x86/mm/extable.c
@@ -5,6 +5,7 @@
 #include <xen/xen.h>
 
 #include <asm/fpu/internal.h>
+#include <asm/sev-es.h>
 #include <asm/traps.h>
 #include <asm/kdebug.h>
 
-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Joerg Roedel <joro@8bytes.org>
To: x86@kernel.org
Cc: Juergen Gross <jgross@suse.com>,
	Tom Lendacky <thomas.lendacky@amd.com>,
	Thomas Hellstrom <thellstrom@vmware.com>,
	Joerg Roedel <jroedel@suse.de>, Mike Stunes <mstunes@vmware.com>,
	Kees Cook <keescook@chromium.org>,
	kvm@vger.kernel.org, Peter Zijlstra <peterz@infradead.org>,
	Cfir Cohen <cfir@google.com>, Joerg Roedel <joro@8bytes.org>,
	Dave Hansen <dave.hansen@linux.intel.com>,
	linux-kernel@vger.kernel.org,
	virtualization@lists.linux-foundation.org,
	Masami Hiramatsu <mhiramat@kernel.org>,
	Andy Lutomirski <luto@kernel.org>,
	hpa@zytor.com, Erdem Aktas <erdemaktas@google.com>,
	David Rientjes <rientjes@google.com>,
	Dan Williams <dan.j.williams@intel.com>,
	Jiri Slaby <jslaby@suse.cz>
Subject: [PATCH v3 42/75] x86/sev-es: Setup GHCB based boot #VC handler
Date: Tue, 28 Apr 2020 17:16:52 +0200	[thread overview]
Message-ID: <20200428151725.31091-43-joro@8bytes.org> (raw)
In-Reply-To: <20200428151725.31091-1-joro@8bytes.org>

From: Joerg Roedel <jroedel@suse.de>

Add the infrastructure to handle #VC exceptions when the kernel runs
on virtual addresses and has a GHCB mapped. This handler will be used
until the runtime #VC handler takes over.

Signed-off-by: Joerg Roedel <jroedel@suse.de>
---
 arch/x86/include/asm/segment.h  |   2 +-
 arch/x86/include/asm/sev-es.h   |   1 +
 arch/x86/kernel/head64.c        |   6 ++
 arch/x86/kernel/sev-es-shared.c |  14 ++--
 arch/x86/kernel/sev-es.c        | 116 ++++++++++++++++++++++++++++++++
 arch/x86/mm/extable.c           |   1 +
 6 files changed, 132 insertions(+), 8 deletions(-)

diff --git a/arch/x86/include/asm/segment.h b/arch/x86/include/asm/segment.h
index 6669164abadc..5b648066504c 100644
--- a/arch/x86/include/asm/segment.h
+++ b/arch/x86/include/asm/segment.h
@@ -230,7 +230,7 @@
 #define NUM_EXCEPTION_VECTORS		32
 
 /* Bitmask of exception vectors which push an error code on the stack: */
-#define EXCEPTION_ERRCODE_MASK		0x00027d00
+#define EXCEPTION_ERRCODE_MASK		0x20027d00
 
 #define GDT_SIZE			(GDT_ENTRIES*8)
 #define GDT_ENTRY_TLS_ENTRIES		3
diff --git a/arch/x86/include/asm/sev-es.h b/arch/x86/include/asm/sev-es.h
index b2cbcd40b52e..e1ed963a57ec 100644
--- a/arch/x86/include/asm/sev-es.h
+++ b/arch/x86/include/asm/sev-es.h
@@ -74,5 +74,6 @@ static inline u64 lower_bits(u64 val, unsigned int bits)
 }
 
 extern void vc_no_ghcb(void);
+extern bool vc_boot_ghcb(struct pt_regs *regs);
 
 #endif
diff --git a/arch/x86/kernel/head64.c b/arch/x86/kernel/head64.c
index 9586522bfcb3..d83d59c15548 100644
--- a/arch/x86/kernel/head64.c
+++ b/arch/x86/kernel/head64.c
@@ -386,6 +386,12 @@ void __init do_early_exception(struct pt_regs *regs, int trapnr)
 	    early_make_pgtable(native_read_cr2()))
 		return;
 
+#ifdef CONFIG_AMD_MEM_ENCRYPT
+	if (trapnr == X86_TRAP_VC &&
+	    vc_boot_ghcb(regs))
+		return;
+#endif
+
 	early_fixup_exception(regs, trapnr);
 }
 
diff --git a/arch/x86/kernel/sev-es-shared.c b/arch/x86/kernel/sev-es-shared.c
index 5703f9b17e70..3d2299fb5e3f 100644
--- a/arch/x86/kernel/sev-es-shared.c
+++ b/arch/x86/kernel/sev-es-shared.c
@@ -9,7 +9,7 @@
  * and is included directly into both code-bases.
  */
 
-static void __maybe_unused sev_es_terminate(unsigned int reason)
+static void sev_es_terminate(unsigned int reason)
 {
 	u64 val = GHCB_SEV_TERMINATE;
 
@@ -27,7 +27,7 @@ static void __maybe_unused sev_es_terminate(unsigned int reason)
 		asm volatile("hlt\n" : : : "memory");
 }
 
-static bool __maybe_unused sev_es_negotiate_protocol(void)
+static bool sev_es_negotiate_protocol(void)
 {
 	u64 val;
 
@@ -46,7 +46,7 @@ static bool __maybe_unused sev_es_negotiate_protocol(void)
 	return true;
 }
 
-static void __maybe_unused vc_ghcb_invalidate(struct ghcb *ghcb)
+static void vc_ghcb_invalidate(struct ghcb *ghcb)
 {
 	memset(ghcb->save.valid_bitmap, 0, sizeof(ghcb->save.valid_bitmap));
 }
@@ -58,9 +58,9 @@ static bool vc_decoding_needed(unsigned long exit_code)
 		 exit_code <= SVM_EXIT_LAST_EXCP);
 }
 
-static enum es_result __maybe_unused vc_init_em_ctxt(struct es_em_ctxt *ctxt,
-						     struct pt_regs *regs,
-						     unsigned long exit_code)
+static enum es_result vc_init_em_ctxt(struct es_em_ctxt *ctxt,
+				      struct pt_regs *regs,
+				      unsigned long exit_code)
 {
 	enum es_result ret = ES_OK;
 
@@ -73,7 +73,7 @@ static enum es_result __maybe_unused vc_init_em_ctxt(struct es_em_ctxt *ctxt,
 	return ret;
 }
 
-static void __maybe_unused vc_finish_insn(struct es_em_ctxt *ctxt)
+static void vc_finish_insn(struct es_em_ctxt *ctxt)
 {
 	ctxt->regs->ip += ctxt->insn.length;
 }
diff --git a/arch/x86/kernel/sev-es.c b/arch/x86/kernel/sev-es.c
index 0d20770decce..9de5bb23cb0a 100644
--- a/arch/x86/kernel/sev-es.c
+++ b/arch/x86/kernel/sev-es.c
@@ -7,7 +7,9 @@
  * Author: Joerg Roedel <jroedel@suse.de>
  */
 
+#include <linux/sched/debug.h>	/* For show_regs() */
 #include <linux/kernel.h>
+#include <linux/printk.h>
 #include <linux/mm.h>
 
 #include <asm/trap_defs.h>
@@ -15,8 +17,21 @@
 #include <asm/insn-eval.h>
 #include <asm/fpu/internal.h>
 #include <asm/processor.h>
+#include <asm/trap_defs.h>
 #include <asm/svm.h>
 
+/* For early boot hypervisor communication in SEV-ES enabled guests */
+static struct ghcb boot_ghcb_page __bss_decrypted __aligned(PAGE_SIZE);
+
+/*
+ * Needs to be in the .data section because we need it NULL before bss is
+ * cleared
+ */
+static struct ghcb __initdata *boot_ghcb;
+
+/* Needed in vc_early_vc_forward_exception */
+void do_early_exception(struct pt_regs *regs, int trapnr);
+
 static inline u64 sev_es_rd_ghcb_msr(void)
 {
 	return native_read_msr(MSR_AMD64_SEV_ES_GHCB);
@@ -161,3 +176,104 @@ static enum es_result vc_read_mem(struct es_em_ctxt *ctxt,
 
 /* Include code shared with pre-decompression boot stage */
 #include "sev-es-shared.c"
+
+/*
+ * This function runs on the first #VC exception after the kernel
+ * switched to virtual addresses.
+ */
+static bool __init sev_es_setup_ghcb(void)
+{
+	/* First make sure the hypervisor talks a supported protocol. */
+	if (!sev_es_negotiate_protocol())
+		return false;
+	/*
+	 * Clear the boot_ghcb. The first exception comes in before the bss
+	 * section is cleared.
+	 */
+	memset(&boot_ghcb_page, 0, PAGE_SIZE);
+
+	/* Alright - Make the boot-ghcb public */
+	boot_ghcb = &boot_ghcb_page;
+
+	return true;
+}
+
+static void __init vc_early_vc_forward_exception(struct es_em_ctxt *ctxt)
+{
+	int trapnr = ctxt->fi.vector;
+
+	if (trapnr == X86_TRAP_PF)
+		native_write_cr2(ctxt->fi.cr2);
+
+	ctxt->regs->orig_ax = ctxt->fi.error_code;
+	do_early_exception(ctxt->regs, trapnr);
+}
+
+static enum es_result vc_handle_exitcode(struct es_em_ctxt *ctxt,
+					 struct ghcb *ghcb,
+					 unsigned long exit_code)
+{
+	enum es_result result;
+
+	switch (exit_code) {
+	default:
+		/*
+		 * Unexpected #VC exception
+		 */
+		result = ES_UNSUPPORTED;
+	}
+
+	return result;
+}
+
+bool __init vc_boot_ghcb(struct pt_regs *regs)
+{
+	unsigned long exit_code = regs->orig_ax;
+	struct es_em_ctxt ctxt;
+	enum es_result result;
+
+	/* Do initial setup or terminate the guest */
+	if (unlikely(boot_ghcb == NULL && !sev_es_setup_ghcb()))
+		sev_es_terminate(GHCB_SEV_ES_REASON_GENERAL_REQUEST);
+
+	vc_ghcb_invalidate(boot_ghcb);
+	result = vc_init_em_ctxt(&ctxt, regs, exit_code);
+
+	if (result == ES_OK)
+		result = vc_handle_exitcode(&ctxt, boot_ghcb, exit_code);
+
+	/* Done - now check the result */
+	switch (result) {
+	case ES_OK:
+		vc_finish_insn(&ctxt);
+		break;
+	case ES_UNSUPPORTED:
+		early_printk("PANIC: Unsupported exit-code 0x%02lx in early #VC exception (IP: 0x%lx)\n",
+				exit_code, regs->ip);
+		goto fail;
+	case ES_VMM_ERROR:
+		early_printk("PANIC: Failure in communication with VMM (exit-code 0x%02lx IP: 0x%lx)\n",
+				exit_code, regs->ip);
+		goto fail;
+	case ES_DECODE_FAILED:
+		early_printk("PANIC: Failed to decode instruction (exit-code 0x%02lx IP: 0x%lx)\n",
+				exit_code, regs->ip);
+		goto fail;
+	case ES_EXCEPTION:
+		vc_early_vc_forward_exception(&ctxt);
+		break;
+	case ES_RETRY:
+		/* Nothing to do */
+		break;
+	default:
+		BUG();
+	}
+
+	return true;
+
+fail:
+	show_regs(regs);
+
+	while (true)
+		halt();
+}
diff --git a/arch/x86/mm/extable.c b/arch/x86/mm/extable.c
index b991aa4bdfae..5bcbd413b409 100644
--- a/arch/x86/mm/extable.c
+++ b/arch/x86/mm/extable.c
@@ -5,6 +5,7 @@
 #include <xen/xen.h>
 
 #include <asm/fpu/internal.h>
+#include <asm/sev-es.h>
 #include <asm/traps.h>
 #include <asm/kdebug.h>
 
-- 
2.17.1

  parent reply	other threads:[~2020-04-28 15:22 UTC|newest]

Thread overview: 210+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-04-28 15:16 [PATCH v3 00/75] x86: SEV-ES Guest Support Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 01/75] KVM: SVM: Add GHCB definitions Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 02/75] KVM: SVM: Add GHCB Accessor functions Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 03/75] KVM: SVM: Use __packed shorthand Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-29 10:12   ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 04/75] x86/cpufeatures: Add SEV-ES CPU feature Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 05/75] x86/traps: Move some definitions to <asm/trap_defs.h> Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 06/75] x86/insn: Make inat-tables.c suitable for pre-decompression code Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 07/75] x86/umip: Factor out instruction fetch Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 08/75] x86/umip: Factor out instruction decoding Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-30 16:31   ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 09/75] x86/insn: Add insn_get_modrm_reg_off() Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 10/75] x86/insn: Add insn_rep_prefix() helper Joerg Roedel
2020-05-04  8:46   ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 11/75] x86/boot/compressed/64: Disable red-zone usage Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 12/75] x86/boot/compressed/64: Switch to __KERNEL_CS after GDT is loaded Joerg Roedel
2020-05-04 10:41   ` Borislav Petkov
2020-05-04 11:27     ` Joerg Roedel
2020-05-04 18:30   ` [tip: x86/boot] " tip-bot2 for Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 13/75] x86/boot/compressed/64: Add IDT Infrastructure Joerg Roedel
2020-05-04 10:54   ` Borislav Petkov
2020-05-04 11:28     ` Joerg Roedel
2020-06-03  9:06       ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 14/75] x86/boot/compressed/64: Rename kaslr_64.c to ident_map_64.c Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 15/75] x86/boot/compressed/64: Add page-fault handler Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 16/75] x86/boot/compressed/64: Always switch to own page-table Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 17/75] x86/boot/compressed/64: Don't pre-map memory in KASLR code Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 18/75] x86/boot/compressed/64: Change add_identity_map() to take start and end Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 19/75] x86/boot/compressed/64: Add stage1 #VC handler Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-05-09  9:05   ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 20/75] x86/boot/compressed/64: Call set_sev_encryption_mask earlier Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 21/75] x86/boot/compressed/64: Check return value of kernel_ident_mapping_init() Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 22/75] x86/boot/compressed/64: Add set_page_en/decrypted() helpers Joerg Roedel
2020-05-11 10:02   ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 23/75] x86/boot/compressed/64: Setup GHCB Based VC Exception handler Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-05-11 20:07   ` Borislav Petkov
2020-06-03 10:08     ` Joerg Roedel
2020-05-12 18:11   ` Borislav Petkov
2020-05-12 21:08     ` Joerg Roedel
2020-05-13  8:59       ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 24/75] x86/boot/compressed/64: Unmap GHCB page before booting the kernel Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-05-13 11:13   ` Borislav Petkov
2020-05-13 11:30     ` Joerg Roedel
2020-05-13 11:46       ` Borislav Petkov
2020-06-03 10:40         ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 25/75] x86/sev-es: Add support for handling IOIO exceptions Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-05-13 17:58   ` Borislav Petkov
2020-05-16  7:57   ` Borislav Petkov
2020-06-03 14:19     ` Joerg Roedel
2020-05-20  6:20   ` Sean Christopherson
2020-06-03 14:23     ` Joerg Roedel
2020-06-03 23:07       ` Sean Christopherson
2020-06-04 10:15         ` Joerg Roedel
2020-06-04 10:15           ` Joerg Roedel
2020-06-04 14:59           ` Sean Christopherson
2020-06-04 14:59             ` Sean Christopherson
2020-06-11 10:03             ` Joerg Roedel
2020-06-11 10:03               ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 26/75] x86/fpu: Move xgetbv()/xsetbv() into separate header Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 27/75] x86/sev-es: Add CPUID handling to #VC handler Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 28/75] x86/idt: Move IDT to data segment Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 29/75] x86/idt: Split idt_data setup out of set_intr_gate() Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 30/75] x86/idt: Move two function from k/idt.c to i/a/desc.h Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 31/75] x86/head/64: Install boot GDT Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-05-18  8:23   ` Borislav Petkov
2020-06-04 11:48     ` Joerg Roedel
2020-06-04 14:13       ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 32/75] x86/head/64: Reload GDT after switch to virtual addresses Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 33/75] x86/head/64: Load segment registers earlier Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 34/75] x86/head/64: Switch to initial stack earlier Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 35/75] x86/head/64: Build k/head64.c with -fno-stack-protector Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-05-19  9:15   ` Borislav Petkov
2020-06-03 15:21     ` Joerg Roedel
2020-05-19 13:58   ` Brian Gerst
2020-05-19 13:58     ` Brian Gerst
2020-06-03 15:18     ` Joerg Roedel
2020-06-03 15:18       ` Joerg Roedel
2020-06-03 17:14       ` Brian Gerst
2020-06-03 17:14         ` Brian Gerst
2020-04-28 15:16 ` [PATCH v3 36/75] x86/head/64: Load IDT earlier Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 37/75] x86/head/64: Move early exception dispatch to C code Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 38/75] x86/sev-es: Add SEV-ES Feature Detection Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-05-20  8:39   ` Borislav Petkov
2020-06-03 15:24     ` Joerg Roedel
2020-06-03 15:24       ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 39/75] x86/sev-es: Print SEV-ES info into kernel log Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 40/75] x86/sev-es: Compile early handler code into kernel image Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-05-20  9:14   ` Borislav Petkov
2020-06-04 11:54     ` Joerg Roedel
2020-06-04 15:19       ` Borislav Petkov
2020-06-11 10:05         ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 41/75] x86/sev-es: Setup early #VC handler Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-04-28 15:16 ` Joerg Roedel [this message]
2020-04-28 15:16   ` [PATCH v3 42/75] x86/sev-es: Setup GHCB based boot " Joerg Roedel
2020-05-20 19:22   ` Borislav Petkov
2020-06-04 12:07     ` Joerg Roedel
2020-06-04 15:30       ` Borislav Petkov
2020-06-04 15:30         ` Borislav Petkov
2020-06-11 10:14         ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 43/75] x86/sev-es: Setup per-cpu GHCBs for the runtime handler Joerg Roedel
2020-04-28 15:16   ` Joerg Roedel
2020-05-22  8:33   ` Borislav Petkov
2020-05-22  8:33     ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 44/75] x86/sev-es: Allocate and Map IST stacks for #VC handler Joerg Roedel
2020-05-22  9:49   ` Borislav Petkov
2020-05-22  9:49     ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 45/75] x86/dumpstack/64: Handle #VC exception stacks Joerg Roedel
2020-05-22 13:06   ` Borislav Petkov
2020-05-22 13:06     ` Borislav Petkov
2020-04-28 15:16 ` [PATCH v3 46/75] x86/sev-es: Shift #VC IST Stack in nmi_enter()/nmi_exit() Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 47/75] x86/sev-es: Add Runtime #VC Exception Handler Joerg Roedel
2020-05-23  7:59   ` Borislav Petkov
2020-06-11 11:48     ` Joerg Roedel
2020-06-11 17:38       ` Sean Christopherson
2020-06-11 17:38         ` Sean Christopherson
2020-06-11 18:16         ` Joerg Roedel
2020-06-12 13:13       ` Borislav Petkov
2020-06-11 11:53     ` Joerg Roedel
2020-06-11 11:53       ` Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 48/75] x86/sev-es: Wire up existing #VC exit-code handlers Joerg Roedel
2020-04-28 15:16 ` [PATCH v3 49/75] x86/sev-es: Handle instruction fetches from user-space Joerg Roedel
2020-05-23  9:23   ` Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 50/75] x86/sev-es: Do not crash on #VC exceptions " Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 51/75] x86/sev-es: Handle MMIO events Joerg Roedel
2020-05-20  6:32   ` Sean Christopherson
2020-06-11 12:40     ` Joerg Roedel
2020-05-25  8:02   ` Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 52/75] x86/sev-es: Handle MMIO String Instructions Joerg Roedel
2020-05-25  9:47   ` Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 53/75] x86/sev-es: Handle MSR events Joerg Roedel
2020-05-25  9:53   ` Borislav Petkov
2020-05-25  9:53     ` Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 54/75] x86/sev-es: Handle DR7 read/write events Joerg Roedel
2020-05-25 10:59   ` Borislav Petkov
2020-06-11 13:06     ` Joerg Roedel
2020-06-11 13:06       ` Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 55/75] x86/sev-es: Handle WBINVD Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 56/75] x86/sev-es: Handle RDTSC(P) Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 57/75] x86/sev-es: Handle RDPMC Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 58/75] x86/sev-es: Handle INVD Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 59/75] x86/sev-es: Handle MONITOR/MONITORX Events Joerg Roedel
2020-05-20  6:38   ` Sean Christopherson
2020-06-11 13:10     ` Joerg Roedel
2020-06-11 17:13       ` Sean Christopherson
2020-06-11 19:33         ` Tom Lendacky
2020-06-12  9:25           ` Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 60/75] x86/sev-es: Handle MWAIT/MWAITX Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 61/75] x86/sev-es: Handle VMMCALL Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 62/75] x86/sev-es: Handle #AC Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 63/75] x86/sev-es: Handle #DB Events Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 64/75] x86/sev-es: Cache CPUID results for improved performance Joerg Roedel
2020-05-06 18:08   ` Mike Stunes
2020-05-06 18:08     ` Mike Stunes
2020-05-06 23:02     ` Tom Lendacky
2020-05-06 23:02       ` Tom Lendacky
2020-05-20  5:16   ` Sean Christopherson
2020-05-26  9:19     ` Borislav Petkov
2020-05-27 17:49       ` Tom Lendacky
2020-05-27 15:34   ` Tom Lendacky
2020-06-12  9:12   ` Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 65/75] x86/paravirt: Allow hypervisor specific VMMCALL handling under SEV-ES Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 66/75] x86/kvm: Add KVM " Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 67/75] x86/vmware: Add VMware specific handling for VMMCALL " Joerg Roedel
2020-05-28 12:38   ` Borislav Petkov
2020-05-28 12:38     ` Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 68/75] x86/realmode: Add SEV-ES specific trampoline entry point Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 69/75] x86/realmode: Setup AP jump table Joerg Roedel
2020-05-29  9:02   ` Borislav Petkov
2020-05-29 16:21     ` Tom Lendacky
2020-04-28 15:17 ` [PATCH v3 70/75] x86/head/64: Setup TSS early for secondary CPUs Joerg Roedel
2020-05-07 10:51   ` [x86/head/64] e5a6f186af: BUG:kernel_hang_in_boot_stage kernel test robot
2020-05-07 10:51     ` kernel test robot
2020-05-07 10:51     ` kernel test robot
2020-06-02 15:46   ` [PATCH v3 70/75] x86/head/64: Setup TSS early for secondary CPUs Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 71/75] x86/head/64: Don't call verify_cpu() on starting APs Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 72/75] x86/head/64: Rename start_cpu0 Joerg Roedel
2020-04-28 15:17 ` [PATCH v3 73/75] x86/sev-es: Support CPU offline/online Joerg Roedel
2020-06-03  9:54   ` Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 74/75] x86/sev-es: Handle NMI State Joerg Roedel
2020-06-03  9:59   ` Borislav Petkov
2020-06-03  9:59     ` Borislav Petkov
2020-04-28 15:17 ` [PATCH v3 75/75] x86/efi: Add GHCB mappings when SEV-ES is active Joerg Roedel
2020-06-03 13:52   ` Borislav Petkov

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