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From: Fuad Tabba <tabba@google.com>
To: linux-arm-kernel@lists.infradead.org
Cc: will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com,
	 maz@kernel.org, ardb@kernel.org, james.morse@arm.com,
	 alexandru.elisei@arm.com, suzuki.poulose@arm.com,
	robin.murphy@arm.com,  tabba@google.com
Subject: [PATCH v4 13/18] arm64: __clean_dcache_area_poc to take end parameter instead of size
Date: Mon, 24 May 2021 09:29:56 +0100	[thread overview]
Message-ID: <20210524083001.2586635-14-tabba@google.com> (raw)
In-Reply-To: <20210524083001.2586635-1-tabba@google.com>

To be consistent with other functions with similar names and
functionality in cacheflush.h, cache.S, and cachetlb.rst, change
to specify the range in terms of start and end, as opposed to
start and size.

Because the code is shared with __dma_clean_area, it changes the
parameters for that as well. However, __dma_clean_area is local to
cache.S, so no other users are affected.

No functional change intended.

Reported-by: Will Deacon <will@kernel.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Fuad Tabba <tabba@google.com>
---
 arch/arm64/include/asm/cacheflush.h |  2 +-
 arch/arm64/kernel/efi-entry.S       |  5 +++--
 arch/arm64/mm/cache.S               | 16 +++++++---------
 3 files changed, 11 insertions(+), 12 deletions(-)

diff --git a/arch/arm64/include/asm/cacheflush.h b/arch/arm64/include/asm/cacheflush.h
index 695f88864784..3255878d6f30 100644
--- a/arch/arm64/include/asm/cacheflush.h
+++ b/arch/arm64/include/asm/cacheflush.h
@@ -60,7 +60,7 @@ extern void __flush_icache_range(unsigned long start, unsigned long end);
 extern void invalidate_icache_range(unsigned long start, unsigned long end);
 extern void __flush_dcache_area(unsigned long start, unsigned long end);
 extern void __inval_dcache_area(unsigned long start, unsigned long end);
-extern void __clean_dcache_area_poc(void *addr, size_t len);
+extern void __clean_dcache_area_poc(unsigned long start, unsigned long end);
 extern void __clean_dcache_area_pop(void *addr, size_t len);
 extern void __clean_dcache_area_pou(void *addr, size_t len);
 extern long __flush_cache_user_range(unsigned long start, unsigned long end);
diff --git a/arch/arm64/kernel/efi-entry.S b/arch/arm64/kernel/efi-entry.S
index 0073b24b5d25..b0f728fb61f0 100644
--- a/arch/arm64/kernel/efi-entry.S
+++ b/arch/arm64/kernel/efi-entry.S
@@ -28,6 +28,7 @@ SYM_CODE_START(efi_enter_kernel)
 	 * stale icache entries from before relocation.
 	 */
 	ldr	w1, =kernel_size
+	add	x1, x0, x1
 	bl	__clean_dcache_area_poc
 	ic	ialluis
 
@@ -36,7 +37,7 @@ SYM_CODE_START(efi_enter_kernel)
 	 * so that we can safely disable the MMU and caches.
 	 */
 	adr	x0, 0f
-	ldr	w1, 3f
+	adr	x1, 3f
 	bl	__clean_dcache_area_poc
 0:
 	/* Turn off Dcache and MMU */
@@ -64,5 +65,5 @@ SYM_CODE_START(efi_enter_kernel)
 	mov	x2, xzr
 	mov	x3, xzr
 	br	x19
+3:
 SYM_CODE_END(efi_enter_kernel)
-3:	.long	. - 0b
diff --git a/arch/arm64/mm/cache.S b/arch/arm64/mm/cache.S
index b2880aeba7ca..e2e2740c55ce 100644
--- a/arch/arm64/mm/cache.S
+++ b/arch/arm64/mm/cache.S
@@ -171,24 +171,23 @@ SYM_FUNC_END_PI(__inval_dcache_area)
 SYM_FUNC_END(__dma_inv_area)
 
 /*
- *	__clean_dcache_area_poc(kaddr, size)
+ *	__clean_dcache_area_poc(start, end)
  *
- * 	Ensure that any D-cache lines for the interval [kaddr, kaddr+size)
+ * 	Ensure that any D-cache lines for the interval [start, end)
  * 	are cleaned to the PoC.
  *
- *	- kaddr   - kernel address
- *	- size    - size in question
+ *	- start   - virtual start address of region
+ *	- end     - virtual end address of region
  */
 SYM_FUNC_START_LOCAL(__dma_clean_area)
 SYM_FUNC_START_PI(__clean_dcache_area_poc)
 	/* FALLTHROUGH */
 
 /*
- *	__dma_clean_area(start, size)
+ *	__dma_clean_area(start, end)
  *	- start   - virtual start address of region
- *	- size    - size in question
+ *	- end     - virtual end address of region
  */
-	add	x1, x0, x1
 	dcache_by_line_op cvac, sy, x0, x1, x2, x3
 	ret
 SYM_FUNC_END_PI(__clean_dcache_area_poc)
@@ -204,10 +203,10 @@ SYM_FUNC_END(__dma_clean_area)
  *	- size    - size in question
  */
 SYM_FUNC_START_PI(__clean_dcache_area_pop)
+	add	x1, x0, x1
 	alternative_if_not ARM64_HAS_DCPOP
 	b	__clean_dcache_area_poc
 	alternative_else_nop_endif
-	add	x1, x0, x1
 	dcache_by_line_op cvap, sy, x0, x1, x2, x3
 	ret
 SYM_FUNC_END_PI(__clean_dcache_area_pop)
@@ -236,7 +235,6 @@ SYM_FUNC_START_PI(__dma_map_area)
 	add	x1, x0, x1
 	cmp	w2, #DMA_FROM_DEVICE
 	b.eq	__dma_inv_area
-	sub	x1, x1, x0
 	b	__dma_clean_area
 SYM_FUNC_END_PI(__dma_map_area)
 
-- 
2.31.1.818.g46aad6cb9e-goog


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  parent reply	other threads:[~2021-05-24 17:37 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-24  8:29 [PATCH v4 00/18] Tidy up cache.S Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 01/18] arm64: assembler: replace `kaddr` with `addr` Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 02/18] arm64: assembler: add conditional cache fixups Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 03/18] arm64: Apply errata to swsusp_arch_suspend_exit Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 04/18] arm64: Do not enable uaccess for flush_icache_range Fuad Tabba
2021-05-24  9:02   ` Ard Biesheuvel
2021-05-24  9:20     ` Fuad Tabba
2021-05-24  9:41       ` Ard Biesheuvel
2021-05-24  9:53         ` Mark Rutland
2021-05-24  9:57   ` Mark Rutland
2021-05-25 11:20   ` Catalin Marinas
2021-05-24  8:29 ` [PATCH v4 05/18] arm64: Do not enable uaccess for invalidate_icache_range Fuad Tabba
2021-05-25 11:21   ` Catalin Marinas
2021-05-24  8:29 ` [PATCH v4 06/18] arm64: Downgrade flush_icache_range to invalidate Fuad Tabba
2021-05-25 11:21   ` Catalin Marinas
2021-05-24  8:29 ` [PATCH v4 07/18] arm64: assembler: remove user_alt Fuad Tabba
2021-05-24  9:58   ` Mark Rutland
2021-05-24  8:29 ` [PATCH v4 08/18] arm64: Move documentation of dcache_by_line_op Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 09/18] arm64: Fix comments to refer to correct function __flush_icache_range Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 10/18] arm64: __inval_dcache_area to take end parameter instead of size Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 11/18] arm64: dcache_by_line_op " Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 12/18] arm64: __flush_dcache_area " Fuad Tabba
2021-05-24  8:29 ` Fuad Tabba [this message]
2021-05-24  8:29 ` [PATCH v4 14/18] arm64: __clean_dcache_area_pop " Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 15/18] arm64: __clean_dcache_area_pou " Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 16/18] arm64: sync_icache_aliases " Fuad Tabba
2021-05-24  8:30 ` [PATCH v4 17/18] arm64: Fix cache maintenance function comments Fuad Tabba
2021-05-24  8:30 ` [PATCH v4 18/18] arm64: Rename arm64-internal cache maintenance functions Fuad Tabba
2021-05-24  9:47 ` [PATCH v4 00/18] Tidy up cache.S Ard Biesheuvel
2021-05-25 18:58 ` Will Deacon

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