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From: Fuad Tabba <tabba@google.com>
To: linux-arm-kernel@lists.infradead.org
Cc: will@kernel.org, catalin.marinas@arm.com, mark.rutland@arm.com,
	 maz@kernel.org, ardb@kernel.org, james.morse@arm.com,
	 alexandru.elisei@arm.com, suzuki.poulose@arm.com,
	robin.murphy@arm.com,  tabba@google.com
Subject: [PATCH v4 01/18] arm64: assembler: replace `kaddr` with `addr`
Date: Mon, 24 May 2021 09:29:44 +0100	[thread overview]
Message-ID: <20210524083001.2586635-2-tabba@google.com> (raw)
In-Reply-To: <20210524083001.2586635-1-tabba@google.com>

From: Mark Rutland <mark.rutland@arm.com>

The `__dcache_op_workaround_clean_cache` and `dcache_by_line_op` macros
are only expected to be usedc on kernel memory, without a user fault
fixup, and so we named their address variables `kaddr` to make this
clear.

Subseuqent patches will modify these to also work on user memory with an
(optional) user fault fixup, where `kaddr` won't make as much sense. To
aid the legibility of patches, this patch (only) replaces `kaddr` with
`addr` as a preparatory step.

There should be no functional change as a result of this patch.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Fuad Tabba <tabba@google.com>
Cc: Ard Biesheuvel <aedb@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: Fuad Tabba <tabba@google.com>
Cc: Will Deacon <will@kernel.org>
---
 arch/arm64/include/asm/assembler.h | 32 +++++++++++++++---------------
 1 file changed, 16 insertions(+), 16 deletions(-)

diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 8418c1bd8f04..6a0fbc599196 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -377,47 +377,47 @@ alternative_cb_end
 
 /*
  * Macro to perform a data cache maintenance for the interval
- * [kaddr, kaddr + size)
+ * [addr, addr + size)
  *
  * 	op:		operation passed to dc instruction
  * 	domain:		domain used in dsb instruciton
- * 	kaddr:		starting virtual address of the region
+ * 	addr:		starting virtual address of the region
  * 	size:		size of the region
- * 	Corrupts:	kaddr, size, tmp1, tmp2
+ * 	Corrupts:	addr, size, tmp1, tmp2
  */
-	.macro __dcache_op_workaround_clean_cache, op, kaddr
+	.macro __dcache_op_workaround_clean_cache, op, addr
 alternative_if_not ARM64_WORKAROUND_CLEAN_CACHE
-	dc	\op, \kaddr
+	dc	\op, \addr
 alternative_else
-	dc	civac, \kaddr
+	dc	civac, \addr
 alternative_endif
 	.endm
 
-	.macro dcache_by_line_op op, domain, kaddr, size, tmp1, tmp2
+	.macro dcache_by_line_op op, domain, addr, size, tmp1, tmp2
 	dcache_line_size \tmp1, \tmp2
-	add	\size, \kaddr, \size
+	add	\size, \addr, \size
 	sub	\tmp2, \tmp1, #1
-	bic	\kaddr, \kaddr, \tmp2
+	bic	\addr, \addr, \tmp2
 9998:
 	.ifc	\op, cvau
-	__dcache_op_workaround_clean_cache \op, \kaddr
+	__dcache_op_workaround_clean_cache \op, \addr
 	.else
 	.ifc	\op, cvac
-	__dcache_op_workaround_clean_cache \op, \kaddr
+	__dcache_op_workaround_clean_cache \op, \addr
 	.else
 	.ifc	\op, cvap
-	sys	3, c7, c12, 1, \kaddr	// dc cvap
+	sys	3, c7, c12, 1, \addr	// dc cvap
 	.else
 	.ifc	\op, cvadp
-	sys	3, c7, c13, 1, \kaddr	// dc cvadp
+	sys	3, c7, c13, 1, \addr	// dc cvadp
 	.else
-	dc	\op, \kaddr
+	dc	\op, \addr
 	.endif
 	.endif
 	.endif
 	.endif
-	add	\kaddr, \kaddr, \tmp1
-	cmp	\kaddr, \size
+	add	\addr, \addr, \tmp1
+	cmp	\addr, \size
 	b.lo	9998b
 	dsb	\domain
 	.endm
-- 
2.31.1.818.g46aad6cb9e-goog


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  reply	other threads:[~2021-05-24 18:58 UTC|newest]

Thread overview: 30+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-05-24  8:29 [PATCH v4 00/18] Tidy up cache.S Fuad Tabba
2021-05-24  8:29 ` Fuad Tabba [this message]
2021-05-24  8:29 ` [PATCH v4 02/18] arm64: assembler: add conditional cache fixups Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 03/18] arm64: Apply errata to swsusp_arch_suspend_exit Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 04/18] arm64: Do not enable uaccess for flush_icache_range Fuad Tabba
2021-05-24  9:02   ` Ard Biesheuvel
2021-05-24  9:20     ` Fuad Tabba
2021-05-24  9:41       ` Ard Biesheuvel
2021-05-24  9:53         ` Mark Rutland
2021-05-24  9:57   ` Mark Rutland
2021-05-25 11:20   ` Catalin Marinas
2021-05-24  8:29 ` [PATCH v4 05/18] arm64: Do not enable uaccess for invalidate_icache_range Fuad Tabba
2021-05-25 11:21   ` Catalin Marinas
2021-05-24  8:29 ` [PATCH v4 06/18] arm64: Downgrade flush_icache_range to invalidate Fuad Tabba
2021-05-25 11:21   ` Catalin Marinas
2021-05-24  8:29 ` [PATCH v4 07/18] arm64: assembler: remove user_alt Fuad Tabba
2021-05-24  9:58   ` Mark Rutland
2021-05-24  8:29 ` [PATCH v4 08/18] arm64: Move documentation of dcache_by_line_op Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 09/18] arm64: Fix comments to refer to correct function __flush_icache_range Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 10/18] arm64: __inval_dcache_area to take end parameter instead of size Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 11/18] arm64: dcache_by_line_op " Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 12/18] arm64: __flush_dcache_area " Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 13/18] arm64: __clean_dcache_area_poc " Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 14/18] arm64: __clean_dcache_area_pop " Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 15/18] arm64: __clean_dcache_area_pou " Fuad Tabba
2021-05-24  8:29 ` [PATCH v4 16/18] arm64: sync_icache_aliases " Fuad Tabba
2021-05-24  8:30 ` [PATCH v4 17/18] arm64: Fix cache maintenance function comments Fuad Tabba
2021-05-24  8:30 ` [PATCH v4 18/18] arm64: Rename arm64-internal cache maintenance functions Fuad Tabba
2021-05-24  9:47 ` [PATCH v4 00/18] Tidy up cache.S Ard Biesheuvel
2021-05-25 18:58 ` Will Deacon

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