From: Catalin Marinas <catalin.marinas@arm.com> To: "Russell King (Oracle)" <linux@armlinux.org.uk> Cc: Peter Zijlstra <peterz@infradead.org>, Andy Lutomirski <luto@kernel.org>, x86@kernel.org, Dave Hansen <dave.hansen@intel.com>, LKML <linux-kernel@vger.kernel.org>, linux-mm@kvack.org, Andrew Morton <akpm@linux-foundation.org>, Mathieu Desnoyers <mathieu.desnoyers@efficios.com>, Nicholas Piggin <npiggin@gmail.com>, linux-arm-kernel@lists.infradead.org, Will Deacon <will@kernel.org> Subject: Re: [PATCH 7/8] membarrier: Remove arm (32) support for SYNC_CORE Date: Wed, 16 Jun 2021 16:04:56 +0100 [thread overview] Message-ID: <20210616150456.GC22433@arm.com> (raw) In-Reply-To: <20210616132226.GD22278@shell.armlinux.org.uk> On Wed, Jun 16, 2021 at 02:22:27PM +0100, Russell King wrote: > On Wed, Jun 16, 2021 at 01:10:58PM +0200, Peter Zijlstra wrote: > > On Wed, Jun 16, 2021 at 11:34:46AM +0100, Russell King (Oracle) wrote: > > > On Wed, Jun 16, 2021 at 12:20:06PM +0200, Peter Zijlstra wrote: > > > > On Wed, Jun 16, 2021 at 12:16:27PM +0200, Peter Zijlstra wrote: > > > > > On Tue, Jun 15, 2021 at 08:21:12PM -0700, Andy Lutomirski wrote: > > > > > > On arm32, the only way to safely flush icache from usermode is to call > > > > > > cacheflush(2). This also handles any required pipeline flushes, so > > > > > > membarrier's SYNC_CORE feature is useless on arm. Remove it. > > > > > > > > > > So SYNC_CORE is there to help an architecture that needs to do something > > > > > per CPU. If I$ invalidation is broadcast and I$ invalidation also > > > > > triggers the flush of any uarch caches derived from it (if there are > > > > > any). > > > > > > > > Incomplete sentence there: + then we don't need SYNC_CORE. > > > > > > > > > Now arm_syscall() NR(cacheflush) seems to do flush_icache_user_range(), > > > > > which, if I read things right, end up in arch/arm/mm/*.S, but that > > > > > doesn't consider cache_ops_need_broadcast(). > > > > > > > > > > Will suggests that perhaps ARM 11MPCore might need this due to their I$ > > > > > flush maybe not being broadcast > > > > > > If it leaves other cores with incoherent I cache, then that's already > > > a problem for SMP cores, since there could be no guarantee that the > > > modifications made by one core will be visible to some other core that > > > ends up running that code - and there is little option for userspace to > > > work around that except by pinning the thread making the modifications > > > and subsequently executing the code to a core. > > > > That's where SYNC_CORE can help. Or you make sys_cacheflush() do a > > system wide IPI. > > If it's a problem, then it needs fixing. sys_cacheflush() is used to > implement GCC's __builtin___clear_cache(). I'm not sure who added this > to gcc. I'm surprised that it works. I guess it's just luck that the thread doing the code writing doesn't migrate before the sys_cacheflush() call. > > > The same is also true of flush_icache_range() - which is used when > > > loading a kernel module. In the case Will is referring to, these alias > > > to the same code. > > > > Yes, cache_ops_need_broadcast() seems to be missing in more places. > > Likely only in places where we care about I/D coherency - as the data > cache is required to be PIPT on these SMP platforms. We had similar issue with the cache maintenance for DMA. The hack we employed (in cache.S) is relying on the MESI protocol internals and forcing a read/write for ownership before the D-cache maintenance. Luckily ARM11MPCore doesn't do speculative data loads to trigger some migration back. The simpler fix for flush_icache_range() is to disable preemption, read a word in a cacheline to force any dirty lines on another CPU to be evicted and then issue the D-cache maintenance (for those cache lines which are still dirty on the current CPU). It's a hack that only works on ARM11MPCore. Newer MP cores are saner. -- Catalin
WARNING: multiple messages have this Message-ID (diff)
From: Catalin Marinas <catalin.marinas@arm.com> To: "Russell King (Oracle)" <linux@armlinux.org.uk> Cc: Peter Zijlstra <peterz@infradead.org>, Andy Lutomirski <luto@kernel.org>, x86@kernel.org, Dave Hansen <dave.hansen@intel.com>, LKML <linux-kernel@vger.kernel.org>, linux-mm@kvack.org, Andrew Morton <akpm@linux-foundation.org>, Mathieu Desnoyers <mathieu.desnoyers@efficios.com>, Nicholas Piggin <npiggin@gmail.com>, linux-arm-kernel@lists.infradead.org, Will Deacon <will@kernel.org> Subject: Re: [PATCH 7/8] membarrier: Remove arm (32) support for SYNC_CORE Date: Wed, 16 Jun 2021 16:04:56 +0100 [thread overview] Message-ID: <20210616150456.GC22433@arm.com> (raw) In-Reply-To: <20210616132226.GD22278@shell.armlinux.org.uk> On Wed, Jun 16, 2021 at 02:22:27PM +0100, Russell King wrote: > On Wed, Jun 16, 2021 at 01:10:58PM +0200, Peter Zijlstra wrote: > > On Wed, Jun 16, 2021 at 11:34:46AM +0100, Russell King (Oracle) wrote: > > > On Wed, Jun 16, 2021 at 12:20:06PM +0200, Peter Zijlstra wrote: > > > > On Wed, Jun 16, 2021 at 12:16:27PM +0200, Peter Zijlstra wrote: > > > > > On Tue, Jun 15, 2021 at 08:21:12PM -0700, Andy Lutomirski wrote: > > > > > > On arm32, the only way to safely flush icache from usermode is to call > > > > > > cacheflush(2). This also handles any required pipeline flushes, so > > > > > > membarrier's SYNC_CORE feature is useless on arm. Remove it. > > > > > > > > > > So SYNC_CORE is there to help an architecture that needs to do something > > > > > per CPU. If I$ invalidation is broadcast and I$ invalidation also > > > > > triggers the flush of any uarch caches derived from it (if there are > > > > > any). > > > > > > > > Incomplete sentence there: + then we don't need SYNC_CORE. > > > > > > > > > Now arm_syscall() NR(cacheflush) seems to do flush_icache_user_range(), > > > > > which, if I read things right, end up in arch/arm/mm/*.S, but that > > > > > doesn't consider cache_ops_need_broadcast(). > > > > > > > > > > Will suggests that perhaps ARM 11MPCore might need this due to their I$ > > > > > flush maybe not being broadcast > > > > > > If it leaves other cores with incoherent I cache, then that's already > > > a problem for SMP cores, since there could be no guarantee that the > > > modifications made by one core will be visible to some other core that > > > ends up running that code - and there is little option for userspace to > > > work around that except by pinning the thread making the modifications > > > and subsequently executing the code to a core. > > > > That's where SYNC_CORE can help. Or you make sys_cacheflush() do a > > system wide IPI. > > If it's a problem, then it needs fixing. sys_cacheflush() is used to > implement GCC's __builtin___clear_cache(). I'm not sure who added this > to gcc. I'm surprised that it works. I guess it's just luck that the thread doing the code writing doesn't migrate before the sys_cacheflush() call. > > > The same is also true of flush_icache_range() - which is used when > > > loading a kernel module. In the case Will is referring to, these alias > > > to the same code. > > > > Yes, cache_ops_need_broadcast() seems to be missing in more places. > > Likely only in places where we care about I/D coherency - as the data > cache is required to be PIPT on these SMP platforms. We had similar issue with the cache maintenance for DMA. The hack we employed (in cache.S) is relying on the MESI protocol internals and forcing a read/write for ownership before the D-cache maintenance. Luckily ARM11MPCore doesn't do speculative data loads to trigger some migration back. The simpler fix for flush_icache_range() is to disable preemption, read a word in a cacheline to force any dirty lines on another CPU to be evicted and then issue the D-cache maintenance (for those cache lines which are still dirty on the current CPU). It's a hack that only works on ARM11MPCore. Newer MP cores are saner. -- Catalin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2021-06-16 15:05 UTC|newest] Thread overview: 165+ messages / expand[flat|nested] mbox.gz Atom feed top 2021-06-16 3:21 [PATCH 0/8] membarrier cleanups Andy Lutomirski 2021-06-16 3:21 ` [PATCH 1/8] membarrier: Document why membarrier() works Andy Lutomirski 2021-06-16 4:00 ` Nicholas Piggin 2021-06-16 7:30 ` Peter Zijlstra 2021-06-17 23:45 ` Andy Lutomirski 2021-06-16 3:21 ` [PATCH 2/8] x86/mm: Handle unlazying membarrier core sync in the arch code Andy Lutomirski 2021-06-16 4:25 ` Nicholas Piggin 2021-06-16 18:31 ` Andy Lutomirski 2021-06-16 17:49 ` Mathieu Desnoyers 2021-06-16 17:49 ` Mathieu Desnoyers 2021-06-16 18:31 ` Andy Lutomirski 2021-06-16 3:21 ` [PATCH 3/8] membarrier: Remove membarrier_arch_switch_mm() prototype in core code Andy Lutomirski 2021-06-16 4:26 ` Nicholas Piggin 2021-06-16 17:52 ` Mathieu Desnoyers 2021-06-16 17:52 ` Mathieu Desnoyers 2021-06-16 3:21 ` [PATCH 4/8] membarrier: Make the post-switch-mm barrier explicit Andy Lutomirski 2021-06-16 4:19 ` Nicholas Piggin 2021-06-16 7:35 ` Peter Zijlstra 2021-06-16 18:41 ` Andy Lutomirski 2021-06-17 1:37 ` Nicholas Piggin 2021-06-17 2:57 ` Andy Lutomirski 2021-06-17 5:32 ` Andy Lutomirski 2021-06-17 6:51 ` Nicholas Piggin 2021-06-17 23:49 ` Andy Lutomirski 2021-06-19 2:53 ` Nicholas Piggin 2021-06-19 3:20 ` Andy Lutomirski 2021-06-19 4:27 ` Nicholas Piggin 2021-06-17 9:08 ` [RFC][PATCH] sched: Use lightweight hazard pointers to grab lazy mms Peter Zijlstra 2021-06-17 9:10 ` Peter Zijlstra 2021-06-17 10:00 ` Nicholas Piggin 2021-06-17 9:13 ` Peter Zijlstra 2021-06-17 14:06 ` Andy Lutomirski 2021-06-17 9:28 ` Peter Zijlstra 2021-06-17 14:03 ` Andy Lutomirski 2021-06-17 14:10 ` Andy Lutomirski 2021-06-17 15:45 ` Peter Zijlstra 2021-06-18 3:29 ` Paul E. McKenney 2021-06-18 5:04 ` Andy Lutomirski 2021-06-17 15:02 ` [PATCH 4/8] membarrier: Make the post-switch-mm barrier explicit Paul E. McKenney 2021-06-18 0:06 ` Andy Lutomirski 2021-06-18 3:35 ` Paul E. McKenney 2021-06-17 8:45 ` Peter Zijlstra 2021-06-16 3:21 ` [PATCH 5/8] membarrier, kthread: Use _ONCE accessors for task->mm Andy Lutomirski 2021-06-16 4:28 ` Nicholas Piggin 2021-06-16 18:08 ` Mathieu Desnoyers 2021-06-16 18:08 ` Mathieu Desnoyers 2021-06-16 18:45 ` Andy Lutomirski 2021-06-16 3:21 ` [PATCH 6/8] powerpc/membarrier: Remove special barrier on mm switch Andy Lutomirski 2021-06-16 3:21 ` Andy Lutomirski 2021-06-16 4:36 ` Nicholas Piggin 2021-06-16 4:36 ` Nicholas Piggin 2021-06-16 3:21 ` [PATCH 7/8] membarrier: Remove arm (32) support for SYNC_CORE Andy Lutomirski 2021-06-16 3:21 ` Andy Lutomirski 2021-06-16 9:28 ` Russell King (Oracle) 2021-06-16 9:28 ` Russell King (Oracle) 2021-06-16 10:16 ` Peter Zijlstra 2021-06-16 10:16 ` Peter Zijlstra 2021-06-16 10:20 ` Peter Zijlstra 2021-06-16 10:20 ` Peter Zijlstra 2021-06-16 10:34 ` Russell King (Oracle) 2021-06-16 10:34 ` Russell King (Oracle) 2021-06-16 11:10 ` Peter Zijlstra 2021-06-16 11:10 ` Peter Zijlstra 2021-06-16 13:22 ` Russell King (Oracle) 2021-06-16 13:22 ` Russell King (Oracle) 2021-06-16 15:04 ` Catalin Marinas [this message] 2021-06-16 15:04 ` Catalin Marinas 2021-06-16 15:23 ` Russell King (Oracle) 2021-06-16 15:23 ` Russell King (Oracle) 2021-06-16 15:45 ` Catalin Marinas 2021-06-16 15:45 ` Catalin Marinas 2021-06-16 16:00 ` Catalin Marinas 2021-06-16 16:00 ` Catalin Marinas 2021-06-16 16:27 ` Russell King (Oracle) 2021-06-16 16:27 ` Russell King (Oracle) 2021-06-17 8:55 ` Krzysztof Hałasa 2021-06-17 8:55 ` Krzysztof Hałasa 2021-06-17 8:55 ` Krzysztof Hałasa 2021-06-18 12:54 ` Linus Walleij 2021-06-18 12:54 ` Linus Walleij 2021-06-18 12:54 ` Linus Walleij 2021-06-18 13:19 ` Russell King (Oracle) 2021-06-18 13:19 ` Russell King (Oracle) 2021-06-18 13:36 ` Arnd Bergmann 2021-06-18 13:36 ` Arnd Bergmann 2021-06-18 13:36 ` Arnd Bergmann 2021-06-17 10:40 ` Mark Rutland 2021-06-17 10:40 ` Mark Rutland 2021-06-17 11:23 ` Russell King (Oracle) 2021-06-17 11:23 ` Russell King (Oracle) 2021-06-17 11:33 ` Mark Rutland 2021-06-17 11:33 ` Mark Rutland 2021-06-17 13:41 ` Andy Lutomirski 2021-06-17 13:41 ` Andy Lutomirski 2021-06-17 13:51 ` Mark Rutland 2021-06-17 13:51 ` Mark Rutland 2021-06-17 14:00 ` Andy Lutomirski 2021-06-17 14:00 ` Andy Lutomirski 2021-06-17 14:20 ` Mark Rutland 2021-06-17 14:20 ` Mark Rutland 2021-06-17 15:01 ` Peter Zijlstra 2021-06-17 15:01 ` Peter Zijlstra 2021-06-17 15:13 ` Peter Zijlstra 2021-06-17 15:13 ` Peter Zijlstra 2021-06-17 14:16 ` Mathieu Desnoyers 2021-06-17 14:16 ` Mathieu Desnoyers 2021-06-17 14:05 ` Peter Zijlstra 2021-06-17 14:05 ` Peter Zijlstra 2021-06-18 0:07 ` Andy Lutomirski 2021-06-18 0:07 ` Andy Lutomirski 2021-06-16 3:21 ` [PATCH 8/8] membarrier: Rewrite sync_core_before_usermode() and improve documentation Andy Lutomirski 2021-06-16 3:21 ` Andy Lutomirski 2021-06-16 3:21 ` Andy Lutomirski 2021-06-16 4:45 ` Nicholas Piggin 2021-06-16 4:45 ` Nicholas Piggin 2021-06-16 4:45 ` Nicholas Piggin 2021-06-16 18:52 ` Andy Lutomirski 2021-06-16 18:52 ` Andy Lutomirski 2021-06-16 18:52 ` Andy Lutomirski 2021-06-16 23:48 ` Andy Lutomirski 2021-06-16 23:48 ` Andy Lutomirski 2021-06-16 23:48 ` Andy Lutomirski 2021-06-18 15:27 ` Christophe Leroy 2021-06-18 15:27 ` Christophe Leroy 2021-06-18 15:27 ` Christophe Leroy 2021-06-16 10:20 ` Will Deacon 2021-06-16 10:20 ` Will Deacon 2021-06-16 10:20 ` Will Deacon 2021-06-16 23:58 ` Andy Lutomirski 2021-06-16 23:58 ` Andy Lutomirski 2021-06-16 23:58 ` Andy Lutomirski 2021-06-17 14:47 ` Mathieu Desnoyers 2021-06-17 14:47 ` Mathieu Desnoyers 2021-06-17 14:47 ` Mathieu Desnoyers 2021-06-17 14:47 ` Mathieu Desnoyers 2021-06-18 0:12 ` Andy Lutomirski 2021-06-18 0:12 ` Andy Lutomirski 2021-06-18 0:12 ` Andy Lutomirski 2021-06-18 16:31 ` Mathieu Desnoyers 2021-06-18 16:31 ` Mathieu Desnoyers 2021-06-18 16:31 ` Mathieu Desnoyers 2021-06-18 16:31 ` Mathieu Desnoyers 2021-06-18 19:58 ` Andy Lutomirski 2021-06-18 19:58 ` Andy Lutomirski 2021-06-18 19:58 ` Andy Lutomirski 2021-06-18 20:09 ` Mathieu Desnoyers 2021-06-18 20:09 ` Mathieu Desnoyers 2021-06-18 20:09 ` Mathieu Desnoyers 2021-06-18 20:09 ` Mathieu Desnoyers 2021-06-19 6:02 ` Nicholas Piggin 2021-06-19 6:02 ` Nicholas Piggin 2021-06-19 6:02 ` Nicholas Piggin 2021-06-19 15:50 ` Andy Lutomirski 2021-06-19 15:50 ` Andy Lutomirski 2021-06-19 15:50 ` Andy Lutomirski 2021-06-20 2:10 ` Nicholas Piggin 2021-06-20 2:10 ` Nicholas Piggin 2021-06-20 2:10 ` Nicholas Piggin 2021-06-17 15:16 ` Mathieu Desnoyers 2021-06-17 15:16 ` Mathieu Desnoyers 2021-06-17 15:16 ` Mathieu Desnoyers 2021-06-17 15:16 ` Mathieu Desnoyers 2021-06-18 0:13 ` Andy Lutomirski 2021-06-18 0:13 ` Andy Lutomirski 2021-06-18 0:13 ` Andy Lutomirski
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