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From: Apurva Nandan <a-nandan@ti.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Mark Brown <broonie@kernel.org>, Apurva Nandan <a-nandan@ti.com>,
	Patrice Chotard <patrice.chotard@foss.st.com>,
	Christophe Kerello <christophe.kerello@foss.st.com>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<linux-spi@vger.kernel.org>
Cc: <p.yadav@ti.com>
Subject: [PATCH v2 01/14] spi: spi-mem: Add DTR templates for cmd, address, dummy and data phase
Date: Tue, 12 Oct 2021 02:16:06 +0530	[thread overview]
Message-ID: <20211011204619.81893-2-a-nandan@ti.com> (raw)
In-Reply-To: <20211011204619.81893-1-a-nandan@ti.com>

Setting dtr field of spi_mem_op is useful when creating templates
for DTR ops in spinand.h. Also, 2 bytes cmd phases are required when
operating in Octal DTR SPI mode.

Create new templates for dtr mode cmd, address, dummy and data phase
in spi_mem_op, which set the dtr field to 1 and also allow passing
the nbytes for the cmd phase.

Signed-off-by: Apurva Nandan <a-nandan@ti.com>
---
 include/linux/spi/spi-mem.h | 41 +++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h
index 85e2ff7b840d..4a99e26aa0b6 100644
--- a/include/linux/spi/spi-mem.h
+++ b/include/linux/spi/spi-mem.h
@@ -20,6 +20,14 @@
 		.nbytes = 1,					\
 	}
 
+#define SPI_MEM_OP_CMD_DTR(__nbytes, __opcode, __buswidth)	\
+	{							\
+		.buswidth = __buswidth,				\
+		.opcode = __opcode,				\
+		.nbytes = __nbytes,				\
+		.dtr = 1,					\
+	}
+
 #define SPI_MEM_OP_ADDR(__nbytes, __val, __buswidth)		\
 	{							\
 		.nbytes = __nbytes,				\
@@ -27,6 +35,14 @@
 		.buswidth = __buswidth,				\
 	}
 
+#define SPI_MEM_OP_ADDR_DTR(__nbytes, __val, __buswidth)	\
+	{							\
+		.nbytes = __nbytes,				\
+		.val = __val,					\
+		.buswidth = __buswidth,				\
+		.dtr = 1,					\
+	}
+
 #define SPI_MEM_OP_NO_ADDR	{ }
 
 #define SPI_MEM_OP_DUMMY(__nbytes, __buswidth)			\
@@ -35,6 +51,13 @@
 		.buswidth = __buswidth,				\
 	}
 
+#define SPI_MEM_OP_DUMMY_DTR(__nbytes, __buswidth)		\
+	{							\
+		.nbytes = __nbytes,				\
+		.buswidth = __buswidth,				\
+		.dtr = 1,					\
+	}
+
 #define SPI_MEM_OP_NO_DUMMY	{ }
 
 #define SPI_MEM_OP_DATA_IN(__nbytes, __buf, __buswidth)		\
@@ -45,6 +68,15 @@
 		.buswidth = __buswidth,				\
 	}
 
+#define SPI_MEM_OP_DATA_IN_DTR(__nbytes, __buf, __buswidth)	\
+	{							\
+		.dir = SPI_MEM_DATA_IN,				\
+		.nbytes = __nbytes,				\
+		.buf.in = __buf,				\
+		.buswidth = __buswidth,				\
+		.dtr = 1,					\
+	}
+
 #define SPI_MEM_OP_DATA_OUT(__nbytes, __buf, __buswidth)	\
 	{							\
 		.dir = SPI_MEM_DATA_OUT,			\
@@ -53,6 +85,15 @@
 		.buswidth = __buswidth,				\
 	}
 
+#define SPI_MEM_OP_DATA_OUT_DTR(__nbytes, __buf, __buswidth)	\
+	{							\
+		.dir = SPI_MEM_DATA_OUT,			\
+		.nbytes = __nbytes,				\
+		.buf.out = __buf,				\
+		.buswidth = __buswidth,				\
+		.dtr = 1,					\
+	}
+
 #define SPI_MEM_OP_NO_DATA	{ }
 
 /**
-- 
2.25.1


______________________________________________________
Linux MTD discussion mailing list
http://lists.infradead.org/mailman/listinfo/linux-mtd/

WARNING: multiple messages have this Message-ID (diff)
From: Apurva Nandan <a-nandan@ti.com>
To: Miquel Raynal <miquel.raynal@bootlin.com>,
	Richard Weinberger <richard@nod.at>,
	Vignesh Raghavendra <vigneshr@ti.com>,
	Mark Brown <broonie@kernel.org>, Apurva Nandan <a-nandan@ti.com>,
	Patrice Chotard <patrice.chotard@foss.st.com>,
	Christophe Kerello <christophe.kerello@foss.st.com>,
	Boris Brezillon <boris.brezillon@collabora.com>,
	<linux-mtd@lists.infradead.org>, <linux-kernel@vger.kernel.org>,
	<linux-spi@vger.kernel.org>
Cc: <p.yadav@ti.com>
Subject: [PATCH v2 01/14] spi: spi-mem: Add DTR templates for cmd, address, dummy and data phase
Date: Tue, 12 Oct 2021 02:16:06 +0530	[thread overview]
Message-ID: <20211011204619.81893-2-a-nandan@ti.com> (raw)
In-Reply-To: <20211011204619.81893-1-a-nandan@ti.com>

Setting dtr field of spi_mem_op is useful when creating templates
for DTR ops in spinand.h. Also, 2 bytes cmd phases are required when
operating in Octal DTR SPI mode.

Create new templates for dtr mode cmd, address, dummy and data phase
in spi_mem_op, which set the dtr field to 1 and also allow passing
the nbytes for the cmd phase.

Signed-off-by: Apurva Nandan <a-nandan@ti.com>
---
 include/linux/spi/spi-mem.h | 41 +++++++++++++++++++++++++++++++++++++
 1 file changed, 41 insertions(+)

diff --git a/include/linux/spi/spi-mem.h b/include/linux/spi/spi-mem.h
index 85e2ff7b840d..4a99e26aa0b6 100644
--- a/include/linux/spi/spi-mem.h
+++ b/include/linux/spi/spi-mem.h
@@ -20,6 +20,14 @@
 		.nbytes = 1,					\
 	}
 
+#define SPI_MEM_OP_CMD_DTR(__nbytes, __opcode, __buswidth)	\
+	{							\
+		.buswidth = __buswidth,				\
+		.opcode = __opcode,				\
+		.nbytes = __nbytes,				\
+		.dtr = 1,					\
+	}
+
 #define SPI_MEM_OP_ADDR(__nbytes, __val, __buswidth)		\
 	{							\
 		.nbytes = __nbytes,				\
@@ -27,6 +35,14 @@
 		.buswidth = __buswidth,				\
 	}
 
+#define SPI_MEM_OP_ADDR_DTR(__nbytes, __val, __buswidth)	\
+	{							\
+		.nbytes = __nbytes,				\
+		.val = __val,					\
+		.buswidth = __buswidth,				\
+		.dtr = 1,					\
+	}
+
 #define SPI_MEM_OP_NO_ADDR	{ }
 
 #define SPI_MEM_OP_DUMMY(__nbytes, __buswidth)			\
@@ -35,6 +51,13 @@
 		.buswidth = __buswidth,				\
 	}
 
+#define SPI_MEM_OP_DUMMY_DTR(__nbytes, __buswidth)		\
+	{							\
+		.nbytes = __nbytes,				\
+		.buswidth = __buswidth,				\
+		.dtr = 1,					\
+	}
+
 #define SPI_MEM_OP_NO_DUMMY	{ }
 
 #define SPI_MEM_OP_DATA_IN(__nbytes, __buf, __buswidth)		\
@@ -45,6 +68,15 @@
 		.buswidth = __buswidth,				\
 	}
 
+#define SPI_MEM_OP_DATA_IN_DTR(__nbytes, __buf, __buswidth)	\
+	{							\
+		.dir = SPI_MEM_DATA_IN,				\
+		.nbytes = __nbytes,				\
+		.buf.in = __buf,				\
+		.buswidth = __buswidth,				\
+		.dtr = 1,					\
+	}
+
 #define SPI_MEM_OP_DATA_OUT(__nbytes, __buf, __buswidth)	\
 	{							\
 		.dir = SPI_MEM_DATA_OUT,			\
@@ -53,6 +85,15 @@
 		.buswidth = __buswidth,				\
 	}
 
+#define SPI_MEM_OP_DATA_OUT_DTR(__nbytes, __buf, __buswidth)	\
+	{							\
+		.dir = SPI_MEM_DATA_OUT,			\
+		.nbytes = __nbytes,				\
+		.buf.out = __buf,				\
+		.buswidth = __buswidth,				\
+		.dtr = 1,					\
+	}
+
 #define SPI_MEM_OP_NO_DATA	{ }
 
 /**
-- 
2.25.1


  reply	other threads:[~2021-10-11 20:47 UTC|newest]

Thread overview: 40+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-10-11 20:46 [PATCH v2 00/14] mtd: spinand: Add Octal DTR SPI (8D-8D-8D) mode support Apurva Nandan
2021-10-11 20:46 ` Apurva Nandan
2021-10-11 20:46 ` Apurva Nandan [this message]
2021-10-11 20:46   ` [PATCH v2 01/14] spi: spi-mem: Add DTR templates for cmd, address, dummy and data phase Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 02/14] mtd: spinand: Add enum spinand_proto to indicate current SPI IO mode Apurva Nandan
2021-10-11 20:46   ` Apurva Nandan
2021-10-12  6:39   ` Boris Brezillon
2021-10-12  6:39     ` Boris Brezillon
2021-10-11 20:46 ` [PATCH v2 03/14] mtd: spinand: Patch spi_mem_op for the SPI IO protocol using reg_proto Apurva Nandan
2021-10-11 20:46   ` Apurva Nandan
2021-10-12  6:40   ` Boris Brezillon
2021-10-12  6:40     ` Boris Brezillon
2021-10-11 20:46 ` [PATCH v2 04/14] mtd: spinand: Fix odd byte addr and data phase in read and write reg op for Octal DTR mode Apurva Nandan
2021-10-11 20:46   ` Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 05/14] mtd: spinand: Add adjust_op() in manufacturer_ops to modify the ops for manufacturer specific changes Apurva Nandan
2021-10-11 20:46   ` Apurva Nandan
2021-10-12  6:54   ` Boris Brezillon
2021-10-12  6:54     ` Boris Brezillon
2021-10-11 20:46 ` [PATCH v2 06/14] mtd: spinand: Add macros for Octal DTR page read and write operations Apurva Nandan
2021-10-11 20:46   ` Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 07/14] mtd: spinand: Allow enabling Octal DTR mode in the core Apurva Nandan
2021-10-11 20:46   ` Apurva Nandan
2021-10-12  7:14   ` Boris Brezillon
2021-10-12  7:14     ` Boris Brezillon
2021-10-11 20:46 ` [PATCH v2 08/14] mtd: spinand: winbond: Add support for write volatile configuration register op Apurva Nandan
2021-10-11 20:46   ` Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 09/14] mtd: spinand: winbond: Add octal_dtr_enable() for manufacturer_ops Apurva Nandan
2021-10-11 20:46   ` Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 10/14] mtd: spinand: Add support for Power-on-Reset (PoR) instruction Apurva Nandan
2021-10-11 20:46   ` Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 11/14] mtd: spinand: Perform Power-on-Reset on the flash in mtd_suspend() Apurva Nandan
2021-10-11 20:46   ` Apurva Nandan
2021-10-12  7:25   ` Boris Brezillon
2021-10-12  7:25     ` Boris Brezillon
2021-10-11 20:46 ` [PATCH v2 12/14] mtd: spinand: Add adjust_op() in Winbond manufacturer_ops Apurva Nandan
2021-10-11 20:46   ` Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 13/14] mtd: spinand: winbond: Rename cache op_variants struct variable Apurva Nandan
2021-10-11 20:46   ` Apurva Nandan
2021-10-11 20:46 ` [PATCH v2 14/14] mtd: spinand: winbond: Add support for Winbond W35N01JW SPI NAND flash Apurva Nandan
2021-10-11 20:46   ` Apurva Nandan

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