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From: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
To: <miquel.raynal@bootlin.com>, <nagasure@xilinx.com>, <vigneshr@ti.com>
Cc: <boris.brezillon@collabora.com>, <linux-mtd@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <git@amd.com>, <richard@nod.at>,
	<amit.kumar-mahapatra@amd.com>,
	Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Subject: [PATCH v3 0/2] mtd: rawnand: arasan: Fix clock rate in NV-DDR
Date: Tue, 28 Jun 2022 21:18:22 +0530	[thread overview]
Message-ID: <20220628154824.12222-1-amit.kumar-mahapatra@xilinx.com> (raw)

Based on upstream discussion here:
https://lore.kernel.org/all/20211127180758.30884-1-okitain@gmail.com/

This patch series:
 - Updates NAND bus clock, instead of system clock, as per the timing modes.
 - Fixes clock rate in NV-DDR
---
BRANCH: mtd/next

Changes in v2:
- Add a patch to update NAND bus clk instead of system clk

Changes in v3:
- Set the NAND bus clk in anfc_setup_interface
---
Amit Kumar Mahapatra (1):
  mtd: rawnand: arasan: Update NAND bus clock instead of system clock

Olga Kitaina (1):
  mtd: rawnand: arasan: Fix clock rate in NV-DDR

 drivers/mtd/nand/raw/arasan-nand-controller.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

-- 
2.17.1


WARNING: multiple messages have this Message-ID (diff)
From: Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
To: <miquel.raynal@bootlin.com>, <nagasure@xilinx.com>, <vigneshr@ti.com>
Cc: <boris.brezillon@collabora.com>, <linux-mtd@lists.infradead.org>,
	<linux-kernel@vger.kernel.org>, <git@amd.com>, <richard@nod.at>,
	<amit.kumar-mahapatra@amd.com>,
	Amit Kumar Mahapatra <amit.kumar-mahapatra@xilinx.com>
Subject: [PATCH v3 0/2] mtd: rawnand: arasan: Fix clock rate in NV-DDR
Date: Tue, 28 Jun 2022 21:18:22 +0530	[thread overview]
Message-ID: <20220628154824.12222-1-amit.kumar-mahapatra@xilinx.com> (raw)

Based on upstream discussion here:
https://lore.kernel.org/all/20211127180758.30884-1-okitain@gmail.com/

This patch series:
 - Updates NAND bus clock, instead of system clock, as per the timing modes.
 - Fixes clock rate in NV-DDR
---
BRANCH: mtd/next

Changes in v2:
- Add a patch to update NAND bus clk instead of system clk

Changes in v3:
- Set the NAND bus clk in anfc_setup_interface
---
Amit Kumar Mahapatra (1):
  mtd: rawnand: arasan: Update NAND bus clock instead of system clock

Olga Kitaina (1):
  mtd: rawnand: arasan: Fix clock rate in NV-DDR

 drivers/mtd/nand/raw/arasan-nand-controller.c | 16 +++++++++++-----
 1 file changed, 11 insertions(+), 5 deletions(-)

-- 
2.17.1


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             reply	other threads:[~2022-06-28 15:49 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-06-28 15:48 Amit Kumar Mahapatra [this message]
2022-06-28 15:48 ` [PATCH v3 0/2] mtd: rawnand: arasan: Fix clock rate in NV-DDR Amit Kumar Mahapatra
2022-06-28 15:48 ` [PATCH v3 1/2] mtd: rawnand: arasan: Update NAND bus clock instead of system clock Amit Kumar Mahapatra
2022-06-28 15:48   ` Amit Kumar Mahapatra
2022-06-29 11:38   ` Miquel Raynal
2022-06-29 11:38     ` Miquel Raynal
2022-06-28 15:48 ` [PATCH v3 2/2] mtd: rawnand: arasan: Fix clock rate in NV-DDR Amit Kumar Mahapatra
2022-06-28 15:48   ` Amit Kumar Mahapatra
2022-06-29 11:38   ` Miquel Raynal
2022-06-29 11:38     ` Miquel Raynal

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