From: Emil Renner Berthing <emil.renner.berthing@canonical.com> To: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Paul Walmsley <paul.walmsley@sifive.com>, Palmer Dabbelt <palmer@dabbelt.com>, Emil Renner Berthing <kernel@esmil.dk>, Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Cristian Ciocaltea <cristian.ciocaltea@collabora.com>, Geert Uytterhoeven <geert@linux-m68k.org> Subject: [PATCH v2 0/8] Add JH7100 errata and update device tree Date: Thu, 30 Nov 2023 16:19:24 +0100 [thread overview] Message-ID: <20231130151932.729708-1-emil.renner.berthing@canonical.com> (raw) Now that the driver for the SiFive cache controller supports manual flushing as non-standard cache operations[1] we can add an errata option for the StarFive JH7100 SoC and update the device tree with the cache controller, dedicated DMA pool and add MMC nodes for the SD-card and wifi. This series needs the following commit in [1] to work properly: 0d5701dc9cd6 ("soc: sifive: ccache: Add StarFive JH7100 support") ..and its parent for dtb_checks to pass. [1]: https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/log/?h=riscv-soc-for-next Changes in v2: - Add Conor's ack on patch 1/8 - Add my SoB on patch 2/8 - Update commit message on patch 4/8 Emil Renner Berthing (7): riscv: errata: Add StarFive JH7100 errata riscv: dts: starfive: Mark the JH7100 as having non-coherent DMAs riscv: dts: starfive: Add JH7100 cache controller riscv: dts: starfive: Add pool for coherent DMA memory on JH7100 boards riscv: dts: starfive: Add JH7100 MMC nodes riscv: dts: starfive: Enable SD-card on JH7100 boards riscv: dts: starfive: Enable SDIO wifi on JH7100 boards Geert Uytterhoeven (1): riscv: dts: starfive: Group tuples in interrupt properties arch/riscv/Kconfig.errata | 17 +++ .../boot/dts/starfive/jh7100-common.dtsi | 131 ++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7100.dtsi | 48 ++++++- 3 files changed, 192 insertions(+), 4 deletions(-) -- 2.40.1
WARNING: multiple messages have this Message-ID (diff)
From: Emil Renner Berthing <emil.renner.berthing@canonical.com> To: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Emil Renner Berthing <kernel@esmil.dk>, Conor Dooley <conor@kernel.org>, Rob Herring <robh+dt@kernel.org>, Palmer Dabbelt <palmer@dabbelt.com>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Paul Walmsley <paul.walmsley@sifive.com>, Geert Uytterhoeven <geert@linux-m68k.org> Subject: [PATCH v2 0/8] Add JH7100 errata and update device tree Date: Thu, 30 Nov 2023 16:19:24 +0100 [thread overview] Message-ID: <20231130151932.729708-1-emil.renner.berthing@canonical.com> (raw) Now that the driver for the SiFive cache controller supports manual flushing as non-standard cache operations[1] we can add an errata option for the StarFive JH7100 SoC and update the device tree with the cache controller, dedicated DMA pool and add MMC nodes for the SD-card and wifi. This series needs the following commit in [1] to work properly: 0d5701dc9cd6 ("soc: sifive: ccache: Add StarFive JH7100 support") ..and its parent for dtb_checks to pass. [1]: https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux.git/log/?h=riscv-soc-for-next Changes in v2: - Add Conor's ack on patch 1/8 - Add my SoB on patch 2/8 - Update commit message on patch 4/8 Emil Renner Berthing (7): riscv: errata: Add StarFive JH7100 errata riscv: dts: starfive: Mark the JH7100 as having non-coherent DMAs riscv: dts: starfive: Add JH7100 cache controller riscv: dts: starfive: Add pool for coherent DMA memory on JH7100 boards riscv: dts: starfive: Add JH7100 MMC nodes riscv: dts: starfive: Enable SD-card on JH7100 boards riscv: dts: starfive: Enable SDIO wifi on JH7100 boards Geert Uytterhoeven (1): riscv: dts: starfive: Group tuples in interrupt properties arch/riscv/Kconfig.errata | 17 +++ .../boot/dts/starfive/jh7100-common.dtsi | 131 ++++++++++++++++++ arch/riscv/boot/dts/starfive/jh7100.dtsi | 48 ++++++- 3 files changed, 192 insertions(+), 4 deletions(-) -- 2.40.1 _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next reply other threads:[~2023-11-30 15:19 UTC|newest] Thread overview: 28+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-11-30 15:19 Emil Renner Berthing [this message] 2023-11-30 15:19 ` [PATCH v2 0/8] Add JH7100 errata and update device tree Emil Renner Berthing 2023-11-30 15:19 ` [PATCH v2 1/8] riscv: errata: Add StarFive JH7100 errata Emil Renner Berthing 2023-11-30 15:19 ` Emil Renner Berthing 2023-12-06 17:09 ` Palmer Dabbelt 2023-12-06 17:09 ` Palmer Dabbelt 2023-11-30 15:19 ` [PATCH v2 2/8] riscv: dts: starfive: Group tuples in interrupt properties Emil Renner Berthing 2023-11-30 15:19 ` Emil Renner Berthing 2023-11-30 15:19 ` [PATCH v2 3/8] riscv: dts: starfive: Mark the JH7100 as having non-coherent DMAs Emil Renner Berthing 2023-11-30 15:19 ` Emil Renner Berthing 2023-11-30 15:19 ` [PATCH v2 4/8] riscv: dts: starfive: Add JH7100 cache controller Emil Renner Berthing 2023-11-30 15:19 ` Emil Renner Berthing 2023-11-30 15:19 ` [PATCH v2 5/8] riscv: dts: starfive: Add pool for coherent DMA memory on JH7100 boards Emil Renner Berthing 2023-11-30 15:19 ` Emil Renner Berthing 2023-11-30 15:19 ` [PATCH v2 6/8] riscv: dts: starfive: Add JH7100 MMC nodes Emil Renner Berthing 2023-11-30 15:19 ` Emil Renner Berthing 2023-11-30 15:19 ` [PATCH v2 7/8] riscv: dts: starfive: Enable SD-card on JH7100 boards Emil Renner Berthing 2023-11-30 15:19 ` Emil Renner Berthing 2023-11-30 15:19 ` [PATCH v2 8/8] riscv: dts: starfive: Enable SDIO wifi " Emil Renner Berthing 2023-11-30 15:19 ` Emil Renner Berthing 2023-12-13 15:42 ` (subset) [PATCH v2 0/8] Add JH7100 errata and update device tree Conor Dooley 2023-12-13 15:42 ` Conor Dooley 2023-12-13 15:51 ` Geert Uytterhoeven 2023-12-13 15:51 ` Geert Uytterhoeven 2023-12-15 19:13 ` Emil Renner Berthing 2023-12-15 19:13 ` Emil Renner Berthing 2023-12-13 15:53 ` Conor Dooley 2023-12-13 15:53 ` Conor Dooley
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