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From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Conor Dooley <conor@kernel.org>
Cc: linux-riscv@lists.infradead.org, devicetree@vger.kernel.org,
	linux-kernel@vger.kernel.org,
	Emil Renner Berthing <emil.renner.berthing@canonical.com>,
	Conor Dooley <conor.dooley@microchip.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Emil Renner Berthing <kernel@esmil.dk>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Cristian Ciocaltea <cristian.ciocaltea@collabora.com>
Subject: Re: (subset) [PATCH v2 0/8] Add JH7100 errata and update device tree
Date: Wed, 13 Dec 2023 16:51:30 +0100	[thread overview]
Message-ID: <CAMuHMdXwRZRvLPh3JBShQy4hRHq=2fQJmcYjTyQhKZmtBPaOuw@mail.gmail.com> (raw)
In-Reply-To: <20231213-jester-rendering-dd876ef8e8ac@spud>

Hi Conor,

On Wed, Dec 13, 2023 at 4:43 PM Conor Dooley <conor@kernel.org> wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> On Thu, 30 Nov 2023 16:19:24 +0100, Emil Renner Berthing wrote:
> > Now that the driver for the SiFive cache controller supports manual
> > flushing as non-standard cache operations[1] we can add an errata option
> > for the StarFive JH7100 SoC and update the device tree with the cache
> > controller, dedicated DMA pool and add MMC nodes for the SD-card and
> > wifi.
> >
> > This series needs the following commit in [1] to work properly:
> >
> > [...]
>
> Applied to riscv-cache-for-next, thanks!
>
> [1/8] riscv: errata: Add StarFive JH7100 errata
>       https://git.kernel.org/conor/c/64fc984a8a54

That's the one which also needs depends on !DMA_DIRECT_REMAP?

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

WARNING: multiple messages have this Message-ID (diff)
From: Geert Uytterhoeven <geert@linux-m68k.org>
To: Conor Dooley <conor@kernel.org>
Cc: devicetree@vger.kernel.org,
	Emil Renner Berthing <kernel@esmil.dk>,
	linux-kernel@vger.kernel.org,
	Conor Dooley <conor.dooley@microchip.com>,
	Rob Herring <robh+dt@kernel.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	linux-riscv@lists.infradead.org,
	Emil Renner Berthing <emil.renner.berthing@canonical.com>
Subject: Re: (subset) [PATCH v2 0/8] Add JH7100 errata and update device tree
Date: Wed, 13 Dec 2023 16:51:30 +0100	[thread overview]
Message-ID: <CAMuHMdXwRZRvLPh3JBShQy4hRHq=2fQJmcYjTyQhKZmtBPaOuw@mail.gmail.com> (raw)
In-Reply-To: <20231213-jester-rendering-dd876ef8e8ac@spud>

Hi Conor,

On Wed, Dec 13, 2023 at 4:43 PM Conor Dooley <conor@kernel.org> wrote:
> From: Conor Dooley <conor.dooley@microchip.com>
>
> On Thu, 30 Nov 2023 16:19:24 +0100, Emil Renner Berthing wrote:
> > Now that the driver for the SiFive cache controller supports manual
> > flushing as non-standard cache operations[1] we can add an errata option
> > for the StarFive JH7100 SoC and update the device tree with the cache
> > controller, dedicated DMA pool and add MMC nodes for the SD-card and
> > wifi.
> >
> > This series needs the following commit in [1] to work properly:
> >
> > [...]
>
> Applied to riscv-cache-for-next, thanks!
>
> [1/8] riscv: errata: Add StarFive JH7100 errata
>       https://git.kernel.org/conor/c/64fc984a8a54

That's the one which also needs depends on !DMA_DIRECT_REMAP?

Gr{oetje,eeting}s,

                        Geert

-- 
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds

_______________________________________________
linux-riscv mailing list
linux-riscv@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-riscv

  reply	other threads:[~2023-12-13 15:51 UTC|newest]

Thread overview: 28+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-11-30 15:19 [PATCH v2 0/8] Add JH7100 errata and update device tree Emil Renner Berthing
2023-11-30 15:19 ` Emil Renner Berthing
2023-11-30 15:19 ` [PATCH v2 1/8] riscv: errata: Add StarFive JH7100 errata Emil Renner Berthing
2023-11-30 15:19   ` Emil Renner Berthing
2023-12-06 17:09   ` Palmer Dabbelt
2023-12-06 17:09     ` Palmer Dabbelt
2023-11-30 15:19 ` [PATCH v2 2/8] riscv: dts: starfive: Group tuples in interrupt properties Emil Renner Berthing
2023-11-30 15:19   ` Emil Renner Berthing
2023-11-30 15:19 ` [PATCH v2 3/8] riscv: dts: starfive: Mark the JH7100 as having non-coherent DMAs Emil Renner Berthing
2023-11-30 15:19   ` Emil Renner Berthing
2023-11-30 15:19 ` [PATCH v2 4/8] riscv: dts: starfive: Add JH7100 cache controller Emil Renner Berthing
2023-11-30 15:19   ` Emil Renner Berthing
2023-11-30 15:19 ` [PATCH v2 5/8] riscv: dts: starfive: Add pool for coherent DMA memory on JH7100 boards Emil Renner Berthing
2023-11-30 15:19   ` Emil Renner Berthing
2023-11-30 15:19 ` [PATCH v2 6/8] riscv: dts: starfive: Add JH7100 MMC nodes Emil Renner Berthing
2023-11-30 15:19   ` Emil Renner Berthing
2023-11-30 15:19 ` [PATCH v2 7/8] riscv: dts: starfive: Enable SD-card on JH7100 boards Emil Renner Berthing
2023-11-30 15:19   ` Emil Renner Berthing
2023-11-30 15:19 ` [PATCH v2 8/8] riscv: dts: starfive: Enable SDIO wifi " Emil Renner Berthing
2023-11-30 15:19   ` Emil Renner Berthing
2023-12-13 15:42 ` (subset) [PATCH v2 0/8] Add JH7100 errata and update device tree Conor Dooley
2023-12-13 15:42   ` Conor Dooley
2023-12-13 15:51   ` Geert Uytterhoeven [this message]
2023-12-13 15:51     ` Geert Uytterhoeven
2023-12-15 19:13     ` Emil Renner Berthing
2023-12-15 19:13       ` Emil Renner Berthing
2023-12-13 15:53 ` Conor Dooley
2023-12-13 15:53   ` Conor Dooley

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