[PATCH 0/2] Add interconnect driver for IPQ9574 SoC

[PATCH 0/2] Add interconnect driver for IPQ9574 SoC

[Varadarajan Narayanan]

MSM platforms manage NoC related clocks and scaling from RPM.
However, in IPQ SoCs, RPM is not involved in managing NoC
related clocks and there is no NoC scaling.

However, there is a requirement to enable some NoC interface
clocks for the accessing the peripherals present in the
system. Hence add a minimalistic interconnect driver that
establishes a path from the processor/memory to those peripherals
and vice versa.

Varadarajan Narayanan (2):
  dt-bindings: interconnect: Add Qualcomm IPQ9574 support
  clk: qcom: add IPQ9574 interconnect clocks support

 arch/arm64/boot/dts/qcom/ipq9574.dtsi         |  2 +
 drivers/clk/qcom/gcc-ipq9574.c                | 75 ++++++++++++++++++-
 .../dt-bindings/interconnect/qcom,ipq9574.h   | 62 +++++++++++++++
 3 files changed, 138 insertions(+), 1 deletion(-)
 create mode 100644 include/dt-bindings/interconnect/qcom,ipq9574.h

-- 
2.34.1

[PATCH 1/2] dt-bindings: interconnect: Add Qualcomm IPQ9574 support

[Varadarajan Narayanan]

Add master/slave ids for Qualcomm IPQ9574 Network-On-Chip
interfaces. This will be used by the gcc-ipq9574 driver
that will for providing interconnect services using the
icc-clk framework.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
---
 .../dt-bindings/interconnect/qcom,ipq9574.h   | 62 +++++++++++++++++++
 1 file changed, 62 insertions(+)
 create mode 100644 include/dt-bindings/interconnect/qcom,ipq9574.h

diff --git a/include/dt-bindings/interconnect/qcom,ipq9574.h b/include/dt-bindings/interconnect/qcom,ipq9574.h
new file mode 100644
index 000000000000..96f79a86e8d2
--- /dev/null
+++ b/include/dt-bindings/interconnect/qcom,ipq9574.h
@@ -0,0 +1,62 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
+#ifndef INTERCONNECT_QCOM_IPQ9574_H
+#define INTERCONNECT_QCOM_IPQ9574_H
+
+#define IPQ_APPS_ID			9574	/* some unique value */
+#define IPQ_NSS_ID			(IPQ_APPS_ID * 2)
+
+#define IPQ_ANOC_PCIE0_1_MAS		0
+#define IPQ_ANOC_PCIE0_1_SLV		1
+#define IPQ_SNOC_PCIE0_1_MAS		2
+#define IPQ_SNOC_PCIE0_1_SLV		3
+#define IPQ_ANOC_PCIE1_1_MAS		4
+#define IPQ_ANOC_PCIE1_1_SLV		5
+#define IPQ_SNOC_PCIE1_1_MAS		6
+#define IPQ_SNOC_PCIE1_1_SLV		7
+#define IPQ_ANOC_PCIE2_2_MAS		8
+#define IPQ_ANOC_PCIE2_2_SLV		9
+#define IPQ_SNOC_PCIE2_2_MAS		10
+#define IPQ_SNOC_PCIE2_2_SLV		11
+#define IPQ_ANOC_PCIE3_2_MAS		12
+#define IPQ_ANOC_PCIE3_2_SLV		13
+#define IPQ_SNOC_PCIE3_2_MAS		14
+#define IPQ_SNOC_PCIE3_2_SLV		15
+#define IPQ_USB_MAS			16
+#define IPQ_USB_SLV			17
+#define IPQ_USB_AXI_MAS			18
+#define IPQ_USB_AXI_SLV			19
+#define IPQ_NSSNOC_NSSCC_MAS		20
+#define IPQ_NSSNOC_NSSCC_SLV		21
+#define IPQ_NSSNOC_SNOC_MAS		22
+#define IPQ_NSSNOC_SNOC_SLV		23
+#define IPQ_NSSNOC_SNOC_1_MAS		24
+#define IPQ_NSSNOC_SNOC_1_SLV		25
+#define IPQ_NSSNOC_PCNOC_1_MAS		26
+#define IPQ_NSSNOC_PCNOC_1_SLV		27
+#define IPQ_NSSNOC_QOSGEN_REF_MAS	28
+#define IPQ_NSSNOC_QOSGEN_REF_SLV	29
+#define IPQ_NSSNOC_TIMEOUT_REF_MAS	30
+#define IPQ_NSSNOC_TIMEOUT_REF_SLV	31
+#define IPQ_NSSNOC_XO_DCD_MAS		32
+#define IPQ_NSSNOC_XO_DCD_SLV		33
+#define IPQ_NSSNOC_ATB_MAS		34
+#define IPQ_NSSNOC_ATB_SLV		35
+#define IPQ_MEM_NOC_NSSNOC_MAS		36
+#define IPQ_MEM_NOC_NSSNOC_SLV		37
+#define IPQ_NSSNOC_MEMNOC_MAS		38
+#define IPQ_NSSNOC_MEMNOC_SLV		39
+#define IPQ_NSSNOC_MEM_NOC_1_MAS	40
+#define IPQ_NSSNOC_MEM_NOC_1_SLV	41
+
+#define IPQ_NSS_CC_NSSNOC_PPE_MAS	0
+#define IPQ_NSS_CC_NSSNOC_PPE_SLV	1
+#define IPQ_NSS_CC_NSSNOC_PPE_CFG_MAS	2
+#define IPQ_NSS_CC_NSSNOC_PPE_CFG_SLV	3
+#define IPQ_NSS_CC_NSSNOC_NSS_CSR_MAS	4
+#define IPQ_NSS_CC_NSSNOC_NSS_CSR_SLV	5
+#define IPQ_NSS_CC_NSSNOC_IMEM_QSB_MAS	6
+#define IPQ_NSS_CC_NSSNOC_IMEM_QSB_SLV	7
+#define IPQ_NSS_CC_NSSNOC_IMEM_AHB_MAS	8
+#define IPQ_NSS_CC_NSSNOC_IMEM_AHB_SLV	9
+
+#endif /* INTERCONNECT_QCOM_IPQ9574_H */
-- 
2.34.1

[PATCH 2/2] clk: qcom: add IPQ9574 interconnect clocks support

[Varadarajan Narayanan]

Unlike MSM platforms that manage NoC related clocks and scaling
from RPM, IPQ SoCs dont involve RPM in managing NoC related
clocks and there is no NoC scaling.

However, there is a requirement to enable some NoC interface
clocks for accessing the peripheral controllers present on
these NoCs.

Hence adding a minimalistic interconnect driver that can enable
the relevant clocks. This is similar to msm8996-cbf's usage of
icc-clk framework.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
---
 arch/arm64/boot/dts/qcom/ipq9574.dtsi |  2 +
 drivers/clk/qcom/gcc-ipq9574.c        | 75 ++++++++++++++++++++++++++-
 2 files changed, 76 insertions(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
index 7f2e5cbf3bbb..efffbd085715 100644
--- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
+++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
@@ -11,6 +11,7 @@
 #include <dt-bindings/interrupt-controller/arm-gic.h>
 #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
 #include <dt-bindings/thermal/thermal.h>
+#include <dt-bindings/interconnect/qcom,ipq9574.h>
 
 / {
 	interrupt-parent = <&intc>;
@@ -306,6 +307,7 @@ gcc: clock-controller@1800000 {
 			#clock-cells = <1>;
 			#reset-cells = <1>;
 			#power-domain-cells = <1>;
+			#interconnect-cells = <1>;
 		};
 
 		tcsr_mutex: hwlock@1905000 {
diff --git a/drivers/clk/qcom/gcc-ipq9574.c b/drivers/clk/qcom/gcc-ipq9574.c
index 0a3f846695b8..edbf223719e4 100644
--- a/drivers/clk/qcom/gcc-ipq9574.c
+++ b/drivers/clk/qcom/gcc-ipq9574.c
@@ -9,9 +9,16 @@
 #include <linux/of.h>
 #include <linux/platform_device.h>
 #include <linux/regmap.h>
+#if IS_ENABLED(CONFIG_INTERCONNECT)
+#include <linux/interconnect-clk.h>
+#include <linux/interconnect-provider.h>
+#endif
 
 #include <dt-bindings/clock/qcom,ipq9574-gcc.h>
 #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
+#if IS_ENABLED(CONFIG_INTERCONNECT)
+#include <dt-bindings/interconnect/qcom,ipq9574.h>
+#endif
 
 #include "clk-alpha-pll.h"
 #include "clk-branch.h"
@@ -4301,6 +4308,35 @@ static const struct qcom_reset_map gcc_ipq9574_resets[] = {
 	[GCC_WCSS_Q6_TBU_BCR] = { 0x12054, 0 },
 };
 
+
+#if IS_ENABLED(CONFIG_INTERCONNECT)
+static struct icc_clk_data *icc_ipq9574;
+
+static int noc_clks[] = {
+	GCC_ANOC_PCIE0_1LANE_M_CLK,
+	GCC_SNOC_PCIE0_1LANE_S_CLK,
+	GCC_ANOC_PCIE1_1LANE_M_CLK,
+	GCC_SNOC_PCIE1_1LANE_S_CLK,
+	GCC_ANOC_PCIE2_2LANE_M_CLK,
+	GCC_SNOC_PCIE2_2LANE_S_CLK,
+	GCC_ANOC_PCIE3_2LANE_M_CLK,
+	GCC_SNOC_PCIE3_2LANE_S_CLK,
+	GCC_SNOC_USB_CLK,
+	GCC_ANOC_USB_AXI_CLK,
+	GCC_NSSNOC_NSSCC_CLK,
+	GCC_NSSNOC_SNOC_CLK,
+	GCC_NSSNOC_SNOC_1_CLK,
+	GCC_NSSNOC_PCNOC_1_CLK,
+	GCC_NSSNOC_QOSGEN_REF_CLK,
+	GCC_NSSNOC_TIMEOUT_REF_CLK,
+	GCC_NSSNOC_XO_DCD_CLK,
+	GCC_NSSNOC_ATB_CLK,
+	GCC_MEM_NOC_NSSNOC_CLK,
+	GCC_NSSNOC_MEMNOC_CLK,
+	GCC_NSSNOC_MEM_NOC_1_CLK,
+};
+#endif
+
 static const struct of_device_id gcc_ipq9574_match_table[] = {
 	{ .compatible = "qcom,ipq9574-gcc" },
 	{ }
@@ -4327,7 +4363,44 @@ static const struct qcom_cc_desc gcc_ipq9574_desc = {
 
 static int gcc_ipq9574_probe(struct platform_device *pdev)
 {
-	return qcom_cc_probe(pdev, &gcc_ipq9574_desc);
+	int ret = qcom_cc_probe(pdev, &gcc_ipq9574_desc);
+#if IS_ENABLED(CONFIG_INTERCONNECT)
+	struct icc_provider *provider;
+	struct icc_clk_data *icd;
+	int i;
+#endif
+
+	if (ret)
+		return dev_err_probe(&pdev->dev, ret, "%s failed\n", __func__);
+
+#if IS_ENABLED(CONFIG_INTERCONNECT)
+	icd = devm_kmalloc(&pdev->dev, ARRAY_SIZE(noc_clks) * sizeof(*icd),
+			   GFP_KERNEL);
+
+	if (IS_ERR_OR_NULL(icd))
+		return dev_err_probe(&pdev->dev, PTR_ERR(icd),
+				     "%s malloc failed\n", __func__);
+
+	icc_ipq9574 = icd;
+
+	for (i = 0; i < ARRAY_SIZE(noc_clks); i++, icd++) {
+		icd->clk = gcc_ipq9574_clks[noc_clks[i]]->hw.clk;
+		if (IS_ERR_OR_NULL(icd->clk)) {
+			dev_err(&pdev->dev, "%s: %d clock not found\n",
+				__func__, noc_clks[i]);
+			return -ENOENT;
+		}
+		icd->name = clk_hw_get_name(&gcc_ipq9574_clks[noc_clks[i]]->hw);
+	}
+
+	provider = icc_clk_register(&pdev->dev, IPQ_APPS_ID,
+				    ARRAY_SIZE(noc_clks), icc_ipq9574);
+	if (IS_ERR_OR_NULL(provider))
+		return dev_err_probe(&pdev->dev, PTR_ERR(provider),
+				     "%s: icc_clk_register failed\n", __func__);
+#endif
+
+	return 0;
 }
 
 static struct platform_driver gcc_ipq9574_driver = {
-- 
2.34.1

Re: [PATCH 1/2] dt-bindings: interconnect: Add Qualcomm IPQ9574 support

[Krzysztof Kozlowski]

On 21/03/2024 05:31, Varadarajan Narayanan wrote:
> Add master/slave ids for Qualcomm IPQ9574 Network-On-Chip
> interfaces. This will be used by the gcc-ipq9574 driver
> that will for providing interconnect services using the
> icc-clk framework.
> 
> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> ---
>  .../dt-bindings/interconnect/qcom,ipq9574.h   | 62 +++++++++++++++++++
>  1 file changed, 62 insertions(+)
>  create mode 100644 include/dt-bindings/interconnect/qcom,ipq9574.h
> 
> diff --git a/include/dt-bindings/interconnect/qcom,ipq9574.h b/include/dt-bindings/interconnect/qcom,ipq9574.h
> new file mode 100644
> index 000000000000..96f79a86e8d2
> --- /dev/null
> +++ b/include/dt-bindings/interconnect/qcom,ipq9574.h
> @@ -0,0 +1,62 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> +#ifndef INTERCONNECT_QCOM_IPQ9574_H
> +#define INTERCONNECT_QCOM_IPQ9574_H
> +
> +#define IPQ_APPS_ID			9574	/* some unique value */
> +#define IPQ_NSS_ID			(IPQ_APPS_ID * 2)
> +
> +#define IPQ_ANOC_PCIE0_1_MAS		0
> +#define IPQ_ANOC_PCIE0_1_SLV		1

Please use style matching rest of mainline code. There is no IPQ in the
name of interconnect. Open recent SM8650 or similar and see.

Best regards,
Krzysztof

Re: [PATCH 2/2] clk: qcom: add IPQ9574 interconnect clocks support

[Krzysztof Kozlowski]

On 21/03/2024 05:31, Varadarajan Narayanan wrote:
> Unlike MSM platforms that manage NoC related clocks and scaling
> from RPM, IPQ SoCs dont involve RPM in managing NoC related
> clocks and there is no NoC scaling.

If these are clocks, expose them as clocks, not as interconnects.

> 
> However, there is a requirement to enable some NoC interface
> clocks for accessing the peripheral controllers present on
> these NoCs.
> 
> Hence adding a minimalistic interconnect driver that can enable
> the relevant clocks. This is similar to msm8996-cbf's usage of
> icc-clk framework.
> 
> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> ---
>  arch/arm64/boot/dts/qcom/ipq9574.dtsi |  2 +

DTS is always, ALWAYS, separate.

>  drivers/clk/qcom/gcc-ipq9574.c        | 75 ++++++++++++++++++++++++++-
>  2 files changed, 76 insertions(+), 1 deletion(-)
> 
> diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> index 7f2e5cbf3bbb..efffbd085715 100644
> --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> @@ -11,6 +11,7 @@
>  #include <dt-bindings/interrupt-controller/arm-gic.h>
>  #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
>  #include <dt-bindings/thermal/thermal.h>
> +#include <dt-bindings/interconnect/qcom,ipq9574.h>

Keep the order,

Best regards,
Krzysztof

Re: [PATCH 2/2] clk: qcom: add IPQ9574 interconnect clocks support

[Varadarajan Narayanan]

On Thu, Mar 21, 2024 at 08:25:15AM +0100, Krzysztof Kozlowski wrote:
> On 21/03/2024 05:31, Varadarajan Narayanan wrote:
> > Unlike MSM platforms that manage NoC related clocks and scaling
> > from RPM, IPQ SoCs dont involve RPM in managing NoC related
> > clocks and there is no NoC scaling.
>
> If these are clocks, expose them as clocks, not as interconnects.

Earlier IPQ9574 PCIe patches were NAK-ed when these were exposed
as clocks. Please refer to the following discussions

https://lore.kernel.org/linux-arm-msm/CAA8EJpq0uawrOBHA8XHygEpGYF--HyxJWxKG44iiFdAZZz7O2w@mail.gmail.com/
https://lore.kernel.org/linux-arm-msm/CAA8EJppabK8j9T40waMv=t-1aksXfqJibWuS41GhruzLhpatrg@mail.gmail.com/

Dmitry had said
	<quote>
	I'd kindly suggest implementing the NoC attachment
	properly. In the end, other Qualcomm platforms use ICC
	drivers, so by following this pattern we will have more
	common code paths.
	</quote>

Hence posted these patches to get feedback.

> > However, there is a requirement to enable some NoC interface
> > clocks for accessing the peripheral controllers present on
> > these NoCs.
> >
> > Hence adding a minimalistic interconnect driver that can enable
> > the relevant clocks. This is similar to msm8996-cbf's usage of
> > icc-clk framework.
> >
> > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> > ---
> >  arch/arm64/boot/dts/qcom/ipq9574.dtsi |  2 +
>
> DTS is always, ALWAYS, separate.

Ok.

>
> >  drivers/clk/qcom/gcc-ipq9574.c        | 75 ++++++++++++++++++++++++++-
> >  2 files changed, 76 insertions(+), 1 deletion(-)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/ipq9574.dtsi b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> > index 7f2e5cbf3bbb..efffbd085715 100644
> > --- a/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> > +++ b/arch/arm64/boot/dts/qcom/ipq9574.dtsi
> > @@ -11,6 +11,7 @@
> >  #include <dt-bindings/interrupt-controller/arm-gic.h>
> >  #include <dt-bindings/reset/qcom,ipq9574-gcc.h>
> >  #include <dt-bindings/thermal/thermal.h>
> > +#include <dt-bindings/interconnect/qcom,ipq9574.h>
>
> Keep the order,

Ok.

Thanks
Varada

Re: [PATCH 1/2] dt-bindings: interconnect: Add Qualcomm IPQ9574 support

[Varadarajan Narayanan]

On Thu, Mar 21, 2024 at 08:23:01AM +0100, Krzysztof Kozlowski wrote:
> On 21/03/2024 05:31, Varadarajan Narayanan wrote:
> > Add master/slave ids for Qualcomm IPQ9574 Network-On-Chip
> > interfaces. This will be used by the gcc-ipq9574 driver
> > that will for providing interconnect services using the
> > icc-clk framework.
> >
> > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> > ---
> >  .../dt-bindings/interconnect/qcom,ipq9574.h   | 62 +++++++++++++++++++
> >  1 file changed, 62 insertions(+)
> >  create mode 100644 include/dt-bindings/interconnect/qcom,ipq9574.h
> >
> > diff --git a/include/dt-bindings/interconnect/qcom,ipq9574.h b/include/dt-bindings/interconnect/qcom,ipq9574.h
> > new file mode 100644
> > index 000000000000..96f79a86e8d2
> > --- /dev/null
> > +++ b/include/dt-bindings/interconnect/qcom,ipq9574.h
> > @@ -0,0 +1,62 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
> > +#ifndef INTERCONNECT_QCOM_IPQ9574_H
> > +#define INTERCONNECT_QCOM_IPQ9574_H
> > +
> > +#define IPQ_APPS_ID			9574	/* some unique value */
> > +#define IPQ_NSS_ID			(IPQ_APPS_ID * 2)
> > +
> > +#define IPQ_ANOC_PCIE0_1_MAS		0
> > +#define IPQ_ANOC_PCIE0_1_SLV		1
>
> Please use style matching rest of mainline code. There is no IPQ in the
> name of interconnect. Open recent SM8650 or similar and see.

Ok. Will update and post the next version.

Thanks
Varada

Re: [PATCH 1/2] dt-bindings: interconnect: Add Qualcomm IPQ9574 support

[Rob Herring]

On Thu, Mar 21, 2024 at 10:01:48AM +0530, Varadarajan Narayanan wrote:
> Add master/slave ids for Qualcomm IPQ9574 Network-On-Chip
> interfaces. This will be used by the gcc-ipq9574 driver
> that will for providing interconnect services using the
> icc-clk framework.
> 
> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> ---
>  .../dt-bindings/interconnect/qcom,ipq9574.h   | 62 +++++++++++++++++++
>  1 file changed, 62 insertions(+)
>  create mode 100644 include/dt-bindings/interconnect/qcom,ipq9574.h
> 
> diff --git a/include/dt-bindings/interconnect/qcom,ipq9574.h b/include/dt-bindings/interconnect/qcom,ipq9574.h
> new file mode 100644
> index 000000000000..96f79a86e8d2
> --- /dev/null
> +++ b/include/dt-bindings/interconnect/qcom,ipq9574.h
> @@ -0,0 +1,62 @@
> +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)

Where did you come up with GPL-2.0+? Every other qcom interconnect 
header is GPL-2.0-only. Is your employer okay with GPLv3 AND after?

Rob

Re: [PATCH 1/2] dt-bindings: interconnect: Add Qualcomm IPQ9574 support

[Varadarajan Narayanan]

On Thu, Mar 21, 2024 at 09:35:49AM -0500, Rob Herring wrote:
> On Thu, Mar 21, 2024 at 10:01:48AM +0530, Varadarajan Narayanan wrote:
> > Add master/slave ids for Qualcomm IPQ9574 Network-On-Chip
> > interfaces. This will be used by the gcc-ipq9574 driver
> > that will for providing interconnect services using the
> > icc-clk framework.
> >
> > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> > ---
> >  .../dt-bindings/interconnect/qcom,ipq9574.h   | 62 +++++++++++++++++++
> >  1 file changed, 62 insertions(+)
> >  create mode 100644 include/dt-bindings/interconnect/qcom,ipq9574.h
> >
> > diff --git a/include/dt-bindings/interconnect/qcom,ipq9574.h b/include/dt-bindings/interconnect/qcom,ipq9574.h
> > new file mode 100644
> > index 000000000000..96f79a86e8d2
> > --- /dev/null
> > +++ b/include/dt-bindings/interconnect/qcom,ipq9574.h
> > @@ -0,0 +1,62 @@
> > +// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
>
> Where did you come up with GPL-2.0+? Every other qcom interconnect
> header is GPL-2.0-only. Is your employer okay with GPLv3 AND after?

Oops. Will fix it in the next version.

Thanks
Varada

Re: [PATCH 2/2] clk: qcom: add IPQ9574 interconnect clocks support

[Krzysztof Kozlowski]

On 21/03/2024 10:56, Varadarajan Narayanan wrote:
> On Thu, Mar 21, 2024 at 08:25:15AM +0100, Krzysztof Kozlowski wrote:
>> On 21/03/2024 05:31, Varadarajan Narayanan wrote:
>>> Unlike MSM platforms that manage NoC related clocks and scaling
>>> from RPM, IPQ SoCs dont involve RPM in managing NoC related
>>> clocks and there is no NoC scaling.
>>
>> If these are clocks, expose them as clocks, not as interconnects.
> 
> Earlier IPQ9574 PCIe patches were NAK-ed when these were exposed
> as clocks. Please refer to the following discussions
> 
> https://lore.kernel.org/linux-arm-msm/CAA8EJpq0uawrOBHA8XHygEpGYF--HyxJWxKG44iiFdAZZz7O2w@mail.gmail.com/
> https://lore.kernel.org/linux-arm-msm/CAA8EJppabK8j9T40waMv=t-1aksXfqJibWuS41GhruzLhpatrg@mail.gmail.com/
> 
> Dmitry had said
> 	<quote>
> 	I'd kindly suggest implementing the NoC attachment
> 	properly. In the end, other Qualcomm platforms use ICC
> 	drivers, so by following this pattern we will have more
> 	common code paths.
> 	</quote>
> 
> Hence posted these patches to get feedback.

Then explain the rationale in commit msg.

Best regards,
Krzysztof

Re: [PATCH 2/2] clk: qcom: add IPQ9574 interconnect clocks support

[kernel test robot]

Hi Varadarajan,

kernel test robot noticed the following build errors:

[auto build test ERROR on robh/for-next]
[also build test ERROR on clk/clk-next linus/master v6.8 next-20240321]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Varadarajan-Narayanan/dt-bindings-interconnect-Add-Qualcomm-IPQ9574-support/20240321-123508
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link:    https://lore.kernel.org/r/20240321043149.2739204-3-quic_varada%40quicinc.com
patch subject: [PATCH 2/2] clk: qcom: add IPQ9574 interconnect clocks support
config: csky-randconfig-001-20240321 (https://download.01.org/0day-ci/archive/20240322/202403221357.pOXvpS3O-lkp@intel.com/config)
compiler: csky-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240322/202403221357.pOXvpS3O-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202403221357.pOXvpS3O-lkp@intel.com/

All errors (new ones prefixed by >>):

   csky-linux-ld: drivers/clk/qcom/gcc-ipq9574.o: in function `gcc_ipq9574_probe':
   gcc-ipq9574.c:(.text+0xc2): undefined reference to `icc_clk_register'
>> csky-linux-ld: gcc-ipq9574.c:(.text+0x10c): undefined reference to `icc_clk_register'

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH 2/2] clk: qcom: add IPQ9574 interconnect clocks support

[kernel test robot]

Hi Varadarajan,

kernel test robot noticed the following build errors:

[auto build test ERROR on robh/for-next]
[also build test ERROR on clk/clk-next linus/master v6.8 next-20240322]
[If your patch is applied to the wrong git tree, kindly drop us a note.
And when submitting patch, we suggest to use '--base' as documented in
https://git-scm.com/docs/git-format-patch#_base_tree_information]

url:    https://github.com/intel-lab-lkp/linux/commits/Varadarajan-Narayanan/dt-bindings-interconnect-Add-Qualcomm-IPQ9574-support/20240321-123508
base:   https://git.kernel.org/pub/scm/linux/kernel/git/robh/linux.git for-next
patch link:    https://lore.kernel.org/r/20240321043149.2739204-3-quic_varada%40quicinc.com
patch subject: [PATCH 2/2] clk: qcom: add IPQ9574 interconnect clocks support
config: alpha-allyesconfig (https://download.01.org/0day-ci/archive/20240322/202403221944.SAbczEhw-lkp@intel.com/config)
compiler: alpha-linux-gcc (GCC) 13.2.0
reproduce (this is a W=1 build): (https://download.01.org/0day-ci/archive/20240322/202403221944.SAbczEhw-lkp@intel.com/reproduce)

If you fix the issue in a separate patch/commit (i.e. not just a new version of
the same patch/commit), kindly add following tags
| Reported-by: kernel test robot <lkp@intel.com>
| Closes: https://lore.kernel.org/oe-kbuild-all/202403221944.SAbczEhw-lkp@intel.com/

All errors (new ones prefixed by >>):

   alpha-linux-ld: drivers/clk/qcom/gcc-ipq9574.o: in function `gcc_ipq9574_probe':
>> (.text+0x1a0): undefined reference to `icc_clk_register'
>> alpha-linux-ld: (.text+0x1ac): undefined reference to `icc_clk_register'

-- 
0-DAY CI Kernel Test Service
https://github.com/intel/lkp-tests/wiki

Re: [PATCH 2/2] clk: qcom: add IPQ9574 interconnect clocks support

[Konrad Dybcio]

On 21.03.2024 05:31, Varadarajan Narayanan wrote:
> Unlike MSM platforms that manage NoC related clocks and scaling
> from RPM, IPQ SoCs dont involve RPM in managing NoC related
> clocks and there is no NoC scaling.
> 
> However, there is a requirement to enable some NoC interface
> clocks for accessing the peripheral controllers present on
> these NoCs.
> 
> Hence adding a minimalistic interconnect driver that can enable
> the relevant clocks. This is similar to msm8996-cbf's usage of
> icc-clk framework.
> 
> Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> ---

[...]

> @@ -9,9 +9,16 @@
>  #include <linux/of.h>
>  #include <linux/platform_device.h>
>  #include <linux/regmap.h>
> +#if IS_ENABLED(CONFIG_INTERCONNECT)

This is bad practice, especially given the reasoning for your changes.

It's best if you add a dependency on interconnect to this driver,
otherwise things will go into uncountable EPROBE_DEFERs if there are
nodes consuming icc handles, but the supplier never registers.

[...]

>  
>  static int gcc_ipq9574_probe(struct platform_device *pdev)

..and that approach could save the probe func from the absolute mess it
has become with this patch

Konrad

Re: [PATCH 2/2] clk: qcom: add IPQ9574 interconnect clocks support

[Varadarajan Narayanan]

On Sat, Mar 23, 2024 at 01:29:00AM +0100, Konrad Dybcio wrote:
> On 21.03.2024 05:31, Varadarajan Narayanan wrote:
> > Unlike MSM platforms that manage NoC related clocks and scaling
> > from RPM, IPQ SoCs dont involve RPM in managing NoC related
> > clocks and there is no NoC scaling.
> >
> > However, there is a requirement to enable some NoC interface
> > clocks for accessing the peripheral controllers present on
> > these NoCs.
> >
> > Hence adding a minimalistic interconnect driver that can enable
> > the relevant clocks. This is similar to msm8996-cbf's usage of
> > icc-clk framework.
> >
> > Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
> > ---
>
> [...]
>
> > @@ -9,9 +9,16 @@
> >  #include <linux/of.h>
> >  #include <linux/platform_device.h>
> >  #include <linux/regmap.h>
> > +#if IS_ENABLED(CONFIG_INTERCONNECT)
>
> This is bad practice, especially given the reasoning for your changes.
>
> It's best if you add a dependency on interconnect to this driver,
> otherwise things will go into uncountable EPROBE_DEFERs if there are
> nodes consuming icc handles, but the supplier never registers.
>
> [...]
>
> >
> >  static int gcc_ipq9574_probe(struct platform_device *pdev)
>
> ..and that approach could save the probe func from the absolute mess it
> has become with this patch
>
> Konrad

Thanks for the feedback. Have addressed these and other
reviewers comments and posted v2. Please take a look.

-Varada