* [PATCH 1/6] ARM: dts: aspeed: rainier: Add Operator Panel LEDs
@ 2020-11-13 5:59 Vishwanatha Subbanna
2020-11-13 5:59 ` [PATCH 2/6] ARM: dts: aspeed: rainier: Add directly controlled LEDs Vishwanatha Subbanna
` (5 more replies)
0 siblings, 6 replies; 18+ messages in thread
From: Vishwanatha Subbanna @ 2020-11-13 5:59 UTC (permalink / raw)
To: joel, linux-aspeed, devicetree, robh+dt; +Cc: vishwa
These LEDs are on the operator panel and are connected via
a PCA9551 I2C expander.
Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
---
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 82 ++++++++++++++++++++++++++++
1 file changed, 82 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 21ae880..64d8748 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -122,6 +122,38 @@
reg = <3>;
};
};
+
+ leds {
+ compatible = "gpio-leds";
+
+ /* System ID LED that is at front on Op Panel */
+ front-sys-id0 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca_oppanel 0 GPIO_ACTIVE_LOW>;
+ };
+
+ /* System Attention Indicator ID LED that is at front on Op Panel */
+ front-check-log0 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca_oppanel 1 GPIO_ACTIVE_LOW>;
+ };
+
+ /* Enclosure Fault LED that is at front on Op Panel */
+ front-enc-fault1 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca_oppanel 2 GPIO_ACTIVE_LOW>;
+ };
+
+ /* System PowerOn LED that is at front on Op Panel */
+ front-sys-pwron0 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca_oppanel 3 GPIO_ACTIVE_LOW>;
+ };
+ };
};
&ehci1 {
@@ -838,6 +870,56 @@
};
};
+ pca_oppanel: pca9551@60 {
+ compatible = "nxp,pca9551";
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio@0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
+
ibm-panel@62 {
compatible = "ibm,op-panel";
reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 2/6] ARM: dts: aspeed: rainier: Add directly controlled LEDs
2020-11-13 5:59 [PATCH 1/6] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Vishwanatha Subbanna
@ 2020-11-13 5:59 ` Vishwanatha Subbanna
2020-11-16 6:13 ` Joel Stanley
2020-11-13 5:59 ` [PATCH 3/6] ARM: dts: aspeed: rainier: Add leds that are off PCA9552 Vishwanatha Subbanna
` (4 subsequent siblings)
5 siblings, 1 reply; 18+ messages in thread
From: Vishwanatha Subbanna @ 2020-11-13 5:59 UTC (permalink / raw)
To: joel, linux-aspeed, devicetree, robh+dt; +Cc: vishwa
These LEDs are directly connected to the BMC's GPIO bank.
Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
Reviewed-by: Eddie James <eajames@linux.ibm.com>
Signed-off-by: Joel Stanley <joel@jms.id.au>
---
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 24 ++++++++++++++++++++++--
1 file changed, 22 insertions(+), 2 deletions(-)
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 64d8748..1da7389 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -126,6 +126,26 @@
leds {
compatible = "gpio-leds";
+ /* BMC Card fault LED at the back */
+ bmc-ingraham0 {
+ gpios = <&gpio0 ASPEED_GPIO(H, 1) GPIO_ACTIVE_LOW>;
+ };
+
+ /* Enclosure ID LED at the back */
+ rear-enc-id0 {
+ gpios = <&gpio0 ASPEED_GPIO(H, 2) GPIO_ACTIVE_LOW>;
+ };
+
+ /* Enclosure fault LED at the back */
+ rear-enc-fault0 {
+ gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>;
+ };
+
+ /* PCIE slot power LED */
+ pcieslot-power {
+ gpios = <&gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_LOW>;
+ };
+
/* System ID LED that is at front on Op Panel */
front-sys-id0 {
retain-state-shutdown;
@@ -169,7 +189,7 @@
/*E0-E7*/ "","","","","","","","",
/*F0-F7*/ "","","","","","","","",
/*G0-G7*/ "","","","","","","","",
- /*H0-H7*/ "","","","","","","","",
+ /*H0-H7*/ "","bmc-ingraham0","rear-enc-id0","rear-enc-fault0","","","","",
/*I0-I7*/ "","","","","","","","",
/*J0-J7*/ "","","","","","","","",
/*K0-K7*/ "","","","","","","","",
@@ -177,7 +197,7 @@
/*M0-M7*/ "","","","","","","","",
/*N0-N7*/ "","","","","","","","",
/*O0-O7*/ "","","","usb-power","","","","",
- /*P0-P7*/ "","","","","","","","",
+ /*P0-P7*/ "","","","","pcieslot-power","","","",
/*Q0-Q7*/ "cfam-reset","","","","","","","",
/*R0-R7*/ "","","","","","","","",
/*S0-S7*/ "presence-ps0","presence-ps1","presence-ps2","presence-ps3",
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 3/6] ARM: dts: aspeed: rainier: Add leds that are off PCA9552
2020-11-13 5:59 [PATCH 1/6] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Vishwanatha Subbanna
2020-11-13 5:59 ` [PATCH 2/6] ARM: dts: aspeed: rainier: Add directly controlled LEDs Vishwanatha Subbanna
@ 2020-11-13 5:59 ` Vishwanatha Subbanna
2020-11-16 6:14 ` Joel Stanley
2020-11-13 5:59 ` [PATCH 4/6] ARM: dts: aspeed: rainier: Add leds that are off PIC16F882 Vishwanatha Subbanna
` (3 subsequent siblings)
5 siblings, 1 reply; 18+ messages in thread
From: Vishwanatha Subbanna @ 2020-11-13 5:59 UTC (permalink / raw)
To: joel, linux-aspeed, devicetree, robh+dt; +Cc: vishwa
These LEDs are on the fans and are connected via a
PCA9552 I2C expander
Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
---
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 36 ++++++++++++++++++++++++++++
1 file changed, 36 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 1da7389..b7d7246 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -173,6 +173,42 @@
default-state = "keep";
gpios = <&pca_oppanel 3 GPIO_ACTIVE_LOW>;
};
+
+ fan0 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
+ };
+
+ fan1 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
+ };
+
+ fan2 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
+ };
+
+ fan3 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
+ };
+
+ fan4 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
+ };
+
+ fan5 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
+ };
};
};
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 4/6] ARM: dts: aspeed: rainier: Add leds that are off PIC16F882
2020-11-13 5:59 [PATCH 1/6] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Vishwanatha Subbanna
2020-11-13 5:59 ` [PATCH 2/6] ARM: dts: aspeed: rainier: Add directly controlled LEDs Vishwanatha Subbanna
2020-11-13 5:59 ` [PATCH 3/6] ARM: dts: aspeed: rainier: Add leds that are off PCA9552 Vishwanatha Subbanna
@ 2020-11-13 5:59 ` Vishwanatha Subbanna
2020-11-16 6:15 ` Joel Stanley
2020-11-13 5:59 ` [PATCH 5/6] ARM: dts: aspeed: rainier: Add leds on optional DASD cards Vishwanatha Subbanna
` (2 subsequent siblings)
5 siblings, 1 reply; 18+ messages in thread
From: Vishwanatha Subbanna @ 2020-11-13 5:59 UTC (permalink / raw)
To: joel, linux-aspeed, devicetree, robh+dt; +Cc: vishwa
There are many LEDs that are connected to PIC16F882.
PIC has the software implementation of PCA9552
Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
---
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 690 +++++++++++++++++++++++++++
1 file changed, 690 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index b7d7246..88fefc0 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -209,6 +209,336 @@
default-state = "keep";
gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
};
+
+ ddimm0 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 0 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm1 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 1 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm2 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 2 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm3 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 3 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm4 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 4 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm5 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 5 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm6 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 6 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm7 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 7 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm8 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 8 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm9 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 9 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm10 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 10 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm11 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 11 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm12 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 12 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm13 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 13 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm14 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 14 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm15 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic1 15 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm16 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 0 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm17 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 1 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm18 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 2 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm19 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 3 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm20 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 4 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm21 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 5 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm22 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 6 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm23 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 7 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm24 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 8 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm25 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 9 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm26 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 10 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm27 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 11 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm28 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 12 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm29 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 13 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm30 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 14 GPIO_ACTIVE_LOW>;
+ };
+
+ ddimm31 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic2 15 GPIO_ACTIVE_LOW>;
+ };
+
+ pcieslot0 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic3 0 GPIO_ACTIVE_LOW>;
+ };
+
+ pcieslot1 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic3 1 GPIO_ACTIVE_LOW>;
+ };
+
+ pcieslot2 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic3 2 GPIO_ACTIVE_LOW>;
+ };
+
+ pcieslot3 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic3 3 GPIO_ACTIVE_LOW>;
+ };
+
+ pcieslot4 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic3 4 GPIO_ACTIVE_LOW>;
+ };
+
+ cpu1 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic3 5 GPIO_ACTIVE_LOW>;
+ };
+
+ cpu1-vrm0 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic3 6 GPIO_ACTIVE_LOW>;
+ };
+
+ lcd-russel {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic3 8 GPIO_ACTIVE_LOW>;
+ };
+
+ planar {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic4 0 GPIO_ACTIVE_LOW>;
+ };
+
+ cpu0 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic4 1 GPIO_ACTIVE_LOW>;
+ };
+
+ dasd-pyramid0 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic4 3 GPIO_ACTIVE_LOW>;
+ };
+
+ dasd-pyramid1 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic4 4 GPIO_ACTIVE_LOW>;
+ };
+
+ dasd-pyramid2 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic4 5 GPIO_ACTIVE_LOW>;
+ };
+
+ cpu0-vrm0 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic4 6 GPIO_ACTIVE_LOW>;
+ };
+
+ rtc-battery {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic4 7 GPIO_ACTIVE_LOW>;
+ };
+
+ base-blyth {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic4 8 GPIO_ACTIVE_LOW>;
+ };
+
+ pcieslot6 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic4 9 GPIO_ACTIVE_LOW>;
+ };
+
+ pcieslot7 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic4 10 GPIO_ACTIVE_LOW>;
+ };
+
+ pcieslot8 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic4 11 GPIO_ACTIVE_LOW>;
+ };
+
+ pcieslot9 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic4 12 GPIO_ACTIVE_LOW>;
+ };
+
+ pcieslot10 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic4 13 GPIO_ACTIVE_LOW>;
+ };
+
+ pcieslot11 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic4 14 GPIO_ACTIVE_LOW>;
+ };
+
+ tpm-wilson {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pic4 15 GPIO_ACTIVE_LOW>;
+ };
};
};
@@ -981,6 +1311,366 @@
reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>;
};
+ pic1: pca9952@32 {
+ compatible = "ibm,pca9552";
+ reg = <0x32>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio@0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@8 {
+ reg = <8>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@9 {
+ reg = <9>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@10 {
+ reg = <10>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@11 {
+ reg = <11>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@12 {
+ reg = <12>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@13 {
+ reg = <13>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@14 {
+ reg = <14>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@15 {
+ reg = <15>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
+
+ pic2: pca9552@31 {
+ compatible = "ibm,pca9552";
+ reg = <0x31>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio@0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@8 {
+ reg = <8>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@9 {
+ reg = <9>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@10 {
+ reg = <10>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@11 {
+ reg = <11>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@12 {
+ reg = <12>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@13 {
+ reg = <13>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@14 {
+ reg = <14>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@15 {
+ reg = <15>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
+
+ pic3: pca9552@30 {
+ compatible = "ibm,pca9552";
+ reg = <0x30>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio@0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@8 {
+ reg = <8>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@9 {
+ reg = <9>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@10 {
+ reg = <10>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@11 {
+ reg = <11>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@12 {
+ reg = <12>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@13 {
+ reg = <13>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@14 {
+ reg = <14>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@15 {
+ reg = <15>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
+
+ pic4: pca9552@33 {
+ compatible = "ibm,pca9552";
+ reg = <0x33>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio@0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@8 {
+ reg = <8>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@9 {
+ reg = <9>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@10 {
+ reg = <10>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@11 {
+ reg = <11>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@12 {
+ reg = <12>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@13 {
+ reg = <13>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@14 {
+ reg = <14>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@15 {
+ reg = <15>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
+
dps: dps310@76 {
compatible = "infineon,dps310";
reg = <0x76>;
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 5/6] ARM: dts: aspeed: rainier: Add leds on optional DASD cards
2020-11-13 5:59 [PATCH 1/6] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Vishwanatha Subbanna
` (2 preceding siblings ...)
2020-11-13 5:59 ` [PATCH 4/6] ARM: dts: aspeed: rainier: Add leds that are off PIC16F882 Vishwanatha Subbanna
@ 2020-11-13 5:59 ` Vishwanatha Subbanna
2020-11-16 6:14 ` Joel Stanley
2020-11-13 5:59 ` [PATCH 6/6] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards Vishwanatha Subbanna
2020-11-16 6:14 ` [PATCH 1/6] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Joel Stanley
5 siblings, 1 reply; 18+ messages in thread
From: Vishwanatha Subbanna @ 2020-11-13 5:59 UTC (permalink / raw)
To: joel, linux-aspeed, devicetree, robh+dt; +Cc: vishwa
These cards are not hot pluggable and must be installed
prior to boot. LEDs on these are controlled by PCA9552
I2C expander
Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
---
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 426 +++++++++++++++++++++++++++
1 file changed, 426 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 88fefc0..67c8c40 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -540,6 +540,162 @@
gpios = <&pic4 15 GPIO_ACTIVE_LOW>;
};
};
+
+ leds-optional-dasd-pyramid0 {
+ compatible = "gpio-leds";
+
+ nvme0 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca2 0 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme1 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca2 1 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme2 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca2 2 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme3 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca2 3 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme4 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca2 4 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme5 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca2 5 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme6 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca2 6 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme7 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca2 7 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds-optional-dasd-pyramid1 {
+ compatible = "gpio-leds";
+
+ nvme8 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca3 0 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme9 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca3 1 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme10 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca3 2 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme11 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca3 3 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme12 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca3 4 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme13 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca3 5 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme14 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca3 6 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme15 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca3 7 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds-optional-dasd-pyramid2 {
+ compatible = "gpio-leds";
+
+ nvme16 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca4 0 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme17 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca4 1 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme18 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca4 2 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme19 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca4 3 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme20 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca4 4 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme21 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca4 5 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme22 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca4 6 GPIO_ACTIVE_LOW>;
+ };
+
+ nvme23 {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca4 7 GPIO_ACTIVE_LOW>;
+ };
+ };
};
&ehci1 {
@@ -1885,6 +2041,96 @@
compatible = "atmel,24c64";
reg = <0x50>;
};
+
+ pca2: pca9552@60 {
+ compatible = "nxp,pca9552";
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio@0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@8 {
+ reg = <8>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@9 {
+ reg = <9>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@10 {
+ reg = <10>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@11 {
+ reg = <11>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@12 {
+ reg = <12>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@13 {
+ reg = <13>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@14 {
+ reg = <14>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@15 {
+ reg = <15>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
};
&i2c14 {
@@ -1894,6 +2140,96 @@
compatible = "atmel,24c64";
reg = <0x50>;
};
+
+ pca3: pca9552@60 {
+ compatible = "nxp,pca9552";
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio@0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@8 {
+ reg = <8>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@9 {
+ reg = <9>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@10 {
+ reg = <10>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@11 {
+ reg = <11>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@12 {
+ reg = <12>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@13 {
+ reg = <13>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@14 {
+ reg = <14>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@15 {
+ reg = <15>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
};
&i2c15 {
@@ -1903,6 +2239,96 @@
compatible = "atmel,24c64";
reg = <0x50>;
};
+
+ pca4: pca9552@60 {
+ compatible = "nxp,pca9552";
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio@0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@8 {
+ reg = <8>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@9 {
+ reg = <9>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@10 {
+ reg = <10>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@11 {
+ reg = <11>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@12 {
+ reg = <12>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@13 {
+ reg = <13>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@14 {
+ reg = <14>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@15 {
+ reg = <15>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
};
&vuart1 {
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* [PATCH 6/6] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards
2020-11-13 5:59 [PATCH 1/6] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Vishwanatha Subbanna
` (3 preceding siblings ...)
2020-11-13 5:59 ` [PATCH 5/6] ARM: dts: aspeed: rainier: Add leds on optional DASD cards Vishwanatha Subbanna
@ 2020-11-13 5:59 ` Vishwanatha Subbanna
2020-11-16 6:13 ` Joel Stanley
2020-11-16 6:14 ` [PATCH 1/6] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Joel Stanley
5 siblings, 1 reply; 18+ messages in thread
From: Vishwanatha Subbanna @ 2020-11-13 5:59 UTC (permalink / raw)
To: joel, linux-aspeed, devicetree, robh+dt; +Cc: vishwa
These are LEDs on the cable cards that plug into PCIE slots.
The LEDs are controlled by PCA9552 I2C expander
Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
---
arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 288 +++++++++++++++++++++++++++
1 file changed, 288 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
index 67c8c40..7de5f76 100644
--- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
+++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
@@ -696,6 +696,70 @@
gpios = <&pca4 7 GPIO_ACTIVE_LOW>;
};
};
+
+ leds-optional-cablecard0 {
+ compatible = "gpio-leds";
+
+ cablecard0-cxp-top {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca5 0 GPIO_ACTIVE_LOW>;
+ };
+
+ cablecard0-cxp-bot {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca5 1 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds-optional-cablecard3 {
+ compatible = "gpio-leds";
+
+ cablecard3-cxp-top {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca6 0 GPIO_ACTIVE_LOW>;
+ };
+
+ cablecard3-cxp-bot {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca6 1 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds-optional-cablecard4 {
+ compatible = "gpio-leds";
+
+ cablecard4-cxp-top {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca7 0 GPIO_ACTIVE_LOW>;
+ };
+
+ cablecard4-cxp-bot {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca7 1 GPIO_ACTIVE_LOW>;
+ };
+ };
+
+ leds-optional-cablecard10 {
+ compatible = "gpio-leds";
+
+ cablecard10-cxp-top {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca8 0 GPIO_ACTIVE_LOW>;
+ };
+
+ cablecard10-cxp-bot {
+ retain-state-shutdown;
+ default-state = "keep";
+ gpios = <&pca8 1 GPIO_ACTIVE_LOW>;
+ };
+ };
};
&ehci1 {
@@ -1212,6 +1276,180 @@
compatible = "atmel,24c64";
reg = <0x52>;
};
+
+ pca5: pca9551@60 {
+ compatible = "nxp,pca9551";
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio@0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
+};
+
+&i2c5 {
+ status = "okay";
+
+ tmp275@48 {
+ compatible = "ti,tmp275";
+ reg = <0x48>;
+ };
+
+ tmp275@49 {
+ compatible = "ti,tmp275";
+ reg = <0x49>;
+ };
+
+ eeprom@50 {
+ compatible = "atmel,24c64";
+ reg = <0x50>;
+ };
+
+ eeprom@51 {
+ compatible = "atmel,24c64";
+ reg = <0x51>;
+ };
+
+ pca6: pca9551@60 {
+ compatible = "nxp,pca9551";
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio@0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
+
+ pca7: pca9551@61 {
+ compatible = "nxp,pca9551";
+ reg = <0x61>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio@0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
};
&i2c5 {
@@ -2028,6 +2266,56 @@
compatible = "atmel,24c64";
reg = <0x51>;
};
+
+ pca8: pca9551@60 {
+ compatible = "nxp,pca9551";
+ reg = <0x60>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ gpio@0 {
+ reg = <0>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@1 {
+ reg = <1>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@2 {
+ reg = <2>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@3 {
+ reg = <3>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@4 {
+ reg = <4>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@5 {
+ reg = <5>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@6 {
+ reg = <6>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+
+ gpio@7 {
+ reg = <7>;
+ type = <PCA955X_TYPE_GPIO>;
+ };
+ };
};
&i2c12 {
--
1.8.3.1
^ permalink raw reply related [flat|nested] 18+ messages in thread
* Re: [PATCH 6/6] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards
2020-11-13 5:59 ` [PATCH 6/6] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards Vishwanatha Subbanna
@ 2020-11-16 6:13 ` Joel Stanley
2020-11-30 6:08 ` Andrew Jeffery
2021-02-10 11:16 ` vishwanatha subbanna
0 siblings, 2 replies; 18+ messages in thread
From: Joel Stanley @ 2020-11-16 6:13 UTC (permalink / raw)
To: Vishwanatha Subbanna, Eddie James, Andrew Jeffery, Brad Bishop
Cc: linux-aspeed, devicetree, Rob Herring
On Fri, 13 Nov 2020 at 05:59, Vishwanatha Subbanna
<vishwa@linux.vnet.ibm.com> wrote:
>
> These are LEDs on the cable cards that plug into PCIE slots.
> The LEDs are controlled by PCA9552 I2C expander
>
> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
> ---
> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 288 +++++++++++++++++++++++++++
> 1 file changed, 288 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index 67c8c40..7de5f76 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -696,6 +696,70 @@
> gpios = <&pca4 7 GPIO_ACTIVE_LOW>;
> };
> };
> +
> + leds-optional-cablecard0 {
Is it necessary to have separate nodes for each of the different GPIO devices?
Would it make sense to combine them, or is it better to be separate?
Andrew, Eddie, Brad: please review this one before I merge it.
> + compatible = "gpio-leds";
> +
> + cablecard0-cxp-top {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca5 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + cablecard0-cxp-bot {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca5 1 GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + leds-optional-cablecard3 {
> + compatible = "gpio-leds";
> +
> + cablecard3-cxp-top {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca6 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + cablecard3-cxp-bot {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca6 1 GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + leds-optional-cablecard4 {
> + compatible = "gpio-leds";
> +
> + cablecard4-cxp-top {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca7 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + cablecard4-cxp-bot {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca7 1 GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + leds-optional-cablecard10 {
> + compatible = "gpio-leds";
> +
> + cablecard10-cxp-top {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca8 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + cablecard10-cxp-bot {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca8 1 GPIO_ACTIVE_LOW>;
> + };
> + };
> };
>
> &ehci1 {
> @@ -1212,6 +1276,180 @@
> compatible = "atmel,24c64";
> reg = <0x52>;
> };
> +
> + pca5: pca9551@60 {
> + compatible = "nxp,pca9551";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +};
> +
> +&i2c5 {
> + status = "okay";
> +
> + tmp275@48 {
> + compatible = "ti,tmp275";
> + reg = <0x48>;
> + };
> +
> + tmp275@49 {
> + compatible = "ti,tmp275";
> + reg = <0x49>;
> + };
> +
> + eeprom@50 {
> + compatible = "atmel,24c64";
> + reg = <0x50>;
> + };
> +
> + eeprom@51 {
> + compatible = "atmel,24c64";
> + reg = <0x51>;
> + };
> +
> + pca6: pca9551@60 {
> + compatible = "nxp,pca9551";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +
> + pca7: pca9551@61 {
> + compatible = "nxp,pca9551";
> + reg = <0x61>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> };
>
> &i2c5 {
> @@ -2028,6 +2266,56 @@
> compatible = "atmel,24c64";
> reg = <0x51>;
> };
> +
> + pca8: pca9551@60 {
> + compatible = "nxp,pca9551";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> };
>
> &i2c12 {
> --
> 1.8.3.1
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 2/6] ARM: dts: aspeed: rainier: Add directly controlled LEDs
2020-11-13 5:59 ` [PATCH 2/6] ARM: dts: aspeed: rainier: Add directly controlled LEDs Vishwanatha Subbanna
@ 2020-11-16 6:13 ` Joel Stanley
0 siblings, 0 replies; 18+ messages in thread
From: Joel Stanley @ 2020-11-16 6:13 UTC (permalink / raw)
To: Vishwanatha Subbanna; +Cc: linux-aspeed, devicetree, Rob Herring
On Fri, 13 Nov 2020 at 05:59, Vishwanatha Subbanna
<vishwa@linux.vnet.ibm.com> wrote:
>
> These LEDs are directly connected to the BMC's GPIO bank.
>
> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
> Reviewed-by: Eddie James <eajames@linux.ibm.com>
> Signed-off-by: Joel Stanley <joel@jms.id.au>
Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 24 ++++++++++++++++++++++--
> 1 file changed, 22 insertions(+), 2 deletions(-)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index 64d8748..1da7389 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -126,6 +126,26 @@
> leds {
> compatible = "gpio-leds";
>
> + /* BMC Card fault LED at the back */
> + bmc-ingraham0 {
> + gpios = <&gpio0 ASPEED_GPIO(H, 1) GPIO_ACTIVE_LOW>;
> + };
> +
> + /* Enclosure ID LED at the back */
> + rear-enc-id0 {
> + gpios = <&gpio0 ASPEED_GPIO(H, 2) GPIO_ACTIVE_LOW>;
> + };
> +
> + /* Enclosure fault LED at the back */
> + rear-enc-fault0 {
> + gpios = <&gpio0 ASPEED_GPIO(H, 3) GPIO_ACTIVE_LOW>;
> + };
> +
> + /* PCIE slot power LED */
> + pcieslot-power {
> + gpios = <&gpio0 ASPEED_GPIO(P, 4) GPIO_ACTIVE_LOW>;
> + };
> +
> /* System ID LED that is at front on Op Panel */
> front-sys-id0 {
> retain-state-shutdown;
> @@ -169,7 +189,7 @@
> /*E0-E7*/ "","","","","","","","",
> /*F0-F7*/ "","","","","","","","",
> /*G0-G7*/ "","","","","","","","",
> - /*H0-H7*/ "","","","","","","","",
> + /*H0-H7*/ "","bmc-ingraham0","rear-enc-id0","rear-enc-fault0","","","","",
> /*I0-I7*/ "","","","","","","","",
> /*J0-J7*/ "","","","","","","","",
> /*K0-K7*/ "","","","","","","","",
> @@ -177,7 +197,7 @@
> /*M0-M7*/ "","","","","","","","",
> /*N0-N7*/ "","","","","","","","",
> /*O0-O7*/ "","","","usb-power","","","","",
> - /*P0-P7*/ "","","","","","","","",
> + /*P0-P7*/ "","","","","pcieslot-power","","","",
> /*Q0-Q7*/ "cfam-reset","","","","","","","",
> /*R0-R7*/ "","","","","","","","",
> /*S0-S7*/ "presence-ps0","presence-ps1","presence-ps2","presence-ps3",
> --
> 1.8.3.1
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 5/6] ARM: dts: aspeed: rainier: Add leds on optional DASD cards
2020-11-13 5:59 ` [PATCH 5/6] ARM: dts: aspeed: rainier: Add leds on optional DASD cards Vishwanatha Subbanna
@ 2020-11-16 6:14 ` Joel Stanley
0 siblings, 0 replies; 18+ messages in thread
From: Joel Stanley @ 2020-11-16 6:14 UTC (permalink / raw)
To: Vishwanatha Subbanna; +Cc: linux-aspeed, devicetree, Rob Herring
On Fri, 13 Nov 2020 at 05:59, Vishwanatha Subbanna
<vishwa@linux.vnet.ibm.com> wrote:
>
> These cards are not hot pluggable and must be installed
> prior to boot. LEDs on these are controlled by PCA9552
> I2C expander
>
> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 426 +++++++++++++++++++++++++++
> 1 file changed, 426 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index 88fefc0..67c8c40 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -540,6 +540,162 @@
> gpios = <&pic4 15 GPIO_ACTIVE_LOW>;
> };
> };
> +
> + leds-optional-dasd-pyramid0 {
> + compatible = "gpio-leds";
> +
> + nvme0 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme1 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme2 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme3 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme4 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 4 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme5 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 5 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme6 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 6 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme7 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca2 7 GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + leds-optional-dasd-pyramid1 {
> + compatible = "gpio-leds";
> +
> + nvme8 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme9 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme10 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme11 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme12 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 4 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme13 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 5 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme14 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 6 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme15 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca3 7 GPIO_ACTIVE_LOW>;
> + };
> + };
> +
> + leds-optional-dasd-pyramid2 {
> + compatible = "gpio-leds";
> +
> + nvme16 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme17 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme18 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme19 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme20 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 4 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme21 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 5 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme22 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 6 GPIO_ACTIVE_LOW>;
> + };
> +
> + nvme23 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca4 7 GPIO_ACTIVE_LOW>;
> + };
> + };
> };
>
> &ehci1 {
> @@ -1885,6 +2041,96 @@
> compatible = "atmel,24c64";
> reg = <0x50>;
> };
> +
> + pca2: pca9552@60 {
> + compatible = "nxp,pca9552";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> };
>
> &i2c14 {
> @@ -1894,6 +2140,96 @@
> compatible = "atmel,24c64";
> reg = <0x50>;
> };
> +
> + pca3: pca9552@60 {
> + compatible = "nxp,pca9552";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> };
>
> &i2c15 {
> @@ -1903,6 +2239,96 @@
> compatible = "atmel,24c64";
> reg = <0x50>;
> };
> +
> + pca4: pca9552@60 {
> + compatible = "nxp,pca9552";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> };
>
> &vuart1 {
> --
> 1.8.3.1
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 1/6] ARM: dts: aspeed: rainier: Add Operator Panel LEDs
2020-11-13 5:59 [PATCH 1/6] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Vishwanatha Subbanna
` (4 preceding siblings ...)
2020-11-13 5:59 ` [PATCH 6/6] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards Vishwanatha Subbanna
@ 2020-11-16 6:14 ` Joel Stanley
5 siblings, 0 replies; 18+ messages in thread
From: Joel Stanley @ 2020-11-16 6:14 UTC (permalink / raw)
To: Vishwanatha Subbanna; +Cc: linux-aspeed, devicetree, Rob Herring
On Fri, 13 Nov 2020 at 05:59, Vishwanatha Subbanna
<vishwa@linux.vnet.ibm.com> wrote:
>
> These LEDs are on the operator panel and are connected via
> a PCA9551 I2C expander.
>
> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 82 ++++++++++++++++++++++++++++
> 1 file changed, 82 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index 21ae880..64d8748 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -122,6 +122,38 @@
> reg = <3>;
> };
> };
> +
> + leds {
> + compatible = "gpio-leds";
> +
> + /* System ID LED that is at front on Op Panel */
> + front-sys-id0 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca_oppanel 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + /* System Attention Indicator ID LED that is at front on Op Panel */
> + front-check-log0 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca_oppanel 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + /* Enclosure Fault LED that is at front on Op Panel */
> + front-enc-fault1 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca_oppanel 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + /* System PowerOn LED that is at front on Op Panel */
> + front-sys-pwron0 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca_oppanel 3 GPIO_ACTIVE_LOW>;
> + };
> + };
> };
>
> &ehci1 {
> @@ -838,6 +870,56 @@
> };
> };
>
> + pca_oppanel: pca9551@60 {
> + compatible = "nxp,pca9551";
> + reg = <0x60>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +
> ibm-panel@62 {
> compatible = "ibm,op-panel";
> reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>;
> --
> 1.8.3.1
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 3/6] ARM: dts: aspeed: rainier: Add leds that are off PCA9552
2020-11-13 5:59 ` [PATCH 3/6] ARM: dts: aspeed: rainier: Add leds that are off PCA9552 Vishwanatha Subbanna
@ 2020-11-16 6:14 ` Joel Stanley
2021-02-10 11:22 ` vishwanatha subbanna
0 siblings, 1 reply; 18+ messages in thread
From: Joel Stanley @ 2020-11-16 6:14 UTC (permalink / raw)
To: Vishwanatha Subbanna; +Cc: linux-aspeed, devicetree, Rob Herring
On Fri, 13 Nov 2020 at 05:59, Vishwanatha Subbanna
<vishwa@linux.vnet.ibm.com> wrote:
>
> These LEDs are on the fans and are connected via a
> PCA9552 I2C expander
>
> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
> ---
> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 36 ++++++++++++++++++++++++++++
> 1 file changed, 36 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index 1da7389..b7d7246 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -173,6 +173,42 @@
> default-state = "keep";
> gpios = <&pca_oppanel 3 GPIO_ACTIVE_LOW>;
> };
> +
> + fan0 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
Does it make sense to rename the pca0 phandle to something more
descriptive so it isn't confused with other expanders? If you want to
do that please send a follow up patch.
Reviewed-by: Joel Stanley <joel@jms.id.au>
> + };
> +
> + fan1 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + fan2 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + fan3 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + fan4 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
> + };
> +
> + fan5 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
> + };
> };
> };
>
> --
> 1.8.3.1
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 4/6] ARM: dts: aspeed: rainier: Add leds that are off PIC16F882
2020-11-13 5:59 ` [PATCH 4/6] ARM: dts: aspeed: rainier: Add leds that are off PIC16F882 Vishwanatha Subbanna
@ 2020-11-16 6:15 ` Joel Stanley
0 siblings, 0 replies; 18+ messages in thread
From: Joel Stanley @ 2020-11-16 6:15 UTC (permalink / raw)
To: Vishwanatha Subbanna; +Cc: linux-aspeed, devicetree, Rob Herring
On Fri, 13 Nov 2020 at 05:59, Vishwanatha Subbanna
<vishwa@linux.vnet.ibm.com> wrote:
>
> There are many LEDs that are connected to PIC16F882.
> PIC has the software implementation of PCA9552
>
> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
> ---
> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 690 +++++++++++++++++++++++++++
> 1 file changed, 690 insertions(+)
>
> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> index b7d7246..88fefc0 100644
> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> @@ -209,6 +209,336 @@
> default-state = "keep";
> gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
> };
> +
> + ddimm0 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm1 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm2 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm3 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm4 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 4 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm5 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 5 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm6 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 6 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm7 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 7 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm8 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 8 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm9 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 9 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm10 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 10 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm11 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 11 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm12 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 12 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm13 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 13 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm14 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 14 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm15 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic1 15 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm16 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm17 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm18 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm19 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm20 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 4 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm21 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 5 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm22 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 6 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm23 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 7 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm24 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 8 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm25 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 9 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm26 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 10 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm27 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 11 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm28 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 12 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm29 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 13 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm30 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 14 GPIO_ACTIVE_LOW>;
> + };
> +
> + ddimm31 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic2 15 GPIO_ACTIVE_LOW>;
> + };
> +
> + pcieslot0 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic3 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + pcieslot1 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic3 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + pcieslot2 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic3 2 GPIO_ACTIVE_LOW>;
> + };
> +
> + pcieslot3 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic3 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + pcieslot4 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic3 4 GPIO_ACTIVE_LOW>;
> + };
> +
> + cpu1 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic3 5 GPIO_ACTIVE_LOW>;
> + };
> +
> + cpu1-vrm0 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic3 6 GPIO_ACTIVE_LOW>;
> + };
> +
> + lcd-russel {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic3 8 GPIO_ACTIVE_LOW>;
> + };
> +
> + planar {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic4 0 GPIO_ACTIVE_LOW>;
> + };
> +
> + cpu0 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic4 1 GPIO_ACTIVE_LOW>;
> + };
> +
> + dasd-pyramid0 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic4 3 GPIO_ACTIVE_LOW>;
> + };
> +
> + dasd-pyramid1 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic4 4 GPIO_ACTIVE_LOW>;
> + };
> +
> + dasd-pyramid2 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic4 5 GPIO_ACTIVE_LOW>;
> + };
> +
> + cpu0-vrm0 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic4 6 GPIO_ACTIVE_LOW>;
> + };
> +
> + rtc-battery {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic4 7 GPIO_ACTIVE_LOW>;
> + };
> +
> + base-blyth {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic4 8 GPIO_ACTIVE_LOW>;
> + };
> +
> + pcieslot6 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic4 9 GPIO_ACTIVE_LOW>;
> + };
> +
> + pcieslot7 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic4 10 GPIO_ACTIVE_LOW>;
> + };
> +
> + pcieslot8 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic4 11 GPIO_ACTIVE_LOW>;
> + };
> +
> + pcieslot9 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic4 12 GPIO_ACTIVE_LOW>;
> + };
> +
> + pcieslot10 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic4 13 GPIO_ACTIVE_LOW>;
> + };
> +
> + pcieslot11 {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic4 14 GPIO_ACTIVE_LOW>;
> + };
> +
> + tpm-wilson {
> + retain-state-shutdown;
> + default-state = "keep";
> + gpios = <&pic4 15 GPIO_ACTIVE_LOW>;
> + };
> };
> };
>
> @@ -981,6 +1311,366 @@
> reg = <(0x62 | I2C_OWN_SLAVE_ADDRESS)>;
> };
>
> + pic1: pca9952@32 {
> + compatible = "ibm,pca9552";
> + reg = <0x32>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +
> + pic2: pca9552@31 {
> + compatible = "ibm,pca9552";
> + reg = <0x31>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +
> + pic3: pca9552@30 {
> + compatible = "ibm,pca9552";
> + reg = <0x30>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +
> + pic4: pca9552@33 {
> + compatible = "ibm,pca9552";
> + reg = <0x33>;
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + gpio-controller;
> + #gpio-cells = <2>;
> +
> + gpio@0 {
> + reg = <0>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@1 {
> + reg = <1>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@2 {
> + reg = <2>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@3 {
> + reg = <3>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@4 {
> + reg = <4>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@5 {
> + reg = <5>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@6 {
> + reg = <6>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@7 {
> + reg = <7>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@8 {
> + reg = <8>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@9 {
> + reg = <9>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@10 {
> + reg = <10>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@11 {
> + reg = <11>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@12 {
> + reg = <12>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@13 {
> + reg = <13>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@14 {
> + reg = <14>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> +
> + gpio@15 {
> + reg = <15>;
> + type = <PCA955X_TYPE_GPIO>;
> + };
> + };
> +
> dps: dps310@76 {
> compatible = "infineon,dps310";
> reg = <0x76>;
> --
> 1.8.3.1
>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 6/6] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards
2020-11-16 6:13 ` Joel Stanley
@ 2020-11-30 6:08 ` Andrew Jeffery
2021-02-10 11:14 ` vishwanatha subbanna
2021-02-10 11:16 ` vishwanatha subbanna
1 sibling, 1 reply; 18+ messages in thread
From: Andrew Jeffery @ 2020-11-30 6:08 UTC (permalink / raw)
To: Joel Stanley, vishwa, Eddie James, Brad Bishop
Cc: linux-aspeed, devicetree, Rob Herring
On Mon, 16 Nov 2020, at 16:43, Joel Stanley wrote:
> On Fri, 13 Nov 2020 at 05:59, Vishwanatha Subbanna
> <vishwa@linux.vnet.ibm.com> wrote:
> >
> > These are LEDs on the cable cards that plug into PCIE slots.
> > The LEDs are controlled by PCA9552 I2C expander
> >
> > Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
> > ---
> > arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 288 +++++++++++++++++++++++++++
> > 1 file changed, 288 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> > index 67c8c40..7de5f76 100644
> > --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> > +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> > @@ -696,6 +696,70 @@
> > gpios = <&pca4 7 GPIO_ACTIVE_LOW>;
> > };
> > };
> > +
> > + leds-optional-cablecard0 {
>
> Is it necessary to have separate nodes for each of the different GPIO devices?
Good question. Vishwa, what's the advantage either way here?
>
> Would it make sense to combine them, or is it better to be separate?
>
> Andrew, Eddie, Brad: please review this one before I merge it.
>
> > + compatible = "gpio-leds";
> > +
> > + cablecard0-cxp-top {
> > + retain-state-shutdown;
> > + default-state = "keep";
> > + gpios = <&pca5 0 GPIO_ACTIVE_LOW>;
> > + };
> > +
> > + cablecard0-cxp-bot {
> > + retain-state-shutdown;
> > + default-state = "keep";
> > + gpios = <&pca5 1 GPIO_ACTIVE_LOW>;
> > + };
> > + };
> > +
> > + leds-optional-cablecard3 {
> > + compatible = "gpio-leds";
> > +
> > + cablecard3-cxp-top {
> > + retain-state-shutdown;
> > + default-state = "keep";
> > + gpios = <&pca6 0 GPIO_ACTIVE_LOW>;
> > + };
> > +
> > + cablecard3-cxp-bot {
> > + retain-state-shutdown;
> > + default-state = "keep";
> > + gpios = <&pca6 1 GPIO_ACTIVE_LOW>;
> > + };
> > + };
> > +
> > + leds-optional-cablecard4 {
> > + compatible = "gpio-leds";
> > +
> > + cablecard4-cxp-top {
> > + retain-state-shutdown;
> > + default-state = "keep";
> > + gpios = <&pca7 0 GPIO_ACTIVE_LOW>;
> > + };
> > +
> > + cablecard4-cxp-bot {
> > + retain-state-shutdown;
> > + default-state = "keep";
> > + gpios = <&pca7 1 GPIO_ACTIVE_LOW>;
> > + };
> > + };
> > +
> > + leds-optional-cablecard10 {
> > + compatible = "gpio-leds";
> > +
> > + cablecard10-cxp-top {
> > + retain-state-shutdown;
> > + default-state = "keep";
> > + gpios = <&pca8 0 GPIO_ACTIVE_LOW>;
> > + };
> > +
> > + cablecard10-cxp-bot {
> > + retain-state-shutdown;
> > + default-state = "keep";
> > + gpios = <&pca8 1 GPIO_ACTIVE_LOW>;
> > + };
> > + };
> > };
> >
> > &ehci1 {
> > @@ -1212,6 +1276,180 @@
> > compatible = "atmel,24c64";
> > reg = <0x52>;
> > };
> > +
> > + pca5: pca9551@60 {
> > + compatible = "nxp,pca9551";
> > + reg = <0x60>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > +
> > + gpio@0 {
> > + reg = <0>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@1 {
> > + reg = <1>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@2 {
> > + reg = <2>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@3 {
> > + reg = <3>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@4 {
> > + reg = <4>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@5 {
> > + reg = <5>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@6 {
> > + reg = <6>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@7 {
> > + reg = <7>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > + };
> > +};
> > +
> > +&i2c5 {
> > + status = "okay";
> > +
> > + tmp275@48 {
> > + compatible = "ti,tmp275";
> > + reg = <0x48>;
> > + };
> > +
> > + tmp275@49 {
> > + compatible = "ti,tmp275";
> > + reg = <0x49>;
> > + };
These aren't LED devices.
> > +
> > + eeprom@50 {
> > + compatible = "atmel,24c64";
> > + reg = <0x50>;
> > + };
> > +
> > + eeprom@51 {
> > + compatible = "atmel,24c64";
> > + reg = <0x51>;
> > + };
Neither are these.
> > +
> > + pca6: pca9551@60 {
> > + compatible = "nxp,pca9551";
> > + reg = <0x60>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > +
> > + gpio@0 {
> > + reg = <0>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@1 {
> > + reg = <1>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@2 {
> > + reg = <2>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@3 {
> > + reg = <3>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@4 {
> > + reg = <4>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@5 {
> > + reg = <5>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@6 {
> > + reg = <6>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@7 {
> > + reg = <7>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > + };
> > +
> > + pca7: pca9551@61 {
> > + compatible = "nxp,pca9551";
> > + reg = <0x61>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > +
> > + gpio@0 {
> > + reg = <0>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@1 {
> > + reg = <1>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@2 {
> > + reg = <2>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@3 {
> > + reg = <3>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@4 {
> > + reg = <4>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@5 {
> > + reg = <5>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@6 {
> > + reg = <6>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@7 {
> > + reg = <7>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > + };
> > };
> >
> > &i2c5 {
> > @@ -2028,6 +2266,56 @@
> > compatible = "atmel,24c64";
> > reg = <0x51>;
> > };
> > +
> > + pca8: pca9551@60 {
> > + compatible = "nxp,pca9551";
> > + reg = <0x60>;
> > + #address-cells = <1>;
> > + #size-cells = <0>;
> > +
> > + gpio-controller;
> > + #gpio-cells = <2>;
> > +
> > + gpio@0 {
> > + reg = <0>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@1 {
> > + reg = <1>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@2 {
> > + reg = <2>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@3 {
> > + reg = <3>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@4 {
> > + reg = <4>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@5 {
> > + reg = <5>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@6 {
> > + reg = <6>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > +
> > + gpio@7 {
> > + reg = <7>;
> > + type = <PCA955X_TYPE_GPIO>;
> > + };
> > + };
> > };
If we're adding LEDs, why aren't we using PCA955X_TYPE_LED? Why the indirection through the leds-gpio driver?
Andrew
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 6/6] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards
2020-11-30 6:08 ` Andrew Jeffery
@ 2021-02-10 11:14 ` vishwanatha subbanna
0 siblings, 0 replies; 18+ messages in thread
From: vishwanatha subbanna @ 2021-02-10 11:14 UTC (permalink / raw)
To: Andrew Jeffery
Cc: vishwanatha subbanna, Joel Stanley, Eddie James, Brad Bishop,
linux-aspeed, devicetree, Rob Herring
> On 30-Nov-2020, at 11:38 AM, Andrew Jeffery <andrew@aj.id.au> wrote:
>
>
>
> On Mon, 16 Nov 2020, at 16:43, Joel Stanley wrote:
>> On Fri, 13 Nov 2020 at 05:59, Vishwanatha Subbanna
>> <vishwa@linux.vnet.ibm.com> wrote:
>>>
>>> These are LEDs on the cable cards that plug into PCIE slots.
>>> The LEDs are controlled by PCA9552 I2C expander
>>>
>>> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
>>> ---
>>> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 288 +++++++++++++++++++++++++++
>>> 1 file changed, 288 insertions(+)
>>>
>>> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
>>> index 67c8c40..7de5f76 100644
>>> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
>>> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
>>> @@ -696,6 +696,70 @@
>>> gpios = <&pca4 7 GPIO_ACTIVE_LOW>;
>>> };
>>> };
>>> +
>>> + leds-optional-cablecard0 {
>>
>> Is it necessary to have separate nodes for each of the different GPIO devices?
>
> Good question. Vishwa, what's the advantage either way here?
If I express ‘em all in one node that is “leds {", then if any of the GPIO is not seen because of not having the card, then the current leds-gpio driver knocks off all the ones on which it successfully acquired the GPIOs also, leaving nothing. I did speak to the maintainer and it looked like the behaviour was existing since long time and changing it would break old code.
>
>>
>> Would it make sense to combine them, or is it better to be separate?
>>
>> Andrew, Eddie, Brad: please review this one before I merge it.
>>
>>> + compatible = "gpio-leds";
>>> +
>>> + cablecard0-cxp-top {
>>> + retain-state-shutdown;
>>> + default-state = "keep";
>>> + gpios = <&pca5 0 GPIO_ACTIVE_LOW>;
>>> + };
>>> +
>>> + cablecard0-cxp-bot {
>>> + retain-state-shutdown;
>>> + default-state = "keep";
>>> + gpios = <&pca5 1 GPIO_ACTIVE_LOW>;
>>> + };
>>> + };
>>> +
>>> + leds-optional-cablecard3 {
>>> + compatible = "gpio-leds";
>>> +
>>> + cablecard3-cxp-top {
>>> + retain-state-shutdown;
>>> + default-state = "keep";
>>> + gpios = <&pca6 0 GPIO_ACTIVE_LOW>;
>>> + };
>>> +
>>> + cablecard3-cxp-bot {
>>> + retain-state-shutdown;
>>> + default-state = "keep";
>>> + gpios = <&pca6 1 GPIO_ACTIVE_LOW>;
>>> + };
>>> + };
>>> +
>>> + leds-optional-cablecard4 {
>>> + compatible = "gpio-leds";
>>> +
>>> + cablecard4-cxp-top {
>>> + retain-state-shutdown;
>>> + default-state = "keep";
>>> + gpios = <&pca7 0 GPIO_ACTIVE_LOW>;
>>> + };
>>> +
>>> + cablecard4-cxp-bot {
>>> + retain-state-shutdown;
>>> + default-state = "keep";
>>> + gpios = <&pca7 1 GPIO_ACTIVE_LOW>;
>>> + };
>>> + };
>>> +
>>> + leds-optional-cablecard10 {
>>> + compatible = "gpio-leds";
>>> +
>>> + cablecard10-cxp-top {
>>> + retain-state-shutdown;
>>> + default-state = "keep";
>>> + gpios = <&pca8 0 GPIO_ACTIVE_LOW>;
>>> + };
>>> +
>>> + cablecard10-cxp-bot {
>>> + retain-state-shutdown;
>>> + default-state = "keep";
>>> + gpios = <&pca8 1 GPIO_ACTIVE_LOW>;
>>> + };
>>> + };
>>> };
>>>
>>> &ehci1 {
>>> @@ -1212,6 +1276,180 @@
>>> compatible = "atmel,24c64";
>>> reg = <0x52>;
>>> };
>>> +
>>> + pca5: pca9551@60 {
>>> + compatible = "nxp,pca9551";
>>> + reg = <0x60>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> +
>>> + gpio@0 {
>>> + reg = <0>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@1 {
>>> + reg = <1>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@2 {
>>> + reg = <2>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@3 {
>>> + reg = <3>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@4 {
>>> + reg = <4>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@5 {
>>> + reg = <5>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@6 {
>>> + reg = <6>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@7 {
>>> + reg = <7>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> + };
>>> +};
>>> +
>>> +&i2c5 {
>>> + status = "okay";
>>> +
>>> + tmp275@48 {
>>> + compatible = "ti,tmp275";
>>> + reg = <0x48>;
>>> + };
>>> +
>>> + tmp275@49 {
>>> + compatible = "ti,tmp275";
>>> + reg = <0x49>;
>>> + };
>
> These aren't LED devices.
>
>>> +
>>> + eeprom@50 {
>>> + compatible = "atmel,24c64";
>>> + reg = <0x50>;
>>> + };
>>> +
>>> + eeprom@51 {
>>> + compatible = "atmel,24c64";
>>> + reg = <0x51>;
>>> + };
>
> Neither are these.
>
>>> +
>>> + pca6: pca9551@60 {
>>> + compatible = "nxp,pca9551";
>>> + reg = <0x60>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> +
>>> + gpio@0 {
>>> + reg = <0>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@1 {
>>> + reg = <1>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@2 {
>>> + reg = <2>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@3 {
>>> + reg = <3>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@4 {
>>> + reg = <4>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@5 {
>>> + reg = <5>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@6 {
>>> + reg = <6>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@7 {
>>> + reg = <7>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> + };
>>> +
>>> + pca7: pca9551@61 {
>>> + compatible = "nxp,pca9551";
>>> + reg = <0x61>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> +
>>> + gpio@0 {
>>> + reg = <0>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@1 {
>>> + reg = <1>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@2 {
>>> + reg = <2>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@3 {
>>> + reg = <3>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@4 {
>>> + reg = <4>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@5 {
>>> + reg = <5>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@6 {
>>> + reg = <6>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@7 {
>>> + reg = <7>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> + };
>>> };
>>>
>>> &i2c5 {
>>> @@ -2028,6 +2266,56 @@
>>> compatible = "atmel,24c64";
>>> reg = <0x51>;
>>> };
>>> +
>>> + pca8: pca9551@60 {
>>> + compatible = "nxp,pca9551";
>>> + reg = <0x60>;
>>> + #address-cells = <1>;
>>> + #size-cells = <0>;
>>> +
>>> + gpio-controller;
>>> + #gpio-cells = <2>;
>>> +
>>> + gpio@0 {
>>> + reg = <0>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@1 {
>>> + reg = <1>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@2 {
>>> + reg = <2>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@3 {
>>> + reg = <3>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@4 {
>>> + reg = <4>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@5 {
>>> + reg = <5>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@6 {
>>> + reg = <6>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> +
>>> + gpio@7 {
>>> + reg = <7>;
>>> + type = <PCA955X_TYPE_GPIO>;
>>> + };
>>> + };
>>> };
>
> If we're adding LEDs, why aren't we using PCA955X_TYPE_LED? Why the indirection through the leds-gpio driver?
Yes.. we could.. I kind of continued what we had for Witherspoon DTS. But then it does not solve the leds-gpio driver knocking off devices. So, I would say
We still need the leds-gpio driver sections
>
> Andrew
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 6/6] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards
2020-11-16 6:13 ` Joel Stanley
2020-11-30 6:08 ` Andrew Jeffery
@ 2021-02-10 11:16 ` vishwanatha subbanna
2021-02-14 23:08 ` Andrew Jeffery
1 sibling, 1 reply; 18+ messages in thread
From: vishwanatha subbanna @ 2021-02-10 11:16 UTC (permalink / raw)
To: Joel Stanley
Cc: vishwanatha subbanna, Eddie James, Andrew Jeffery, Brad Bishop,
linux-aspeed, devicetree, Rob Herring
> On 16-Nov-2020, at 11:43 AM, Joel Stanley <joel@jms.id.au> wrote:
>
> On Fri, 13 Nov 2020 at 05:59, Vishwanatha Subbanna
> <vishwa@linux.vnet.ibm.com> wrote:
>>
>> These are LEDs on the cable cards that plug into PCIE slots.
>> The LEDs are controlled by PCA9552 I2C expander
>>
>> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
>> ---
>> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 288 +++++++++++++++++++++++++++
>> 1 file changed, 288 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
>> index 67c8c40..7de5f76 100644
>> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
>> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
>> @@ -696,6 +696,70 @@
>> gpios = <&pca4 7 GPIO_ACTIVE_LOW>;
>> };
>> };
>> +
>> + leds-optional-cablecard0 {
>
> Is it necessary to have separate nodes for each of the different GPIO devices?
>
> Would it make sense to combine them, or is it better to be separate?
>
> Andrew, Eddie, Brad: please review this one before I merge it.
I answered this in previous patch set. If I express ‘em all in one node that is “leds {", then if any of the GPIO is not seen because of not having the card, then the current leds-gpio driver knocks off all the ones on which it successfully acquired the GPIOs also, leaving nothing. I did speak to the maintainer and it looked like the behaviour was existing since long time and changing it would break old code.
>
>> + compatible = "gpio-leds";
>> +
>> + cablecard0-cxp-top {
>> + retain-state-shutdown;
>> + default-state = "keep";
>> + gpios = <&pca5 0 GPIO_ACTIVE_LOW>;
>> + };
>> +
>> + cablecard0-cxp-bot {
>> + retain-state-shutdown;
>> + default-state = "keep";
>> + gpios = <&pca5 1 GPIO_ACTIVE_LOW>;
>> + };
>> + };
>> +
>> + leds-optional-cablecard3 {
>> + compatible = "gpio-leds";
>> +
>> + cablecard3-cxp-top {
>> + retain-state-shutdown;
>> + default-state = "keep";
>> + gpios = <&pca6 0 GPIO_ACTIVE_LOW>;
>> + };
>> +
>> + cablecard3-cxp-bot {
>> + retain-state-shutdown;
>> + default-state = "keep";
>> + gpios = <&pca6 1 GPIO_ACTIVE_LOW>;
>> + };
>> + };
>> +
>> + leds-optional-cablecard4 {
>> + compatible = "gpio-leds";
>> +
>> + cablecard4-cxp-top {
>> + retain-state-shutdown;
>> + default-state = "keep";
>> + gpios = <&pca7 0 GPIO_ACTIVE_LOW>;
>> + };
>> +
>> + cablecard4-cxp-bot {
>> + retain-state-shutdown;
>> + default-state = "keep";
>> + gpios = <&pca7 1 GPIO_ACTIVE_LOW>;
>> + };
>> + };
>> +
>> + leds-optional-cablecard10 {
>> + compatible = "gpio-leds";
>> +
>> + cablecard10-cxp-top {
>> + retain-state-shutdown;
>> + default-state = "keep";
>> + gpios = <&pca8 0 GPIO_ACTIVE_LOW>;
>> + };
>> +
>> + cablecard10-cxp-bot {
>> + retain-state-shutdown;
>> + default-state = "keep";
>> + gpios = <&pca8 1 GPIO_ACTIVE_LOW>;
>> + };
>> + };
>> };
>>
>> &ehci1 {
>> @@ -1212,6 +1276,180 @@
>> compatible = "atmel,24c64";
>> reg = <0x52>;
>> };
>> +
>> + pca5: pca9551@60 {
>> + compatible = "nxp,pca9551";
>> + reg = <0x60>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + gpio@0 {
>> + reg = <0>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@1 {
>> + reg = <1>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@2 {
>> + reg = <2>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@3 {
>> + reg = <3>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@4 {
>> + reg = <4>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@5 {
>> + reg = <5>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@6 {
>> + reg = <6>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@7 {
>> + reg = <7>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> + };
>> +};
>> +
>> +&i2c5 {
>> + status = "okay";
>> +
>> + tmp275@48 {
>> + compatible = "ti,tmp275";
>> + reg = <0x48>;
>> + };
>> +
>> + tmp275@49 {
>> + compatible = "ti,tmp275";
>> + reg = <0x49>;
>> + };
>> +
>> + eeprom@50 {
>> + compatible = "atmel,24c64";
>> + reg = <0x50>;
>> + };
>> +
>> + eeprom@51 {
>> + compatible = "atmel,24c64";
>> + reg = <0x51>;
>> + };
>> +
>> + pca6: pca9551@60 {
>> + compatible = "nxp,pca9551";
>> + reg = <0x60>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + gpio@0 {
>> + reg = <0>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@1 {
>> + reg = <1>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@2 {
>> + reg = <2>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@3 {
>> + reg = <3>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@4 {
>> + reg = <4>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@5 {
>> + reg = <5>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@6 {
>> + reg = <6>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@7 {
>> + reg = <7>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> + };
>> +
>> + pca7: pca9551@61 {
>> + compatible = "nxp,pca9551";
>> + reg = <0x61>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + gpio@0 {
>> + reg = <0>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@1 {
>> + reg = <1>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@2 {
>> + reg = <2>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@3 {
>> + reg = <3>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@4 {
>> + reg = <4>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@5 {
>> + reg = <5>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@6 {
>> + reg = <6>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@7 {
>> + reg = <7>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> + };
>> };
>>
>> &i2c5 {
>> @@ -2028,6 +2266,56 @@
>> compatible = "atmel,24c64";
>> reg = <0x51>;
>> };
>> +
>> + pca8: pca9551@60 {
>> + compatible = "nxp,pca9551";
>> + reg = <0x60>;
>> + #address-cells = <1>;
>> + #size-cells = <0>;
>> +
>> + gpio-controller;
>> + #gpio-cells = <2>;
>> +
>> + gpio@0 {
>> + reg = <0>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@1 {
>> + reg = <1>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@2 {
>> + reg = <2>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@3 {
>> + reg = <3>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@4 {
>> + reg = <4>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@5 {
>> + reg = <5>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@6 {
>> + reg = <6>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> +
>> + gpio@7 {
>> + reg = <7>;
>> + type = <PCA955X_TYPE_GPIO>;
>> + };
>> + };
>> };
>>
>> &i2c12 {
>> --
>> 1.8.3.1
>>
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 3/6] ARM: dts: aspeed: rainier: Add leds that are off PCA9552
2020-11-16 6:14 ` Joel Stanley
@ 2021-02-10 11:22 ` vishwanatha subbanna
0 siblings, 0 replies; 18+ messages in thread
From: vishwanatha subbanna @ 2021-02-10 11:22 UTC (permalink / raw)
To: Joel Stanley; +Cc: vishwanatha subbanna, linux-aspeed, devicetree, Rob Herring
> On 16-Nov-2020, at 11:44 AM, Joel Stanley <joel@jms.id.au> wrote:
>
> On Fri, 13 Nov 2020 at 05:59, Vishwanatha Subbanna
> <vishwa@linux.vnet.ibm.com> wrote:
>>
>> These LEDs are on the fans and are connected via a
>> PCA9552 I2C expander
>>
>> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
>> ---
>> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 36 ++++++++++++++++++++++++++++
>> 1 file changed, 36 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
>> index 1da7389..b7d7246 100644
>> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
>> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
>> @@ -173,6 +173,42 @@
>> default-state = "keep";
>> gpios = <&pca_oppanel 3 GPIO_ACTIVE_LOW>;
>> };
>> +
>> + fan0 {
>> + retain-state-shutdown;
>> + default-state = "keep";
>> + gpios = <&pca0 0 GPIO_ACTIVE_LOW>;
>
> Does it make sense to rename the pca0 phandle to something more
> descriptive so it isn't confused with other expanders? If you want to
> do that please send a follow up patch.
pca0 was something that was already existing before I made the change. I just referenced it.
>
> Reviewed-by: Joel Stanley <joel@jms.id.au>
>
>
>> + };
>> +
>> + fan1 {
>> + retain-state-shutdown;
>> + default-state = "keep";
>> + gpios = <&pca0 1 GPIO_ACTIVE_LOW>;
>> + };
>> +
>> + fan2 {
>> + retain-state-shutdown;
>> + default-state = "keep";
>> + gpios = <&pca0 2 GPIO_ACTIVE_LOW>;
>> + };
>> +
>> + fan3 {
>> + retain-state-shutdown;
>> + default-state = "keep";
>> + gpios = <&pca0 3 GPIO_ACTIVE_LOW>;
>> + };
>> +
>> + fan4 {
>> + retain-state-shutdown;
>> + default-state = "keep";
>> + gpios = <&pca0 4 GPIO_ACTIVE_LOW>;
>> + };
>> +
>> + fan5 {
>> + retain-state-shutdown;
>> + default-state = "keep";
>> + gpios = <&pca0 5 GPIO_ACTIVE_LOW>;
>> + };
>> };
>> };
>>
>> --
>> 1.8.3.1
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 6/6] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards
2021-02-10 11:16 ` vishwanatha subbanna
@ 2021-02-14 23:08 ` Andrew Jeffery
[not found] ` <14C0B6E9-0724-42FE-89BA-1FA0262B9BBB@linux.vnet.ibm.com>
0 siblings, 1 reply; 18+ messages in thread
From: Andrew Jeffery @ 2021-02-14 23:08 UTC (permalink / raw)
To: vishwa, Joel Stanley
Cc: Eddie James, Brad Bishop, linux-aspeed, devicetree, Rob Herring
On Wed, 10 Feb 2021, at 21:46, vishwanatha subbanna wrote:
>
>
> > On 16-Nov-2020, at 11:43 AM, Joel Stanley <joel@jms.id.au> wrote:
> >
> > On Fri, 13 Nov 2020 at 05:59, Vishwanatha Subbanna
> > <vishwa@linux.vnet.ibm.com> wrote:
> >>
> >> These are LEDs on the cable cards that plug into PCIE slots.
> >> The LEDs are controlled by PCA9552 I2C expander
> >>
> >> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
> >> ---
> >> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 288 +++++++++++++++++++++++++++
> >> 1 file changed, 288 insertions(+)
> >>
> >> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> >> index 67c8c40..7de5f76 100644
> >> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> >> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> >> @@ -696,6 +696,70 @@
> >> gpios = <&pca4 7 GPIO_ACTIVE_LOW>;
> >> };
> >> };
> >> +
> >> + leds-optional-cablecard0 {
> >
> > Is it necessary to have separate nodes for each of the different GPIO devices?
> >
> > Would it make sense to combine them, or is it better to be separate?
> >
> > Andrew, Eddie, Brad: please review this one before I merge it.
>
> I answered this in previous patch set. If I express ‘em all in one
> node that is “leds {", then if any of the GPIO is not seen because of
> not having the card, then the current leds-gpio driver knocks off all
> the ones on which it successfully acquired the GPIOs also, leaving
> nothing.
I'm struggling to follow this sentence. Can you please explain what you're
trying to say in a less colloquial way?
> I did speak to the maintainer and it looked like the behaviour
> was existing since long time and changing it would break old code.
>
Break how?
Andrew
^ permalink raw reply [flat|nested] 18+ messages in thread
* Re: [PATCH 6/6] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards
[not found] ` <14C0B6E9-0724-42FE-89BA-1FA0262B9BBB@linux.vnet.ibm.com>
@ 2021-02-18 22:45 ` Andrew Jeffery
0 siblings, 0 replies; 18+ messages in thread
From: Andrew Jeffery @ 2021-02-18 22:45 UTC (permalink / raw)
To: vishwa
Cc: Joel Stanley, Eddie James, Brad Bishop, linux-aspeed, devicetree,
Rob Herring
On Mon, 15 Feb 2021, at 17:14, vishwanatha subbanna wrote:
>
>
> > On 15-Feb-2021, at 4:38 AM, Andrew Jeffery <andrew@aj.id.au> wrote:
> >
> >
> >
> > On Wed, 10 Feb 2021, at 21:46, vishwanatha subbanna wrote:
> >>
> >>
> >>> On 16-Nov-2020, at 11:43 AM, Joel Stanley <joel@jms.id.au> wrote:
> >>>
> >>> On Fri, 13 Nov 2020 at 05:59, Vishwanatha Subbanna
> >>> <vishwa@linux.vnet.ibm.com> wrote:
> >>>>
> >>>> These are LEDs on the cable cards that plug into PCIE slots.
> >>>> The LEDs are controlled by PCA9552 I2C expander
> >>>>
> >>>> Signed-off-by: Vishwanatha Subbanna <vishwa@linux.vnet.ibm.com>
> >>>> ---
> >>>> arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 288 +++++++++++++++++++++++++++
> >>>> 1 file changed, 288 insertions(+)
> >>>>
> >>>> diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> >>>> index 67c8c40..7de5f76 100644
> >>>> --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> >>>> +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts
> >>>> @@ -696,6 +696,70 @@
> >>>> gpios = <&pca4 7 GPIO_ACTIVE_LOW>;
> >>>> };
> >>>> };
> >>>> +
> >>>> + leds-optional-cablecard0 {
> >>>
> >>> Is it necessary to have separate nodes for each of the different GPIO devices?
> >>>
> >>> Would it make sense to combine them, or is it better to be separate?
> >>>
> >>> Andrew, Eddie, Brad: please review this one before I merge it.
> >>
> >> I answered this in previous patch set. If I express ‘em all in one
> >> node that is “leds {", then if any of the GPIO is not seen because of
> >> not having the card, then the current leds-gpio driver knocks off all
> >> the ones on which it successfully acquired the GPIOs also, leaving
> >> nothing.
> >
> > I'm struggling to follow this sentence. Can you please explain what you're
> > trying to say in a less colloquial way?
>
>
> Okay.. So, let me give a bit of background. We have some cards that are
> optional. What that means is, if the cards are to be inserted, then the
> system needs to be brought down to put ‘em. Now, there can be N such
> cards in our system and any of ‘em can be populated or none of ‘em can
> be populated depending on what user wants.
>
> Now, let us assume I put global “leds { , compatible = "gpio-leds"; ”
> section and I describe LEDs of all these N cards along with all the
> other LEDs on the planar, then leds-gpio driver would populate all the
> entries in /sys/class/leds/ __if__ all of the N cards that I mentioned
> are plugged in and their GPIOs can be detected.
>
> However, take for instance where 1 or more of those cards are not
> plugged in, then, because there is a failure in detecting those GPIOs,
> leds-gpio driver will
> discard all other LEDs on which it could successfully acquire the
> GPIOs. So, there will not be anything in “/sys/class/leds”. So, the way
> it works is : either -all- or -none-.
Right.
So what's happening is we're using the static description of the hardware in
the devicetree to describe non-static data. That makes the patch a bit of a
hack. I'm not terribly enthused about it. Reliance on a specific probe
behaviour of the leds-gpio driver is not ideal.
The alternative is runtime device creation and driver binding, but then we have
issues describing the device configuration to the kernel. For LED configuration
I don't think that's a solved problem, but I'm keen for others to weigh in with
ideas here.
I think where I land is the devicetree approach is quite distasteful, but
pragmatic?
I'm torn so I'm going to punt to the maintainer.
Andrew
^ permalink raw reply [flat|nested] 18+ messages in thread
end of thread, other threads:[~2021-02-18 22:46 UTC | newest]
Thread overview: 18+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2020-11-13 5:59 [PATCH 1/6] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Vishwanatha Subbanna
2020-11-13 5:59 ` [PATCH 2/6] ARM: dts: aspeed: rainier: Add directly controlled LEDs Vishwanatha Subbanna
2020-11-16 6:13 ` Joel Stanley
2020-11-13 5:59 ` [PATCH 3/6] ARM: dts: aspeed: rainier: Add leds that are off PCA9552 Vishwanatha Subbanna
2020-11-16 6:14 ` Joel Stanley
2021-02-10 11:22 ` vishwanatha subbanna
2020-11-13 5:59 ` [PATCH 4/6] ARM: dts: aspeed: rainier: Add leds that are off PIC16F882 Vishwanatha Subbanna
2020-11-16 6:15 ` Joel Stanley
2020-11-13 5:59 ` [PATCH 5/6] ARM: dts: aspeed: rainier: Add leds on optional DASD cards Vishwanatha Subbanna
2020-11-16 6:14 ` Joel Stanley
2020-11-13 5:59 ` [PATCH 6/6] ARM: dts: aspeed: rainier: Add leds that are on optional PCI cable cards Vishwanatha Subbanna
2020-11-16 6:13 ` Joel Stanley
2020-11-30 6:08 ` Andrew Jeffery
2021-02-10 11:14 ` vishwanatha subbanna
2021-02-10 11:16 ` vishwanatha subbanna
2021-02-14 23:08 ` Andrew Jeffery
[not found] ` <14C0B6E9-0724-42FE-89BA-1FA0262B9BBB@linux.vnet.ibm.com>
2021-02-18 22:45 ` Andrew Jeffery
2020-11-16 6:14 ` [PATCH 1/6] ARM: dts: aspeed: rainier: Add Operator Panel LEDs Joel Stanley
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