From: Conor Dooley <conor@kernel.org> To: Hal Feng <hal.feng@starfivetech.com> Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Philipp Zabel <p.zabel@pengutronix.de>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Ben Dooks <ben.dooks@sifive.com>, Daniel Lezcano <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Emil Renner Berthing <emil.renner.berthing@canonical.com>, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 11/21] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Date: Sat, 11 Mar 2023 13:11:38 +0000 [thread overview] Message-ID: <34b0473a-91bd-453b-91dd-01defde92d68@spud> (raw) In-Reply-To: <20230311090733.56918-12-hal.feng@starfivetech.com> [-- Attachment #1: Type: text/plain, Size: 2071 bytes --] On Sat, Mar 11, 2023 at 05:07:23PM +0800, Hal Feng wrote: > From: Emil Renner Berthing <kernel@esmil.dk> > > Add bindings for the system clock and reset generator (SYSCRG) on the > JH7110 RISC-V SoC by StarFive Ltd. > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > Signed-off-by: Hal Feng <hal.feng@starfivetech.com> > --- > .../clock/starfive,jh7110-syscrg.yaml | 104 +++++++++ > MAINTAINERS | 8 +- > .../dt-bindings/clock/starfive,jh7110-crg.h | 203 ++++++++++++++++++ > .../dt-bindings/reset/starfive,jh7110-crg.h | 142 ++++++++++++ > 4 files changed, 454 insertions(+), 3 deletions(-) > create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml > create mode 100644 include/dt-bindings/clock/starfive,jh7110-crg.h > create mode 100644 include/dt-bindings/reset/starfive,jh7110-crg.h > > diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml > new file mode 100644 > index 000000000000..84373ae31644 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml > + clock-names: > + oneOf: > + - items: > + - const: osc > + - enum: > + - gmac1_rmii_refin > + - gmac1_rgmii_rxin > + - const: i2stx_bclk_ext > + - const: i2stx_lrck_ext > + - const: i2srx_bclk_ext > + - const: i2srx_lrck_ext > + - const: tdm_ext > + - const: mclk_ext > + > + - items: > + - const: osc > + - const: gmac1_rmii_refin > + - const: gmac1_rgmii_rxin > + - const: i2stx_bclk_ext > + - const: i2stx_lrck_ext > + - const: i2srx_bclk_ext > + - const: i2srx_lrck_ext > + - const: tdm_ext > + - const: mclk_ext Assuming nothing else here is optional, Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor. [-- Attachment #2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --]
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From: Conor Dooley <conor@kernel.org> To: Hal Feng <hal.feng@starfivetech.com> Cc: linux-clk@vger.kernel.org, devicetree@vger.kernel.org, linux-riscv@lists.infradead.org, Stephen Boyd <sboyd@kernel.org>, Michael Turquette <mturquette@baylibre.com>, Philipp Zabel <p.zabel@pengutronix.de>, Rob Herring <robh+dt@kernel.org>, Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>, Palmer Dabbelt <palmer@dabbelt.com>, Paul Walmsley <paul.walmsley@sifive.com>, Albert Ou <aou@eecs.berkeley.edu>, Ben Dooks <ben.dooks@sifive.com>, Daniel Lezcano <daniel.lezcano@linaro.org>, Thomas Gleixner <tglx@linutronix.de>, Marc Zyngier <maz@kernel.org>, Emil Renner Berthing <emil.renner.berthing@canonical.com>, linux-kernel@vger.kernel.org Subject: Re: [PATCH v5 11/21] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Date: Sat, 11 Mar 2023 13:11:38 +0000 [thread overview] Message-ID: <34b0473a-91bd-453b-91dd-01defde92d68@spud> (raw) In-Reply-To: <20230311090733.56918-12-hal.feng@starfivetech.com> [-- Attachment #1.1: Type: text/plain, Size: 2071 bytes --] On Sat, Mar 11, 2023 at 05:07:23PM +0800, Hal Feng wrote: > From: Emil Renner Berthing <kernel@esmil.dk> > > Add bindings for the system clock and reset generator (SYSCRG) on the > JH7110 RISC-V SoC by StarFive Ltd. > > Signed-off-by: Emil Renner Berthing <kernel@esmil.dk> > Signed-off-by: Hal Feng <hal.feng@starfivetech.com> > --- > .../clock/starfive,jh7110-syscrg.yaml | 104 +++++++++ > MAINTAINERS | 8 +- > .../dt-bindings/clock/starfive,jh7110-crg.h | 203 ++++++++++++++++++ > .../dt-bindings/reset/starfive,jh7110-crg.h | 142 ++++++++++++ > 4 files changed, 454 insertions(+), 3 deletions(-) > create mode 100644 Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml > create mode 100644 include/dt-bindings/clock/starfive,jh7110-crg.h > create mode 100644 include/dt-bindings/reset/starfive,jh7110-crg.h > > diff --git a/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml > new file mode 100644 > index 000000000000..84373ae31644 > --- /dev/null > +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-syscrg.yaml > + clock-names: > + oneOf: > + - items: > + - const: osc > + - enum: > + - gmac1_rmii_refin > + - gmac1_rgmii_rxin > + - const: i2stx_bclk_ext > + - const: i2stx_lrck_ext > + - const: i2srx_bclk_ext > + - const: i2srx_lrck_ext > + - const: tdm_ext > + - const: mclk_ext > + > + - items: > + - const: osc > + - const: gmac1_rmii_refin > + - const: gmac1_rgmii_rxin > + - const: i2stx_bclk_ext > + - const: i2stx_lrck_ext > + - const: i2srx_bclk_ext > + - const: i2srx_lrck_ext > + - const: tdm_ext > + - const: mclk_ext Assuming nothing else here is optional, Reviewed-by: Conor Dooley <conor.dooley@microchip.com> Thanks, Conor. [-- Attachment #1.2: signature.asc --] [-- Type: application/pgp-signature, Size: 228 bytes --] [-- Attachment #2: Type: text/plain, Size: 161 bytes --] _______________________________________________ linux-riscv mailing list linux-riscv@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-riscv
next prev parent reply other threads:[~2023-03-11 13:11 UTC|newest] Thread overview: 88+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-03-11 9:07 [PATCH v5 00/21] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 01/21] clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 12:56 ` Conor Dooley 2023-03-11 12:56 ` Conor Dooley 2023-03-11 9:07 ` [PATCH v5 02/21] clk: starfive: Factor out common JH7100 and JH7110 code Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 03/21] clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-12 14:00 ` Conor Dooley 2023-03-12 14:00 ` Conor Dooley 2023-03-13 2:37 ` Hal Feng 2023-03-13 2:37 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 04/21] clk: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-16 19:05 ` Tommaso Merciai 2023-03-16 19:05 ` Tommaso Merciai 2023-03-18 4:19 ` Hal Feng 2023-03-18 4:19 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 05/21] reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 12:56 ` Conor Dooley 2023-03-11 12:56 ` Conor Dooley 2023-03-14 14:34 ` Philipp Zabel 2023-03-14 14:34 ` Philipp Zabel 2023-03-20 11:51 ` Emil Renner Berthing 2023-03-20 11:51 ` Emil Renner Berthing 2023-03-11 9:07 ` [PATCH v5 06/21] reset: Create subdirectory for StarFive drivers Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-14 14:34 ` Philipp Zabel 2023-03-14 14:34 ` Philipp Zabel 2023-03-17 8:17 ` Hal Feng 2023-03-17 8:17 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 07/21] reset: starfive: Factor out common JH71X0 reset code Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 08/21] reset: starfive: Extract the " Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 09/21] reset: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 10/21] reset: starfive: jh71x0: Use 32bit I/O on 32bit registers Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 11/21] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 13:11 ` Conor Dooley [this message] 2023-03-11 13:11 ` Conor Dooley 2023-03-13 3:22 ` Hal Feng 2023-03-13 3:22 ` Hal Feng 2023-03-13 8:53 ` Emil Renner Berthing 2023-03-13 8:53 ` Emil Renner Berthing 2023-03-14 14:09 ` Hal Feng 2023-03-14 14:09 ` Hal Feng 2023-03-11 14:17 ` Rob Herring 2023-03-11 14:17 ` Rob Herring 2023-03-13 2:47 ` Hal Feng 2023-03-13 2:47 ` Hal Feng 2023-03-13 7:51 ` Krzysztof Kozlowski 2023-03-13 7:51 ` Krzysztof Kozlowski 2023-03-14 14:18 ` Hal Feng 2023-03-14 14:18 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 12/21] dt-bindings: clock: Add StarFive JH7110 always-on " Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 13:14 ` Conor Dooley 2023-03-11 13:14 ` Conor Dooley 2023-03-19 13:28 ` Hal Feng 2023-03-19 13:28 ` Hal Feng 2023-03-11 14:18 ` Rob Herring 2023-03-11 14:18 ` Rob Herring 2023-03-13 2:49 ` Hal Feng 2023-03-13 2:49 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 13/21] clk: starfive: Add StarFive JH7110 system clock driver Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 14/21] clk: starfive: Add StarFive JH7110 always-on " Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 15/21] reset: starfive: Add StarFive JH7110 reset driver Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 16/21] dt-bindings: timer: Add StarFive JH7110 clint Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 17/21] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 18/21] dt-bindings: riscv: Add SiFive S7 compatible Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 19/21] riscv: dts: starfive: Add initial StarFive JH7110 device tree Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 20/21] riscv: dts: starfive: Add StarFive JH7110 pin function definitions Hal Feng 2023-03-11 9:07 ` Hal Feng 2023-03-11 9:07 ` [PATCH v5 21/21] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree Hal Feng 2023-03-11 9:07 ` Hal Feng
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