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From: Hal Feng <hal.feng@starfivetech.com>
To: Conor Dooley <conor@kernel.org>
Cc: <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>,
	Stephen Boyd <sboyd@kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Ben Dooks <ben.dooks@sifive.com>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	"Emil Renner Berthing" <emil.renner.berthing@canonical.com>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 12/21] dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
Date: Sun, 19 Mar 2023 21:28:04 +0800	[thread overview]
Message-ID: <6294ffee-3c66-5287-59b4-068a7f4e84ba@starfivetech.com> (raw)
In-Reply-To: <b9a421c0-85df-4c8c-a3cb-8286328c5ed0@spud>

On Sat, 11 Mar 2023 13:14:45 +0000, Conor Dooley wrote:
> On Sat, Mar 11, 2023 at 05:07:24PM +0800, Hal Feng wrote:
>> From: Emil Renner Berthing <kernel@esmil.dk>
>> 
>> Add bindings for the always-on clock and reset generator (AONCRG) on the
>> JH7110 RISC-V SoC by StarFive Ltd.
>> 
>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
>> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
>> +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml
>> @@ -0,0 +1,107 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/starfive,jh7110-aoncrg.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: StarFive JH7110 Always-On Clock and Reset Generator
>> +
>> +maintainers:
>> +  - Emil Renner Berthing <kernel@esmil.dk>
>> +
>> +properties:
>> +  compatible:
>> +    const: starfive,jh7110-aoncrg
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    oneOf:
>> +      - items:
>> +          - description: Main Oscillator (24 MHz)
>> +          - description: GMAC0 RMII reference or GMAC0 RGMII RX
>> +          - description: STG AXI/AHB
>> +          - description: APB Bus
>> +          - description: GMAC0 GTX
>> +
>> +      - items:
>> +          - description: Main Oscillator (24 MHz)
>> +          - description: GMAC0 RMII reference or GMAC0 RGMII RX
>> +          - description: STG AXI/AHB or GMAC0 RGMII RX
>> +          - description: APB Bus or STG AXI/AHB
>> +          - description: GMAC0 GTX or APB Bus
>> +          - description: RTC Oscillator (32.768 kHz) or GMAC0 GTX
> 
> Something tells me that the use of "or" means we're not doing this
> correctly.
> Otherwise,
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

There are two possible cases when the number of clock inputs is 6:

Main Oscillator
GMAC0 RMII reference or GMAC0 RGMII RX
STG AXI/AHB
APB Bus
GMAC0 GTX
RTC Oscillator

and

Main Oscillator
GMAC0 RMII reference
GMAC0 RGMII RX
STG AXI/AHB
APB Bus
GMAC0 GTX

So I used the "or" in the items descriptions. Thanks.

Best regards,
Hal

> 
>> +      - items:
>> +          - description: Main Oscillator (24 MHz)
>> +          - description: GMAC0 RMII reference
>> +          - description: GMAC0 RGMII RX
>> +          - description: STG AXI/AHB
>> +          - description: APB Bus
>> +          - description: GMAC0 GTX
>> +          - description: RTC Oscillator (32.768 kHz)
>> +
>> +  clock-names:
>> +    oneOf:
>> +      - minItems: 5
>> +        items:
>> +          - const: osc
>> +          - enum:
>> +              - gmac0_rmii_refin
>> +              - gmac0_rgmii_rxin
>> +          - const: stg_axiahb
>> +          - const: apb_bus
>> +          - const: gmac0_gtxclk
>> +          - const: rtc_osc
>> +
>> +      - minItems: 6
>> +        items:
>> +          - const: osc
>> +          - const: gmac0_rmii_refin
>> +          - const: gmac0_rgmii_rxin
>> +          - const: stg_axiahb
>> +          - const: apb_bus
>> +          - const: gmac0_gtxclk
>> +          - const: rtc_osc
> 


WARNING: multiple messages have this Message-ID (diff)
From: Hal Feng <hal.feng@starfivetech.com>
To: Conor Dooley <conor@kernel.org>
Cc: <linux-clk@vger.kernel.org>, <devicetree@vger.kernel.org>,
	<linux-riscv@lists.infradead.org>,
	Stephen Boyd <sboyd@kernel.org>,
	"Michael Turquette" <mturquette@baylibre.com>,
	Philipp Zabel <p.zabel@pengutronix.de>,
	Rob Herring <robh+dt@kernel.org>,
	Krzysztof Kozlowski <krzysztof.kozlowski+dt@linaro.org>,
	Palmer Dabbelt <palmer@dabbelt.com>,
	Paul Walmsley <paul.walmsley@sifive.com>,
	Albert Ou <aou@eecs.berkeley.edu>,
	Ben Dooks <ben.dooks@sifive.com>,
	Daniel Lezcano <daniel.lezcano@linaro.org>,
	Thomas Gleixner <tglx@linutronix.de>,
	Marc Zyngier <maz@kernel.org>,
	"Emil Renner Berthing" <emil.renner.berthing@canonical.com>,
	<linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v5 12/21] dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator
Date: Sun, 19 Mar 2023 21:28:04 +0800	[thread overview]
Message-ID: <6294ffee-3c66-5287-59b4-068a7f4e84ba@starfivetech.com> (raw)
In-Reply-To: <b9a421c0-85df-4c8c-a3cb-8286328c5ed0@spud>

On Sat, 11 Mar 2023 13:14:45 +0000, Conor Dooley wrote:
> On Sat, Mar 11, 2023 at 05:07:24PM +0800, Hal Feng wrote:
>> From: Emil Renner Berthing <kernel@esmil.dk>
>> 
>> Add bindings for the always-on clock and reset generator (AONCRG) on the
>> JH7110 RISC-V SoC by StarFive Ltd.
>> 
>> Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
>> Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
>> +++ b/Documentation/devicetree/bindings/clock/starfive,jh7110-aoncrg.yaml
>> @@ -0,0 +1,107 @@
>> +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
>> +%YAML 1.2
>> +---
>> +$id: http://devicetree.org/schemas/clock/starfive,jh7110-aoncrg.yaml#
>> +$schema: http://devicetree.org/meta-schemas/core.yaml#
>> +
>> +title: StarFive JH7110 Always-On Clock and Reset Generator
>> +
>> +maintainers:
>> +  - Emil Renner Berthing <kernel@esmil.dk>
>> +
>> +properties:
>> +  compatible:
>> +    const: starfive,jh7110-aoncrg
>> +
>> +  reg:
>> +    maxItems: 1
>> +
>> +  clocks:
>> +    oneOf:
>> +      - items:
>> +          - description: Main Oscillator (24 MHz)
>> +          - description: GMAC0 RMII reference or GMAC0 RGMII RX
>> +          - description: STG AXI/AHB
>> +          - description: APB Bus
>> +          - description: GMAC0 GTX
>> +
>> +      - items:
>> +          - description: Main Oscillator (24 MHz)
>> +          - description: GMAC0 RMII reference or GMAC0 RGMII RX
>> +          - description: STG AXI/AHB or GMAC0 RGMII RX
>> +          - description: APB Bus or STG AXI/AHB
>> +          - description: GMAC0 GTX or APB Bus
>> +          - description: RTC Oscillator (32.768 kHz) or GMAC0 GTX
> 
> Something tells me that the use of "or" means we're not doing this
> correctly.
> Otherwise,
> Reviewed-by: Conor Dooley <conor.dooley@microchip.com>

There are two possible cases when the number of clock inputs is 6:

Main Oscillator
GMAC0 RMII reference or GMAC0 RGMII RX
STG AXI/AHB
APB Bus
GMAC0 GTX
RTC Oscillator

and

Main Oscillator
GMAC0 RMII reference
GMAC0 RGMII RX
STG AXI/AHB
APB Bus
GMAC0 GTX

So I used the "or" in the items descriptions. Thanks.

Best regards,
Hal

> 
>> +      - items:
>> +          - description: Main Oscillator (24 MHz)
>> +          - description: GMAC0 RMII reference
>> +          - description: GMAC0 RGMII RX
>> +          - description: STG AXI/AHB
>> +          - description: APB Bus
>> +          - description: GMAC0 GTX
>> +          - description: RTC Oscillator (32.768 kHz)
>> +
>> +  clock-names:
>> +    oneOf:
>> +      - minItems: 5
>> +        items:
>> +          - const: osc
>> +          - enum:
>> +              - gmac0_rmii_refin
>> +              - gmac0_rgmii_rxin
>> +          - const: stg_axiahb
>> +          - const: apb_bus
>> +          - const: gmac0_gtxclk
>> +          - const: rtc_osc
>> +
>> +      - minItems: 6
>> +        items:
>> +          - const: osc
>> +          - const: gmac0_rmii_refin
>> +          - const: gmac0_rgmii_rxin
>> +          - const: stg_axiahb
>> +          - const: apb_bus
>> +          - const: gmac0_gtxclk
>> +          - const: rtc_osc
> 


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  reply	other threads:[~2023-03-19 13:28 UTC|newest]

Thread overview: 88+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2023-03-11  9:07 [PATCH v5 00/21] Basic clock, reset & device tree support for StarFive JH7110 RISC-V SoC Hal Feng
2023-03-11  9:07 ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 01/21] clk: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11 12:56   ` Conor Dooley
2023-03-11 12:56     ` Conor Dooley
2023-03-11  9:07 ` [PATCH v5 02/21] clk: starfive: Factor out common JH7100 and JH7110 code Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 03/21] clk: starfive: Rename clk-starfive-jh7100.h to clk-starfive-jh71x0.h Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-12 14:00   ` Conor Dooley
2023-03-12 14:00     ` Conor Dooley
2023-03-13  2:37     ` Hal Feng
2023-03-13  2:37       ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 04/21] clk: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-16 19:05   ` Tommaso Merciai
2023-03-16 19:05     ` Tommaso Merciai
2023-03-18  4:19     ` Hal Feng
2023-03-18  4:19       ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 05/21] reset: starfive: Replace SOC_STARFIVE with ARCH_STARFIVE Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11 12:56   ` Conor Dooley
2023-03-11 12:56     ` Conor Dooley
2023-03-14 14:34   ` Philipp Zabel
2023-03-14 14:34     ` Philipp Zabel
2023-03-20 11:51   ` Emil Renner Berthing
2023-03-20 11:51     ` Emil Renner Berthing
2023-03-11  9:07 ` [PATCH v5 06/21] reset: Create subdirectory for StarFive drivers Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-14 14:34   ` Philipp Zabel
2023-03-14 14:34     ` Philipp Zabel
2023-03-17  8:17     ` Hal Feng
2023-03-17  8:17       ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 07/21] reset: starfive: Factor out common JH71X0 reset code Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 08/21] reset: starfive: Extract the " Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 09/21] reset: starfive: Rename "jh7100" to "jh71x0" for the common code Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 10/21] reset: starfive: jh71x0: Use 32bit I/O on 32bit registers Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 11/21] dt-bindings: clock: Add StarFive JH7110 system clock and reset generator Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11 13:11   ` Conor Dooley
2023-03-11 13:11     ` Conor Dooley
2023-03-13  3:22     ` Hal Feng
2023-03-13  3:22       ` Hal Feng
2023-03-13  8:53       ` Emil Renner Berthing
2023-03-13  8:53         ` Emil Renner Berthing
2023-03-14 14:09         ` Hal Feng
2023-03-14 14:09           ` Hal Feng
2023-03-11 14:17   ` Rob Herring
2023-03-11 14:17     ` Rob Herring
2023-03-13  2:47     ` Hal Feng
2023-03-13  2:47       ` Hal Feng
2023-03-13  7:51       ` Krzysztof Kozlowski
2023-03-13  7:51         ` Krzysztof Kozlowski
2023-03-14 14:18         ` Hal Feng
2023-03-14 14:18           ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 12/21] dt-bindings: clock: Add StarFive JH7110 always-on " Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11 13:14   ` Conor Dooley
2023-03-11 13:14     ` Conor Dooley
2023-03-19 13:28     ` Hal Feng [this message]
2023-03-19 13:28       ` Hal Feng
2023-03-11 14:18   ` Rob Herring
2023-03-11 14:18     ` Rob Herring
2023-03-13  2:49     ` Hal Feng
2023-03-13  2:49       ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 13/21] clk: starfive: Add StarFive JH7110 system clock driver Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 14/21] clk: starfive: Add StarFive JH7110 always-on " Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 15/21] reset: starfive: Add StarFive JH7110 reset driver Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 16/21] dt-bindings: timer: Add StarFive JH7110 clint Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 17/21] dt-bindings: interrupt-controller: Add StarFive JH7110 plic Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 18/21] dt-bindings: riscv: Add SiFive S7 compatible Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 19/21] riscv: dts: starfive: Add initial StarFive JH7110 device tree Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 20/21] riscv: dts: starfive: Add StarFive JH7110 pin function definitions Hal Feng
2023-03-11  9:07   ` Hal Feng
2023-03-11  9:07 ` [PATCH v5 21/21] riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree Hal Feng
2023-03-11  9:07   ` Hal Feng

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