From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
To: "Lu, Brent" <brent.lu@intel.com>, Takashi Iwai <tiwai@suse.de>
Cc: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>,
"alsa-devel@alsa-project.org" <alsa-devel@alsa-project.org>,
Kai Vehmanen <kai.vehmanen@linux.intel.com>,
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>,
"Rojewski, Cezary" <cezary.rojewski@intel.com>,
Takashi Iwai <tiwai@suse.com>,
Jie Yang <yang.jie@linux.intel.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"yuhsuan@google.com" <yuhsuan@google.com>,
Liam Girdwood <liam.r.girdwood@linux.intel.com>,
Sam McNally <sammc@chromium.org>, Mark Brown <broonie@kernel.org>,
Ranjani Sridharan <ranjani.sridharan@linux.intel.com>,
Daniel Stuart <daniel.stuart14@gmail.com>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Yu-Hsuan Hsu <yuhsuan@chromium.org>,
Damian van Soelen <dj.vsoelen@gmail.com>
Subject: Re: [PATCH v3 2/2] ASoC: Intel: Add period size constraint on strago board
Date: Mon, 10 Aug 2020 10:03:06 -0500 [thread overview]
Message-ID: <3f3baf5e-f73d-9cd6-cbfb-36746071e126@linux.intel.com> (raw)
In-Reply-To: <DM6PR11MB364259049769F6EF3B84AABD97480@DM6PR11MB3642.namprd11.prod.outlook.com>
On 8/6/20 11:41 AM, Lu, Brent wrote:
>>
>> I don't get this. If the platform driver already stated 240 and 960 samples why
>> would 432 be chosen? Doesn't this mean the constraint is not applied?
>
> Hi Pierre,
>
> Sorry for late reply. I used following constraints in V3 patch so any period which
> aligns 1ms would be accepted.
>
> + /*
> + * Make sure the period to be multiple of 1ms to align the
> + * design of firmware. Apply same rule to buffer size to make
> + * sure alsa could always find a value for period size
> + * regardless the buffer size given by user space.
> + */
> + snd_pcm_hw_constraint_step(substream->runtime, 0,
> + SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 48);
> + snd_pcm_hw_constraint_step(substream->runtime, 0,
> + SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 48);
432 samples is 9ms, I don't have a clue why/how CRAS might ask for this
value.
It'd be a bit odd to add constraints just for the purpose of letting
userspace select a sensible value.
WARNING: multiple messages have this Message-ID (diff)
From: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
To: "Lu, Brent" <brent.lu@intel.com>, Takashi Iwai <tiwai@suse.de>
Cc: Guennadi Liakhovetski <guennadi.liakhovetski@linux.intel.com>,
"alsa-devel@alsa-project.org" <alsa-devel@alsa-project.org>,
Andy Shevchenko <andriy.shevchenko@linux.intel.com>,
Kai Vehmanen <kai.vehmanen@linux.intel.com>,
Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
Jie Yang <yang.jie@linux.intel.com>,
"Rojewski, Cezary" <cezary.rojewski@intel.com>,
Takashi Iwai <tiwai@suse.com>,
Liam Girdwood <liam.r.girdwood@linux.intel.com>,
Sam McNally <sammc@chromium.org>, Mark Brown <broonie@kernel.org>,
Ranjani Sridharan <ranjani.sridharan@linux.intel.com>,
Daniel Stuart <daniel.stuart14@gmail.com>,
"yuhsuan@google.com" <yuhsuan@google.com>,
Yu-Hsuan Hsu <yuhsuan@chromium.org>,
Damian van Soelen <dj.vsoelen@gmail.com>
Subject: Re: [PATCH v3 2/2] ASoC: Intel: Add period size constraint on strago board
Date: Mon, 10 Aug 2020 10:03:06 -0500 [thread overview]
Message-ID: <3f3baf5e-f73d-9cd6-cbfb-36746071e126@linux.intel.com> (raw)
In-Reply-To: <DM6PR11MB364259049769F6EF3B84AABD97480@DM6PR11MB3642.namprd11.prod.outlook.com>
On 8/6/20 11:41 AM, Lu, Brent wrote:
>>
>> I don't get this. If the platform driver already stated 240 and 960 samples why
>> would 432 be chosen? Doesn't this mean the constraint is not applied?
>
> Hi Pierre,
>
> Sorry for late reply. I used following constraints in V3 patch so any period which
> aligns 1ms would be accepted.
>
> + /*
> + * Make sure the period to be multiple of 1ms to align the
> + * design of firmware. Apply same rule to buffer size to make
> + * sure alsa could always find a value for period size
> + * regardless the buffer size given by user space.
> + */
> + snd_pcm_hw_constraint_step(substream->runtime, 0,
> + SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 48);
> + snd_pcm_hw_constraint_step(substream->runtime, 0,
> + SNDRV_PCM_HW_PARAM_BUFFER_SIZE, 48);
432 samples is 9ms, I don't have a clue why/how CRAS might ask for this
value.
It'd be a bit odd to add constraints just for the purpose of letting
userspace select a sensible value.
next prev parent reply other threads:[~2020-08-10 15:03 UTC|newest]
Thread overview: 106+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-07-29 11:03 [PATCH 0/2] Add period size constraint for Atom Chromebook Brent Lu
2020-07-29 11:03 ` Brent Lu
2020-07-29 11:03 ` [PATCH 1/2] ASoC: intel: atom: Add period size constraint Brent Lu
2020-07-29 11:03 ` Brent Lu
2020-07-29 11:19 ` Andy Shevchenko
2020-07-29 11:19 ` Andy Shevchenko
2020-07-29 11:03 ` [PATCH 2/2] ASoC: Intel: Add period size constraint on strago board Brent Lu
2020-07-29 11:03 ` Brent Lu
2020-07-29 14:08 ` Pierre-Louis Bossart
2020-07-29 14:08 ` Pierre-Louis Bossart
2020-07-30 8:02 ` Lu, Brent
2020-07-30 8:02 ` Lu, Brent
2020-07-30 15:27 ` Pierre-Louis Bossart
2020-07-30 15:44 ` Pierre-Louis Bossart
2020-07-30 16:17 ` Lu, Brent
2020-07-30 16:17 ` Lu, Brent
2020-07-30 16:56 ` Takashi Iwai
2020-07-30 16:56 ` Takashi Iwai
2020-07-31 12:28 ` Lu, Brent
2020-07-31 12:28 ` Lu, Brent
2020-07-29 11:20 ` [PATCH 0/2] Add period size constraint for Atom Chromebook Andy Shevchenko
2020-07-29 11:20 ` Andy Shevchenko
2020-07-31 12:26 ` [PATCH v3 " Brent Lu
2020-07-31 12:26 ` Brent Lu
2020-07-31 12:26 ` [PATCH v3 1/2] ASoC: intel: atom: Add period size constraint Brent Lu
2020-07-31 12:26 ` Brent Lu
2020-07-31 12:26 ` [PATCH v3 2/2] ASoC: Intel: Add period size constraint on strago board Brent Lu
2020-07-31 12:26 ` Brent Lu
2020-07-31 13:34 ` Takashi Iwai
2020-07-31 13:34 ` Takashi Iwai
2020-08-01 8:58 ` Lu, Brent
2020-08-01 8:58 ` Lu, Brent
2020-08-01 9:26 ` Takashi Iwai
2020-08-01 9:26 ` Takashi Iwai
2020-08-03 13:00 ` Lu, Brent
2020-08-03 13:00 ` Lu, Brent
2020-08-03 15:13 ` Pierre-Louis Bossart
2020-08-03 15:13 ` Pierre-Louis Bossart
2020-08-03 16:45 ` Lu, Brent
2020-08-03 16:45 ` Lu, Brent
2020-08-03 16:56 ` Takashi Iwai
2020-08-03 16:56 ` Takashi Iwai
2020-08-04 4:33 ` Lu, Brent
2020-08-04 4:33 ` Lu, Brent
2020-08-04 14:24 ` Pierre-Louis Bossart
2020-08-04 14:24 ` Pierre-Louis Bossart
2020-08-06 16:41 ` Lu, Brent
2020-08-06 16:41 ` Lu, Brent
2020-08-10 15:03 ` Pierre-Louis Bossart [this message]
2020-08-10 15:03 ` Pierre-Louis Bossart
2020-08-10 17:38 ` Yu-Hsuan Hsu
2020-08-10 17:38 ` Yu-Hsuan Hsu
2020-08-11 2:16 ` Lu, Brent
2020-08-11 2:16 ` Lu, Brent
2020-08-11 2:29 ` Yu-Hsuan Hsu
2020-08-11 2:29 ` Yu-Hsuan Hsu
2020-08-11 7:43 ` Takashi Iwai
2020-08-11 7:43 ` Takashi Iwai
2020-08-11 8:25 ` Yu-Hsuan Hsu
2020-08-11 8:25 ` Yu-Hsuan Hsu
2020-08-11 8:39 ` Takashi Iwai
2020-08-11 8:39 ` Takashi Iwai
2020-08-11 9:35 ` Yu-Hsuan Hsu
2020-08-11 9:35 ` Yu-Hsuan Hsu
2020-08-11 14:53 ` Mark Brown
2020-08-11 14:53 ` Mark Brown
2020-08-11 16:54 ` Pierre-Louis Bossart
2020-08-11 16:54 ` Pierre-Louis Bossart
2020-08-11 17:22 ` Mark Brown
2020-08-11 17:22 ` Mark Brown
2020-08-12 3:09 ` Yu-Hsuan Hsu
2020-08-12 3:09 ` Yu-Hsuan Hsu
2020-08-12 6:13 ` Takashi Iwai
2020-08-12 6:13 ` Takashi Iwai
2020-08-12 6:53 ` Yu-Hsuan Hsu
2020-08-12 6:53 ` Yu-Hsuan Hsu
2020-08-12 6:58 ` Takashi Iwai
2020-08-12 6:58 ` Takashi Iwai
2020-08-12 7:43 ` Yu-Hsuan Hsu
2020-08-12 7:43 ` Yu-Hsuan Hsu
2020-08-12 7:47 ` Takashi Iwai
2020-08-12 7:47 ` Takashi Iwai
2020-08-12 14:46 ` Pierre-Louis Bossart
2020-08-12 14:46 ` Pierre-Louis Bossart
2020-08-12 14:55 ` Takashi Iwai
2020-08-12 14:55 ` Takashi Iwai
2020-08-12 15:54 ` Pierre-Louis Bossart
2020-08-12 15:54 ` Pierre-Louis Bossart
2020-08-12 16:08 ` Lu, Brent
2020-08-12 16:08 ` Lu, Brent
2020-08-12 16:38 ` Pierre-Louis Bossart
2020-08-12 16:38 ` Pierre-Louis Bossart
2020-08-13 6:24 ` Yu-Hsuan Hsu
2020-08-13 6:24 ` Yu-Hsuan Hsu
2020-08-13 7:55 ` Lu, Brent
2020-08-13 7:55 ` Lu, Brent
2020-08-13 8:36 ` Yu-Hsuan Hsu
2020-08-13 8:36 ` Yu-Hsuan Hsu
2020-08-13 8:45 ` Takashi Iwai
2020-08-13 8:45 ` Takashi Iwai
2020-08-13 12:57 ` Pierre-Louis Bossart
2020-08-13 12:57 ` Pierre-Louis Bossart
2020-08-13 17:15 ` Yu-Hsuan Hsu
2020-08-13 17:15 ` Yu-Hsuan Hsu
2020-08-21 16:40 ` [PATCH v3 0/2] Add period size constraint for Atom Chromebook Mark Brown
2020-08-21 16:40 ` Mark Brown
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