* Device tree on x86, part v3
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel; +Cc: sodaville, x86, devicetree-discuss
This patchset introduces device tree support on x86. The device tree is
passed by the bootloader via setup_data. It is used as an additional
source of information and does not replace the "traditional" x86 boot
page.
Right now we get the the following information from it:
- hpet location
- apic & ioapic location
- ioapic's interrupt routing
- legacy devices which are not initialized by bios
- devices which are behind a bus which does not support enumeration like
i2c
History:
- v1 initial post
- v2: Benh took my device tree apart so once this got fixed I refactor a
lot of code. Here are the changes:
- device tree is unflattenend before kmalloc() is working,
alloc_bootmem() is used for that.
- irq_host got renamed to irq_domain. This custom implementation
will leave once the powerpc implementation is in generic shape
- of_irq_map_pci() is moved from ppc & microblaze into drivers/of
and used also by x86 instead of a tiny subset of it. Bridges are
not handled at all on x86 (I don't have any so for so I worry
later)
- the device tree is relocated from its initial location. That
means that the boot loader does not need to know anything about
kernel's memory layout.
- v3: - rebase on top of current tip. The OLPC merged some OF defines
which are mostly nops so I replaced them with the code I have.
irq_create_of_mapping() requires now an irq chip to work. Those
things are moved into prom.c which is enabled by CONFIG_X86_OF.
This probably breaks OLPC but I don't know what they need in the
end.
- Fixed up Grant's review comments. The most noticeable is the i2c
controller node which has now three child nodes, representing the
three controllers indentified by the bar number. Each pci bar
matches via address translation the correct device tree node.
The series is based on the tip tree and is also available at
git://git.linutronix.de/users/bigeasy/soda.git ce_of_v3
Sebastian Andrzej Siewior (14):
x86/e820: remove conditional early mapping in parse_e820_ext
x86: Add device tree support
x86/dtb: Add a device tree for CE4100
x86/dtb: add irq domain abstraction
x86/dtb: add early parsing of APIC and IO APIC
x86/dtb: add support hpet
of: move of_irq_map_pci() into generic code
x86/dtb: add support for PCI devices backed by dtb nodes
x86/dtb: Add generic bus probe
x86/ioapic: Add OF bindings for IO-APIC
x86/ce4100: use OF for ioapic
x86/rtc: don't register rtc if we the DT blob
rtc/cmos: add OF bindings
x86/pci: remove warning
Documentation/powerpc/dts-bindings/rtc-cmos.txt | 28 ++
Documentation/x86/boot_with_dtb.txt | 26 ++
arch/microblaze/include/asm/pci-bridge.h | 12 +
arch/microblaze/include/asm/prom.h | 15 -
arch/microblaze/kernel/prom_parse.c | 77 -----
arch/microblaze/pci/pci-common.c | 1 +
arch/powerpc/include/asm/pci-bridge.h | 10 +
arch/powerpc/include/asm/prom.h | 15 -
arch/powerpc/kernel/pci-common.c | 1 +
arch/powerpc/kernel/prom_parse.c | 84 ------
arch/x86/Kconfig | 7 +
arch/x86/include/asm/bootparam.h | 1 +
arch/x86/include/asm/e820.h | 2 +-
arch/x86/include/asm/io_apic.h | 7 +
arch/x86/include/asm/irq.h | 3 -
arch/x86/include/asm/irq_controller.h | 12 +
arch/x86/include/asm/prom.h | 88 ++++++-
arch/x86/kernel/Makefile | 1 +
arch/x86/kernel/apic/io_apic.c | 99 +++++++
arch/x86/kernel/e820.c | 8 +-
arch/x86/kernel/irq.c | 9 -
arch/x86/kernel/irqinit.c | 9 +-
arch/x86/kernel/prom.c | 337 +++++++++++++++++++++++
arch/x86/kernel/rtc.c | 3 +
arch/x86/kernel/setup.c | 22 ++-
arch/x86/pci/ce4100.c | 2 +-
arch/x86/platform/ce4100/ce4100.c | 24 ++-
arch/x86/platform/ce4100/falconfalls.dts | 228 +++++++++++++++
drivers/of/Kconfig | 6 +
drivers/of/Makefile | 1 +
drivers/of/of_pci.c | 80 ++++++
drivers/rtc/rtc-cmos.c | 46 +++
include/linux/of.h | 12 +
include/linux/of_pci.h | 20 ++
34 files changed, 1072 insertions(+), 224 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/rtc-cmos.txt
create mode 100644 Documentation/x86/boot_with_dtb.txt
create mode 100644 arch/x86/include/asm/irq_controller.h
create mode 100644 arch/x86/kernel/prom.c
create mode 100644 arch/x86/platform/ce4100/falconfalls.dts
create mode 100644 drivers/of/of_pci.c
create mode 100644 include/linux/of_pci.h
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Device tree on x86, part v3
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A
This patchset introduces device tree support on x86. The device tree is
passed by the bootloader via setup_data. It is used as an additional
source of information and does not replace the "traditional" x86 boot
page.
Right now we get the the following information from it:
- hpet location
- apic & ioapic location
- ioapic's interrupt routing
- legacy devices which are not initialized by bios
- devices which are behind a bus which does not support enumeration like
i2c
History:
- v1 initial post
- v2: Benh took my device tree apart so once this got fixed I refactor a
lot of code. Here are the changes:
- device tree is unflattenend before kmalloc() is working,
alloc_bootmem() is used for that.
- irq_host got renamed to irq_domain. This custom implementation
will leave once the powerpc implementation is in generic shape
- of_irq_map_pci() is moved from ppc & microblaze into drivers/of
and used also by x86 instead of a tiny subset of it. Bridges are
not handled at all on x86 (I don't have any so for so I worry
later)
- the device tree is relocated from its initial location. That
means that the boot loader does not need to know anything about
kernel's memory layout.
- v3: - rebase on top of current tip. The OLPC merged some OF defines
which are mostly nops so I replaced them with the code I have.
irq_create_of_mapping() requires now an irq chip to work. Those
things are moved into prom.c which is enabled by CONFIG_X86_OF.
This probably breaks OLPC but I don't know what they need in the
end.
- Fixed up Grant's review comments. The most noticeable is the i2c
controller node which has now three child nodes, representing the
three controllers indentified by the bar number. Each pci bar
matches via address translation the correct device tree node.
The series is based on the tip tree and is also available at
git://git.linutronix.de/users/bigeasy/soda.git ce_of_v3
Sebastian Andrzej Siewior (14):
x86/e820: remove conditional early mapping in parse_e820_ext
x86: Add device tree support
x86/dtb: Add a device tree for CE4100
x86/dtb: add irq domain abstraction
x86/dtb: add early parsing of APIC and IO APIC
x86/dtb: add support hpet
of: move of_irq_map_pci() into generic code
x86/dtb: add support for PCI devices backed by dtb nodes
x86/dtb: Add generic bus probe
x86/ioapic: Add OF bindings for IO-APIC
x86/ce4100: use OF for ioapic
x86/rtc: don't register rtc if we the DT blob
rtc/cmos: add OF bindings
x86/pci: remove warning
Documentation/powerpc/dts-bindings/rtc-cmos.txt | 28 ++
Documentation/x86/boot_with_dtb.txt | 26 ++
arch/microblaze/include/asm/pci-bridge.h | 12 +
arch/microblaze/include/asm/prom.h | 15 -
arch/microblaze/kernel/prom_parse.c | 77 -----
arch/microblaze/pci/pci-common.c | 1 +
arch/powerpc/include/asm/pci-bridge.h | 10 +
arch/powerpc/include/asm/prom.h | 15 -
arch/powerpc/kernel/pci-common.c | 1 +
arch/powerpc/kernel/prom_parse.c | 84 ------
arch/x86/Kconfig | 7 +
arch/x86/include/asm/bootparam.h | 1 +
arch/x86/include/asm/e820.h | 2 +-
arch/x86/include/asm/io_apic.h | 7 +
arch/x86/include/asm/irq.h | 3 -
arch/x86/include/asm/irq_controller.h | 12 +
arch/x86/include/asm/prom.h | 88 ++++++-
arch/x86/kernel/Makefile | 1 +
arch/x86/kernel/apic/io_apic.c | 99 +++++++
arch/x86/kernel/e820.c | 8 +-
arch/x86/kernel/irq.c | 9 -
arch/x86/kernel/irqinit.c | 9 +-
arch/x86/kernel/prom.c | 337 +++++++++++++++++++++++
arch/x86/kernel/rtc.c | 3 +
arch/x86/kernel/setup.c | 22 ++-
arch/x86/pci/ce4100.c | 2 +-
arch/x86/platform/ce4100/ce4100.c | 24 ++-
arch/x86/platform/ce4100/falconfalls.dts | 228 +++++++++++++++
drivers/of/Kconfig | 6 +
drivers/of/Makefile | 1 +
drivers/of/of_pci.c | 80 ++++++
drivers/rtc/rtc-cmos.c | 46 +++
include/linux/of.h | 12 +
include/linux/of_pci.h | 20 ++
34 files changed, 1072 insertions(+), 224 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/rtc-cmos.txt
create mode 100644 Documentation/x86/boot_with_dtb.txt
create mode 100644 arch/x86/include/asm/irq_controller.h
create mode 100644 arch/x86/kernel/prom.c
create mode 100644 arch/x86/platform/ce4100/falconfalls.dts
create mode 100644 drivers/of/of_pci.c
create mode 100644 include/linux/of_pci.h
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* [PATCH TIP 01/14] x86/e820: remove conditional early mapping in parse_e820_ext
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel
Cc: sodaville, x86, devicetree-discuss, Sebastian Andrzej Siewior,
Dirk Brandewie
This patch ensures that the memory passed from parse_setup_data() is
large enough to cover the complete data structure. That means that the
conditional mapping in parse_e820_ext() can go.
While here, I also attempt not to map two pages if the address is not
aligned to a page boundary.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
---
arch/x86/include/asm/e820.h | 2 +-
arch/x86/kernel/e820.c | 8 +-------
arch/x86/kernel/setup.c | 18 +++++++++++++++---
3 files changed, 17 insertions(+), 11 deletions(-)
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index e99d55d..908b969 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -96,7 +96,7 @@ extern void e820_setup_gap(void);
extern int e820_search_gap(unsigned long *gapstart, unsigned long *gapsize,
unsigned long start_addr, unsigned long long end_addr);
struct setup_data;
-extern void parse_e820_ext(struct setup_data *data, unsigned long pa_data);
+extern void parse_e820_ext(struct setup_data *data);
#if defined(CONFIG_X86_64) || \
(defined(CONFIG_X86_32) && defined(CONFIG_HIBERNATION))
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index 294f26d..5fad626 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -667,21 +667,15 @@ __init void e820_setup_gap(void)
* boot_params.e820_map, others are passed via SETUP_E820_EXT node of
* linked list of struct setup_data, which is parsed here.
*/
-void __init parse_e820_ext(struct setup_data *sdata, unsigned long pa_data)
+void __init parse_e820_ext(struct setup_data *sdata)
{
- u32 map_len;
int entries;
struct e820entry *extmap;
entries = sdata->len / sizeof(struct e820entry);
- map_len = sdata->len + sizeof(struct setup_data);
- if (map_len > PAGE_SIZE)
- sdata = early_ioremap(pa_data, map_len);
extmap = (struct e820entry *)(sdata->data);
__append_e820_map(extmap, entries);
sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map);
- if (map_len > PAGE_SIZE)
- early_iounmap(sdata, map_len);
printk(KERN_INFO "extended physical RAM map:\n");
e820_print_map("extended");
}
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index d3cfe26..f8e7152 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -429,16 +429,28 @@ static void __init parse_setup_data(void)
return;
pa_data = boot_params.hdr.setup_data;
while (pa_data) {
- data = early_memremap(pa_data, PAGE_SIZE);
+ u32 data_len;
+ u32 map_len;
+
+ map_len = max(PAGE_SIZE - (pa_data & ~PAGE_MASK),
+ (u64)sizeof(struct setup_data));
+ data = early_memremap(pa_data, map_len);
+ data_len = data->len + sizeof(struct setup_data);
+ if (data_len > map_len) {
+ early_iounmap(data, map_len);
+ data = early_memremap(pa_data, data_len);
+ map_len = data_len;
+ }
+
switch (data->type) {
case SETUP_E820_EXT:
- parse_e820_ext(data, pa_data);
+ parse_e820_ext(data);
break;
default:
break;
}
pa_data = data->next;
- early_iounmap(data, PAGE_SIZE);
+ early_iounmap(data, map_len);
}
}
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 01/14] x86/e820: remove conditional early mapping in parse_e820_ext
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, Sebastian Andrzej Siewior
This patch ensures that the memory passed from parse_setup_data() is
large enough to cover the complete data structure. That means that the
conditional mapping in parse_e820_ext() can go.
While here, I also attempt not to map two pages if the address is not
aligned to a page boundary.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
arch/x86/include/asm/e820.h | 2 +-
arch/x86/kernel/e820.c | 8 +-------
arch/x86/kernel/setup.c | 18 +++++++++++++++---
3 files changed, 17 insertions(+), 11 deletions(-)
diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
index e99d55d..908b969 100644
--- a/arch/x86/include/asm/e820.h
+++ b/arch/x86/include/asm/e820.h
@@ -96,7 +96,7 @@ extern void e820_setup_gap(void);
extern int e820_search_gap(unsigned long *gapstart, unsigned long *gapsize,
unsigned long start_addr, unsigned long long end_addr);
struct setup_data;
-extern void parse_e820_ext(struct setup_data *data, unsigned long pa_data);
+extern void parse_e820_ext(struct setup_data *data);
#if defined(CONFIG_X86_64) || \
(defined(CONFIG_X86_32) && defined(CONFIG_HIBERNATION))
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
index 294f26d..5fad626 100644
--- a/arch/x86/kernel/e820.c
+++ b/arch/x86/kernel/e820.c
@@ -667,21 +667,15 @@ __init void e820_setup_gap(void)
* boot_params.e820_map, others are passed via SETUP_E820_EXT node of
* linked list of struct setup_data, which is parsed here.
*/
-void __init parse_e820_ext(struct setup_data *sdata, unsigned long pa_data)
+void __init parse_e820_ext(struct setup_data *sdata)
{
- u32 map_len;
int entries;
struct e820entry *extmap;
entries = sdata->len / sizeof(struct e820entry);
- map_len = sdata->len + sizeof(struct setup_data);
- if (map_len > PAGE_SIZE)
- sdata = early_ioremap(pa_data, map_len);
extmap = (struct e820entry *)(sdata->data);
__append_e820_map(extmap, entries);
sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map);
- if (map_len > PAGE_SIZE)
- early_iounmap(sdata, map_len);
printk(KERN_INFO "extended physical RAM map:\n");
e820_print_map("extended");
}
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index d3cfe26..f8e7152 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -429,16 +429,28 @@ static void __init parse_setup_data(void)
return;
pa_data = boot_params.hdr.setup_data;
while (pa_data) {
- data = early_memremap(pa_data, PAGE_SIZE);
+ u32 data_len;
+ u32 map_len;
+
+ map_len = max(PAGE_SIZE - (pa_data & ~PAGE_MASK),
+ (u64)sizeof(struct setup_data));
+ data = early_memremap(pa_data, map_len);
+ data_len = data->len + sizeof(struct setup_data);
+ if (data_len > map_len) {
+ early_iounmap(data, map_len);
+ data = early_memremap(pa_data, data_len);
+ map_len = data_len;
+ }
+
switch (data->type) {
case SETUP_E820_EXT:
- parse_e820_ext(data, pa_data);
+ parse_e820_ext(data);
break;
default:
break;
}
pa_data = data->next;
- early_iounmap(data, PAGE_SIZE);
+ early_iounmap(data, map_len);
}
}
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 02/14] x86: Add device tree support
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel
Cc: sodaville, x86, devicetree-discuss, Sebastian Andrzej Siewior,
Dirk Brandewie
This patch adds minimal support for device tree support on x86. It will
be passed to the kernel via setup_data which requires atleast boot
protocol 2.09.
Memory size, restricted memory regions, boot arguments are gathered the
traditional way so things like cmd_line are just here to let the code
compile.
The current plan is use the device tree as an extension and to gather
informations from it which can not be enumerated and have to be
hardcoded otherwise. This includes things like
- which devices are on this I2C/ SPI bus?
- how are the interrupts wired to IO APIC?
- where could my hpet be?
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
---
Documentation/x86/boot_with_dtb.txt | 26 +++++++++++++++
arch/x86/Kconfig | 7 ++++
arch/x86/include/asm/bootparam.h | 1 +
arch/x86/include/asm/irq.h | 3 --
arch/x86/include/asm/prom.h | 60 ++++++++++++++++++++++++++++++++++-
arch/x86/kernel/Makefile | 1 +
arch/x86/kernel/irq.c | 9 -----
arch/x86/kernel/irqinit.c | 1 +
arch/x86/kernel/prom.c | 51 +++++++++++++++++++++++++++++
arch/x86/kernel/setup.c | 4 ++
10 files changed, 150 insertions(+), 13 deletions(-)
create mode 100644 Documentation/x86/boot_with_dtb.txt
create mode 100644 arch/x86/kernel/prom.c
diff --git a/Documentation/x86/boot_with_dtb.txt b/Documentation/x86/boot_with_dtb.txt
new file mode 100644
index 0000000..6a357aa
--- /dev/null
+++ b/Documentation/x86/boot_with_dtb.txt
@@ -0,0 +1,26 @@
+ Booting x86 with device tree
+=================================
+
+1. Introduction
+~~~~~~~~~~~~~~~
+This document contains device tree information which are specific to
+the x86 platform. Generic informations as bindings can be found in
+Documentation/powerpc/dts-bindings/
+
+2. Passing the device tree
+~~~~~~~~~~~~~~~~~~~~~~~~~~
+The pointer to the device tree block (dtb) is passed via setup_data
+(see [0]) which requires at least boot protocol 2.09. The type filed is
+defined as
+
+#define SETUP_DTB 2
+
+3. Purpose
+~~~~~~~~~~~
+The device tree is used as an extension to the "boot page". As such it does not
+parse / consider data which are already covered by the boot page. This includes
+memory size, command line arguments or initrd address.
+It simply holds information which can not be retrieved otherwise like interrupt
+routing or a list of devices behind an I2C bus.
+
+[0] Documentation/x86/boot.txt
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index d5ed94d..5d21095 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -297,6 +297,13 @@ config X86_BIGSMP
---help---
This option is needed for the systems that have more than 8 CPUs
+config X86_OF
+ bool "Support for device tree"
+ select OF
+ select OF_EARLY_FLATTREE
+ ---help---
+ Device tree support on X86.
+
if X86_32
config X86_EXTENDED_PLATFORM
bool "Support for extended (non-PC) x86 platforms"
diff --git a/arch/x86/include/asm/bootparam.h b/arch/x86/include/asm/bootparam.h
index c8bfe63..e020d88 100644
--- a/arch/x86/include/asm/bootparam.h
+++ b/arch/x86/include/asm/bootparam.h
@@ -12,6 +12,7 @@
/* setup data types */
#define SETUP_NONE 0
#define SETUP_E820_EXT 1
+#define SETUP_DTB 2
/* extensible setup data list node */
struct setup_data {
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index c704b38..ba870bb 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -10,9 +10,6 @@
#include <asm/apicdef.h>
#include <asm/irq_vectors.h>
-/* Even though we don't support this, supply it to appease OF */
-static inline void irq_dispose_mapping(unsigned int virq) { }
-
static inline int irq_canonicalize(int irq)
{
return ((irq == 2) ? 9 : irq);
diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
index b4ec95f..b227ba7 100644
--- a/arch/x86/include/asm/prom.h
+++ b/arch/x86/include/asm/prom.h
@@ -1 +1,59 @@
-/* dummy prom.h; here to make linux/of.h's #includes happy */
+/*
+ * Definitions for Device tree / OpenFirmware handling on X86
+ *
+ * based on arch/powerpc/include/asm/prom.h which is
+ * Copyright (C) 1996-2005 Paul Mackerras.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifndef _ASM_X86_PROM_H
+#define _ASM_X86_PROM_H
+#ifndef __ASSEMBLY__
+
+#include <linux/of.h>
+#include <linux/types.h>
+#include <asm/irq.h>
+#include <asm/atomic.h>
+#include <asm/setup.h>
+
+#ifdef CONFIG_OF
+extern void add_dtb(u64 data);
+#else
+static inline void add_dtb(u64 data) { }
+#endif
+
+extern char cmd_line[COMMAND_LINE_SIZE];
+/* This number is used when no interrupt has been assigned */
+#define NO_IRQ (0)
+
+#define pci_address_to_pio pci_address_to_pio
+unsigned long pci_address_to_pio(phys_addr_t addr);
+
+/**
+ * irq_dispose_mapping - Unmap an interrupt
+ * @virq: linux virq number of the interrupt to unmap
+ *
+ * FIXME: We really should implement proper virq handling like power,
+ * but that's going to be major surgery.
+ */
+static inline void irq_dispose_mapping(unsigned int virq) { }
+
+#define HAVE_ARCH_DEVTREE_FIXUPS
+
+#endif /* __ASSEMBLY__ */
+
+/*
+ * These includes are put at the bottom because they may contain things
+ * that are overridden by this file. Ideally they shouldn't be included
+ * by this file, but there are a bunch of .c files that currently depend
+ * on it. Eventually they will be cleaned up.
+ */
+#include <linux/of_fdt.h>
+#include <linux/of_irq.h>
+#include <linux/platform_device.h>
+
+#endif
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 34244b2..50ff982 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -109,6 +109,7 @@ obj-$(CONFIG_MICROCODE) += microcode.o
obj-$(CONFIG_X86_CHECK_BIOS_CORRUPTION) += check.o
obj-$(CONFIG_SWIOTLB) += pci-swiotlb.o
+obj-$(CONFIG_X86_OF) += prom.o
###
# 64 bit specific files
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 52945da..45cdc62 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -276,15 +276,6 @@ void smp_x86_platform_ipi(struct pt_regs *regs)
EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);
-#ifdef CONFIG_OF
-unsigned int irq_create_of_mapping(struct device_node *controller,
- const u32 *intspec, unsigned int intsize)
-{
- return intspec[0];
-}
-EXPORT_SYMBOL_GPL(irq_create_of_mapping);
-#endif
-
#ifdef CONFIG_HOTPLUG_CPU
/* A cpu has been removed from cpu_online_mask. Reset irq affinities. */
void fixup_irqs(void)
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index c752e97..149c87f 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -25,6 +25,7 @@
#include <asm/setup.h>
#include <asm/i8259.h>
#include <asm/traps.h>
+#include <asm/prom.h>
/*
* ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
new file mode 100644
index 0000000..4969ffa
--- /dev/null
+++ b/arch/x86/kernel/prom.c
@@ -0,0 +1,51 @@
+/*
+ * Architecture specific OF callbacks.
+ */
+#include <linux/bootmem.h>
+#include <linux/io.h>
+#include <linux/list.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+
+char __initdata cmd_line[COMMAND_LINE_SIZE];
+
+unsigned int irq_create_of_mapping(struct device_node *controller,
+ const u32 *intspec, unsigned int intsize)
+{
+ return intspec[0];
+
+}
+EXPORT_SYMBOL_GPL(irq_create_of_mapping);
+
+unsigned long pci_address_to_pio(phys_addr_t address)
+{
+ /*
+ * The ioport address can be directly used by inX / outX
+ */
+ BUG_ON(address >= (1 << 16));
+ return (unsigned long)address;
+}
+EXPORT_SYMBOL_GPL(pci_address_to_pio);
+
+void __init early_init_dt_scan_chosen_arch(unsigned long node)
+{
+ BUG();
+}
+
+void __init early_init_dt_add_memory_arch(u64 base, u64 size)
+{
+ BUG();
+}
+
+void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
+{
+ return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
+}
+
+void __init add_dtb(u64 data)
+{
+ initial_boot_params = (struct boot_param_header *)
+ phys_to_virt((u64) (u32) data +
+ offsetof(struct setup_data, data));
+}
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index f8e7152..87396d2 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -113,6 +113,7 @@
#endif
#include <asm/mce.h>
#include <asm/alternative.h>
+#include <asm/prom.h>
/*
* end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries.
@@ -446,6 +447,9 @@ static void __init parse_setup_data(void)
case SETUP_E820_EXT:
parse_e820_ext(data);
break;
+ case SETUP_DTB:
+ add_dtb(pa_data);
+ break;
default:
break;
}
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 02/14] x86: Add device tree support
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, Sebastian Andrzej Siewior
This patch adds minimal support for device tree support on x86. It will
be passed to the kernel via setup_data which requires atleast boot
protocol 2.09.
Memory size, restricted memory regions, boot arguments are gathered the
traditional way so things like cmd_line are just here to let the code
compile.
The current plan is use the device tree as an extension and to gather
informations from it which can not be enumerated and have to be
hardcoded otherwise. This includes things like
- which devices are on this I2C/ SPI bus?
- how are the interrupts wired to IO APIC?
- where could my hpet be?
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
Documentation/x86/boot_with_dtb.txt | 26 +++++++++++++++
arch/x86/Kconfig | 7 ++++
arch/x86/include/asm/bootparam.h | 1 +
arch/x86/include/asm/irq.h | 3 --
arch/x86/include/asm/prom.h | 60 ++++++++++++++++++++++++++++++++++-
arch/x86/kernel/Makefile | 1 +
arch/x86/kernel/irq.c | 9 -----
arch/x86/kernel/irqinit.c | 1 +
arch/x86/kernel/prom.c | 51 +++++++++++++++++++++++++++++
arch/x86/kernel/setup.c | 4 ++
10 files changed, 150 insertions(+), 13 deletions(-)
create mode 100644 Documentation/x86/boot_with_dtb.txt
create mode 100644 arch/x86/kernel/prom.c
diff --git a/Documentation/x86/boot_with_dtb.txt b/Documentation/x86/boot_with_dtb.txt
new file mode 100644
index 0000000..6a357aa
--- /dev/null
+++ b/Documentation/x86/boot_with_dtb.txt
@@ -0,0 +1,26 @@
+ Booting x86 with device tree
+=================================
+
+1. Introduction
+~~~~~~~~~~~~~~~
+This document contains device tree information which are specific to
+the x86 platform. Generic informations as bindings can be found in
+Documentation/powerpc/dts-bindings/
+
+2. Passing the device tree
+~~~~~~~~~~~~~~~~~~~~~~~~~~
+The pointer to the device tree block (dtb) is passed via setup_data
+(see [0]) which requires at least boot protocol 2.09. The type filed is
+defined as
+
+#define SETUP_DTB 2
+
+3. Purpose
+~~~~~~~~~~~
+The device tree is used as an extension to the "boot page". As such it does not
+parse / consider data which are already covered by the boot page. This includes
+memory size, command line arguments or initrd address.
+It simply holds information which can not be retrieved otherwise like interrupt
+routing or a list of devices behind an I2C bus.
+
+[0] Documentation/x86/boot.txt
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index d5ed94d..5d21095 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -297,6 +297,13 @@ config X86_BIGSMP
---help---
This option is needed for the systems that have more than 8 CPUs
+config X86_OF
+ bool "Support for device tree"
+ select OF
+ select OF_EARLY_FLATTREE
+ ---help---
+ Device tree support on X86.
+
if X86_32
config X86_EXTENDED_PLATFORM
bool "Support for extended (non-PC) x86 platforms"
diff --git a/arch/x86/include/asm/bootparam.h b/arch/x86/include/asm/bootparam.h
index c8bfe63..e020d88 100644
--- a/arch/x86/include/asm/bootparam.h
+++ b/arch/x86/include/asm/bootparam.h
@@ -12,6 +12,7 @@
/* setup data types */
#define SETUP_NONE 0
#define SETUP_E820_EXT 1
+#define SETUP_DTB 2
/* extensible setup data list node */
struct setup_data {
diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
index c704b38..ba870bb 100644
--- a/arch/x86/include/asm/irq.h
+++ b/arch/x86/include/asm/irq.h
@@ -10,9 +10,6 @@
#include <asm/apicdef.h>
#include <asm/irq_vectors.h>
-/* Even though we don't support this, supply it to appease OF */
-static inline void irq_dispose_mapping(unsigned int virq) { }
-
static inline int irq_canonicalize(int irq)
{
return ((irq == 2) ? 9 : irq);
diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
index b4ec95f..b227ba7 100644
--- a/arch/x86/include/asm/prom.h
+++ b/arch/x86/include/asm/prom.h
@@ -1 +1,59 @@
-/* dummy prom.h; here to make linux/of.h's #includes happy */
+/*
+ * Definitions for Device tree / OpenFirmware handling on X86
+ *
+ * based on arch/powerpc/include/asm/prom.h which is
+ * Copyright (C) 1996-2005 Paul Mackerras.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifndef _ASM_X86_PROM_H
+#define _ASM_X86_PROM_H
+#ifndef __ASSEMBLY__
+
+#include <linux/of.h>
+#include <linux/types.h>
+#include <asm/irq.h>
+#include <asm/atomic.h>
+#include <asm/setup.h>
+
+#ifdef CONFIG_OF
+extern void add_dtb(u64 data);
+#else
+static inline void add_dtb(u64 data) { }
+#endif
+
+extern char cmd_line[COMMAND_LINE_SIZE];
+/* This number is used when no interrupt has been assigned */
+#define NO_IRQ (0)
+
+#define pci_address_to_pio pci_address_to_pio
+unsigned long pci_address_to_pio(phys_addr_t addr);
+
+/**
+ * irq_dispose_mapping - Unmap an interrupt
+ * @virq: linux virq number of the interrupt to unmap
+ *
+ * FIXME: We really should implement proper virq handling like power,
+ * but that's going to be major surgery.
+ */
+static inline void irq_dispose_mapping(unsigned int virq) { }
+
+#define HAVE_ARCH_DEVTREE_FIXUPS
+
+#endif /* __ASSEMBLY__ */
+
+/*
+ * These includes are put at the bottom because they may contain things
+ * that are overridden by this file. Ideally they shouldn't be included
+ * by this file, but there are a bunch of .c files that currently depend
+ * on it. Eventually they will be cleaned up.
+ */
+#include <linux/of_fdt.h>
+#include <linux/of_irq.h>
+#include <linux/platform_device.h>
+
+#endif
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
index 34244b2..50ff982 100644
--- a/arch/x86/kernel/Makefile
+++ b/arch/x86/kernel/Makefile
@@ -109,6 +109,7 @@ obj-$(CONFIG_MICROCODE) += microcode.o
obj-$(CONFIG_X86_CHECK_BIOS_CORRUPTION) += check.o
obj-$(CONFIG_SWIOTLB) += pci-swiotlb.o
+obj-$(CONFIG_X86_OF) += prom.o
###
# 64 bit specific files
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 52945da..45cdc62 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -276,15 +276,6 @@ void smp_x86_platform_ipi(struct pt_regs *regs)
EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);
-#ifdef CONFIG_OF
-unsigned int irq_create_of_mapping(struct device_node *controller,
- const u32 *intspec, unsigned int intsize)
-{
- return intspec[0];
-}
-EXPORT_SYMBOL_GPL(irq_create_of_mapping);
-#endif
-
#ifdef CONFIG_HOTPLUG_CPU
/* A cpu has been removed from cpu_online_mask. Reset irq affinities. */
void fixup_irqs(void)
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index c752e97..149c87f 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -25,6 +25,7 @@
#include <asm/setup.h>
#include <asm/i8259.h>
#include <asm/traps.h>
+#include <asm/prom.h>
/*
* ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
new file mode 100644
index 0000000..4969ffa
--- /dev/null
+++ b/arch/x86/kernel/prom.c
@@ -0,0 +1,51 @@
+/*
+ * Architecture specific OF callbacks.
+ */
+#include <linux/bootmem.h>
+#include <linux/io.h>
+#include <linux/list.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
+#include <linux/slab.h>
+
+char __initdata cmd_line[COMMAND_LINE_SIZE];
+
+unsigned int irq_create_of_mapping(struct device_node *controller,
+ const u32 *intspec, unsigned int intsize)
+{
+ return intspec[0];
+
+}
+EXPORT_SYMBOL_GPL(irq_create_of_mapping);
+
+unsigned long pci_address_to_pio(phys_addr_t address)
+{
+ /*
+ * The ioport address can be directly used by inX / outX
+ */
+ BUG_ON(address >= (1 << 16));
+ return (unsigned long)address;
+}
+EXPORT_SYMBOL_GPL(pci_address_to_pio);
+
+void __init early_init_dt_scan_chosen_arch(unsigned long node)
+{
+ BUG();
+}
+
+void __init early_init_dt_add_memory_arch(u64 base, u64 size)
+{
+ BUG();
+}
+
+void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
+{
+ return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
+}
+
+void __init add_dtb(u64 data)
+{
+ initial_boot_params = (struct boot_param_header *)
+ phys_to_virt((u64) (u32) data +
+ offsetof(struct setup_data, data));
+}
diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
index f8e7152..87396d2 100644
--- a/arch/x86/kernel/setup.c
+++ b/arch/x86/kernel/setup.c
@@ -113,6 +113,7 @@
#endif
#include <asm/mce.h>
#include <asm/alternative.h>
+#include <asm/prom.h>
/*
* end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries.
@@ -446,6 +447,9 @@ static void __init parse_setup_data(void)
case SETUP_E820_EXT:
parse_e820_ext(data);
break;
+ case SETUP_DTB:
+ add_dtb(pa_data);
+ break;
default:
break;
}
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel
Cc: sodaville, x86, devicetree-discuss, Sebastian Andrzej Siewior,
Dirk Brandewie
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
---
arch/x86/platform/ce4100/falconfalls.dts | 228 ++++++++++++++++++++++++++++++
1 files changed, 228 insertions(+), 0 deletions(-)
create mode 100644 arch/x86/platform/ce4100/falconfalls.dts
diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts
new file mode 100644
index 0000000..c2df5c8
--- /dev/null
+++ b/arch/x86/platform/ce4100/falconfalls.dts
@@ -0,0 +1,228 @@
+/*
+ * CE4100 on Falcon Falls
+ *
+ * (c) Copyright 2010 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; version 2 of the License.
+ */
+/dts-v1/;
+/ {
+ model = "intel,falconfalls";
+ compatible = "intel,falconfalls";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "intel,ce4100";
+ reg = <0>;
+ lapic = <&lapic0>;
+ };
+ };
+
+ soc@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "intel,ce4100-immr";
+ ranges;
+
+ ioapic1: pic@fec00000 {
+ #interrupt-cells = <2>;
+ compatible = "intel,ioapic-ce4100", "intel,ioapic";
+ interrupt-controller;
+ reg = <0xfec00000 0x1000>;
+ };
+
+ timer@fed00000 {
+ compatible = "intel,hpet-ce4100", "intel,hpet";
+ reg = <0xfed00000 0x200>;
+ };
+
+ lapic0: interrupt-controller@fee00000 {
+ compatible = "intel,lapic-ce4100", "intel,lapic";
+ reg = <0xfee00000 0x1000>;
+ };
+
+ pci@3fc {
+ #address-cells = <3>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ compatible = "intel,ce4100-pci", "pci";
+ device_type = "pci";
+ bus-range = <0 0>;
+ ranges = <0x2000000 0 0xbffff000 0xbffff000 0 0x1000
+ 0x2000000 0 0xdffe0000 0xdffe0000 0 0x1000
+ 0x0000000 0 0x0 0x0 0 0x100>;
+
+ isa@0 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "isa";
+ ranges = <1 0 0 0 0 0x100>;
+
+ rtc@70 {
+ compatible = "intel,ce4100-rtc", "motorola,mc146818";
+ interrupts = <8 3>;
+ interrupt-parent = <&ioapic1>;
+ ctrl-reg = <2>;
+ freq-reg = <0x26>;
+ reg = <1 0x70 2>;
+ };
+ };
+
+ /* Secondary IO-APIC */
+ ioapic2: pic@bffff000 {
+ #interrupt-cells = <2>;
+ compatible = "intel,ioapic-ce4100", "intel,ioapic";
+ interrupt-controller;
+ reg = <0x100 0x0 0x0 0x0 0x0>;
+ assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
+ };
+
+ pci@av {
+ #address-cells = <3>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ compatible = "intel,ce4100-pci";
+ device_type = "pci";
+ bus-range = <1 1>;
+ ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
+
+ interrupt-map-mask = <0xffffff 0x0 0x0 0x0>;
+ interrupt-map = <
+ /* GFX: 0x2E5B */
+ 0x11000 0x0 0x0 0x0 &ioapic2 0 0x1
+ /* ***** FIXME ****** Compositing Engine: 0x2E72 */
+ /* 0x11100 0x0 0x0 0x1 &ioapic2 0 0x1 */
+ /* MFD: 0x2E5C */
+ 0x11800 0x0 0x0 0x0 &ioapic2 2 0x1
+ /* TS Prefilter: 0x2E5D */
+ 0x12000 0x0 0x0 0x0 &ioapic2 4 0x1
+ /* TS Demux: 0x2E5E */
+ 0x12100 0x0 0x0 0x0 &ioapic2 5 0x1
+ /* ***** FIXME ***** Audio DSP: 0x2E5F */
+ /* 0x13000 0x0 0x0 0x1 &ioapic2 0 0x1 */
+ /* Audio Interfaces: 0x2E60 */
+ 0x13200 0x0 0x0 0x0 &ioapic2 8 0x1
+ /* VDC: 0x2E61 */
+ 0x14000 0x0 0x0 0x0 &ioapic2 9 0x1
+ /* DPE: 0x2E62 */
+ 0x14100 0x0 0x0 0x0 &ioapic2 10 0x1
+ /* HDMI Tx: 0x2E63 */
+ 0x14200 0x0 0x0 0x0 &ioapic2 11 0x1
+ /* SEC: 0x2E64 */
+ 0x14800 0x0 0x0 0x0 &ioapic2 12 0x1
+ /* EXP: 0x2E65 */
+ 0x15000 0x0 0x0 0x0 &ioapic2 13 0x1
+ /* UART0/1: 0x2E66 */
+ 0x15800 0x0 0x0 0x0 &ioapic2 14 0x1
+ /* GPIO: 0x2E67 */
+ 0x15900 0x0 0x0 0x0 &ioapic2 15 0x1
+ /* I2C0/1/2: 0x2E68 */
+ 0x15a00 0x0 0x0 0x0 &ioapic2 16 0x1
+ /* Smart Card 0/1: 0x2E69 */
+ 0x15b00 0x0 0x0 0x0 &ioapic2 15 0x1
+ /* SPI: 0x2E6A */
+ 0x15c00 0x0 0x0 0x0 &ioapic2 15 0x1
+ /* MSPOD: 0x2E6B */
+ 0x15d00 0x0 0x0 0x0 &ioapic2 19 0x1
+ /* IR: 0x2E6C */
+ 0x15e00 0x0 0x0 0x0 &ioapic2 16 0x1
+ /* **** FIXME ***** DFX: 0x2E6D */
+ /* 0x15f00 0x0 0x0 0x1 &ioapic2 0x0 0x1 */
+ /* Gig Ethernet: 0x2E6E */
+ 0x16000 0x0 0x0 0x0 &ioapic2 21 0x1
+ /* IEEE1588 and Clock Recovery Unit: 0x2E6F */
+ 0x16100 0x0 0x0 0x0 &ioapic2 3 0x1
+ /* USB0: 0x2E70 */
+ 0x16800 0x0 0x0 0x0 &ioapic2 22 0x3
+ /* USB1: 0x2E70 */
+ 0x16900 0x0 0x0 0x0 &ioapic2 22 0x3
+ /* SATA: 0x2E71 */
+ 0x17000 0x0 0x0 0x0 &ioapic2 23 0x3
+ >;
+
+ i2c-controller@15a00,0,0 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "pci8086,2e68.2",
+ "pci8086,2e68",
+ "pciclass,ff0000",
+ "pciclass,ff00";
+
+ reg = <0x15a00 0x0 0x0 0x0 0x0>;
+ ranges = <0 0 0x02000000 0 0xdffe0500 0x100
+ 1 0 0x02000000 0 0xdffe0600 0x100
+ 2 0 0x02000000 0 0xdffe0700 0x100>;
+
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ce4100-i2c-controller";
+ reg = <0 0 0x100>;
+ };
+
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ce4100-i2c-controller";
+ reg = <1 0 0x100>;
+
+ gpio@26 {
+ compatible = "ti,pcf8575";
+ reg = <0x26>;
+ };
+ };
+
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ce4100-i2c-controller";
+ reg = <2 0 0x100>;
+
+ gpio@26 {
+ compatible = "ti,pcf8575";
+ reg = <0x26>;
+ };
+ };
+ };
+
+ spi-controller@15c00,0,0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible =
+ "pci8086,2e6a.2",
+ "pci8086,2e6a",
+ "pciclass,ff0000",
+ "pciclass,ff00";
+
+ reg = <0x15c00 0x0 0x0 0x0 0x0>;
+
+ dac@0 {
+ compatible = "ti,pcm1755";
+ reg = <0>;
+ spi-max-frequency = <115200>;
+ };
+
+ dac@1 {
+ compatible = "ti,pcm1609a";
+ reg = <1>;
+ spi-max-frequency = <115200>;
+ };
+
+ eeprom@2 {
+ compatible = "atmel,at93c46";
+ reg = <2>;
+ spi-max-frequency = <115200>;
+ };
+ };
+ };
+ };
+ };
+};
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, Sebastian Andrzej Siewior
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
arch/x86/platform/ce4100/falconfalls.dts | 228 ++++++++++++++++++++++++++++++
1 files changed, 228 insertions(+), 0 deletions(-)
create mode 100644 arch/x86/platform/ce4100/falconfalls.dts
diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts
new file mode 100644
index 0000000..c2df5c8
--- /dev/null
+++ b/arch/x86/platform/ce4100/falconfalls.dts
@@ -0,0 +1,228 @@
+/*
+ * CE4100 on Falcon Falls
+ *
+ * (c) Copyright 2010 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; version 2 of the License.
+ */
+/dts-v1/;
+/ {
+ model = "intel,falconfalls";
+ compatible = "intel,falconfalls";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "intel,ce4100";
+ reg = <0>;
+ lapic = <&lapic0>;
+ };
+ };
+
+ soc@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "intel,ce4100-immr";
+ ranges;
+
+ ioapic1: pic@fec00000 {
+ #interrupt-cells = <2>;
+ compatible = "intel,ioapic-ce4100", "intel,ioapic";
+ interrupt-controller;
+ reg = <0xfec00000 0x1000>;
+ };
+
+ timer@fed00000 {
+ compatible = "intel,hpet-ce4100", "intel,hpet";
+ reg = <0xfed00000 0x200>;
+ };
+
+ lapic0: interrupt-controller@fee00000 {
+ compatible = "intel,lapic-ce4100", "intel,lapic";
+ reg = <0xfee00000 0x1000>;
+ };
+
+ pci@3fc {
+ #address-cells = <3>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ compatible = "intel,ce4100-pci", "pci";
+ device_type = "pci";
+ bus-range = <0 0>;
+ ranges = <0x2000000 0 0xbffff000 0xbffff000 0 0x1000
+ 0x2000000 0 0xdffe0000 0xdffe0000 0 0x1000
+ 0x0000000 0 0x0 0x0 0 0x100>;
+
+ isa@0 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "isa";
+ ranges = <1 0 0 0 0 0x100>;
+
+ rtc@70 {
+ compatible = "intel,ce4100-rtc", "motorola,mc146818";
+ interrupts = <8 3>;
+ interrupt-parent = <&ioapic1>;
+ ctrl-reg = <2>;
+ freq-reg = <0x26>;
+ reg = <1 0x70 2>;
+ };
+ };
+
+ /* Secondary IO-APIC */
+ ioapic2: pic@bffff000 {
+ #interrupt-cells = <2>;
+ compatible = "intel,ioapic-ce4100", "intel,ioapic";
+ interrupt-controller;
+ reg = <0x100 0x0 0x0 0x0 0x0>;
+ assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
+ };
+
+ pci@av {
+ #address-cells = <3>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ compatible = "intel,ce4100-pci";
+ device_type = "pci";
+ bus-range = <1 1>;
+ ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
+
+ interrupt-map-mask = <0xffffff 0x0 0x0 0x0>;
+ interrupt-map = <
+ /* GFX: 0x2E5B */
+ 0x11000 0x0 0x0 0x0 &ioapic2 0 0x1
+ /* ***** FIXME ****** Compositing Engine: 0x2E72 */
+ /* 0x11100 0x0 0x0 0x1 &ioapic2 0 0x1 */
+ /* MFD: 0x2E5C */
+ 0x11800 0x0 0x0 0x0 &ioapic2 2 0x1
+ /* TS Prefilter: 0x2E5D */
+ 0x12000 0x0 0x0 0x0 &ioapic2 4 0x1
+ /* TS Demux: 0x2E5E */
+ 0x12100 0x0 0x0 0x0 &ioapic2 5 0x1
+ /* ***** FIXME ***** Audio DSP: 0x2E5F */
+ /* 0x13000 0x0 0x0 0x1 &ioapic2 0 0x1 */
+ /* Audio Interfaces: 0x2E60 */
+ 0x13200 0x0 0x0 0x0 &ioapic2 8 0x1
+ /* VDC: 0x2E61 */
+ 0x14000 0x0 0x0 0x0 &ioapic2 9 0x1
+ /* DPE: 0x2E62 */
+ 0x14100 0x0 0x0 0x0 &ioapic2 10 0x1
+ /* HDMI Tx: 0x2E63 */
+ 0x14200 0x0 0x0 0x0 &ioapic2 11 0x1
+ /* SEC: 0x2E64 */
+ 0x14800 0x0 0x0 0x0 &ioapic2 12 0x1
+ /* EXP: 0x2E65 */
+ 0x15000 0x0 0x0 0x0 &ioapic2 13 0x1
+ /* UART0/1: 0x2E66 */
+ 0x15800 0x0 0x0 0x0 &ioapic2 14 0x1
+ /* GPIO: 0x2E67 */
+ 0x15900 0x0 0x0 0x0 &ioapic2 15 0x1
+ /* I2C0/1/2: 0x2E68 */
+ 0x15a00 0x0 0x0 0x0 &ioapic2 16 0x1
+ /* Smart Card 0/1: 0x2E69 */
+ 0x15b00 0x0 0x0 0x0 &ioapic2 15 0x1
+ /* SPI: 0x2E6A */
+ 0x15c00 0x0 0x0 0x0 &ioapic2 15 0x1
+ /* MSPOD: 0x2E6B */
+ 0x15d00 0x0 0x0 0x0 &ioapic2 19 0x1
+ /* IR: 0x2E6C */
+ 0x15e00 0x0 0x0 0x0 &ioapic2 16 0x1
+ /* **** FIXME ***** DFX: 0x2E6D */
+ /* 0x15f00 0x0 0x0 0x1 &ioapic2 0x0 0x1 */
+ /* Gig Ethernet: 0x2E6E */
+ 0x16000 0x0 0x0 0x0 &ioapic2 21 0x1
+ /* IEEE1588 and Clock Recovery Unit: 0x2E6F */
+ 0x16100 0x0 0x0 0x0 &ioapic2 3 0x1
+ /* USB0: 0x2E70 */
+ 0x16800 0x0 0x0 0x0 &ioapic2 22 0x3
+ /* USB1: 0x2E70 */
+ 0x16900 0x0 0x0 0x0 &ioapic2 22 0x3
+ /* SATA: 0x2E71 */
+ 0x17000 0x0 0x0 0x0 &ioapic2 23 0x3
+ >;
+
+ i2c-controller@15a00,0,0 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "pci8086,2e68.2",
+ "pci8086,2e68",
+ "pciclass,ff0000",
+ "pciclass,ff00";
+
+ reg = <0x15a00 0x0 0x0 0x0 0x0>;
+ ranges = <0 0 0x02000000 0 0xdffe0500 0x100
+ 1 0 0x02000000 0 0xdffe0600 0x100
+ 2 0 0x02000000 0 0xdffe0700 0x100>;
+
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ce4100-i2c-controller";
+ reg = <0 0 0x100>;
+ };
+
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ce4100-i2c-controller";
+ reg = <1 0 0x100>;
+
+ gpio@26 {
+ compatible = "ti,pcf8575";
+ reg = <0x26>;
+ };
+ };
+
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ce4100-i2c-controller";
+ reg = <2 0 0x100>;
+
+ gpio@26 {
+ compatible = "ti,pcf8575";
+ reg = <0x26>;
+ };
+ };
+ };
+
+ spi-controller@15c00,0,0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible =
+ "pci8086,2e6a.2",
+ "pci8086,2e6a",
+ "pciclass,ff0000",
+ "pciclass,ff00";
+
+ reg = <0x15c00 0x0 0x0 0x0 0x0>;
+
+ dac@0 {
+ compatible = "ti,pcm1755";
+ reg = <0>;
+ spi-max-frequency = <115200>;
+ };
+
+ dac@1 {
+ compatible = "ti,pcm1609a";
+ reg = <1>;
+ spi-max-frequency = <115200>;
+ };
+
+ eeprom@2 {
+ compatible = "atmel,at93c46";
+ reg = <2>;
+ spi-max-frequency = <115200>;
+ };
+ };
+ };
+ };
+ };
+};
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 04/14] x86/dtb: add irq domain abstraction
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel
Cc: sodaville, x86, devicetree-discuss, Sebastian Andrzej Siewior
The here introduced irq_domain abstraction represents a generic irq
controller. It is a subset of powerpc's irq_host which is going to be
renamed to irq_domain and then become generic. This implementation will
be removed once it is generic.
The xlate callback is resposible to parse irq informations like irq type
and number and returns the hardware irq number which is reported by the
hardware as active.
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Tested-by: Dirk Brandewie <dirk.brandewie@gmail.com>
---
arch/x86/include/asm/irq_controller.h | 12 ++++++++
arch/x86/include/asm/prom.h | 2 +
arch/x86/kernel/prom.c | 47 ++++++++++++++++++++++++++++++++-
3 files changed, 60 insertions(+), 1 deletions(-)
create mode 100644 arch/x86/include/asm/irq_controller.h
diff --git a/arch/x86/include/asm/irq_controller.h b/arch/x86/include/asm/irq_controller.h
new file mode 100644
index 0000000..423bbbd
--- /dev/null
+++ b/arch/x86/include/asm/irq_controller.h
@@ -0,0 +1,12 @@
+#ifndef __IRQ_CONTROLLER__
+#define __IRQ_CONTROLLER__
+
+struct irq_domain {
+ int (*xlate)(struct irq_domain *h, const u32 *intspec, u32 intsize,
+ u32 *out_hwirq, u32 *out_type);
+ void *priv;
+ struct device_node *controller;
+ struct list_head l;
+};
+
+#endif
diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
index b227ba7..ed7bb62 100644
--- a/arch/x86/include/asm/prom.h
+++ b/arch/x86/include/asm/prom.h
@@ -19,9 +19,11 @@
#include <asm/irq.h>
#include <asm/atomic.h>
#include <asm/setup.h>
+#include <asm/irq_controller.h>
#ifdef CONFIG_OF
extern void add_dtb(u64 data);
+void add_interrupt_host(struct irq_domain *ih);
#else
static inline void add_dtb(u64 data) { }
#endif
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
index 4969ffa..95f9551 100644
--- a/arch/x86/kernel/prom.c
+++ b/arch/x86/kernel/prom.c
@@ -3,18 +3,63 @@
*/
#include <linux/bootmem.h>
#include <linux/io.h>
+#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/slab.h>
+#include <asm/irq_controller.h>
+
char __initdata cmd_line[COMMAND_LINE_SIZE];
+static LIST_HEAD(irq_domains);
+static DEFINE_RAW_SPINLOCK(big_irq_lock);
+
+void add_interrupt_host(struct irq_domain *ih)
+{
+ unsigned long flags;
+
+ raw_spin_lock_irqsave(&big_irq_lock, flags);
+ list_add(&ih->l, &irq_domains);
+ raw_spin_unlock_irqrestore(&big_irq_lock, flags);
+}
+
+static struct irq_domain *get_ih_from_node(struct device_node *controller)
+{
+ struct irq_domain *ih, *found = NULL;
+ unsigned long flags;
+
+ raw_spin_lock_irqsave(&big_irq_lock, flags);
+ list_for_each_entry(ih, &irq_domains, l) {
+ if (ih->controller == controller) {
+ found = ih;
+ break;
+ }
+ }
+ raw_spin_unlock_irqrestore(&big_irq_lock, flags);
+ return found;
+}
unsigned int irq_create_of_mapping(struct device_node *controller,
const u32 *intspec, unsigned int intsize)
{
- return intspec[0];
+ struct irq_domain *ih;
+ u32 virq;
+ u32 type;
+ int ret;
+ ih = get_ih_from_node(controller);
+ if (!ih)
+ return 0;
+ ret = ih->xlate(ih, intspec, intsize, &virq, &type);
+ if (ret)
+ return ret;
+ if (type == IRQ_TYPE_NONE)
+ return virq;
+ /* set the mask if it is different from current */
+ if (type == (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK))
+ set_irq_type(virq, type);
+ return virq;
}
EXPORT_SYMBOL_GPL(irq_create_of_mapping);
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 04/14] x86/dtb: add irq domain abstraction
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, Sebastian Andrzej Siewior
The here introduced irq_domain abstraction represents a generic irq
controller. It is a subset of powerpc's irq_host which is going to be
renamed to irq_domain and then become generic. This implementation will
be removed once it is generic.
The xlate callback is resposible to parse irq informations like irq type
and number and returns the hardware irq number which is reported by the
hardware as active.
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Tested-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
arch/x86/include/asm/irq_controller.h | 12 ++++++++
arch/x86/include/asm/prom.h | 2 +
arch/x86/kernel/prom.c | 47 ++++++++++++++++++++++++++++++++-
3 files changed, 60 insertions(+), 1 deletions(-)
create mode 100644 arch/x86/include/asm/irq_controller.h
diff --git a/arch/x86/include/asm/irq_controller.h b/arch/x86/include/asm/irq_controller.h
new file mode 100644
index 0000000..423bbbd
--- /dev/null
+++ b/arch/x86/include/asm/irq_controller.h
@@ -0,0 +1,12 @@
+#ifndef __IRQ_CONTROLLER__
+#define __IRQ_CONTROLLER__
+
+struct irq_domain {
+ int (*xlate)(struct irq_domain *h, const u32 *intspec, u32 intsize,
+ u32 *out_hwirq, u32 *out_type);
+ void *priv;
+ struct device_node *controller;
+ struct list_head l;
+};
+
+#endif
diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
index b227ba7..ed7bb62 100644
--- a/arch/x86/include/asm/prom.h
+++ b/arch/x86/include/asm/prom.h
@@ -19,9 +19,11 @@
#include <asm/irq.h>
#include <asm/atomic.h>
#include <asm/setup.h>
+#include <asm/irq_controller.h>
#ifdef CONFIG_OF
extern void add_dtb(u64 data);
+void add_interrupt_host(struct irq_domain *ih);
#else
static inline void add_dtb(u64 data) { }
#endif
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
index 4969ffa..95f9551 100644
--- a/arch/x86/kernel/prom.c
+++ b/arch/x86/kernel/prom.c
@@ -3,18 +3,63 @@
*/
#include <linux/bootmem.h>
#include <linux/io.h>
+#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/slab.h>
+#include <asm/irq_controller.h>
+
char __initdata cmd_line[COMMAND_LINE_SIZE];
+static LIST_HEAD(irq_domains);
+static DEFINE_RAW_SPINLOCK(big_irq_lock);
+
+void add_interrupt_host(struct irq_domain *ih)
+{
+ unsigned long flags;
+
+ raw_spin_lock_irqsave(&big_irq_lock, flags);
+ list_add(&ih->l, &irq_domains);
+ raw_spin_unlock_irqrestore(&big_irq_lock, flags);
+}
+
+static struct irq_domain *get_ih_from_node(struct device_node *controller)
+{
+ struct irq_domain *ih, *found = NULL;
+ unsigned long flags;
+
+ raw_spin_lock_irqsave(&big_irq_lock, flags);
+ list_for_each_entry(ih, &irq_domains, l) {
+ if (ih->controller == controller) {
+ found = ih;
+ break;
+ }
+ }
+ raw_spin_unlock_irqrestore(&big_irq_lock, flags);
+ return found;
+}
unsigned int irq_create_of_mapping(struct device_node *controller,
const u32 *intspec, unsigned int intsize)
{
- return intspec[0];
+ struct irq_domain *ih;
+ u32 virq;
+ u32 type;
+ int ret;
+ ih = get_ih_from_node(controller);
+ if (!ih)
+ return 0;
+ ret = ih->xlate(ih, intspec, intsize, &virq, &type);
+ if (ret)
+ return ret;
+ if (type == IRQ_TYPE_NONE)
+ return virq;
+ /* set the mask if it is different from current */
+ if (type == (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK))
+ set_irq_type(virq, type);
+ return virq;
}
EXPORT_SYMBOL_GPL(irq_create_of_mapping);
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 05/14] x86/dtb: add early parsing of APIC and IO APIC
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel
Cc: sodaville, x86, devicetree-discuss, Sebastian Andrzej Siewior,
Dirk Brandewie
The apic & ioapic have to be added to system early because
native_init_IRQ() requires it. In order to obtain the address of the
ioapic the device tree has to be unflattened because
of_address_to_resource() has to work.
The device tree is relocated to ensure it is always covered by the
kernel and the boot loader does not have to make assumptions about
kernel's memory layout.
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
---
arch/x86/include/asm/prom.h | 7 +++
arch/x86/kernel/irqinit.c | 2 +-
arch/x86/kernel/prom.c | 112 +++++++++++++++++++++++++++++++++++++++++-
3 files changed, 117 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
index ed7bb62..bd67ab2 100644
--- a/arch/x86/include/asm/prom.h
+++ b/arch/x86/include/asm/prom.h
@@ -22,10 +22,17 @@
#include <asm/irq_controller.h>
#ifdef CONFIG_OF
+extern int of_ioapic;
+extern u64 initial_dtb;
extern void add_dtb(u64 data);
+void x86_dtb_find_config(void);
+void x86_dtb_get_config(unsigned int unused);
void add_interrupt_host(struct irq_domain *ih);
#else
static inline void add_dtb(u64 data) { }
+#define x86_dtb_find_config x86_init_noop
+#define x86_dtb_get_config x86_init_uint_noop
+#define of_ioapic 0
#endif
extern char cmd_line[COMMAND_LINE_SIZE];
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index 149c87f..4cadf86 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -244,7 +244,7 @@ void __init native_init_IRQ(void)
set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]);
}
- if (!acpi_ioapic)
+ if (!acpi_ioapic && !of_ioapic)
setup_irq(2, &irq2);
#ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
index 95f9551..e4d53bf 100644
--- a/arch/x86/kernel/prom.c
+++ b/arch/x86/kernel/prom.c
@@ -6,15 +6,20 @@
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/of.h>
+#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/slab.h>
#include <asm/irq_controller.h>
+#include <asm/io_apic.h>
+__initdata u64 initial_dtb;
char __initdata cmd_line[COMMAND_LINE_SIZE];
static LIST_HEAD(irq_domains);
static DEFINE_RAW_SPINLOCK(big_irq_lock);
+int __initdata of_ioapic;
+
void add_interrupt_host(struct irq_domain *ih)
{
unsigned long flags;
@@ -90,7 +95,108 @@ void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
void __init add_dtb(u64 data)
{
- initial_boot_params = (struct boot_param_header *)
- phys_to_virt((u64) (u32) data +
- offsetof(struct setup_data, data));
+ initial_dtb = data + offsetof(struct setup_data, data);
+}
+
+static void __init dtb_lapic_setup(void)
+{
+#ifdef CONFIG_X86_LOCAL_APIC
+ if (apic_force_enable())
+ return;
+
+ smp_found_config = 1;
+ pic_mode = 1;
+ /* Required for ioapic registration */
+ set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
+ if (boot_cpu_physical_apicid == -1U)
+ boot_cpu_physical_apicid = read_apic_id();
+
+ generic_processor_info(boot_cpu_physical_apicid,
+ GET_APIC_VERSION(apic_read(APIC_LVR)));
+#endif
+}
+
+#ifdef CONFIG_X86_IO_APIC
+static unsigned int ioapic_id;
+
+static void __init dtb_add_ioapic(struct device_node *dn)
+{
+ struct resource r;
+ int ret;
+
+ ret = of_address_to_resource(dn, 0, &r);
+ if (ret) {
+ printk(KERN_ERR "Can't obtain address from node %s.\n",
+ dn->full_name);
+ return;
+ }
+ mp_register_ioapic(++ioapic_id, r.start, gsi_top);
+}
+
+static void __init dtb_ioapic_setup(void)
+{
+ struct device_node *dn;
+
+ if (!smp_found_config)
+ return;
+
+ for_each_compatible_node(dn, NULL, "intel,ioapic")
+ dtb_add_ioapic(dn);
+
+ if (nr_ioapics) {
+ of_ioapic = 1;
+ return;
+ }
+ printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
+ smp_found_config = 0;
+}
+#else
+static void __init dtb_ioapic_setup(void) {}
+#endif
+
+static void __init dtb_apic_setup(void)
+{
+ dtb_lapic_setup();
+ dtb_ioapic_setup();
+}
+
+void __init x86_dtb_find_config(void)
+{
+ if (initial_dtb)
+ smp_found_config = 1;
+ else
+ printk(KERN_ERR "Missing device tree!.\n");
+}
+
+void __init x86_dtb_get_config(unsigned int unused)
+{
+ u32 size;
+ u32 map_len;
+ void *new_dtb;
+
+ if (!initial_dtb)
+ return;
+
+ map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
+ (u64)sizeof(struct boot_param_header));
+
+ initial_boot_params = early_memremap(initial_dtb, map_len);
+ size = be32_to_cpu(initial_boot_params->totalsize);
+ if (map_len < size) {
+ early_iounmap(initial_boot_params, map_len);
+ initial_boot_params = early_memremap(initial_dtb, size);
+ map_len = size;
+ }
+
+ new_dtb = alloc_bootmem(size);
+ memcpy(new_dtb, initial_boot_params, size);
+ early_iounmap(initial_boot_params, map_len);
+
+ initial_boot_params = new_dtb;
+
+ /* root level address cells */
+ of_scan_flat_dt(early_init_dt_scan_root, NULL);
+
+ unflatten_device_tree();
+ dtb_apic_setup();
}
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 05/14] x86/dtb: add early parsing of APIC and IO APIC
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, Sebastian Andrzej Siewior
The apic & ioapic have to be added to system early because
native_init_IRQ() requires it. In order to obtain the address of the
ioapic the device tree has to be unflattened because
of_address_to_resource() has to work.
The device tree is relocated to ensure it is always covered by the
kernel and the boot loader does not have to make assumptions about
kernel's memory layout.
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Cc: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
---
arch/x86/include/asm/prom.h | 7 +++
arch/x86/kernel/irqinit.c | 2 +-
arch/x86/kernel/prom.c | 112 +++++++++++++++++++++++++++++++++++++++++-
3 files changed, 117 insertions(+), 4 deletions(-)
diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
index ed7bb62..bd67ab2 100644
--- a/arch/x86/include/asm/prom.h
+++ b/arch/x86/include/asm/prom.h
@@ -22,10 +22,17 @@
#include <asm/irq_controller.h>
#ifdef CONFIG_OF
+extern int of_ioapic;
+extern u64 initial_dtb;
extern void add_dtb(u64 data);
+void x86_dtb_find_config(void);
+void x86_dtb_get_config(unsigned int unused);
void add_interrupt_host(struct irq_domain *ih);
#else
static inline void add_dtb(u64 data) { }
+#define x86_dtb_find_config x86_init_noop
+#define x86_dtb_get_config x86_init_uint_noop
+#define of_ioapic 0
#endif
extern char cmd_line[COMMAND_LINE_SIZE];
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index 149c87f..4cadf86 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -244,7 +244,7 @@ void __init native_init_IRQ(void)
set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]);
}
- if (!acpi_ioapic)
+ if (!acpi_ioapic && !of_ioapic)
setup_irq(2, &irq2);
#ifdef CONFIG_X86_32
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
index 95f9551..e4d53bf 100644
--- a/arch/x86/kernel/prom.c
+++ b/arch/x86/kernel/prom.c
@@ -6,15 +6,20 @@
#include <linux/interrupt.h>
#include <linux/list.h>
#include <linux/of.h>
+#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/slab.h>
#include <asm/irq_controller.h>
+#include <asm/io_apic.h>
+__initdata u64 initial_dtb;
char __initdata cmd_line[COMMAND_LINE_SIZE];
static LIST_HEAD(irq_domains);
static DEFINE_RAW_SPINLOCK(big_irq_lock);
+int __initdata of_ioapic;
+
void add_interrupt_host(struct irq_domain *ih)
{
unsigned long flags;
@@ -90,7 +95,108 @@ void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
void __init add_dtb(u64 data)
{
- initial_boot_params = (struct boot_param_header *)
- phys_to_virt((u64) (u32) data +
- offsetof(struct setup_data, data));
+ initial_dtb = data + offsetof(struct setup_data, data);
+}
+
+static void __init dtb_lapic_setup(void)
+{
+#ifdef CONFIG_X86_LOCAL_APIC
+ if (apic_force_enable())
+ return;
+
+ smp_found_config = 1;
+ pic_mode = 1;
+ /* Required for ioapic registration */
+ set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
+ if (boot_cpu_physical_apicid == -1U)
+ boot_cpu_physical_apicid = read_apic_id();
+
+ generic_processor_info(boot_cpu_physical_apicid,
+ GET_APIC_VERSION(apic_read(APIC_LVR)));
+#endif
+}
+
+#ifdef CONFIG_X86_IO_APIC
+static unsigned int ioapic_id;
+
+static void __init dtb_add_ioapic(struct device_node *dn)
+{
+ struct resource r;
+ int ret;
+
+ ret = of_address_to_resource(dn, 0, &r);
+ if (ret) {
+ printk(KERN_ERR "Can't obtain address from node %s.\n",
+ dn->full_name);
+ return;
+ }
+ mp_register_ioapic(++ioapic_id, r.start, gsi_top);
+}
+
+static void __init dtb_ioapic_setup(void)
+{
+ struct device_node *dn;
+
+ if (!smp_found_config)
+ return;
+
+ for_each_compatible_node(dn, NULL, "intel,ioapic")
+ dtb_add_ioapic(dn);
+
+ if (nr_ioapics) {
+ of_ioapic = 1;
+ return;
+ }
+ printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
+ smp_found_config = 0;
+}
+#else
+static void __init dtb_ioapic_setup(void) {}
+#endif
+
+static void __init dtb_apic_setup(void)
+{
+ dtb_lapic_setup();
+ dtb_ioapic_setup();
+}
+
+void __init x86_dtb_find_config(void)
+{
+ if (initial_dtb)
+ smp_found_config = 1;
+ else
+ printk(KERN_ERR "Missing device tree!.\n");
+}
+
+void __init x86_dtb_get_config(unsigned int unused)
+{
+ u32 size;
+ u32 map_len;
+ void *new_dtb;
+
+ if (!initial_dtb)
+ return;
+
+ map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
+ (u64)sizeof(struct boot_param_header));
+
+ initial_boot_params = early_memremap(initial_dtb, map_len);
+ size = be32_to_cpu(initial_boot_params->totalsize);
+ if (map_len < size) {
+ early_iounmap(initial_boot_params, map_len);
+ initial_boot_params = early_memremap(initial_dtb, size);
+ map_len = size;
+ }
+
+ new_dtb = alloc_bootmem(size);
+ memcpy(new_dtb, initial_boot_params, size);
+ early_iounmap(initial_boot_params, map_len);
+
+ initial_boot_params = new_dtb;
+
+ /* root level address cells */
+ of_scan_flat_dt(early_init_dt_scan_root, NULL);
+
+ unflatten_device_tree();
+ dtb_apic_setup();
}
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 06/14] x86/dtb: add support hpet
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel
Cc: sodaville, x86, devicetree-discuss, Sebastian Andrzej Siewior,
Dirk Brandewie
Set hpet_address based on information provied form DTB
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Dirk Brandewie <dirk.brandewie@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
---
arch/x86/kernel/prom.c | 19 +++++++++++++++++++
1 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
index e4d53bf..16c124e 100644
--- a/arch/x86/kernel/prom.c
+++ b/arch/x86/kernel/prom.c
@@ -10,6 +10,7 @@
#include <linux/of_platform.h>
#include <linux/slab.h>
+#include <asm/hpet.h>
#include <asm/irq_controller.h>
#include <asm/io_apic.h>
@@ -98,6 +99,23 @@ void __init add_dtb(u64 data)
initial_dtb = data + offsetof(struct setup_data, data);
}
+static void __init dtb_setup_hpet(void)
+{
+ struct device_node *dn;
+ struct resource r;
+ int ret;
+
+ dn = of_find_compatible_node(NULL, NULL, "intel,hpet");
+ if (!dn)
+ return;
+ ret = of_address_to_resource(dn, 0, &r);
+ if (ret) {
+ WARN_ON(1);
+ return;
+ }
+ hpet_address = r.start;
+}
+
static void __init dtb_lapic_setup(void)
{
#ifdef CONFIG_X86_LOCAL_APIC
@@ -198,5 +216,6 @@ void __init x86_dtb_get_config(unsigned int unused)
of_scan_flat_dt(early_init_dt_scan_root, NULL);
unflatten_device_tree();
+ dtb_setup_hpet();
dtb_apic_setup();
}
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 06/14] x86/dtb: add support hpet
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, Sebastian Andrzej Siewior
Set hpet_address based on information provied form DTB
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Cc: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Acked-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
---
arch/x86/kernel/prom.c | 19 +++++++++++++++++++
1 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
index e4d53bf..16c124e 100644
--- a/arch/x86/kernel/prom.c
+++ b/arch/x86/kernel/prom.c
@@ -10,6 +10,7 @@
#include <linux/of_platform.h>
#include <linux/slab.h>
+#include <asm/hpet.h>
#include <asm/irq_controller.h>
#include <asm/io_apic.h>
@@ -98,6 +99,23 @@ void __init add_dtb(u64 data)
initial_dtb = data + offsetof(struct setup_data, data);
}
+static void __init dtb_setup_hpet(void)
+{
+ struct device_node *dn;
+ struct resource r;
+ int ret;
+
+ dn = of_find_compatible_node(NULL, NULL, "intel,hpet");
+ if (!dn)
+ return;
+ ret = of_address_to_resource(dn, 0, &r);
+ if (ret) {
+ WARN_ON(1);
+ return;
+ }
+ hpet_address = r.start;
+}
+
static void __init dtb_lapic_setup(void)
{
#ifdef CONFIG_X86_LOCAL_APIC
@@ -198,5 +216,6 @@ void __init x86_dtb_get_config(unsigned int unused)
of_scan_flat_dt(early_init_dt_scan_root, NULL);
unflatten_device_tree();
+ dtb_setup_hpet();
dtb_apic_setup();
}
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH OF 07/14] of: move of_irq_map_pci() into generic code
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel
Cc: sodaville, x86, devicetree-discuss, Sebastian Andrzej Siewior,
Benjamin Herrenschmidt
From: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
There is a tiny difference between PPC32 and PPC64. Microblaze uses the
PPC32 variant.
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
---
arch/microblaze/include/asm/pci-bridge.h | 12 ++++
arch/microblaze/include/asm/prom.h | 15 -----
arch/microblaze/kernel/prom_parse.c | 77 ---------------------------
arch/microblaze/pci/pci-common.c | 1 +
arch/powerpc/include/asm/pci-bridge.h | 10 ++++
arch/powerpc/include/asm/prom.h | 15 -----
arch/powerpc/kernel/pci-common.c | 1 +
arch/powerpc/kernel/prom_parse.c | 84 ------------------------------
drivers/of/Kconfig | 6 ++
drivers/of/Makefile | 1 +
drivers/of/of_pci.c | 80 ++++++++++++++++++++++++++++
include/linux/of_pci.h | 20 +++++++
12 files changed, 131 insertions(+), 191 deletions(-)
create mode 100644 drivers/of/of_pci.c
create mode 100644 include/linux/of_pci.h
diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
index 0c68764..c2a40a4 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -104,11 +104,22 @@ struct pci_controller {
int global_number; /* PCI domain number */
};
+#ifdef CONFIG_PCI
static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
{
return bus->sysdata;
}
+static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
+{
+ struct pci_controller *host;
+
+ if (bus->self)
+ return pci_device_to_OF_node(bus->self);
+ host = pci_bus_to_host(bus);
+ return host ? host->dn : NULL;
+}
+
static inline int isa_vaddr_is_ioport(void __iomem *address)
{
/* No specific ISA handling on ppc32 at this stage, it
@@ -116,6 +127,7 @@ static inline int isa_vaddr_is_ioport(void __iomem *address)
*/
return 0;
}
+#endif
/* These are used for config access before all the PCI probing
has been done. */
diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include/asm/prom.h
index 2e72af0..d0890d3 100644
--- a/arch/microblaze/include/asm/prom.h
+++ b/arch/microblaze/include/asm/prom.h
@@ -64,21 +64,6 @@ extern void kdump_move_device_tree(void);
/* CPU OF node matching */
struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
-/**
- * of_irq_map_pci - Resolve the interrupt for a PCI device
- * @pdev: the device whose interrupt is to be resolved
- * @out_irq: structure of_irq filled by this function
- *
- * This function resolves the PCI interrupt for a given PCI device. If a
- * device-node exists for a given pci_dev, it will use normal OF tree
- * walking. If not, it will implement standard swizzling and walk up the
- * PCI tree until an device-node is found, at which point it will finish
- * resolving using the OF tree walking.
- */
-struct pci_dev;
-struct of_irq;
-extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
-
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
diff --git a/arch/microblaze/kernel/prom_parse.c b/arch/microblaze/kernel/prom_parse.c
index 9ae24f4..47187cc 100644
--- a/arch/microblaze/kernel/prom_parse.c
+++ b/arch/microblaze/kernel/prom_parse.c
@@ -2,88 +2,11 @@
#include <linux/kernel.h>
#include <linux/string.h>
-#include <linux/pci_regs.h>
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/etherdevice.h>
#include <linux/of_address.h>
#include <asm/prom.h>
-#include <asm/pci-bridge.h>
-
-#ifdef CONFIG_PCI
-int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
-{
- struct device_node *dn, *ppnode;
- struct pci_dev *ppdev;
- u32 lspec;
- u32 laddr[3];
- u8 pin;
- int rc;
-
- /* Check if we have a device node, if yes, fallback to standard OF
- * parsing
- */
- dn = pci_device_to_OF_node(pdev);
- if (dn)
- return of_irq_map_one(dn, 0, out_irq);
-
- /* Ok, we don't, time to have fun. Let's start by building up an
- * interrupt spec. we assume #interrupt-cells is 1, which is standard
- * for PCI. If you do different, then don't use that routine.
- */
- rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
- if (rc != 0)
- return rc;
- /* No pin, exit */
- if (pin == 0)
- return -ENODEV;
-
- /* Now we walk up the PCI tree */
- lspec = pin;
- for (;;) {
- /* Get the pci_dev of our parent */
- ppdev = pdev->bus->self;
-
- /* Ouch, it's a host bridge... */
- if (ppdev == NULL) {
- struct pci_controller *host;
- host = pci_bus_to_host(pdev->bus);
- ppnode = host ? host->dn : NULL;
- /* No node for host bridge ? give up */
- if (ppnode == NULL)
- return -EINVAL;
- } else
- /* We found a P2P bridge, check if it has a node */
- ppnode = pci_device_to_OF_node(ppdev);
-
- /* Ok, we have found a parent with a device-node, hand over to
- * the OF parsing code.
- * We build a unit address from the linux device to be used for
- * resolution. Note that we use the linux bus number which may
- * not match your firmware bus numbering.
- * Fortunately, in most cases, interrupt-map-mask doesn't
- * include the bus number as part of the matching.
- * You should still be careful about that though if you intend
- * to rely on this function (you ship a firmware that doesn't
- * create device nodes for all PCI devices).
- */
- if (ppnode)
- break;
-
- /* We can only get here if we hit a P2P bridge with no node,
- * let's do standard swizzling and try again
- */
- lspec = pci_swizzle_interrupt_pin(pdev, lspec);
- pdev = ppdev;
- }
-
- laddr[0] = (pdev->bus->number << 16)
- | (pdev->devfn << 8);
- laddr[1] = laddr[2] = 0;
- return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
-}
-EXPORT_SYMBOL_GPL(of_irq_map_pci);
-#endif /* CONFIG_PCI */
void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
unsigned long *busno, unsigned long *phys, unsigned long *size)
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index e363615..1e01a12 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -29,6 +29,7 @@
#include <linux/slab.h>
#include <linux/of.h>
#include <linux/of_address.h>
+#include <linux/of_pci.h>
#include <asm/processor.h>
#include <asm/io.h>
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 51e9e6f..edeb80f 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -171,6 +171,16 @@ static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
return bus->sysdata;
}
+static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
+{
+ struct pci_controller *host;
+
+ if (bus->self)
+ return pci_device_to_OF_node(bus->self);
+ host = pci_bus_to_host(bus);
+ return host ? host->dn : NULL;
+}
+
static inline int isa_vaddr_is_ioport(void __iomem *address)
{
/* No specific ISA handling on ppc32 at this stage, it
diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h
index d727575..c189aa5 100644
--- a/arch/powerpc/include/asm/prom.h
+++ b/arch/powerpc/include/asm/prom.h
@@ -70,21 +70,6 @@ static inline int of_node_to_nid(struct device_node *device) { return 0; }
#endif
#define of_node_to_nid of_node_to_nid
-/**
- * of_irq_map_pci - Resolve the interrupt for a PCI device
- * @pdev: the device whose interrupt is to be resolved
- * @out_irq: structure of_irq filled by this function
- *
- * This function resolves the PCI interrupt for a given PCI device. If a
- * device-node exists for a given pci_dev, it will use normal OF tree
- * walking. If not, it will implement standard swizzling and walk up the
- * PCI tree until an device-node is found, at which point it will finish
- * resolving using the OF tree walking.
- */
-struct pci_dev;
-struct of_irq;
-extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
-
extern void of_instantiate_rtc(void);
/* These includes are put at the bottom because they may contain things
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 10a44e6..eb341be 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -22,6 +22,7 @@
#include <linux/init.h>
#include <linux/bootmem.h>
#include <linux/of_address.h>
+#include <linux/of_pci.h>
#include <linux/mm.h>
#include <linux/list.h>
#include <linux/syscalls.h>
diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c
index c2b7a07..47187cc 100644
--- a/arch/powerpc/kernel/prom_parse.c
+++ b/arch/powerpc/kernel/prom_parse.c
@@ -2,95 +2,11 @@
#include <linux/kernel.h>
#include <linux/string.h>
-#include <linux/pci_regs.h>
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/etherdevice.h>
#include <linux/of_address.h>
#include <asm/prom.h>
-#include <asm/pci-bridge.h>
-
-#ifdef CONFIG_PCI
-int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
-{
- struct device_node *dn, *ppnode;
- struct pci_dev *ppdev;
- u32 lspec;
- u32 laddr[3];
- u8 pin;
- int rc;
-
- /* Check if we have a device node, if yes, fallback to standard OF
- * parsing
- */
- dn = pci_device_to_OF_node(pdev);
- if (dn) {
- rc = of_irq_map_one(dn, 0, out_irq);
- if (!rc)
- return rc;
- }
-
- /* Ok, we don't, time to have fun. Let's start by building up an
- * interrupt spec. we assume #interrupt-cells is 1, which is standard
- * for PCI. If you do different, then don't use that routine.
- */
- rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
- if (rc != 0)
- return rc;
- /* No pin, exit */
- if (pin == 0)
- return -ENODEV;
-
- /* Now we walk up the PCI tree */
- lspec = pin;
- for (;;) {
- /* Get the pci_dev of our parent */
- ppdev = pdev->bus->self;
-
- /* Ouch, it's a host bridge... */
- if (ppdev == NULL) {
-#ifdef CONFIG_PPC64
- ppnode = pci_bus_to_OF_node(pdev->bus);
-#else
- struct pci_controller *host;
- host = pci_bus_to_host(pdev->bus);
- ppnode = host ? host->dn : NULL;
-#endif
- /* No node for host bridge ? give up */
- if (ppnode == NULL)
- return -EINVAL;
- } else
- /* We found a P2P bridge, check if it has a node */
- ppnode = pci_device_to_OF_node(ppdev);
-
- /* Ok, we have found a parent with a device-node, hand over to
- * the OF parsing code.
- * We build a unit address from the linux device to be used for
- * resolution. Note that we use the linux bus number which may
- * not match your firmware bus numbering.
- * Fortunately, in most cases, interrupt-map-mask doesn't include
- * the bus number as part of the matching.
- * You should still be careful about that though if you intend
- * to rely on this function (you ship a firmware that doesn't
- * create device nodes for all PCI devices).
- */
- if (ppnode)
- break;
-
- /* We can only get here if we hit a P2P bridge with no node,
- * let's do standard swizzling and try again
- */
- lspec = pci_swizzle_interrupt_pin(pdev, lspec);
- pdev = ppdev;
- }
-
- laddr[0] = (pdev->bus->number << 16)
- | (pdev->devfn << 8);
- laddr[1] = laddr[2] = 0;
- return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
-}
-EXPORT_SYMBOL_GPL(of_irq_map_pci);
-#endif /* CONFIG_PCI */
void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
unsigned long *busno, unsigned long *phys, unsigned long *size)
diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
index 3c6e100..c71cff1 100644
--- a/drivers/of/Kconfig
+++ b/drivers/of/Kconfig
@@ -69,4 +69,10 @@ config OF_MDIO
help
OpenFirmware MDIO bus (Ethernet PHY) accessors
+config OF_PCI
+ def_tristate PCI
+ depends on PCI && !SPARC
+ help
+ OpenFirmware PCI bus accessors
+
endmenu # OF
diff --git a/drivers/of/Makefile b/drivers/of/Makefile
index 3ab21a0..f7861ed 100644
--- a/drivers/of/Makefile
+++ b/drivers/of/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_OF_I2C) += of_i2c.o
obj-$(CONFIG_OF_NET) += of_net.o
obj-$(CONFIG_OF_SPI) += of_spi.o
obj-$(CONFIG_OF_MDIO) += of_mdio.o
+obj-$(CONFIG_OF_PCI) += of_pci.o
diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
new file mode 100644
index 0000000..dd862d2
--- /dev/null
+++ b/drivers/of/of_pci.c
@@ -0,0 +1,80 @@
+#include <linux/kernel.h>
+#include <linux/of_pci.h>
+#include <asm/prom.h>
+
+int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
+{
+ struct device_node *dn, *ppnode;
+ struct pci_dev *ppdev;
+ u32 lspec;
+ __be32 lspec_be;
+ __be32 laddr[3];
+ u8 pin;
+ int rc;
+
+ /* Check if we have a device node, if yes, fallback to standard OF
+ * parsing
+ */
+ dn = pci_device_to_OF_node(pdev);
+ if (dn) {
+ rc = of_irq_map_one(dn, 0, out_irq);
+ if (!rc)
+ return rc;
+ }
+
+ /* Ok, we don't, time to have fun. Let's start by building up an
+ * interrupt spec. we assume #interrupt-cells is 1, which is standard
+ * for PCI. If you do different, then don't use that routine.
+ */
+ rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
+ if (rc != 0)
+ return rc;
+ /* No pin, exit */
+ if (pin == 0)
+ return -ENODEV;
+
+ /* Now we walk up the PCI tree */
+ lspec = pin;
+ for (;;) {
+ /* Get the pci_dev of our parent */
+ ppdev = pdev->bus->self;
+
+ /* Ouch, it's a host bridge... */
+ if (ppdev == NULL) {
+ ppnode = pci_bus_to_OF_node(pdev->bus);
+
+ /* No node for host bridge ? give up */
+ if (ppnode == NULL)
+ return -EINVAL;
+ } else {
+ /* We found a P2P bridge, check if it has a node */
+ ppnode = pci_device_to_OF_node(ppdev);
+ }
+
+ /* Ok, we have found a parent with a device-node, hand over to
+ * the OF parsing code.
+ * We build a unit address from the linux device to be used for
+ * resolution. Note that we use the linux bus number which may
+ * not match your firmware bus numbering.
+ * Fortunately, in most cases, interrupt-map-mask doesn't
+ * include the bus number as part of the matching.
+ * You should still be careful about that though if you intend
+ * to rely on this function (you ship a firmware that doesn't
+ * create device nodes for all PCI devices).
+ */
+ if (ppnode)
+ break;
+
+ /* We can only get here if we hit a P2P bridge with no node,
+ * let's do standard swizzling and try again
+ */
+ lspec = pci_swizzle_interrupt_pin(pdev, lspec);
+ pdev = ppdev;
+ }
+
+ lspec_be = cpu_to_be32(lspec);
+ laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
+ laddr[1] = laddr[2] = cpu_to_be32(0);
+ return of_irq_map_raw(ppnode, &lspec_be, 1, laddr, out_irq);
+}
+EXPORT_SYMBOL_GPL(of_irq_map_pci);
diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
new file mode 100644
index 0000000..9b0ba67
--- /dev/null
+++ b/include/linux/of_pci.h
@@ -0,0 +1,20 @@
+#ifndef __OF_PCI_H
+#define __OF_PCI_H
+
+#include <linux/pci.h>
+
+/**
+ * of_irq_map_pci - Resolve the interrupt for a PCI device
+ * @pdev: the device whose interrupt is to be resolved
+ * @out_irq: structure of_irq filled by this function
+ *
+ * This function resolves the PCI interrupt for a given PCI device. If a
+ * device-node exists for a given pci_dev, it will use normal OF tree
+ * walking. If not, it will implement standard swizzling and walk up the
+ * PCI tree until an device-node is found, at which point it will finish
+ * resolving using the OF tree walking.
+ */
+struct pci_dev;
+struct of_irq;
+int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
+#endif
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH OF 07/14] of: move of_irq_map_pci() into generic code
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, Sebastian Andrzej Siewior
From: Sebastian Andrzej Siewior <sebastian-E0PNVn5OA6ohrxcnuTQ+TQ@public.gmane.org>
There is a tiny difference between PPC32 and PPC64. Microblaze uses the
PPC32 variant.
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Cc: Benjamin Herrenschmidt <benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
Signed-off-by: Sebastian Andrzej Siewior <sebastian-E0PNVn5OA6ohrxcnuTQ+TQ@public.gmane.org>
---
arch/microblaze/include/asm/pci-bridge.h | 12 ++++
arch/microblaze/include/asm/prom.h | 15 -----
arch/microblaze/kernel/prom_parse.c | 77 ---------------------------
arch/microblaze/pci/pci-common.c | 1 +
arch/powerpc/include/asm/pci-bridge.h | 10 ++++
arch/powerpc/include/asm/prom.h | 15 -----
arch/powerpc/kernel/pci-common.c | 1 +
arch/powerpc/kernel/prom_parse.c | 84 ------------------------------
drivers/of/Kconfig | 6 ++
drivers/of/Makefile | 1 +
drivers/of/of_pci.c | 80 ++++++++++++++++++++++++++++
include/linux/of_pci.h | 20 +++++++
12 files changed, 131 insertions(+), 191 deletions(-)
create mode 100644 drivers/of/of_pci.c
create mode 100644 include/linux/of_pci.h
diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
index 0c68764..c2a40a4 100644
--- a/arch/microblaze/include/asm/pci-bridge.h
+++ b/arch/microblaze/include/asm/pci-bridge.h
@@ -104,11 +104,22 @@ struct pci_controller {
int global_number; /* PCI domain number */
};
+#ifdef CONFIG_PCI
static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
{
return bus->sysdata;
}
+static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
+{
+ struct pci_controller *host;
+
+ if (bus->self)
+ return pci_device_to_OF_node(bus->self);
+ host = pci_bus_to_host(bus);
+ return host ? host->dn : NULL;
+}
+
static inline int isa_vaddr_is_ioport(void __iomem *address)
{
/* No specific ISA handling on ppc32 at this stage, it
@@ -116,6 +127,7 @@ static inline int isa_vaddr_is_ioport(void __iomem *address)
*/
return 0;
}
+#endif
/* These are used for config access before all the PCI probing
has been done. */
diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include/asm/prom.h
index 2e72af0..d0890d3 100644
--- a/arch/microblaze/include/asm/prom.h
+++ b/arch/microblaze/include/asm/prom.h
@@ -64,21 +64,6 @@ extern void kdump_move_device_tree(void);
/* CPU OF node matching */
struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
-/**
- * of_irq_map_pci - Resolve the interrupt for a PCI device
- * @pdev: the device whose interrupt is to be resolved
- * @out_irq: structure of_irq filled by this function
- *
- * This function resolves the PCI interrupt for a given PCI device. If a
- * device-node exists for a given pci_dev, it will use normal OF tree
- * walking. If not, it will implement standard swizzling and walk up the
- * PCI tree until an device-node is found, at which point it will finish
- * resolving using the OF tree walking.
- */
-struct pci_dev;
-struct of_irq;
-extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
-
#endif /* __ASSEMBLY__ */
#endif /* __KERNEL__ */
diff --git a/arch/microblaze/kernel/prom_parse.c b/arch/microblaze/kernel/prom_parse.c
index 9ae24f4..47187cc 100644
--- a/arch/microblaze/kernel/prom_parse.c
+++ b/arch/microblaze/kernel/prom_parse.c
@@ -2,88 +2,11 @@
#include <linux/kernel.h>
#include <linux/string.h>
-#include <linux/pci_regs.h>
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/etherdevice.h>
#include <linux/of_address.h>
#include <asm/prom.h>
-#include <asm/pci-bridge.h>
-
-#ifdef CONFIG_PCI
-int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
-{
- struct device_node *dn, *ppnode;
- struct pci_dev *ppdev;
- u32 lspec;
- u32 laddr[3];
- u8 pin;
- int rc;
-
- /* Check if we have a device node, if yes, fallback to standard OF
- * parsing
- */
- dn = pci_device_to_OF_node(pdev);
- if (dn)
- return of_irq_map_one(dn, 0, out_irq);
-
- /* Ok, we don't, time to have fun. Let's start by building up an
- * interrupt spec. we assume #interrupt-cells is 1, which is standard
- * for PCI. If you do different, then don't use that routine.
- */
- rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
- if (rc != 0)
- return rc;
- /* No pin, exit */
- if (pin == 0)
- return -ENODEV;
-
- /* Now we walk up the PCI tree */
- lspec = pin;
- for (;;) {
- /* Get the pci_dev of our parent */
- ppdev = pdev->bus->self;
-
- /* Ouch, it's a host bridge... */
- if (ppdev == NULL) {
- struct pci_controller *host;
- host = pci_bus_to_host(pdev->bus);
- ppnode = host ? host->dn : NULL;
- /* No node for host bridge ? give up */
- if (ppnode == NULL)
- return -EINVAL;
- } else
- /* We found a P2P bridge, check if it has a node */
- ppnode = pci_device_to_OF_node(ppdev);
-
- /* Ok, we have found a parent with a device-node, hand over to
- * the OF parsing code.
- * We build a unit address from the linux device to be used for
- * resolution. Note that we use the linux bus number which may
- * not match your firmware bus numbering.
- * Fortunately, in most cases, interrupt-map-mask doesn't
- * include the bus number as part of the matching.
- * You should still be careful about that though if you intend
- * to rely on this function (you ship a firmware that doesn't
- * create device nodes for all PCI devices).
- */
- if (ppnode)
- break;
-
- /* We can only get here if we hit a P2P bridge with no node,
- * let's do standard swizzling and try again
- */
- lspec = pci_swizzle_interrupt_pin(pdev, lspec);
- pdev = ppdev;
- }
-
- laddr[0] = (pdev->bus->number << 16)
- | (pdev->devfn << 8);
- laddr[1] = laddr[2] = 0;
- return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
-}
-EXPORT_SYMBOL_GPL(of_irq_map_pci);
-#endif /* CONFIG_PCI */
void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
unsigned long *busno, unsigned long *phys, unsigned long *size)
diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
index e363615..1e01a12 100644
--- a/arch/microblaze/pci/pci-common.c
+++ b/arch/microblaze/pci/pci-common.c
@@ -29,6 +29,7 @@
#include <linux/slab.h>
#include <linux/of.h>
#include <linux/of_address.h>
+#include <linux/of_pci.h>
#include <asm/processor.h>
#include <asm/io.h>
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 51e9e6f..edeb80f 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -171,6 +171,16 @@ static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
return bus->sysdata;
}
+static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
+{
+ struct pci_controller *host;
+
+ if (bus->self)
+ return pci_device_to_OF_node(bus->self);
+ host = pci_bus_to_host(bus);
+ return host ? host->dn : NULL;
+}
+
static inline int isa_vaddr_is_ioport(void __iomem *address)
{
/* No specific ISA handling on ppc32 at this stage, it
diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h
index d727575..c189aa5 100644
--- a/arch/powerpc/include/asm/prom.h
+++ b/arch/powerpc/include/asm/prom.h
@@ -70,21 +70,6 @@ static inline int of_node_to_nid(struct device_node *device) { return 0; }
#endif
#define of_node_to_nid of_node_to_nid
-/**
- * of_irq_map_pci - Resolve the interrupt for a PCI device
- * @pdev: the device whose interrupt is to be resolved
- * @out_irq: structure of_irq filled by this function
- *
- * This function resolves the PCI interrupt for a given PCI device. If a
- * device-node exists for a given pci_dev, it will use normal OF tree
- * walking. If not, it will implement standard swizzling and walk up the
- * PCI tree until an device-node is found, at which point it will finish
- * resolving using the OF tree walking.
- */
-struct pci_dev;
-struct of_irq;
-extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
-
extern void of_instantiate_rtc(void);
/* These includes are put at the bottom because they may contain things
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 10a44e6..eb341be 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -22,6 +22,7 @@
#include <linux/init.h>
#include <linux/bootmem.h>
#include <linux/of_address.h>
+#include <linux/of_pci.h>
#include <linux/mm.h>
#include <linux/list.h>
#include <linux/syscalls.h>
diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c
index c2b7a07..47187cc 100644
--- a/arch/powerpc/kernel/prom_parse.c
+++ b/arch/powerpc/kernel/prom_parse.c
@@ -2,95 +2,11 @@
#include <linux/kernel.h>
#include <linux/string.h>
-#include <linux/pci_regs.h>
#include <linux/module.h>
#include <linux/ioport.h>
#include <linux/etherdevice.h>
#include <linux/of_address.h>
#include <asm/prom.h>
-#include <asm/pci-bridge.h>
-
-#ifdef CONFIG_PCI
-int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
-{
- struct device_node *dn, *ppnode;
- struct pci_dev *ppdev;
- u32 lspec;
- u32 laddr[3];
- u8 pin;
- int rc;
-
- /* Check if we have a device node, if yes, fallback to standard OF
- * parsing
- */
- dn = pci_device_to_OF_node(pdev);
- if (dn) {
- rc = of_irq_map_one(dn, 0, out_irq);
- if (!rc)
- return rc;
- }
-
- /* Ok, we don't, time to have fun. Let's start by building up an
- * interrupt spec. we assume #interrupt-cells is 1, which is standard
- * for PCI. If you do different, then don't use that routine.
- */
- rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
- if (rc != 0)
- return rc;
- /* No pin, exit */
- if (pin == 0)
- return -ENODEV;
-
- /* Now we walk up the PCI tree */
- lspec = pin;
- for (;;) {
- /* Get the pci_dev of our parent */
- ppdev = pdev->bus->self;
-
- /* Ouch, it's a host bridge... */
- if (ppdev == NULL) {
-#ifdef CONFIG_PPC64
- ppnode = pci_bus_to_OF_node(pdev->bus);
-#else
- struct pci_controller *host;
- host = pci_bus_to_host(pdev->bus);
- ppnode = host ? host->dn : NULL;
-#endif
- /* No node for host bridge ? give up */
- if (ppnode == NULL)
- return -EINVAL;
- } else
- /* We found a P2P bridge, check if it has a node */
- ppnode = pci_device_to_OF_node(ppdev);
-
- /* Ok, we have found a parent with a device-node, hand over to
- * the OF parsing code.
- * We build a unit address from the linux device to be used for
- * resolution. Note that we use the linux bus number which may
- * not match your firmware bus numbering.
- * Fortunately, in most cases, interrupt-map-mask doesn't include
- * the bus number as part of the matching.
- * You should still be careful about that though if you intend
- * to rely on this function (you ship a firmware that doesn't
- * create device nodes for all PCI devices).
- */
- if (ppnode)
- break;
-
- /* We can only get here if we hit a P2P bridge with no node,
- * let's do standard swizzling and try again
- */
- lspec = pci_swizzle_interrupt_pin(pdev, lspec);
- pdev = ppdev;
- }
-
- laddr[0] = (pdev->bus->number << 16)
- | (pdev->devfn << 8);
- laddr[1] = laddr[2] = 0;
- return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
-}
-EXPORT_SYMBOL_GPL(of_irq_map_pci);
-#endif /* CONFIG_PCI */
void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
unsigned long *busno, unsigned long *phys, unsigned long *size)
diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
index 3c6e100..c71cff1 100644
--- a/drivers/of/Kconfig
+++ b/drivers/of/Kconfig
@@ -69,4 +69,10 @@ config OF_MDIO
help
OpenFirmware MDIO bus (Ethernet PHY) accessors
+config OF_PCI
+ def_tristate PCI
+ depends on PCI && !SPARC
+ help
+ OpenFirmware PCI bus accessors
+
endmenu # OF
diff --git a/drivers/of/Makefile b/drivers/of/Makefile
index 3ab21a0..f7861ed 100644
--- a/drivers/of/Makefile
+++ b/drivers/of/Makefile
@@ -9,3 +9,4 @@ obj-$(CONFIG_OF_I2C) += of_i2c.o
obj-$(CONFIG_OF_NET) += of_net.o
obj-$(CONFIG_OF_SPI) += of_spi.o
obj-$(CONFIG_OF_MDIO) += of_mdio.o
+obj-$(CONFIG_OF_PCI) += of_pci.o
diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
new file mode 100644
index 0000000..dd862d2
--- /dev/null
+++ b/drivers/of/of_pci.c
@@ -0,0 +1,80 @@
+#include <linux/kernel.h>
+#include <linux/of_pci.h>
+#include <asm/prom.h>
+
+int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
+{
+ struct device_node *dn, *ppnode;
+ struct pci_dev *ppdev;
+ u32 lspec;
+ __be32 lspec_be;
+ __be32 laddr[3];
+ u8 pin;
+ int rc;
+
+ /* Check if we have a device node, if yes, fallback to standard OF
+ * parsing
+ */
+ dn = pci_device_to_OF_node(pdev);
+ if (dn) {
+ rc = of_irq_map_one(dn, 0, out_irq);
+ if (!rc)
+ return rc;
+ }
+
+ /* Ok, we don't, time to have fun. Let's start by building up an
+ * interrupt spec. we assume #interrupt-cells is 1, which is standard
+ * for PCI. If you do different, then don't use that routine.
+ */
+ rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
+ if (rc != 0)
+ return rc;
+ /* No pin, exit */
+ if (pin == 0)
+ return -ENODEV;
+
+ /* Now we walk up the PCI tree */
+ lspec = pin;
+ for (;;) {
+ /* Get the pci_dev of our parent */
+ ppdev = pdev->bus->self;
+
+ /* Ouch, it's a host bridge... */
+ if (ppdev == NULL) {
+ ppnode = pci_bus_to_OF_node(pdev->bus);
+
+ /* No node for host bridge ? give up */
+ if (ppnode == NULL)
+ return -EINVAL;
+ } else {
+ /* We found a P2P bridge, check if it has a node */
+ ppnode = pci_device_to_OF_node(ppdev);
+ }
+
+ /* Ok, we have found a parent with a device-node, hand over to
+ * the OF parsing code.
+ * We build a unit address from the linux device to be used for
+ * resolution. Note that we use the linux bus number which may
+ * not match your firmware bus numbering.
+ * Fortunately, in most cases, interrupt-map-mask doesn't
+ * include the bus number as part of the matching.
+ * You should still be careful about that though if you intend
+ * to rely on this function (you ship a firmware that doesn't
+ * create device nodes for all PCI devices).
+ */
+ if (ppnode)
+ break;
+
+ /* We can only get here if we hit a P2P bridge with no node,
+ * let's do standard swizzling and try again
+ */
+ lspec = pci_swizzle_interrupt_pin(pdev, lspec);
+ pdev = ppdev;
+ }
+
+ lspec_be = cpu_to_be32(lspec);
+ laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
+ laddr[1] = laddr[2] = cpu_to_be32(0);
+ return of_irq_map_raw(ppnode, &lspec_be, 1, laddr, out_irq);
+}
+EXPORT_SYMBOL_GPL(of_irq_map_pci);
diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
new file mode 100644
index 0000000..9b0ba67
--- /dev/null
+++ b/include/linux/of_pci.h
@@ -0,0 +1,20 @@
+#ifndef __OF_PCI_H
+#define __OF_PCI_H
+
+#include <linux/pci.h>
+
+/**
+ * of_irq_map_pci - Resolve the interrupt for a PCI device
+ * @pdev: the device whose interrupt is to be resolved
+ * @out_irq: structure of_irq filled by this function
+ *
+ * This function resolves the PCI interrupt for a given PCI device. If a
+ * device-node exists for a given pci_dev, it will use normal OF tree
+ * walking. If not, it will implement standard swizzling and walk up the
+ * PCI tree until an device-node is found, at which point it will finish
+ * resolving using the OF tree walking.
+ */
+struct pci_dev;
+struct of_irq;
+int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
+#endif
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 08/14] x86/dtb: add support for PCI devices backed by dtb nodes
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel
Cc: sodaville, x86, devicetree-discuss, Sebastian Andrzej Siewior
x86_of_pci_init() does two things:
- it provides a generic irq enable and disable function. enable queries
the device tree for the interrupt information, calls ->xlate on the
irq host and updates the pci->irq information for the device.
- it walks through PCI buss(es) in the device tree and adds its children
(devices) nodes to appropriate pci_dev nodes in kernel. So the dtb
node information is available at probe time of the PCI device.
Adding a PCI bus based on the information in the device tree is
currently not supported. Right now direct access via ioports is used.
Cc: devicetree-discuss@lists.ozlabs.org
Tested-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
---
arch/x86/include/asm/prom.h | 17 +++++++++
arch/x86/kernel/prom.c | 82 +++++++++++++++++++++++++++++++++++++++++++
2 files changed, 99 insertions(+), 0 deletions(-)
diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
index bd67ab2..3ed0bd6 100644
--- a/arch/x86/include/asm/prom.h
+++ b/arch/x86/include/asm/prom.h
@@ -16,6 +16,7 @@
#include <linux/of.h>
#include <linux/types.h>
+#include <linux/pci.h>
#include <asm/irq.h>
#include <asm/atomic.h>
#include <asm/setup.h>
@@ -28,8 +29,24 @@ extern void add_dtb(u64 data);
void x86_dtb_find_config(void);
void x86_dtb_get_config(unsigned int unused);
void add_interrupt_host(struct irq_domain *ih);
+void __cpuinit x86_of_pci_init(void);
+
+static inline struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
+{
+ return pdev->dev.of_node;
+}
+
+static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
+{
+ if (bus->self)
+ return pci_device_to_OF_node(bus->self);
+ else
+ return NULL;
+}
+
#else
static inline void add_dtb(u64 data) { }
+static inline void x86_of_pci_init(void) { }
#define x86_dtb_find_config x86_init_noop
#define x86_dtb_get_config x86_init_uint_noop
#define of_ioapic 0
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
index 16c124e..8525ca0 100644
--- a/arch/x86/kernel/prom.c
+++ b/arch/x86/kernel/prom.c
@@ -9,10 +9,13 @@
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/slab.h>
+#include <linux/pci.h>
+#include <linux/of_pci.h>
#include <asm/hpet.h>
#include <asm/irq_controller.h>
#include <asm/io_apic.h>
+#include <asm/pci_x86.h>
__initdata u64 initial_dtb;
char __initdata cmd_line[COMMAND_LINE_SIZE];
@@ -99,6 +102,85 @@ void __init add_dtb(u64 data)
initial_dtb = data + offsetof(struct setup_data, data);
}
+#ifdef CONFIG_PCI
+static int x86_of_pci_irq_enable(struct pci_dev *dev)
+{
+ struct of_irq oirq;
+ u32 virq;
+ int ret;
+ u8 pin;
+
+ ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
+ if (ret)
+ return ret;
+ if (!pin)
+ return 0;
+
+ ret = of_irq_map_pci(dev, &oirq);
+ if (ret)
+ return ret;
+
+ virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
+ oirq.size);
+ if (virq == 0)
+ return -EINVAL;
+ dev->irq = virq;
+ return 0;
+}
+
+static void x86_of_pci_irq_disable(struct pci_dev *dev)
+{
+}
+
+void __cpuinit x86_of_pci_init(void)
+{
+ struct device_node *np;
+
+ pcibios_enable_irq = x86_of_pci_irq_enable;
+ pcibios_disable_irq = x86_of_pci_irq_disable;
+
+ for_each_node_by_type(np, "pci") {
+ const void *prop;
+ struct pci_bus *bus;
+ unsigned int bus_min;
+ struct device_node *child;
+
+ prop = of_get_property(np, "bus-range", NULL);
+ if (!prop)
+ continue;
+ bus_min = be32_to_cpup(prop);
+
+ bus = pci_find_bus(0, bus_min);
+ if (!bus) {
+ printk(KERN_ERR "Can't find a node for bus %s.\n",
+ np->full_name);
+ continue;
+ }
+
+ if (bus->self)
+ bus->self->dev.of_node = np;
+ else
+ bus->dev.of_node = np;
+
+ for_each_child_of_node(np, child) {
+ struct pci_dev *dev;
+ u32 devfn;
+
+ prop = of_get_property(child, "reg", NULL);
+ if (!prop)
+ continue;
+
+ devfn = (be32_to_cpup(prop) >> 8) & 0xff;
+ dev = pci_get_slot(bus, devfn);
+ if (!dev)
+ continue;
+ dev->dev.of_node = child;
+ pci_dev_put(dev);
+ }
+ }
+}
+#endif
+
static void __init dtb_setup_hpet(void)
{
struct device_node *dn;
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 08/14] x86/dtb: add support for PCI devices backed by dtb nodes
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, Sebastian Andrzej Siewior
x86_of_pci_init() does two things:
- it provides a generic irq enable and disable function. enable queries
the device tree for the interrupt information, calls ->xlate on the
irq host and updates the pci->irq information for the device.
- it walks through PCI buss(es) in the device tree and adds its children
(devices) nodes to appropriate pci_dev nodes in kernel. So the dtb
node information is available at probe time of the PCI device.
Adding a PCI bus based on the information in the device tree is
currently not supported. Right now direct access via ioports is used.
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Tested-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
---
arch/x86/include/asm/prom.h | 17 +++++++++
arch/x86/kernel/prom.c | 82 +++++++++++++++++++++++++++++++++++++++++++
2 files changed, 99 insertions(+), 0 deletions(-)
diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
index bd67ab2..3ed0bd6 100644
--- a/arch/x86/include/asm/prom.h
+++ b/arch/x86/include/asm/prom.h
@@ -16,6 +16,7 @@
#include <linux/of.h>
#include <linux/types.h>
+#include <linux/pci.h>
#include <asm/irq.h>
#include <asm/atomic.h>
#include <asm/setup.h>
@@ -28,8 +29,24 @@ extern void add_dtb(u64 data);
void x86_dtb_find_config(void);
void x86_dtb_get_config(unsigned int unused);
void add_interrupt_host(struct irq_domain *ih);
+void __cpuinit x86_of_pci_init(void);
+
+static inline struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
+{
+ return pdev->dev.of_node;
+}
+
+static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
+{
+ if (bus->self)
+ return pci_device_to_OF_node(bus->self);
+ else
+ return NULL;
+}
+
#else
static inline void add_dtb(u64 data) { }
+static inline void x86_of_pci_init(void) { }
#define x86_dtb_find_config x86_init_noop
#define x86_dtb_get_config x86_init_uint_noop
#define of_ioapic 0
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
index 16c124e..8525ca0 100644
--- a/arch/x86/kernel/prom.c
+++ b/arch/x86/kernel/prom.c
@@ -9,10 +9,13 @@
#include <linux/of_address.h>
#include <linux/of_platform.h>
#include <linux/slab.h>
+#include <linux/pci.h>
+#include <linux/of_pci.h>
#include <asm/hpet.h>
#include <asm/irq_controller.h>
#include <asm/io_apic.h>
+#include <asm/pci_x86.h>
__initdata u64 initial_dtb;
char __initdata cmd_line[COMMAND_LINE_SIZE];
@@ -99,6 +102,85 @@ void __init add_dtb(u64 data)
initial_dtb = data + offsetof(struct setup_data, data);
}
+#ifdef CONFIG_PCI
+static int x86_of_pci_irq_enable(struct pci_dev *dev)
+{
+ struct of_irq oirq;
+ u32 virq;
+ int ret;
+ u8 pin;
+
+ ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
+ if (ret)
+ return ret;
+ if (!pin)
+ return 0;
+
+ ret = of_irq_map_pci(dev, &oirq);
+ if (ret)
+ return ret;
+
+ virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
+ oirq.size);
+ if (virq == 0)
+ return -EINVAL;
+ dev->irq = virq;
+ return 0;
+}
+
+static void x86_of_pci_irq_disable(struct pci_dev *dev)
+{
+}
+
+void __cpuinit x86_of_pci_init(void)
+{
+ struct device_node *np;
+
+ pcibios_enable_irq = x86_of_pci_irq_enable;
+ pcibios_disable_irq = x86_of_pci_irq_disable;
+
+ for_each_node_by_type(np, "pci") {
+ const void *prop;
+ struct pci_bus *bus;
+ unsigned int bus_min;
+ struct device_node *child;
+
+ prop = of_get_property(np, "bus-range", NULL);
+ if (!prop)
+ continue;
+ bus_min = be32_to_cpup(prop);
+
+ bus = pci_find_bus(0, bus_min);
+ if (!bus) {
+ printk(KERN_ERR "Can't find a node for bus %s.\n",
+ np->full_name);
+ continue;
+ }
+
+ if (bus->self)
+ bus->self->dev.of_node = np;
+ else
+ bus->dev.of_node = np;
+
+ for_each_child_of_node(np, child) {
+ struct pci_dev *dev;
+ u32 devfn;
+
+ prop = of_get_property(child, "reg", NULL);
+ if (!prop)
+ continue;
+
+ devfn = (be32_to_cpup(prop) >> 8) & 0xff;
+ dev = pci_get_slot(bus, devfn);
+ if (!dev)
+ continue;
+ dev->dev.of_node = child;
+ pci_dev_put(dev);
+ }
+ }
+}
+#endif
+
static void __init dtb_setup_hpet(void)
{
struct device_node *dn;
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 09/14] x86/dtb: Add generic bus probe
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel
Cc: sodaville, x86, devicetree-discuss, Sebastian Andrzej Siewior,
Dirk Brandewie
For now we probe these busses and we change is to board dependent probes
once we have to.
Cc: devicetree-discuss@lists.ozlabs.org
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
---
arch/x86/kernel/prom.c | 19 +++++++++++++++++++
1 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
index 8525ca0..8215e8a 100644
--- a/arch/x86/kernel/prom.c
+++ b/arch/x86/kernel/prom.c
@@ -102,6 +102,25 @@ void __init add_dtb(u64 data)
initial_dtb = data + offsetof(struct setup_data, data);
}
+/*
+ * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
+ */
+static struct of_device_id __initdata ce4100_ids[] = {
+ { .compatible = "intel,ce4100-immr", },
+ { .compatible = "isa", },
+ { .compatible = "pci", },
+ {},
+};
+
+static int __init add_bus_probe(void)
+{
+ if (!initial_boot_params)
+ return 0;
+
+ return of_platform_bus_probe(NULL, ce4100_ids, NULL);
+}
+module_init(add_bus_probe);
+
#ifdef CONFIG_PCI
static int x86_of_pci_irq_enable(struct pci_dev *dev)
{
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 09/14] x86/dtb: Add generic bus probe
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, Sebastian Andrzej Siewior
For now we probe these busses and we change is to board dependent probes
once we have to.
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Acked-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
arch/x86/kernel/prom.c | 19 +++++++++++++++++++
1 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
index 8525ca0..8215e8a 100644
--- a/arch/x86/kernel/prom.c
+++ b/arch/x86/kernel/prom.c
@@ -102,6 +102,25 @@ void __init add_dtb(u64 data)
initial_dtb = data + offsetof(struct setup_data, data);
}
+/*
+ * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
+ */
+static struct of_device_id __initdata ce4100_ids[] = {
+ { .compatible = "intel,ce4100-immr", },
+ { .compatible = "isa", },
+ { .compatible = "pci", },
+ {},
+};
+
+static int __init add_bus_probe(void)
+{
+ if (!initial_boot_params)
+ return 0;
+
+ return of_platform_bus_probe(NULL, ce4100_ids, NULL);
+}
+module_init(add_bus_probe);
+
#ifdef CONFIG_PCI
static int x86_of_pci_irq_enable(struct pci_dev *dev)
{
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 10/14] x86/ioapic: Add OF bindings for IO-APIC
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel
Cc: sodaville, x86, devicetree-discuss, Sebastian Andrzej Siewior,
Dirk Brandewie
ioapic_xlate provides a translation from the information in device tree
to ioapic related informations. This includes
- obtaining hw irq which is the vector number "=> pin number + gsi"
- obtaining type (level/edge/..)
- programming this information into ioapic
ioapic_add_ofnode adds an irq_domain based on informations from the device
tree. This information (irq_domain) is required in order to map a device to
its proper interrupt controller.
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
---
arch/x86/include/asm/io_apic.h | 7 +++
arch/x86/include/asm/prom.h | 2 +
arch/x86/kernel/apic/io_apic.c | 99 ++++++++++++++++++++++++++++++++++++++++
arch/x86/kernel/irqinit.c | 6 ++
arch/x86/kernel/prom.c | 15 ++++++
5 files changed, 129 insertions(+), 0 deletions(-)
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index f327d38..5a8b950 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -177,6 +177,13 @@ struct mp_ioapic_gsi{
u32 gsi_base;
u32 gsi_end;
};
+#ifdef CONFIG_X86_OF
+struct mp_of_ioapic {
+ struct device_node *node;
+};
+extern struct mp_of_ioapic mp_of_ioapic[MAX_IO_APICS];
+void __init ioapic_add_ofnode(struct device_node *np);
+#endif
extern struct mp_ioapic_gsi mp_gsi_routing[];
extern u32 gsi_top;
int mp_find_ioapic(u32 gsi);
diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
index 3ed0bd6..eea2839 100644
--- a/arch/x86/include/asm/prom.h
+++ b/arch/x86/include/asm/prom.h
@@ -26,6 +26,7 @@
extern int of_ioapic;
extern u64 initial_dtb;
extern void add_dtb(u64 data);
+extern void x86_add_irq_domains(void);
void x86_dtb_find_config(void);
void x86_dtb_get_config(unsigned int unused);
void add_interrupt_host(struct irq_domain *ih);
@@ -46,6 +47,7 @@ static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
#else
static inline void add_dtb(u64 data) { }
+static inline void x86_add_irq_domains(void) { }
static inline void x86_of_pci_init(void) { }
#define x86_dtb_find_config x86_init_noop
#define x86_dtb_get_config x86_init_uint_noop
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 697dc34..be7417f 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -43,6 +43,7 @@
#include <linux/bootmem.h>
#include <linux/dmar.h>
#include <linux/hpet.h>
+#include <linux/of_address.h>
#include <asm/idle.h>
#include <asm/io.h>
@@ -60,6 +61,7 @@
#include <asm/irq_remapping.h>
#include <asm/hpet.h>
#include <asm/hw_irq.h>
+#include <asm/irq_controller.h>
#include <asm/apic.h>
@@ -88,6 +90,10 @@ int nr_ioapics;
/* IO APIC gsi routing info */
struct mp_ioapic_gsi mp_gsi_routing[MAX_IO_APICS];
+#ifdef CONFIG_X86_OF
+/* OF -> IO APIC lookup */
+struct mp_of_ioapic mp_of_ioapic[MAX_IO_APICS];
+#endif
/* The one past the highest gsi number used */
u32 gsi_top;
@@ -4080,6 +4086,99 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
nr_ioapics++;
}
+#ifdef CONFIG_X86_OF
+static int ioapic_xlate(struct irq_domain *id, const u32 *intspec, u32 intsize,
+ u32 *out_hwirq, u32 *out_type)
+{
+ u32 line;
+ u32 idx;
+ u32 type;
+ u32 trigger;
+ u32 polarity;
+ struct irq_cfg *cfg;
+ struct irq_desc *desc;
+
+ if (intsize < 1)
+ return -EINVAL;
+
+ line = *intspec;
+ idx = (u32) id->priv;
+ *out_hwirq = line + mp_gsi_routing[idx].gsi_base;
+ if (intsize > 1) {
+ intspec++;
+ type = *intspec;
+ switch (type) {
+ case 0:
+ *out_type = IRQ_TYPE_EDGE_RISING;
+ trigger = IOAPIC_EDGE;
+ polarity = 1;
+ break;
+ case 1:
+ *out_type = IRQ_TYPE_LEVEL_LOW;
+ trigger = IOAPIC_LEVEL;
+ polarity = 0;
+ break;
+ case 2:
+ *out_type = IRQ_TYPE_LEVEL_HIGH;
+ trigger = IOAPIC_LEVEL;
+ polarity = 1;
+ break;
+ case 3:
+ *out_type = IRQ_TYPE_EDGE_FALLING;
+ trigger = IOAPIC_EDGE;
+ polarity = 0;
+ break;
+ default:
+ *out_type = IRQ_TYPE_NONE;
+ trigger = IOAPIC_AUTO;
+ polarity = 0;
+ break;
+ };
+ } else {
+ *out_type = IRQ_TYPE_NONE;
+ trigger = IOAPIC_AUTO;
+ polarity = 0;
+ }
+ /* And now tell the IO APIC to make the line ready */
+ desc = irq_to_desc_alloc_node(*out_hwirq, 0);
+ cfg = irq_cfg(*out_hwirq);
+ add_pin_to_irq_node(cfg, 0, idx, line);
+ /* make it edge by default, settype will update it */
+ setup_ioapic_irq(idx, line, *out_hwirq, cfg, trigger, polarity);
+ return 0;
+}
+
+void __init ioapic_add_ofnode(struct device_node *np)
+{
+ int i;
+ int ret;
+ struct resource r;
+
+ ret = of_address_to_resource(np, 0, &r);
+ if (ret) {
+ printk(KERN_ERR "Failed to obtain address for %s\n",
+ np->full_name);
+ return;
+ }
+
+ for (i = 0; i < nr_ioapics; i++) {
+ if (r.start == mp_ioapics[i].apicaddr) {
+ struct irq_domain *id;
+
+ mp_of_ioapic[i].node = np;
+ id = kzalloc(sizeof(*id), GFP_KERNEL);
+ BUG_ON(!id);
+ id->controller = np;
+ id->xlate = ioapic_xlate;
+ id->priv = (void *)i;
+ add_interrupt_host(id);
+ return;
+ }
+ }
+ printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name);
+}
+#endif
+
/* Enable IOAPIC early just for system timer */
void __init pre_init_apic_IRQ0(void)
{
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index 4cadf86..9f76f89 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -119,6 +119,12 @@ void __init init_IRQ(void)
int i;
/*
+ * We probably need a better place for this, but it works for
+ * now ...
+ */
+ x86_add_irq_domains();
+
+ /*
* On cpu 0, Assign IRQ0_VECTOR..IRQ15_VECTOR's to IRQ 0..15.
* If these IRQ's are handled by legacy interrupt-controllers like PIC,
* then this configuration will likely be static after the boot. If
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
index 8215e8a..83ab00a 100644
--- a/arch/x86/kernel/prom.c
+++ b/arch/x86/kernel/prom.c
@@ -11,9 +11,11 @@
#include <linux/slab.h>
#include <linux/pci.h>
#include <linux/of_pci.h>
+#include <linux/of_fdt.h>
#include <asm/hpet.h>
#include <asm/irq_controller.h>
+#include <asm/apic.h>
#include <asm/io_apic.h>
#include <asm/pci_x86.h>
@@ -320,3 +322,16 @@ void __init x86_dtb_get_config(unsigned int unused)
dtb_setup_hpet();
dtb_apic_setup();
}
+
+void __init x86_add_irq_domains(void)
+{
+ struct device_node *dp;
+
+ if (!initial_boot_params)
+ return;
+
+ for_each_node_with_property(dp, "interrupt-controller") {
+ if (of_device_is_compatible(dp, "intel,ioapic"))
+ ioapic_add_ofnode(dp);
+ }
+}
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 10/14] x86/ioapic: Add OF bindings for IO-APIC
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, Sebastian Andrzej Siewior
ioapic_xlate provides a translation from the information in device tree
to ioapic related informations. This includes
- obtaining hw irq which is the vector number "=> pin number + gsi"
- obtaining type (level/edge/..)
- programming this information into ioapic
ioapic_add_ofnode adds an irq_domain based on informations from the device
tree. This information (irq_domain) is required in order to map a device to
its proper interrupt controller.
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
arch/x86/include/asm/io_apic.h | 7 +++
arch/x86/include/asm/prom.h | 2 +
arch/x86/kernel/apic/io_apic.c | 99 ++++++++++++++++++++++++++++++++++++++++
arch/x86/kernel/irqinit.c | 6 ++
arch/x86/kernel/prom.c | 15 ++++++
5 files changed, 129 insertions(+), 0 deletions(-)
diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
index f327d38..5a8b950 100644
--- a/arch/x86/include/asm/io_apic.h
+++ b/arch/x86/include/asm/io_apic.h
@@ -177,6 +177,13 @@ struct mp_ioapic_gsi{
u32 gsi_base;
u32 gsi_end;
};
+#ifdef CONFIG_X86_OF
+struct mp_of_ioapic {
+ struct device_node *node;
+};
+extern struct mp_of_ioapic mp_of_ioapic[MAX_IO_APICS];
+void __init ioapic_add_ofnode(struct device_node *np);
+#endif
extern struct mp_ioapic_gsi mp_gsi_routing[];
extern u32 gsi_top;
int mp_find_ioapic(u32 gsi);
diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
index 3ed0bd6..eea2839 100644
--- a/arch/x86/include/asm/prom.h
+++ b/arch/x86/include/asm/prom.h
@@ -26,6 +26,7 @@
extern int of_ioapic;
extern u64 initial_dtb;
extern void add_dtb(u64 data);
+extern void x86_add_irq_domains(void);
void x86_dtb_find_config(void);
void x86_dtb_get_config(unsigned int unused);
void add_interrupt_host(struct irq_domain *ih);
@@ -46,6 +47,7 @@ static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
#else
static inline void add_dtb(u64 data) { }
+static inline void x86_add_irq_domains(void) { }
static inline void x86_of_pci_init(void) { }
#define x86_dtb_find_config x86_init_noop
#define x86_dtb_get_config x86_init_uint_noop
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
index 697dc34..be7417f 100644
--- a/arch/x86/kernel/apic/io_apic.c
+++ b/arch/x86/kernel/apic/io_apic.c
@@ -43,6 +43,7 @@
#include <linux/bootmem.h>
#include <linux/dmar.h>
#include <linux/hpet.h>
+#include <linux/of_address.h>
#include <asm/idle.h>
#include <asm/io.h>
@@ -60,6 +61,7 @@
#include <asm/irq_remapping.h>
#include <asm/hpet.h>
#include <asm/hw_irq.h>
+#include <asm/irq_controller.h>
#include <asm/apic.h>
@@ -88,6 +90,10 @@ int nr_ioapics;
/* IO APIC gsi routing info */
struct mp_ioapic_gsi mp_gsi_routing[MAX_IO_APICS];
+#ifdef CONFIG_X86_OF
+/* OF -> IO APIC lookup */
+struct mp_of_ioapic mp_of_ioapic[MAX_IO_APICS];
+#endif
/* The one past the highest gsi number used */
u32 gsi_top;
@@ -4080,6 +4086,99 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
nr_ioapics++;
}
+#ifdef CONFIG_X86_OF
+static int ioapic_xlate(struct irq_domain *id, const u32 *intspec, u32 intsize,
+ u32 *out_hwirq, u32 *out_type)
+{
+ u32 line;
+ u32 idx;
+ u32 type;
+ u32 trigger;
+ u32 polarity;
+ struct irq_cfg *cfg;
+ struct irq_desc *desc;
+
+ if (intsize < 1)
+ return -EINVAL;
+
+ line = *intspec;
+ idx = (u32) id->priv;
+ *out_hwirq = line + mp_gsi_routing[idx].gsi_base;
+ if (intsize > 1) {
+ intspec++;
+ type = *intspec;
+ switch (type) {
+ case 0:
+ *out_type = IRQ_TYPE_EDGE_RISING;
+ trigger = IOAPIC_EDGE;
+ polarity = 1;
+ break;
+ case 1:
+ *out_type = IRQ_TYPE_LEVEL_LOW;
+ trigger = IOAPIC_LEVEL;
+ polarity = 0;
+ break;
+ case 2:
+ *out_type = IRQ_TYPE_LEVEL_HIGH;
+ trigger = IOAPIC_LEVEL;
+ polarity = 1;
+ break;
+ case 3:
+ *out_type = IRQ_TYPE_EDGE_FALLING;
+ trigger = IOAPIC_EDGE;
+ polarity = 0;
+ break;
+ default:
+ *out_type = IRQ_TYPE_NONE;
+ trigger = IOAPIC_AUTO;
+ polarity = 0;
+ break;
+ };
+ } else {
+ *out_type = IRQ_TYPE_NONE;
+ trigger = IOAPIC_AUTO;
+ polarity = 0;
+ }
+ /* And now tell the IO APIC to make the line ready */
+ desc = irq_to_desc_alloc_node(*out_hwirq, 0);
+ cfg = irq_cfg(*out_hwirq);
+ add_pin_to_irq_node(cfg, 0, idx, line);
+ /* make it edge by default, settype will update it */
+ setup_ioapic_irq(idx, line, *out_hwirq, cfg, trigger, polarity);
+ return 0;
+}
+
+void __init ioapic_add_ofnode(struct device_node *np)
+{
+ int i;
+ int ret;
+ struct resource r;
+
+ ret = of_address_to_resource(np, 0, &r);
+ if (ret) {
+ printk(KERN_ERR "Failed to obtain address for %s\n",
+ np->full_name);
+ return;
+ }
+
+ for (i = 0; i < nr_ioapics; i++) {
+ if (r.start == mp_ioapics[i].apicaddr) {
+ struct irq_domain *id;
+
+ mp_of_ioapic[i].node = np;
+ id = kzalloc(sizeof(*id), GFP_KERNEL);
+ BUG_ON(!id);
+ id->controller = np;
+ id->xlate = ioapic_xlate;
+ id->priv = (void *)i;
+ add_interrupt_host(id);
+ return;
+ }
+ }
+ printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name);
+}
+#endif
+
/* Enable IOAPIC early just for system timer */
void __init pre_init_apic_IRQ0(void)
{
diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
index 4cadf86..9f76f89 100644
--- a/arch/x86/kernel/irqinit.c
+++ b/arch/x86/kernel/irqinit.c
@@ -119,6 +119,12 @@ void __init init_IRQ(void)
int i;
/*
+ * We probably need a better place for this, but it works for
+ * now ...
+ */
+ x86_add_irq_domains();
+
+ /*
* On cpu 0, Assign IRQ0_VECTOR..IRQ15_VECTOR's to IRQ 0..15.
* If these IRQ's are handled by legacy interrupt-controllers like PIC,
* then this configuration will likely be static after the boot. If
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
index 8215e8a..83ab00a 100644
--- a/arch/x86/kernel/prom.c
+++ b/arch/x86/kernel/prom.c
@@ -11,9 +11,11 @@
#include <linux/slab.h>
#include <linux/pci.h>
#include <linux/of_pci.h>
+#include <linux/of_fdt.h>
#include <asm/hpet.h>
#include <asm/irq_controller.h>
+#include <asm/apic.h>
#include <asm/io_apic.h>
#include <asm/pci_x86.h>
@@ -320,3 +322,16 @@ void __init x86_dtb_get_config(unsigned int unused)
dtb_setup_hpet();
dtb_apic_setup();
}
+
+void __init x86_add_irq_domains(void)
+{
+ struct device_node *dp;
+
+ if (!initial_boot_params)
+ return;
+
+ for_each_node_with_property(dp, "interrupt-controller") {
+ if (of_device_is_compatible(dp, "intel,ioapic"))
+ ioapic_add_ofnode(dp);
+ }
+}
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 11/14] x86/ce4100: use OF for ioapic
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel
Cc: sodaville, x86, devicetree-discuss, Sebastian Andrzej Siewior,
Dirk Brandewie
and hpet and a few others things....
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
---
arch/x86/platform/ce4100/ce4100.c | 24 +++++++++++++++++-------
1 files changed, 17 insertions(+), 7 deletions(-)
diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c
index d2c0d51..7877453 100644
--- a/arch/x86/platform/ce4100/ce4100.c
+++ b/arch/x86/platform/ce4100/ce4100.c
@@ -15,21 +15,19 @@
#include <linux/serial_reg.h>
#include <linux/serial_8250.h>
+#include <asm/prom.h>
#include <asm/setup.h>
+#include <asm/i8259.h>
#include <asm/io.h>
+#include <asm/io_apic.h>
static int ce4100_i8042_detect(void)
{
return 0;
}
-static void __init sdv_find_smp_config(void)
-{
-}
-
#ifdef CONFIG_SERIAL_8250
-
static unsigned int mem_serial_in(struct uart_port *p, int offset)
{
offset = offset << p->regshift;
@@ -118,6 +116,13 @@ static void __init sdv_arch_setup(void)
sdv_serial_fixup();
}
+static void __cpuinit sdv_pci_init(void)
+{
+ x86_of_pci_init();
+ /* We can't set this earlier, because we need calibrate the timer */
+ legacy_pic = &null_legacy_pic;
+}
+
/*
* CE4100 specific x86_init function overrides and early setup
* calls.
@@ -127,6 +132,11 @@ void __init x86_ce4100_early_setup(void)
x86_init.oem.arch_setup = sdv_arch_setup;
x86_platform.i8042_detect = ce4100_i8042_detect;
x86_init.resources.probe_roms = x86_init_noop;
- x86_init.mpparse.get_smp_config = x86_init_uint_noop;
- x86_init.mpparse.find_smp_config = sdv_find_smp_config;
+ x86_init.mpparse.get_smp_config = x86_dtb_get_config;
+ x86_init.mpparse.find_smp_config = x86_dtb_find_config;
+
+#ifdef CONFIG_X86_IO_APIC
+ x86_init.pci.init_irq = sdv_pci_init;
+ x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck;
+#endif
}
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 11/14] x86/ce4100: use OF for ioapic
@ 2011-01-24 4:28 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:28 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, Sebastian Andrzej Siewior
and hpet and a few others things....
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Acked-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
---
arch/x86/platform/ce4100/ce4100.c | 24 +++++++++++++++++-------
1 files changed, 17 insertions(+), 7 deletions(-)
diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c
index d2c0d51..7877453 100644
--- a/arch/x86/platform/ce4100/ce4100.c
+++ b/arch/x86/platform/ce4100/ce4100.c
@@ -15,21 +15,19 @@
#include <linux/serial_reg.h>
#include <linux/serial_8250.h>
+#include <asm/prom.h>
#include <asm/setup.h>
+#include <asm/i8259.h>
#include <asm/io.h>
+#include <asm/io_apic.h>
static int ce4100_i8042_detect(void)
{
return 0;
}
-static void __init sdv_find_smp_config(void)
-{
-}
-
#ifdef CONFIG_SERIAL_8250
-
static unsigned int mem_serial_in(struct uart_port *p, int offset)
{
offset = offset << p->regshift;
@@ -118,6 +116,13 @@ static void __init sdv_arch_setup(void)
sdv_serial_fixup();
}
+static void __cpuinit sdv_pci_init(void)
+{
+ x86_of_pci_init();
+ /* We can't set this earlier, because we need calibrate the timer */
+ legacy_pic = &null_legacy_pic;
+}
+
/*
* CE4100 specific x86_init function overrides and early setup
* calls.
@@ -127,6 +132,11 @@ void __init x86_ce4100_early_setup(void)
x86_init.oem.arch_setup = sdv_arch_setup;
x86_platform.i8042_detect = ce4100_i8042_detect;
x86_init.resources.probe_roms = x86_init_noop;
- x86_init.mpparse.get_smp_config = x86_init_uint_noop;
- x86_init.mpparse.find_smp_config = sdv_find_smp_config;
+ x86_init.mpparse.get_smp_config = x86_dtb_get_config;
+ x86_init.mpparse.find_smp_config = x86_dtb_find_config;
+
+#ifdef CONFIG_X86_IO_APIC
+ x86_init.pci.init_irq = sdv_pci_init;
+ x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck;
+#endif
}
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH OF 12/14] x86/rtc: don't register rtc if we the DT blob
@ 2011-01-24 4:29 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:29 UTC (permalink / raw)
To: linux-kernel
Cc: sodaville, x86, devicetree-discuss, Sebastian Andrzej Siewior,
Andres Salomon
or we might end up with two device nodes for the same hardware.
Cc: Andres Salomon <dilinger@queued.net>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
---
arch/x86/kernel/rtc.c | 3 +++
include/linux/of.h | 12 ++++++++++++
2 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index 6f39cab..3f2ad26 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -6,6 +6,7 @@
#include <linux/acpi.h>
#include <linux/bcd.h>
#include <linux/pnp.h>
+#include <linux/of.h>
#include <asm/vsyscall.h>
#include <asm/x86_init.h>
@@ -236,6 +237,8 @@ static __init int add_rtc_cmos(void)
}
}
#endif
+ if (of_have_populated_dt())
+ return 0;
platform_device_register(&rtc_device);
dev_info(&rtc_device.dev,
diff --git a/include/linux/of.h b/include/linux/of.h
index cad7cf0..016968d 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -70,6 +70,11 @@ extern struct device_node *allnodes;
extern struct device_node *of_chosen;
extern rwlock_t devtree_lock;
+static inline int of_have_populated_dt(void)
+{
+ return allnodes != NULL;
+}
+
static inline bool of_node_is_root(const struct device_node *node)
{
return node && (node->parent == NULL);
@@ -222,5 +227,12 @@ extern void of_attach_node(struct device_node *);
extern void of_detach_node(struct device_node *);
#endif
+#else
+
+static inline int of_have_populated_dt(void)
+{
+ return 0;
+}
+
#endif /* CONFIG_OF */
#endif /* _LINUX_OF_H */
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH OF 12/14] x86/rtc: don't register rtc if we the DT blob
@ 2011-01-24 4:29 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:29 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, Sebastian Andrzej Siewior,
Andres Salomon
or we might end up with two device nodes for the same hardware.
Cc: Andres Salomon <dilinger-pFFUokh25LWsTnJN9+BGXg@public.gmane.org>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
---
arch/x86/kernel/rtc.c | 3 +++
include/linux/of.h | 12 ++++++++++++
2 files changed, 15 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index 6f39cab..3f2ad26 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -6,6 +6,7 @@
#include <linux/acpi.h>
#include <linux/bcd.h>
#include <linux/pnp.h>
+#include <linux/of.h>
#include <asm/vsyscall.h>
#include <asm/x86_init.h>
@@ -236,6 +237,8 @@ static __init int add_rtc_cmos(void)
}
}
#endif
+ if (of_have_populated_dt())
+ return 0;
platform_device_register(&rtc_device);
dev_info(&rtc_device.dev,
diff --git a/include/linux/of.h b/include/linux/of.h
index cad7cf0..016968d 100644
--- a/include/linux/of.h
+++ b/include/linux/of.h
@@ -70,6 +70,11 @@ extern struct device_node *allnodes;
extern struct device_node *of_chosen;
extern rwlock_t devtree_lock;
+static inline int of_have_populated_dt(void)
+{
+ return allnodes != NULL;
+}
+
static inline bool of_node_is_root(const struct device_node *node)
{
return node && (node->parent == NULL);
@@ -222,5 +227,12 @@ extern void of_attach_node(struct device_node *);
extern void of_detach_node(struct device_node *);
#endif
+#else
+
+static inline int of_have_populated_dt(void)
+{
+ return 0;
+}
+
#endif /* CONFIG_OF */
#endif /* _LINUX_OF_H */
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH OF 13/14] rtc/cmos: add OF bindings
@ 2011-01-24 4:29 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:29 UTC (permalink / raw)
To: linux-kernel
Cc: sodaville, x86, devicetree-discuss, Sebastian Andrzej Siewior,
rtc-linux, Alessandro Zummo, Dirk Brandewie
This allows to load the OF driver based informations from the device
tree. Systems without BIOS may need to perform some initialization.
PowerPC creates a PNP device from the OF information and performs this
kind of initialization in their private PCI quirk. This looks more
generic.
Cc: rtc-linux@googlegroups.com
Cc: Alessandro Zummo <a.zummo@towertech.it>
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
---
Documentation/powerpc/dts-bindings/rtc-cmos.txt | 28 ++++++++++++++
drivers/rtc/rtc-cmos.c | 46 +++++++++++++++++++++++
2 files changed, 74 insertions(+), 0 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/rtc-cmos.txt
diff --git a/Documentation/powerpc/dts-bindings/rtc-cmos.txt b/Documentation/powerpc/dts-bindings/rtc-cmos.txt
new file mode 100644
index 0000000..7382989
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/rtc-cmos.txt
@@ -0,0 +1,28 @@
+ Motorola mc146818 compatible RTC
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Required properties:
+ - compatible : "motorola,mc146818"
+ - reg : should contain registers location and length.
+
+Optional properties:
+ - interrupts : should contain interrupt.
+ - interrupt-parent : interrupt source phandle.
+ - ctrl-reg : Contains the initial value of the control register also
+ called "Register B".
+ - freq-reg : Contains the initial value of the frequency register also
+ called "Regsiter A".
+
+"Register A" and "B" are usually initialized by the firmware (BIOS for
+instance). If this is not done, it can be performed by the driver.
+
+ISA Example:
+
+ rtc@70 {
+ compatible = "motorola,mc146818";
+ interrupts = <8 3>;
+ interrupt-parent = <&ioapic1>;
+ ctrl-reg = <2>;
+ freq-reg = <0x26>;
+ reg = <1 0x70 2>;
+ };
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index c7ff8df..2709e00 100644
--- a/drivers/rtc/rtc-cmos.c
+++ b/drivers/rtc/rtc-cmos.c
@@ -37,6 +37,8 @@
#include <linux/mod_devicetable.h>
#include <linux/log2.h>
#include <linux/pm.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
#include <asm-generic/rtc.h>
@@ -1123,6 +1125,46 @@ static struct pnp_driver cmos_pnp_driver = {
#endif /* CONFIG_PNP */
+#ifdef CONFIG_OF
+static const struct of_device_id of_cmos_match[] = {
+ {
+ .compatible = "motorola,mc146818",
+ },
+ { },
+};
+MODULE_DEVICE_TABLE(of, of_cmos_match);
+
+static __init void cmos_of_init(struct platform_device *pdev)
+{
+ struct device_node *node = pdev->dev.of_node;
+ struct rtc_time time;
+ int ret;
+ const __be32 *val;
+
+ if (!node)
+ return;
+
+ val = of_get_property(node, "ctrl-reg", NULL);
+ if (val)
+ CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
+
+ val = of_get_property(node, "freq-reg", NULL);
+ if (val)
+ CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
+
+ get_rtc_time(&time);
+ ret = rtc_valid_tm(&time);
+ if (ret) {
+ struct rtc_time def_time = {
+ .tm_year = 1,
+ .tm_mday = 1,
+ };
+ set_rtc_time(&def_time);
+ }
+}
+#else
+static inline void cmos_of_init(struct platform_device *pdev) {}
+#endif
/*----------------------------------------------------------------*/
/* Platform setup should have set up an RTC device, when PNP is
@@ -1131,6 +1173,7 @@ static struct pnp_driver cmos_pnp_driver = {
static int __init cmos_platform_probe(struct platform_device *pdev)
{
+ cmos_of_init(pdev);
cmos_wake_setup(&pdev->dev);
return cmos_do_probe(&pdev->dev,
platform_get_resource(pdev, IORESOURCE_IO, 0),
@@ -1162,6 +1205,9 @@ static struct platform_driver cmos_platform_driver = {
#ifdef CONFIG_PM
.pm = &cmos_pm_ops,
#endif
+#if defined(CONFIG_OF)
+ .of_match_table = of_cmos_match,
+#endif
}
};
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH OF 13/14] rtc/cmos: add OF bindings
@ 2011-01-24 4:29 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:29 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: Alessandro Zummo, rtc-linux-/JYPxA39Uh5TLH3MbocFFw,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, sodaville-hfZtesqFncYOwBW4kG4KsQ,
Sebastian Andrzej Siewior
This allows to load the OF driver based informations from the device
tree. Systems without BIOS may need to perform some initialization.
PowerPC creates a PNP device from the OF information and performs this
kind of initialization in their private PCI quirk. This looks more
generic.
Cc: rtc-linux-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
Cc: Alessandro Zummo <a.zummo-BfzFCNDTiLLj+vYz1yj4TQ@public.gmane.org>
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
Documentation/powerpc/dts-bindings/rtc-cmos.txt | 28 ++++++++++++++
drivers/rtc/rtc-cmos.c | 46 +++++++++++++++++++++++
2 files changed, 74 insertions(+), 0 deletions(-)
create mode 100644 Documentation/powerpc/dts-bindings/rtc-cmos.txt
diff --git a/Documentation/powerpc/dts-bindings/rtc-cmos.txt b/Documentation/powerpc/dts-bindings/rtc-cmos.txt
new file mode 100644
index 0000000..7382989
--- /dev/null
+++ b/Documentation/powerpc/dts-bindings/rtc-cmos.txt
@@ -0,0 +1,28 @@
+ Motorola mc146818 compatible RTC
+~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
+
+Required properties:
+ - compatible : "motorola,mc146818"
+ - reg : should contain registers location and length.
+
+Optional properties:
+ - interrupts : should contain interrupt.
+ - interrupt-parent : interrupt source phandle.
+ - ctrl-reg : Contains the initial value of the control register also
+ called "Register B".
+ - freq-reg : Contains the initial value of the frequency register also
+ called "Regsiter A".
+
+"Register A" and "B" are usually initialized by the firmware (BIOS for
+instance). If this is not done, it can be performed by the driver.
+
+ISA Example:
+
+ rtc@70 {
+ compatible = "motorola,mc146818";
+ interrupts = <8 3>;
+ interrupt-parent = <&ioapic1>;
+ ctrl-reg = <2>;
+ freq-reg = <0x26>;
+ reg = <1 0x70 2>;
+ };
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
index c7ff8df..2709e00 100644
--- a/drivers/rtc/rtc-cmos.c
+++ b/drivers/rtc/rtc-cmos.c
@@ -37,6 +37,8 @@
#include <linux/mod_devicetable.h>
#include <linux/log2.h>
#include <linux/pm.h>
+#include <linux/of.h>
+#include <linux/of_platform.h>
/* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
#include <asm-generic/rtc.h>
@@ -1123,6 +1125,46 @@ static struct pnp_driver cmos_pnp_driver = {
#endif /* CONFIG_PNP */
+#ifdef CONFIG_OF
+static const struct of_device_id of_cmos_match[] = {
+ {
+ .compatible = "motorola,mc146818",
+ },
+ { },
+};
+MODULE_DEVICE_TABLE(of, of_cmos_match);
+
+static __init void cmos_of_init(struct platform_device *pdev)
+{
+ struct device_node *node = pdev->dev.of_node;
+ struct rtc_time time;
+ int ret;
+ const __be32 *val;
+
+ if (!node)
+ return;
+
+ val = of_get_property(node, "ctrl-reg", NULL);
+ if (val)
+ CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
+
+ val = of_get_property(node, "freq-reg", NULL);
+ if (val)
+ CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
+
+ get_rtc_time(&time);
+ ret = rtc_valid_tm(&time);
+ if (ret) {
+ struct rtc_time def_time = {
+ .tm_year = 1,
+ .tm_mday = 1,
+ };
+ set_rtc_time(&def_time);
+ }
+}
+#else
+static inline void cmos_of_init(struct platform_device *pdev) {}
+#endif
/*----------------------------------------------------------------*/
/* Platform setup should have set up an RTC device, when PNP is
@@ -1131,6 +1173,7 @@ static struct pnp_driver cmos_pnp_driver = {
static int __init cmos_platform_probe(struct platform_device *pdev)
{
+ cmos_of_init(pdev);
cmos_wake_setup(&pdev->dev);
return cmos_do_probe(&pdev->dev,
platform_get_resource(pdev, IORESOURCE_IO, 0),
@@ -1162,6 +1205,9 @@ static struct platform_driver cmos_platform_driver = {
#ifdef CONFIG_PM
.pm = &cmos_pm_ops,
#endif
+#if defined(CONFIG_OF)
+ .of_match_table = of_cmos_match,
+#endif
}
};
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 14/14] x86/pci: remove warning
@ 2011-01-24 4:29 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:29 UTC (permalink / raw)
To: linux-kernel
Cc: sodaville, x86, devicetree-discuss, Sebastian Andrzej Siewior
|arch/x86/pci/ce4100.c: In function `ce4100_conf_read':
|arch/x86/pci/ce4100.c:257:9: warning: unused variable `retval'
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
---
arch/x86/pci/ce4100.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/x86/pci/ce4100.c b/arch/x86/pci/ce4100.c
index 85b68ef..c63c6d3 100644
--- a/arch/x86/pci/ce4100.c
+++ b/arch/x86/pci/ce4100.c
@@ -254,7 +254,7 @@ int bridge_read(unsigned int devfn, int reg, int len, u32 *value)
static int ce4100_conf_read(unsigned int seg, unsigned int bus,
unsigned int devfn, int reg, int len, u32 *value)
{
- int i, retval = 1;
+ int i;
if (bus == 1) {
for (i = 0; i < ARRAY_SIZE(bus1_fixups); i++) {
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP 14/14] x86/pci: remove warning
@ 2011-01-24 4:29 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:29 UTC (permalink / raw)
To: linux-kernel-u79uwXL29TY76Z2rM5mHXA
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, Sebastian Andrzej Siewior
|arch/x86/pci/ce4100.c: In function `ce4100_conf_read':
|arch/x86/pci/ce4100.c:257:9: warning: unused variable `retval'
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
---
arch/x86/pci/ce4100.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/arch/x86/pci/ce4100.c b/arch/x86/pci/ce4100.c
index 85b68ef..c63c6d3 100644
--- a/arch/x86/pci/ce4100.c
+++ b/arch/x86/pci/ce4100.c
@@ -254,7 +254,7 @@ int bridge_read(unsigned int devfn, int reg, int len, u32 *value)
static int ce4100_conf_read(unsigned int seg, unsigned int bus,
unsigned int devfn, int reg, int len, u32 *value)
{
- int i, retval = 1;
+ int i;
if (bus == 1) {
for (i = 0; i < ARRAY_SIZE(bus1_fixups); i++) {
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 02/14] x86: Add device tree support
@ 2011-01-24 4:34 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:34 UTC (permalink / raw)
To: dilinger; +Cc: linux-kernel, sodaville, x86, devicetree-discuss, Dirk Brandewie
* Sebastian Andrzej Siewior | 2011-01-24 09:58:50 [+0530]:
>This patch adds minimal support for device tree support on x86. It will
>be passed to the kernel via setup_data which requires atleast boot
>protocol 2.09.
>Memory size, restricted memory regions, boot arguments are gathered the
>traditional way so things like cmd_line are just here to let the code
>compile.
>The current plan is use the device tree as an extension and to gather
>informations from it which can not be enumerated and have to be
>hardcoded otherwise. This includes things like
>- which devices are on this I2C/ SPI bus?
>- how are the interrupts wired to IO APIC?
>- where could my hpet be?
>
Andres, this patch moves some of the OF defines you added for OLPC from
irq.c to prom.c which requires CONFIG_X86_OF to be enabled. A later
patch changes irq_create_of_mapping() from returning intspec[0] to
actually doing something. Could you please check how of OLPC gets broken
and what we could do about it? :)
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 02/14] x86: Add device tree support
@ 2011-01-24 4:34 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:34 UTC (permalink / raw)
To: dilinger-pFFUokh25LWsTnJN9+BGXg
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA
* Sebastian Andrzej Siewior | 2011-01-24 09:58:50 [+0530]:
>This patch adds minimal support for device tree support on x86. It will
>be passed to the kernel via setup_data which requires atleast boot
>protocol 2.09.
>Memory size, restricted memory regions, boot arguments are gathered the
>traditional way so things like cmd_line are just here to let the code
>compile.
>The current plan is use the device tree as an extension and to gather
>informations from it which can not be enumerated and have to be
>hardcoded otherwise. This includes things like
>- which devices are on this I2C/ SPI bus?
>- how are the interrupts wired to IO APIC?
>- where could my hpet be?
>
Andres, this patch moves some of the OF defines you added for OLPC from
irq.c to prom.c which requires CONFIG_X86_OF to be enabled. A later
patch changes irq_create_of_mapping() from returning intspec[0] to
actually doing something. Could you please check how of OLPC gets broken
and what we could do about it? :)
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH OF 13/14] rtc/cmos: add OF bindings
@ 2011-01-24 4:38 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:38 UTC (permalink / raw)
To: dilinger
Cc: linux-kernel, sodaville, x86, devicetree-discuss, rtc-linux,
Alessandro Zummo, Dirk Brandewie
* Sebastian Andrzej Siewior | 2011-01-24 09:59:01 [+0530]:
>diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
>index c7ff8df..2709e00 100644
>--- a/drivers/rtc/rtc-cmos.c
>+++ b/drivers/rtc/rtc-cmos.c
>@@ -1123,6 +1125,46 @@ static struct pnp_driver cmos_pnp_driver = {
>
> #endif /* CONFIG_PNP */
>
>+#ifdef CONFIG_OF
>+static const struct of_device_id of_cmos_match[] = {
>+ {
>+ .compatible = "motorola,mc146818",
>+ },
>+ { },
>+};
Andreas, this is the compatible string I'm using. Could you please tell
me what is OLPC using? So maybe we could stick to the same compatible
string.
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH OF 13/14] rtc/cmos: add OF bindings
@ 2011-01-24 4:38 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-24 4:38 UTC (permalink / raw)
To: dilinger-pFFUokh25LWsTnJN9+BGXg
Cc: Alessandro Zummo, rtc-linux-/JYPxA39Uh5TLH3MbocFFw,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
sodaville-hfZtesqFncYOwBW4kG4KsQ
* Sebastian Andrzej Siewior | 2011-01-24 09:59:01 [+0530]:
>diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
>index c7ff8df..2709e00 100644
>--- a/drivers/rtc/rtc-cmos.c
>+++ b/drivers/rtc/rtc-cmos.c
>@@ -1123,6 +1125,46 @@ static struct pnp_driver cmos_pnp_driver = {
>
> #endif /* CONFIG_PNP */
>
>+#ifdef CONFIG_OF
>+static const struct of_device_id of_cmos_match[] = {
>+ {
>+ .compatible = "motorola,mc146818",
>+ },
>+ { },
>+};
Andreas, this is the compatible string I'm using. Could you please tell
me what is OLPC using? So maybe we could stick to the same compatible
string.
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-01-27 5:00 ` David Gibson
0 siblings, 0 replies; 94+ messages in thread
From: David Gibson @ 2011-01-27 5:00 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: linux-kernel, sodaville, devicetree-discuss, x86
On Mon, Jan 24, 2011 at 09:58:51AM +0530, Sebastian Andrzej Siewior wrote:
> Cc: devicetree-discuss@lists.ozlabs.org
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
> ---
> arch/x86/platform/ce4100/falconfalls.dts | 228 ++++++++++++++++++++++++++++++
> 1 files changed, 228 insertions(+), 0 deletions(-)
> create mode 100644 arch/x86/platform/ce4100/falconfalls.dts
>
> diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts
> new file mode 100644
> index 0000000..c2df5c8
> --- /dev/null
> +++ b/arch/x86/platform/ce4100/falconfalls.dts
> @@ -0,0 +1,228 @@
> +/*
> + * CE4100 on Falcon Falls
> + *
> + * (c) Copyright 2010 Intel Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; version 2 of the License.
> + */
> +/dts-v1/;
> +/ {
> + model = "intel,falconfalls";
> + compatible = "intel,falconfalls";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "intel,ce4100";
> + reg = <0>;
> + lapic = <&lapic0>;
> + };
> + };
> +
> + soc@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "intel,ce4100-immr";
> + ranges;
IMMR is probably not the name you want. I'm guessing you're taking
this by anology with the IMMR thingies in Freescale chips. However in
that case the name is coming from the IMMR register which can
physically relocate the batch of IOs represented by the node. You
should probably name it something appropriate to your chip instead.
> + ioapic1: pic@fec00000 {
The name should be "interrupt-controller" rather than pic.
> + #interrupt-cells = <2>;
> + compatible = "intel,ioapic-ce4100", "intel,ioapic";
> + interrupt-controller;
> + reg = <0xfec00000 0x1000>;
> + };
> +
> + timer@fed00000 {
> + compatible = "intel,hpet-ce4100", "intel,hpet";
> + reg = <0xfed00000 0x200>;
> + };
> +
> + lapic0: interrupt-controller@fee00000 {
> + compatible = "intel,lapic-ce4100", "intel,lapic";
> + reg = <0xfee00000 0x1000>;
> + };
> +
> + pci@3fc {
> + #address-cells = <3>;
> + #interrupt-cells = <1>;
> + #size-cells = <2>;
> + compatible = "intel,ce4100-pci", "pci";
> + device_type = "pci";
> + bus-range = <0 0>;
> + ranges = <0x2000000 0 0xbffff000 0xbffff000 0 0x1000
> + 0x2000000 0 0xdffe0000 0xdffe0000 0 0x1000
> + 0x0000000 0 0x0 0x0 0 0x100>;
> +
> + isa@0 {
> + #address-cells = <2>;
> + #size-cells = <1>;
> + compatible = "isa";
> + ranges = <1 0 0 0 0 0x100>;
> +
> + rtc@70 {
> + compatible = "intel,ce4100-rtc", "motorola,mc146818";
> + interrupts = <8 3>;
> + interrupt-parent = <&ioapic1>;
> + ctrl-reg = <2>;
> + freq-reg = <0x26>;
> + reg = <1 0x70 2>;
> + };
Is the rtc really wired directly to the ioapic without going through
the cascaded i8259 which usually inhabits isa busses?
> + };
> +
> + /* Secondary IO-APIC */
> + ioapic2: pic@bffff000 {
> + #interrupt-cells = <2>;
> + compatible = "intel,ioapic-ce4100", "intel,ioapic";
> + interrupt-controller;
> + reg = <0x100 0x0 0x0 0x0 0x0>;
> + assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
If this is a cascaded interrupt controller, then it should have an
interrupts and interrupt-parent property to point at the correct
cascade interrupt on the master ioapic.
> + };
> +
> + pci@av {
> + #address-cells = <3>;
> + #interrupt-cells = <1>;
> + #size-cells = <2>;
> + compatible = "intel,ce4100-pci";
> + device_type = "pci";
> + bus-range = <1 1>;
> + ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
> +
> + interrupt-map-mask = <0xffffff 0x0 0x0 0x0>;
> + interrupt-map = <
> + /* GFX: 0x2E5B */
> + 0x11000 0x0 0x0 0x0 &ioapic2 0 0x1
> + /* ***** FIXME ****** Compositing Engine: 0x2E72 */
> + /* 0x11100 0x0 0x0 0x1 &ioapic2 0 0x1 */
> + /* MFD: 0x2E5C */
> + 0x11800 0x0 0x0 0x0 &ioapic2 2 0x1
> + /* TS Prefilter: 0x2E5D */
> + 0x12000 0x0 0x0 0x0 &ioapic2 4 0x1
> + /* TS Demux: 0x2E5E */
> + 0x12100 0x0 0x0 0x0 &ioapic2 5 0x1
> + /* ***** FIXME ***** Audio DSP: 0x2E5F */
> + /* 0x13000 0x0 0x0 0x1 &ioapic2 0 0x1 */
> + /* Audio Interfaces: 0x2E60 */
> + 0x13200 0x0 0x0 0x0 &ioapic2 8 0x1
> + /* VDC: 0x2E61 */
> + 0x14000 0x0 0x0 0x0 &ioapic2 9 0x1
> + /* DPE: 0x2E62 */
> + 0x14100 0x0 0x0 0x0 &ioapic2 10 0x1
> + /* HDMI Tx: 0x2E63 */
> + 0x14200 0x0 0x0 0x0 &ioapic2 11 0x1
> + /* SEC: 0x2E64 */
> + 0x14800 0x0 0x0 0x0 &ioapic2 12 0x1
> + /* EXP: 0x2E65 */
> + 0x15000 0x0 0x0 0x0 &ioapic2 13 0x1
> + /* UART0/1: 0x2E66 */
> + 0x15800 0x0 0x0 0x0 &ioapic2 14 0x1
> + /* GPIO: 0x2E67 */
> + 0x15900 0x0 0x0 0x0 &ioapic2 15 0x1
> + /* I2C0/1/2: 0x2E68 */
> + 0x15a00 0x0 0x0 0x0 &ioapic2 16 0x1
> + /* Smart Card 0/1: 0x2E69 */
> + 0x15b00 0x0 0x0 0x0 &ioapic2 15 0x1
> + /* SPI: 0x2E6A */
> + 0x15c00 0x0 0x0 0x0 &ioapic2 15 0x1
> + /* MSPOD: 0x2E6B */
> + 0x15d00 0x0 0x0 0x0 &ioapic2 19 0x1
> + /* IR: 0x2E6C */
> + 0x15e00 0x0 0x0 0x0 &ioapic2 16 0x1
> + /* **** FIXME ***** DFX: 0x2E6D */
> + /* 0x15f00 0x0 0x0 0x1 &ioapic2 0x0 0x1 */
> + /* Gig Ethernet: 0x2E6E */
> + 0x16000 0x0 0x0 0x0 &ioapic2 21 0x1
> + /* IEEE1588 and Clock Recovery Unit: 0x2E6F */
> + 0x16100 0x0 0x0 0x0 &ioapic2 3 0x1
> + /* USB0: 0x2E70 */
> + 0x16800 0x0 0x0 0x0 &ioapic2 22 0x3
> + /* USB1: 0x2E70 */
> + 0x16900 0x0 0x0 0x0 &ioapic2 22 0x3
> + /* SATA: 0x2E71 */
> + 0x17000 0x0 0x0 0x0 &ioapic2 23 0x3
Are all these interrupt map entries representing on-board PCI devices
that have their interrupts wired direct to the APIC, instead of via
the PCI INTA..D lines? If so, it might be better to create device
nodes for those devices with interrupts and interrupt-parent
properties giving their interrupt routing, leaving the PCI bus's
interrupt-map to describe only the routing for slotted PCI devices
with their INTA..D wired with the rest of the PCI lines.
> + >;
> +
> + i2c-controller@15a00,0,0 {
Uh.. that unit address does not look right. The encoding of PCI
3-cell addresses into a unit address string is not simply comma
separated cells. I forget the details, so you'll need to check the OF
PCI binding.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-01-27 5:00 ` David Gibson
0 siblings, 0 replies; 94+ messages in thread
From: David Gibson @ 2011-01-27 5:00 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA
On Mon, Jan 24, 2011 at 09:58:51AM +0530, Sebastian Andrzej Siewior wrote:
> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
> Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> arch/x86/platform/ce4100/falconfalls.dts | 228 ++++++++++++++++++++++++++++++
> 1 files changed, 228 insertions(+), 0 deletions(-)
> create mode 100644 arch/x86/platform/ce4100/falconfalls.dts
>
> diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts
> new file mode 100644
> index 0000000..c2df5c8
> --- /dev/null
> +++ b/arch/x86/platform/ce4100/falconfalls.dts
> @@ -0,0 +1,228 @@
> +/*
> + * CE4100 on Falcon Falls
> + *
> + * (c) Copyright 2010 Intel Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; version 2 of the License.
> + */
> +/dts-v1/;
> +/ {
> + model = "intel,falconfalls";
> + compatible = "intel,falconfalls";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "intel,ce4100";
> + reg = <0>;
> + lapic = <&lapic0>;
> + };
> + };
> +
> + soc@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "intel,ce4100-immr";
> + ranges;
IMMR is probably not the name you want. I'm guessing you're taking
this by anology with the IMMR thingies in Freescale chips. However in
that case the name is coming from the IMMR register which can
physically relocate the batch of IOs represented by the node. You
should probably name it something appropriate to your chip instead.
> + ioapic1: pic@fec00000 {
The name should be "interrupt-controller" rather than pic.
> + #interrupt-cells = <2>;
> + compatible = "intel,ioapic-ce4100", "intel,ioapic";
> + interrupt-controller;
> + reg = <0xfec00000 0x1000>;
> + };
> +
> + timer@fed00000 {
> + compatible = "intel,hpet-ce4100", "intel,hpet";
> + reg = <0xfed00000 0x200>;
> + };
> +
> + lapic0: interrupt-controller@fee00000 {
> + compatible = "intel,lapic-ce4100", "intel,lapic";
> + reg = <0xfee00000 0x1000>;
> + };
> +
> + pci@3fc {
> + #address-cells = <3>;
> + #interrupt-cells = <1>;
> + #size-cells = <2>;
> + compatible = "intel,ce4100-pci", "pci";
> + device_type = "pci";
> + bus-range = <0 0>;
> + ranges = <0x2000000 0 0xbffff000 0xbffff000 0 0x1000
> + 0x2000000 0 0xdffe0000 0xdffe0000 0 0x1000
> + 0x0000000 0 0x0 0x0 0 0x100>;
> +
> + isa@0 {
> + #address-cells = <2>;
> + #size-cells = <1>;
> + compatible = "isa";
> + ranges = <1 0 0 0 0 0x100>;
> +
> + rtc@70 {
> + compatible = "intel,ce4100-rtc", "motorola,mc146818";
> + interrupts = <8 3>;
> + interrupt-parent = <&ioapic1>;
> + ctrl-reg = <2>;
> + freq-reg = <0x26>;
> + reg = <1 0x70 2>;
> + };
Is the rtc really wired directly to the ioapic without going through
the cascaded i8259 which usually inhabits isa busses?
> + };
> +
> + /* Secondary IO-APIC */
> + ioapic2: pic@bffff000 {
> + #interrupt-cells = <2>;
> + compatible = "intel,ioapic-ce4100", "intel,ioapic";
> + interrupt-controller;
> + reg = <0x100 0x0 0x0 0x0 0x0>;
> + assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
If this is a cascaded interrupt controller, then it should have an
interrupts and interrupt-parent property to point at the correct
cascade interrupt on the master ioapic.
> + };
> +
> + pci@av {
> + #address-cells = <3>;
> + #interrupt-cells = <1>;
> + #size-cells = <2>;
> + compatible = "intel,ce4100-pci";
> + device_type = "pci";
> + bus-range = <1 1>;
> + ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
> +
> + interrupt-map-mask = <0xffffff 0x0 0x0 0x0>;
> + interrupt-map = <
> + /* GFX: 0x2E5B */
> + 0x11000 0x0 0x0 0x0 &ioapic2 0 0x1
> + /* ***** FIXME ****** Compositing Engine: 0x2E72 */
> + /* 0x11100 0x0 0x0 0x1 &ioapic2 0 0x1 */
> + /* MFD: 0x2E5C */
> + 0x11800 0x0 0x0 0x0 &ioapic2 2 0x1
> + /* TS Prefilter: 0x2E5D */
> + 0x12000 0x0 0x0 0x0 &ioapic2 4 0x1
> + /* TS Demux: 0x2E5E */
> + 0x12100 0x0 0x0 0x0 &ioapic2 5 0x1
> + /* ***** FIXME ***** Audio DSP: 0x2E5F */
> + /* 0x13000 0x0 0x0 0x1 &ioapic2 0 0x1 */
> + /* Audio Interfaces: 0x2E60 */
> + 0x13200 0x0 0x0 0x0 &ioapic2 8 0x1
> + /* VDC: 0x2E61 */
> + 0x14000 0x0 0x0 0x0 &ioapic2 9 0x1
> + /* DPE: 0x2E62 */
> + 0x14100 0x0 0x0 0x0 &ioapic2 10 0x1
> + /* HDMI Tx: 0x2E63 */
> + 0x14200 0x0 0x0 0x0 &ioapic2 11 0x1
> + /* SEC: 0x2E64 */
> + 0x14800 0x0 0x0 0x0 &ioapic2 12 0x1
> + /* EXP: 0x2E65 */
> + 0x15000 0x0 0x0 0x0 &ioapic2 13 0x1
> + /* UART0/1: 0x2E66 */
> + 0x15800 0x0 0x0 0x0 &ioapic2 14 0x1
> + /* GPIO: 0x2E67 */
> + 0x15900 0x0 0x0 0x0 &ioapic2 15 0x1
> + /* I2C0/1/2: 0x2E68 */
> + 0x15a00 0x0 0x0 0x0 &ioapic2 16 0x1
> + /* Smart Card 0/1: 0x2E69 */
> + 0x15b00 0x0 0x0 0x0 &ioapic2 15 0x1
> + /* SPI: 0x2E6A */
> + 0x15c00 0x0 0x0 0x0 &ioapic2 15 0x1
> + /* MSPOD: 0x2E6B */
> + 0x15d00 0x0 0x0 0x0 &ioapic2 19 0x1
> + /* IR: 0x2E6C */
> + 0x15e00 0x0 0x0 0x0 &ioapic2 16 0x1
> + /* **** FIXME ***** DFX: 0x2E6D */
> + /* 0x15f00 0x0 0x0 0x1 &ioapic2 0x0 0x1 */
> + /* Gig Ethernet: 0x2E6E */
> + 0x16000 0x0 0x0 0x0 &ioapic2 21 0x1
> + /* IEEE1588 and Clock Recovery Unit: 0x2E6F */
> + 0x16100 0x0 0x0 0x0 &ioapic2 3 0x1
> + /* USB0: 0x2E70 */
> + 0x16800 0x0 0x0 0x0 &ioapic2 22 0x3
> + /* USB1: 0x2E70 */
> + 0x16900 0x0 0x0 0x0 &ioapic2 22 0x3
> + /* SATA: 0x2E71 */
> + 0x17000 0x0 0x0 0x0 &ioapic2 23 0x3
Are all these interrupt map entries representing on-board PCI devices
that have their interrupts wired direct to the APIC, instead of via
the PCI INTA..D lines? If so, it might be better to create device
nodes for those devices with interrupts and interrupt-parent
properties giving their interrupt routing, leaving the PCI bus's
interrupt-map to describe only the routing for slotted PCI devices
with their INTA..D wired with the rest of the PCI lines.
> + >;
> +
> + i2c-controller@15a00,0,0 {
Uh.. that unit address does not look right. The encoding of PCI
3-cell addresses into a unit address string is not simply comma
separated cells. I forget the details, so you'll need to check the OF
PCI binding.
--
David Gibson | I'll have my music baroque, and my code
david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 03/14] x86/dtb: Add a device tree for CE4100
2011-01-27 5:00 ` David Gibson
@ 2011-01-27 9:11 ` Sebastian Andrzej Siewior
-1 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-27 9:11 UTC (permalink / raw)
To: David Gibson, Sebastian Andrzej Siewior, linux-kernel, sodaville,
devicetree-discuss, x86
* David Gibson | 2011-01-27 15:00:27 [+1000]:
>> + soc@0 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "intel,ce4100-immr";
>> + ranges;
>
>IMMR is probably not the name you want. I'm guessing you're taking
>this by anology with the IMMR thingies in Freescale chips. However in
>that case the name is coming from the IMMR register which can
>physically relocate the batch of IOs represented by the node. You
>should probably name it something appropriate to your chip instead.
I though IMMR stands for "internel memory mapped regisgters". The spec
does not say anything about a name. In fact there are just devices
popping up. Some of them are part of a group but lapic or the primary
ioapic are just there.
Let me look, maybe I find something more appropriate. Would -soc be
better?
>
>> + ioapic1: pic@fec00000 {
>
>The name should be "interrupt-controller" rather than pic.
okay.
>> +
>> + isa@0 {
>> + #address-cells = <2>;
>> + #size-cells = <1>;
>> + compatible = "isa";
>> + ranges = <1 0 0 0 0 0x100>;
>> +
>> + rtc@70 {
>> + compatible = "intel,ce4100-rtc", "motorola,mc146818";
>> + interrupts = <8 3>;
>> + interrupt-parent = <&ioapic1>;
>> + ctrl-reg = <2>;
>> + freq-reg = <0x26>;
>> + reg = <1 0x70 2>;
>> + };
>
>Is the rtc really wired directly to the ioapic without going through
>the cascaded i8259 which usually inhabits isa busses?
I don't see it anywhere in the spec describing like that but that is the
way it behaves. In the non-apic mode it goes through the cascaded i8259.
Once we are in apic mode, the i8259 is switched off and the rtc's
interrupt apears on ioapic. If the entry for pin 8 on ioapic is not
configured, then the interrupt does not appear.
The spec says that the rtc is part of the legacy cluster which contains
all the "legacy" devices like i8259 or rtc. The uart for instance is not
part of it. This legacy cluster is behind PCI, behind the isa bridge.
And I belive this device is also in-core.
>> + };
>> +
>> + /* Secondary IO-APIC */
>> + ioapic2: pic@bffff000 {
>> + #interrupt-cells = <2>;
>> + compatible = "intel,ioapic-ce4100", "intel,ioapic";
>> + interrupt-controller;
>> + reg = <0x100 0x0 0x0 0x0 0x0>;
>> + assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
>
>If this is a cascaded interrupt controller, then it should have an
>interrupts and interrupt-parent property to point at the correct
>cascade interrupt on the master ioapic.
No, it is not cascaded. It is the second ioapic (interrupt controller).
This ioapic communicates via the apic bus with the lapic in order to
generate an interrupt. The primary ioapic is not involved.
>
>> + };
>> +
>> + pci@av {
>> + #address-cells = <3>;
>> + #interrupt-cells = <1>;
>> + #size-cells = <2>;
>> + compatible = "intel,ce4100-pci";
>> + device_type = "pci";
>> + bus-range = <1 1>;
>> + ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
>> +
>> + interrupt-map-mask = <0xffffff 0x0 0x0 0x0>;
>> + interrupt-map = <
>> + /* GFX: 0x2E5B */
>> + 0x11000 0x0 0x0 0x0 &ioapic2 0 0x1
>> + /* ***** FIXME ****** Compositing Engine: 0x2E72 */
>> + /* 0x11100 0x0 0x0 0x1 &ioapic2 0 0x1 */
>> + /* MFD: 0x2E5C */
>> + 0x11800 0x0 0x0 0x0 &ioapic2 2 0x1
>> + /* TS Prefilter: 0x2E5D */
>> + 0x12000 0x0 0x0 0x0 &ioapic2 4 0x1
>> + /* TS Demux: 0x2E5E */
>> + 0x12100 0x0 0x0 0x0 &ioapic2 5 0x1
>> + /* ***** FIXME ***** Audio DSP: 0x2E5F */
>> + /* 0x13000 0x0 0x0 0x1 &ioapic2 0 0x1 */
>> + /* Audio Interfaces: 0x2E60 */
>> + 0x13200 0x0 0x0 0x0 &ioapic2 8 0x1
>> + /* VDC: 0x2E61 */
>> + 0x14000 0x0 0x0 0x0 &ioapic2 9 0x1
>> + /* DPE: 0x2E62 */
>> + 0x14100 0x0 0x0 0x0 &ioapic2 10 0x1
>> + /* HDMI Tx: 0x2E63 */
>> + 0x14200 0x0 0x0 0x0 &ioapic2 11 0x1
>> + /* SEC: 0x2E64 */
>> + 0x14800 0x0 0x0 0x0 &ioapic2 12 0x1
>> + /* EXP: 0x2E65 */
>> + 0x15000 0x0 0x0 0x0 &ioapic2 13 0x1
>> + /* UART0/1: 0x2E66 */
>> + 0x15800 0x0 0x0 0x0 &ioapic2 14 0x1
>> + /* GPIO: 0x2E67 */
>> + 0x15900 0x0 0x0 0x0 &ioapic2 15 0x1
>> + /* I2C0/1/2: 0x2E68 */
>> + 0x15a00 0x0 0x0 0x0 &ioapic2 16 0x1
>> + /* Smart Card 0/1: 0x2E69 */
>> + 0x15b00 0x0 0x0 0x0 &ioapic2 15 0x1
>> + /* SPI: 0x2E6A */
>> + 0x15c00 0x0 0x0 0x0 &ioapic2 15 0x1
>> + /* MSPOD: 0x2E6B */
>> + 0x15d00 0x0 0x0 0x0 &ioapic2 19 0x1
>> + /* IR: 0x2E6C */
>> + 0x15e00 0x0 0x0 0x0 &ioapic2 16 0x1
>> + /* **** FIXME ***** DFX: 0x2E6D */
>> + /* 0x15f00 0x0 0x0 0x1 &ioapic2 0x0 0x1 */
>> + /* Gig Ethernet: 0x2E6E */
>> + 0x16000 0x0 0x0 0x0 &ioapic2 21 0x1
>> + /* IEEE1588 and Clock Recovery Unit: 0x2E6F */
>> + 0x16100 0x0 0x0 0x0 &ioapic2 3 0x1
>> + /* USB0: 0x2E70 */
>> + 0x16800 0x0 0x0 0x0 &ioapic2 22 0x3
>> + /* USB1: 0x2E70 */
>> + 0x16900 0x0 0x0 0x0 &ioapic2 22 0x3
>> + /* SATA: 0x2E71 */
>> + 0x17000 0x0 0x0 0x0 &ioapic2 23 0x3
>
>Are all these interrupt map entries representing on-board PCI devices
>that have their interrupts wired direct to the APIC, instead of via
>the PCI INTA..D lines?
To some degree yes. There are three modes in which the system can
operate. The legacy mode where all devices end up sharing one interrupt
line, the multi mode which uses the interrupt pin (INTA..D) are used and
the inetrrupt is also routed to the legacy pic. In APIC mode (which is
used) each device is routed directly to the ioapic.
However, all of these devices are in-core, there is no external PCI bus
where you can plug in cards. This internal PCI bus looks more or less
like an emulated PCI bus.
>If so, it might be better to create device
>nodes for those devices with interrupts and interrupt-parent
>properties giving their interrupt routing, leaving the PCI bus's
>interrupt-map to describe only the routing for slotted PCI devices
>with their INTA..D wired with the rest of the PCI lines.
The INTA..D information is not part of the address and I hoped to get
away with this. There are no slotted pci devies.
So if I come up with nodes for the devices then I would need the reg
property and a compatible property.
>
>> + >;
>> +
>> + i2c-controller@15a00,0,0 {
>
>Uh.. that unit address does not look right. The encoding of PCI
>3-cell addresses into a unit address string is not simply comma
>separated cells. I forget the details, so you'll need to check the OF
>PCI binding.
Grant wrote [0]:
|You'll also note that I added ',0,0' to the end of the address.
|That's because the node address reflects the parent bus address format
|which uses 3 cells in this case.
I try to look that part up in the pci binding.
[0]
http://www.mail-archive.com/devicetree-discuss@lists.ozlabs.org/msg02806.html
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-01-27 9:11 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-01-27 9:11 UTC (permalink / raw)
To: David Gibson, Sebastian Andrzej Siewior,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlYrcfao8yub6A
* David Gibson | 2011-01-27 15:00:27 [+1000]:
>> + soc@0 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "intel,ce4100-immr";
>> + ranges;
>
>IMMR is probably not the name you want. I'm guessing you're taking
>this by anology with the IMMR thingies in Freescale chips. However in
>that case the name is coming from the IMMR register which can
>physically relocate the batch of IOs represented by the node. You
>should probably name it something appropriate to your chip instead.
I though IMMR stands for "internel memory mapped regisgters". The spec
does not say anything about a name. In fact there are just devices
popping up. Some of them are part of a group but lapic or the primary
ioapic are just there.
Let me look, maybe I find something more appropriate. Would -soc be
better?
>
>> + ioapic1: pic@fec00000 {
>
>The name should be "interrupt-controller" rather than pic.
okay.
>> +
>> + isa@0 {
>> + #address-cells = <2>;
>> + #size-cells = <1>;
>> + compatible = "isa";
>> + ranges = <1 0 0 0 0 0x100>;
>> +
>> + rtc@70 {
>> + compatible = "intel,ce4100-rtc", "motorola,mc146818";
>> + interrupts = <8 3>;
>> + interrupt-parent = <&ioapic1>;
>> + ctrl-reg = <2>;
>> + freq-reg = <0x26>;
>> + reg = <1 0x70 2>;
>> + };
>
>Is the rtc really wired directly to the ioapic without going through
>the cascaded i8259 which usually inhabits isa busses?
I don't see it anywhere in the spec describing like that but that is the
way it behaves. In the non-apic mode it goes through the cascaded i8259.
Once we are in apic mode, the i8259 is switched off and the rtc's
interrupt apears on ioapic. If the entry for pin 8 on ioapic is not
configured, then the interrupt does not appear.
The spec says that the rtc is part of the legacy cluster which contains
all the "legacy" devices like i8259 or rtc. The uart for instance is not
part of it. This legacy cluster is behind PCI, behind the isa bridge.
And I belive this device is also in-core.
>> + };
>> +
>> + /* Secondary IO-APIC */
>> + ioapic2: pic@bffff000 {
>> + #interrupt-cells = <2>;
>> + compatible = "intel,ioapic-ce4100", "intel,ioapic";
>> + interrupt-controller;
>> + reg = <0x100 0x0 0x0 0x0 0x0>;
>> + assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
>
>If this is a cascaded interrupt controller, then it should have an
>interrupts and interrupt-parent property to point at the correct
>cascade interrupt on the master ioapic.
No, it is not cascaded. It is the second ioapic (interrupt controller).
This ioapic communicates via the apic bus with the lapic in order to
generate an interrupt. The primary ioapic is not involved.
>
>> + };
>> +
>> + pci@av {
>> + #address-cells = <3>;
>> + #interrupt-cells = <1>;
>> + #size-cells = <2>;
>> + compatible = "intel,ce4100-pci";
>> + device_type = "pci";
>> + bus-range = <1 1>;
>> + ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
>> +
>> + interrupt-map-mask = <0xffffff 0x0 0x0 0x0>;
>> + interrupt-map = <
>> + /* GFX: 0x2E5B */
>> + 0x11000 0x0 0x0 0x0 &ioapic2 0 0x1
>> + /* ***** FIXME ****** Compositing Engine: 0x2E72 */
>> + /* 0x11100 0x0 0x0 0x1 &ioapic2 0 0x1 */
>> + /* MFD: 0x2E5C */
>> + 0x11800 0x0 0x0 0x0 &ioapic2 2 0x1
>> + /* TS Prefilter: 0x2E5D */
>> + 0x12000 0x0 0x0 0x0 &ioapic2 4 0x1
>> + /* TS Demux: 0x2E5E */
>> + 0x12100 0x0 0x0 0x0 &ioapic2 5 0x1
>> + /* ***** FIXME ***** Audio DSP: 0x2E5F */
>> + /* 0x13000 0x0 0x0 0x1 &ioapic2 0 0x1 */
>> + /* Audio Interfaces: 0x2E60 */
>> + 0x13200 0x0 0x0 0x0 &ioapic2 8 0x1
>> + /* VDC: 0x2E61 */
>> + 0x14000 0x0 0x0 0x0 &ioapic2 9 0x1
>> + /* DPE: 0x2E62 */
>> + 0x14100 0x0 0x0 0x0 &ioapic2 10 0x1
>> + /* HDMI Tx: 0x2E63 */
>> + 0x14200 0x0 0x0 0x0 &ioapic2 11 0x1
>> + /* SEC: 0x2E64 */
>> + 0x14800 0x0 0x0 0x0 &ioapic2 12 0x1
>> + /* EXP: 0x2E65 */
>> + 0x15000 0x0 0x0 0x0 &ioapic2 13 0x1
>> + /* UART0/1: 0x2E66 */
>> + 0x15800 0x0 0x0 0x0 &ioapic2 14 0x1
>> + /* GPIO: 0x2E67 */
>> + 0x15900 0x0 0x0 0x0 &ioapic2 15 0x1
>> + /* I2C0/1/2: 0x2E68 */
>> + 0x15a00 0x0 0x0 0x0 &ioapic2 16 0x1
>> + /* Smart Card 0/1: 0x2E69 */
>> + 0x15b00 0x0 0x0 0x0 &ioapic2 15 0x1
>> + /* SPI: 0x2E6A */
>> + 0x15c00 0x0 0x0 0x0 &ioapic2 15 0x1
>> + /* MSPOD: 0x2E6B */
>> + 0x15d00 0x0 0x0 0x0 &ioapic2 19 0x1
>> + /* IR: 0x2E6C */
>> + 0x15e00 0x0 0x0 0x0 &ioapic2 16 0x1
>> + /* **** FIXME ***** DFX: 0x2E6D */
>> + /* 0x15f00 0x0 0x0 0x1 &ioapic2 0x0 0x1 */
>> + /* Gig Ethernet: 0x2E6E */
>> + 0x16000 0x0 0x0 0x0 &ioapic2 21 0x1
>> + /* IEEE1588 and Clock Recovery Unit: 0x2E6F */
>> + 0x16100 0x0 0x0 0x0 &ioapic2 3 0x1
>> + /* USB0: 0x2E70 */
>> + 0x16800 0x0 0x0 0x0 &ioapic2 22 0x3
>> + /* USB1: 0x2E70 */
>> + 0x16900 0x0 0x0 0x0 &ioapic2 22 0x3
>> + /* SATA: 0x2E71 */
>> + 0x17000 0x0 0x0 0x0 &ioapic2 23 0x3
>
>Are all these interrupt map entries representing on-board PCI devices
>that have their interrupts wired direct to the APIC, instead of via
>the PCI INTA..D lines?
To some degree yes. There are three modes in which the system can
operate. The legacy mode where all devices end up sharing one interrupt
line, the multi mode which uses the interrupt pin (INTA..D) are used and
the inetrrupt is also routed to the legacy pic. In APIC mode (which is
used) each device is routed directly to the ioapic.
However, all of these devices are in-core, there is no external PCI bus
where you can plug in cards. This internal PCI bus looks more or less
like an emulated PCI bus.
>If so, it might be better to create device
>nodes for those devices with interrupts and interrupt-parent
>properties giving their interrupt routing, leaving the PCI bus's
>interrupt-map to describe only the routing for slotted PCI devices
>with their INTA..D wired with the rest of the PCI lines.
The INTA..D information is not part of the address and I hoped to get
away with this. There are no slotted pci devies.
So if I come up with nodes for the devices then I would need the reg
property and a compatible property.
>
>> + >;
>> +
>> + i2c-controller@15a00,0,0 {
>
>Uh.. that unit address does not look right. The encoding of PCI
>3-cell addresses into a unit address string is not simply comma
>separated cells. I forget the details, so you'll need to check the OF
>PCI binding.
Grant wrote [0]:
|You'll also note that I added ',0,0' to the end of the address.
|That's because the node address reflects the parent bus address format
|which uses 3 cells in this case.
I try to look that part up in the pci binding.
[0]
http://www.mail-archive.com/devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org/msg02806.html
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* [PATCH TIP v2 03/14] x86/dtb: Add a device tree for CE4100
2011-01-27 5:00 ` David Gibson
@ 2011-02-02 18:58 ` Sebastian Andrzej Siewior
-1 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-02 18:58 UTC (permalink / raw)
To: David Gibson, Sebastian Andrzej Siewior, linux-kernel, sodaville,
devicetree-discuss, x86
Cc: devicetree-discuss@lists.ozlabs.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
---
- intel,ce4100-immr become intel,ce4100-cp. cp stands for core
peripherals. The Atom data sheet talks here about ACPI devices. Since
we don't have ACPI this does not apply here.
- The interrupt map is gone. There are now plenty of device nodes.
- The "unit address string" got fixed, it uses not DD,V format.
arch/x86/platform/ce4100/falconfalls.dts | 424 ++++++++++++++++++++++++++++++
1 files changed, 424 insertions(+), 0 deletions(-)
create mode 100644 arch/x86/platform/ce4100/falconfalls.dts
diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts
new file mode 100644
index 0000000..e888657
--- /dev/null
+++ b/arch/x86/platform/ce4100/falconfalls.dts
@@ -0,0 +1,424 @@
+/*
+ * CE4100 on Falcon Falls
+ *
+ * (c) Copyright 2010 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; version 2 of the License.
+ */
+/dts-v1/;
+/ {
+ model = "intel,falconfalls";
+ compatible = "intel,falconfalls";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "intel,ce4100";
+ reg = <0>;
+ lapic = <&lapic0>;
+ };
+ };
+
+ soc@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "intel,ce4100-cp";
+ ranges;
+
+ ioapic1: interrupt-controller@fec00000 {
+ #interrupt-cells = <2>;
+ compatible = "intel,ioapic-ce4100", "intel,ioapic";
+ interrupt-controller;
+ reg = <0xfec00000 0x1000>;
+ };
+
+ timer@fed00000 {
+ compatible = "intel,hpet-ce4100", "intel,hpet";
+ reg = <0xfed00000 0x200>;
+ };
+
+ lapic0: interrupt-controller@fee00000 {
+ compatible = "intel,lapic-ce4100", "intel,lapic";
+ reg = <0xfee00000 0x1000>;
+ };
+
+ pci@3fc {
+ #address-cells = <3>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ compatible = "intel,ce4100-pci", "pci";
+ device_type = "pci";
+ bus-range = <0 0>;
+ ranges = <0x2000000 0 0xbffff000 0xbffff000 0 0x1000
+ 0x2000000 0 0xdffe0000 0xdffe0000 0 0x1000
+ 0x0000000 0 0x0 0x0 0 0x100>;
+
+ /* Secondary IO-APIC */
+ ioapic2: interrupt-controller@0,1 {
+ #interrupt-cells = <2>;
+ compatible = "intel,ioapic-ce4100", "intel,ioapic";
+ interrupt-controller;
+ reg = <0x100 0x0 0x0 0x0 0x0>;
+ assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
+ };
+
+ pci@1,0 {
+ #address-cells = <3>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ compatible = "intel,ce4100-pci", "pci";
+ device_type = "pci";
+ bus-range = <1 1>;
+ ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
+
+ interrupt-parent = <&ioapic2>;
+
+ display@2,0 {
+ compatible = "pci8086,2e5b.2",
+ "pci8086,2e5b",
+ "pciclass038000",
+ "pciclass0380";
+
+ reg = <0x11000 0x0 0x0 0x0 0x0>;
+ interrupts = <0 1>;
+ };
+
+ multimedia@3,0 {
+ compatible = "pci8086,2e5c.2",
+ "pci8086,2e5c",
+ "pciclass048000",
+ "pciclass0480";
+
+ reg = <0x11800 0x0 0x0 0x0 0x0>;
+ interrupts = <2 1>;
+ };
+
+ multimedia@4,0 {
+ compatible = "pci8086,2e5d.2",
+ "pci8086,2e5d",
+ "pciclass048000",
+ "pciclass0480";
+
+ reg = <0x12000 0x0 0x0 0x0 0x0>;
+ interrupts = <4 1>;
+ };
+
+ multimedia@4,1 {
+ compatible = "pci8086,2e5e.2",
+ "pci8086,2e5e",
+ "pciclass048000",
+ "pciclass0480";
+
+ reg = <0x12100 0x0 0x0 0x0 0x0>;
+ interrupts = <5 1>;
+ };
+
+ sound@6,0 {
+ compatible = "pci8086,2e5f.2",
+ "pci8086,2e5f",
+ "pciclass040100",
+ "pciclass0401";
+
+ reg = <0x13000 0x0 0x0 0x0 0x0>;
+ interrupts = <6 1>;
+ };
+
+ sound@6,1 {
+ compatible = "pci8086,2e5f.2",
+ "pci8086,2e5f",
+ "pciclass040100",
+ "pciclass0401";
+
+ reg = <0x13100 0x0 0x0 0x0 0x0>;
+ interrupts = <7 1>;
+ };
+
+ sound@6,2 {
+ compatible = "pci8086,2e60.2",
+ "pci8086,2e60",
+ "pciclass040100",
+ "pciclass0401";
+
+ reg = <0x13200 0x0 0x0 0x0 0x0>;
+ interrupts = <8 1>;
+ };
+
+ display@8,0 {
+ compatible = "pci8086,2e61.2",
+ "pci8086,2e61",
+ "pciclass038000",
+ "pciclass0380";
+
+ reg = <0x14000 0x0 0x0 0x0 0x0>;
+ interrupts = <9 1>;
+ };
+
+ display@8,1 {
+ compatible = "pci8086,2e62.2",
+ "pci8086,2e62",
+ "pciclass038000",
+ "pciclass0380";
+
+ reg = <0x14100 0x0 0x0 0x0 0x0>;
+ interrupts = <10 1>;
+ };
+
+ multimedia@8,2 {
+ compatible = "pci8086,2e63.2",
+ "pci8086,2e63",
+ "pciclass048000",
+ "pciclass0480";
+
+ reg = <0x14200 0x0 0x0 0x0 0x0>;
+ interrupts = <11 1>;
+ };
+
+ entertainment-encryption@9,0 {
+ compatible = "pci8086,2e64.2",
+ "pci8086,2e64",
+ "pciclass101000",
+ "pciclass1010";
+
+ reg = <0x14800 0x0 0x0 0x0 0x0>;
+ interrupts = <12 1>;
+ };
+
+ localbus@a,0 {
+ compatible = "pci8086,2e65.2",
+ "pci8086,2e65",
+ "pciclassff0000",
+ "pciclassff00";
+
+ reg = <0x15000 0x0 0x0 0x0 0x0>;
+ };
+
+ serial@b,0 {
+ compatible = "pci8086,2e66.2",
+ "pci8086,2e66",
+ "pciclass070003",
+ "pciclass0700";
+
+ reg = <0x15800 0x0 0x0 0x0 0x0>;
+ interrupts = <14 1>;
+ };
+
+ gpio@b,1 {
+ compatible = "pci8086,2e67.2",
+ "pci8086,2e67",
+ "pciclassff0000",
+ "pciclassff00";
+
+ reg = <0x15900 0x0 0x0 0x0 0x0>;
+ interrupts = <15 1>;
+ };
+
+ i2c-controller@b,2 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "pci8086,2e68.2",
+ "pci8086,2e68",
+ "pciclass,ff0000",
+ "pciclass,ff00";
+
+ reg = <0x15a00 0x0 0x0 0x0 0x0>;
+ interrupts = <16 1>;
+ ranges = <0 0 0x02000000 0 0xdffe0500 0x100
+ 1 0 0x02000000 0 0xdffe0600 0x100
+ 2 0 0x02000000 0 0xdffe0700 0x100>;
+
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ce4100-i2c-controller";
+ reg = <0 0 0x100>;
+ };
+
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ce4100-i2c-controller";
+ reg = <1 0 0x100>;
+
+ gpio@26 {
+ compatible = "ti,pcf8575";
+ reg = <0x26>;
+ };
+ };
+
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ce4100-i2c-controller";
+ reg = <2 0 0x100>;
+
+ gpio@26 {
+ compatible = "ti,pcf8575";
+ reg = <0x26>;
+ };
+ };
+ };
+
+ smard-card@b,3 {
+ compatible = "pci8086,2e69.2",
+ "pci8086,2e69",
+ "pciclass070500",
+ "pciclass0705";
+
+ reg = <0x15b00 0x0 0x0 0x0 0x0>;
+ interrupts = <15 1>;
+ };
+
+ spi-controller@b,4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible =
+ "pci8086,2e6a.2",
+ "pci8086,2e6a",
+ "pciclass,ff0000",
+ "pciclass,ff00";
+
+ reg = <0x15c00 0x0 0x0 0x0 0x0>;
+ interrupts = <15 1>;
+
+ dac@0 {
+ compatible = "ti,pcm1755";
+ reg = <0>;
+ spi-max-frequency = <115200>;
+ };
+
+ dac@1 {
+ compatible = "ti,pcm1609a";
+ reg = <1>;
+ spi-max-frequency = <115200>;
+ };
+
+ eeprom@2 {
+ compatible = "atmel,at93c46";
+ reg = <2>;
+ spi-max-frequency = <115200>;
+ };
+ };
+
+ multimedia@b,7 {
+ compatible = "pci8086,2e6d.2",
+ "pci8086,2e6d",
+ "pciclassff0000",
+ "pciclassff00";
+
+ reg = <0x15f00 0x0 0x0 0x0 0x0>;
+ };
+
+ ethernet@c,0 {
+ compatible = "pci8086,2e6e.2",
+ "pci8086,2e6e",
+ "pciclass020000",
+ "pciclass0200";
+
+ reg = <0x16000 0x0 0x0 0x0 0x0>;
+ interrupts = <21 1>;
+ };
+
+ clock@c,1 {
+ compatible = "pci8086,2e6f.2",
+ "pci8086,2e6f",
+ "pciclassff0000",
+ "pciclassff00";
+
+ reg = <0x16100 0x0 0x0 0x0 0x0>;
+ interrupts = <3 1>;
+ };
+
+ usb@d,0 {
+ compatible = "pci8086,2e70.2",
+ "pci8086,2e70",
+ "pciclass0c0320",
+ "pciclass0c03";
+
+ reg = <0x16800 0x0 0x0 0x0 0x0>;
+ interrupts = <22 3>;
+ };
+
+ usb@d,1 {
+ compatible = "pci8086,2e70.2",
+ "pci8086,2e70",
+ "pciclass0c0320",
+ "pciclass0c03";
+
+ reg = <0x16900 0x0 0x0 0x0 0x0>;
+ interrupts = <22 3>;
+ };
+
+ sata@e,0 {
+ compatible = "pci8086,2e71.0",
+ "pci8086,2e71",
+ "pciclass010601",
+ "pciclass0106";
+
+ reg = <0x17000 0x0 0x0 0x0 0x0>;
+ interrupts = <23 3>;
+ };
+
+ flash@f,0 {
+ compatible = "pci8086,701.1",
+ "pci8086,701",
+ "pciclass050100",
+ "pciclass0501";
+
+ reg = <0x17800 0x0 0x0 0x0 0x0>;
+ interrupts = <13 1>;
+ };
+
+ entertainment-encryption@10,0 {
+ compatible = "pci8086,702.1",
+ "pci8086,702",
+ "pciclass101000",
+ "pciclass1010";
+
+ reg = <0x18000 0x0 0x0 0x0 0x0>;
+ };
+
+ co-processor@11,0 {
+ compatible = "pci8086,703.1",
+ "pci8086,703",
+ "pciclass0b4000",
+ "pciclass0b40";
+
+ reg = <0x18800 0x0 0x0 0x0 0x0>;
+ interrupts = <1 1>;
+ };
+
+ multimedia@12,0 {
+ compatible = "pci8086,704.0",
+ "pci8086,704",
+ "pciclass048000",
+ "pciclass0480";
+
+ reg = <0x19000 0x0 0x0 0x0 0x0>;
+ };
+ };
+
+ isa@1f,0 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "isa";
+ ranges = <1 0 0 0 0 0x100>;
+
+ rtc@70 {
+ compatible = "intel,ce4100-rtc", "motorola,mc146818";
+ interrupts = <8 3>;
+ interrupt-parent = <&ioapic1>;
+ ctrl-reg = <2>;
+ freq-reg = <0x26>;
+ reg = <1 0x70 2>;
+ };
+ };
+ };
+ };
+};
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH TIP v2 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-02-02 18:58 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-02 18:58 UTC (permalink / raw)
To: David Gibson, Sebastian Andrzej Siewior,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlYrcfao8yub6A
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
- intel,ce4100-immr become intel,ce4100-cp. cp stands for core
peripherals. The Atom data sheet talks here about ACPI devices. Since
we don't have ACPI this does not apply here.
- The interrupt map is gone. There are now plenty of device nodes.
- The "unit address string" got fixed, it uses not DD,V format.
arch/x86/platform/ce4100/falconfalls.dts | 424 ++++++++++++++++++++++++++++++
1 files changed, 424 insertions(+), 0 deletions(-)
create mode 100644 arch/x86/platform/ce4100/falconfalls.dts
diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts
new file mode 100644
index 0000000..e888657
--- /dev/null
+++ b/arch/x86/platform/ce4100/falconfalls.dts
@@ -0,0 +1,424 @@
+/*
+ * CE4100 on Falcon Falls
+ *
+ * (c) Copyright 2010 Intel Corporation
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; version 2 of the License.
+ */
+/dts-v1/;
+/ {
+ model = "intel,falconfalls";
+ compatible = "intel,falconfalls";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ device_type = "cpu";
+ compatible = "intel,ce4100";
+ reg = <0>;
+ lapic = <&lapic0>;
+ };
+ };
+
+ soc@0 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "intel,ce4100-cp";
+ ranges;
+
+ ioapic1: interrupt-controller@fec00000 {
+ #interrupt-cells = <2>;
+ compatible = "intel,ioapic-ce4100", "intel,ioapic";
+ interrupt-controller;
+ reg = <0xfec00000 0x1000>;
+ };
+
+ timer@fed00000 {
+ compatible = "intel,hpet-ce4100", "intel,hpet";
+ reg = <0xfed00000 0x200>;
+ };
+
+ lapic0: interrupt-controller@fee00000 {
+ compatible = "intel,lapic-ce4100", "intel,lapic";
+ reg = <0xfee00000 0x1000>;
+ };
+
+ pci@3fc {
+ #address-cells = <3>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ compatible = "intel,ce4100-pci", "pci";
+ device_type = "pci";
+ bus-range = <0 0>;
+ ranges = <0x2000000 0 0xbffff000 0xbffff000 0 0x1000
+ 0x2000000 0 0xdffe0000 0xdffe0000 0 0x1000
+ 0x0000000 0 0x0 0x0 0 0x100>;
+
+ /* Secondary IO-APIC */
+ ioapic2: interrupt-controller@0,1 {
+ #interrupt-cells = <2>;
+ compatible = "intel,ioapic-ce4100", "intel,ioapic";
+ interrupt-controller;
+ reg = <0x100 0x0 0x0 0x0 0x0>;
+ assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
+ };
+
+ pci@1,0 {
+ #address-cells = <3>;
+ #interrupt-cells = <1>;
+ #size-cells = <2>;
+ compatible = "intel,ce4100-pci", "pci";
+ device_type = "pci";
+ bus-range = <1 1>;
+ ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
+
+ interrupt-parent = <&ioapic2>;
+
+ display@2,0 {
+ compatible = "pci8086,2e5b.2",
+ "pci8086,2e5b",
+ "pciclass038000",
+ "pciclass0380";
+
+ reg = <0x11000 0x0 0x0 0x0 0x0>;
+ interrupts = <0 1>;
+ };
+
+ multimedia@3,0 {
+ compatible = "pci8086,2e5c.2",
+ "pci8086,2e5c",
+ "pciclass048000",
+ "pciclass0480";
+
+ reg = <0x11800 0x0 0x0 0x0 0x0>;
+ interrupts = <2 1>;
+ };
+
+ multimedia@4,0 {
+ compatible = "pci8086,2e5d.2",
+ "pci8086,2e5d",
+ "pciclass048000",
+ "pciclass0480";
+
+ reg = <0x12000 0x0 0x0 0x0 0x0>;
+ interrupts = <4 1>;
+ };
+
+ multimedia@4,1 {
+ compatible = "pci8086,2e5e.2",
+ "pci8086,2e5e",
+ "pciclass048000",
+ "pciclass0480";
+
+ reg = <0x12100 0x0 0x0 0x0 0x0>;
+ interrupts = <5 1>;
+ };
+
+ sound@6,0 {
+ compatible = "pci8086,2e5f.2",
+ "pci8086,2e5f",
+ "pciclass040100",
+ "pciclass0401";
+
+ reg = <0x13000 0x0 0x0 0x0 0x0>;
+ interrupts = <6 1>;
+ };
+
+ sound@6,1 {
+ compatible = "pci8086,2e5f.2",
+ "pci8086,2e5f",
+ "pciclass040100",
+ "pciclass0401";
+
+ reg = <0x13100 0x0 0x0 0x0 0x0>;
+ interrupts = <7 1>;
+ };
+
+ sound@6,2 {
+ compatible = "pci8086,2e60.2",
+ "pci8086,2e60",
+ "pciclass040100",
+ "pciclass0401";
+
+ reg = <0x13200 0x0 0x0 0x0 0x0>;
+ interrupts = <8 1>;
+ };
+
+ display@8,0 {
+ compatible = "pci8086,2e61.2",
+ "pci8086,2e61",
+ "pciclass038000",
+ "pciclass0380";
+
+ reg = <0x14000 0x0 0x0 0x0 0x0>;
+ interrupts = <9 1>;
+ };
+
+ display@8,1 {
+ compatible = "pci8086,2e62.2",
+ "pci8086,2e62",
+ "pciclass038000",
+ "pciclass0380";
+
+ reg = <0x14100 0x0 0x0 0x0 0x0>;
+ interrupts = <10 1>;
+ };
+
+ multimedia@8,2 {
+ compatible = "pci8086,2e63.2",
+ "pci8086,2e63",
+ "pciclass048000",
+ "pciclass0480";
+
+ reg = <0x14200 0x0 0x0 0x0 0x0>;
+ interrupts = <11 1>;
+ };
+
+ entertainment-encryption@9,0 {
+ compatible = "pci8086,2e64.2",
+ "pci8086,2e64",
+ "pciclass101000",
+ "pciclass1010";
+
+ reg = <0x14800 0x0 0x0 0x0 0x0>;
+ interrupts = <12 1>;
+ };
+
+ localbus@a,0 {
+ compatible = "pci8086,2e65.2",
+ "pci8086,2e65",
+ "pciclassff0000",
+ "pciclassff00";
+
+ reg = <0x15000 0x0 0x0 0x0 0x0>;
+ };
+
+ serial@b,0 {
+ compatible = "pci8086,2e66.2",
+ "pci8086,2e66",
+ "pciclass070003",
+ "pciclass0700";
+
+ reg = <0x15800 0x0 0x0 0x0 0x0>;
+ interrupts = <14 1>;
+ };
+
+ gpio@b,1 {
+ compatible = "pci8086,2e67.2",
+ "pci8086,2e67",
+ "pciclassff0000",
+ "pciclassff00";
+
+ reg = <0x15900 0x0 0x0 0x0 0x0>;
+ interrupts = <15 1>;
+ };
+
+ i2c-controller@b,2 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "pci8086,2e68.2",
+ "pci8086,2e68",
+ "pciclass,ff0000",
+ "pciclass,ff00";
+
+ reg = <0x15a00 0x0 0x0 0x0 0x0>;
+ interrupts = <16 1>;
+ ranges = <0 0 0x02000000 0 0xdffe0500 0x100
+ 1 0 0x02000000 0 0xdffe0600 0x100
+ 2 0 0x02000000 0 0xdffe0700 0x100>;
+
+ i2c@0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ce4100-i2c-controller";
+ reg = <0 0 0x100>;
+ };
+
+ i2c@1 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ce4100-i2c-controller";
+ reg = <1 0 0x100>;
+
+ gpio@26 {
+ compatible = "ti,pcf8575";
+ reg = <0x26>;
+ };
+ };
+
+ i2c@2 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "intel,ce4100-i2c-controller";
+ reg = <2 0 0x100>;
+
+ gpio@26 {
+ compatible = "ti,pcf8575";
+ reg = <0x26>;
+ };
+ };
+ };
+
+ smard-card@b,3 {
+ compatible = "pci8086,2e69.2",
+ "pci8086,2e69",
+ "pciclass070500",
+ "pciclass0705";
+
+ reg = <0x15b00 0x0 0x0 0x0 0x0>;
+ interrupts = <15 1>;
+ };
+
+ spi-controller@b,4 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible =
+ "pci8086,2e6a.2",
+ "pci8086,2e6a",
+ "pciclass,ff0000",
+ "pciclass,ff00";
+
+ reg = <0x15c00 0x0 0x0 0x0 0x0>;
+ interrupts = <15 1>;
+
+ dac@0 {
+ compatible = "ti,pcm1755";
+ reg = <0>;
+ spi-max-frequency = <115200>;
+ };
+
+ dac@1 {
+ compatible = "ti,pcm1609a";
+ reg = <1>;
+ spi-max-frequency = <115200>;
+ };
+
+ eeprom@2 {
+ compatible = "atmel,at93c46";
+ reg = <2>;
+ spi-max-frequency = <115200>;
+ };
+ };
+
+ multimedia@b,7 {
+ compatible = "pci8086,2e6d.2",
+ "pci8086,2e6d",
+ "pciclassff0000",
+ "pciclassff00";
+
+ reg = <0x15f00 0x0 0x0 0x0 0x0>;
+ };
+
+ ethernet@c,0 {
+ compatible = "pci8086,2e6e.2",
+ "pci8086,2e6e",
+ "pciclass020000",
+ "pciclass0200";
+
+ reg = <0x16000 0x0 0x0 0x0 0x0>;
+ interrupts = <21 1>;
+ };
+
+ clock@c,1 {
+ compatible = "pci8086,2e6f.2",
+ "pci8086,2e6f",
+ "pciclassff0000",
+ "pciclassff00";
+
+ reg = <0x16100 0x0 0x0 0x0 0x0>;
+ interrupts = <3 1>;
+ };
+
+ usb@d,0 {
+ compatible = "pci8086,2e70.2",
+ "pci8086,2e70",
+ "pciclass0c0320",
+ "pciclass0c03";
+
+ reg = <0x16800 0x0 0x0 0x0 0x0>;
+ interrupts = <22 3>;
+ };
+
+ usb@d,1 {
+ compatible = "pci8086,2e70.2",
+ "pci8086,2e70",
+ "pciclass0c0320",
+ "pciclass0c03";
+
+ reg = <0x16900 0x0 0x0 0x0 0x0>;
+ interrupts = <22 3>;
+ };
+
+ sata@e,0 {
+ compatible = "pci8086,2e71.0",
+ "pci8086,2e71",
+ "pciclass010601",
+ "pciclass0106";
+
+ reg = <0x17000 0x0 0x0 0x0 0x0>;
+ interrupts = <23 3>;
+ };
+
+ flash@f,0 {
+ compatible = "pci8086,701.1",
+ "pci8086,701",
+ "pciclass050100",
+ "pciclass0501";
+
+ reg = <0x17800 0x0 0x0 0x0 0x0>;
+ interrupts = <13 1>;
+ };
+
+ entertainment-encryption@10,0 {
+ compatible = "pci8086,702.1",
+ "pci8086,702",
+ "pciclass101000",
+ "pciclass1010";
+
+ reg = <0x18000 0x0 0x0 0x0 0x0>;
+ };
+
+ co-processor@11,0 {
+ compatible = "pci8086,703.1",
+ "pci8086,703",
+ "pciclass0b4000",
+ "pciclass0b40";
+
+ reg = <0x18800 0x0 0x0 0x0 0x0>;
+ interrupts = <1 1>;
+ };
+
+ multimedia@12,0 {
+ compatible = "pci8086,704.0",
+ "pci8086,704",
+ "pciclass048000",
+ "pciclass0480";
+
+ reg = <0x19000 0x0 0x0 0x0 0x0>;
+ };
+ };
+
+ isa@1f,0 {
+ #address-cells = <2>;
+ #size-cells = <1>;
+ compatible = "isa";
+ ranges = <1 0 0 0 0 0x100>;
+
+ rtc@70 {
+ compatible = "intel,ce4100-rtc", "motorola,mc146818";
+ interrupts = <8 3>;
+ interrupt-parent = <&ioapic1>;
+ ctrl-reg = <2>;
+ freq-reg = <0x26>;
+ reg = <1 0x70 2>;
+ };
+ };
+ };
+ };
+};
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 01/14] x86/e820: remove conditional early mapping in parse_e820_ext
2011-01-24 4:28 ` Sebastian Andrzej Siewior
(?)
@ 2011-02-03 20:57 ` Grant Likely
-1 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-03 20:57 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: linux-kernel, sodaville, devicetree-discuss, x86
On Mon, Jan 24, 2011 at 09:58:49AM +0530, Sebastian Andrzej Siewior wrote:
> This patch ensures that the memory passed from parse_setup_data() is
> large enough to cover the complete data structure. That means that the
> conditional mapping in parse_e820_ext() can go.
>
> While here, I also attempt not to map two pages if the address is not
> aligned to a page boundary.
>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
I'm going through the dt patches now. If I decide they are ready to
go, should I pick this one up too? hpa, does this look like something
you can ack?
g.
> ---
> arch/x86/include/asm/e820.h | 2 +-
> arch/x86/kernel/e820.c | 8 +-------
> arch/x86/kernel/setup.c | 18 +++++++++++++++---
> 3 files changed, 17 insertions(+), 11 deletions(-)
>
> diff --git a/arch/x86/include/asm/e820.h b/arch/x86/include/asm/e820.h
> index e99d55d..908b969 100644
> --- a/arch/x86/include/asm/e820.h
> +++ b/arch/x86/include/asm/e820.h
> @@ -96,7 +96,7 @@ extern void e820_setup_gap(void);
> extern int e820_search_gap(unsigned long *gapstart, unsigned long *gapsize,
> unsigned long start_addr, unsigned long long end_addr);
> struct setup_data;
> -extern void parse_e820_ext(struct setup_data *data, unsigned long pa_data);
> +extern void parse_e820_ext(struct setup_data *data);
>
> #if defined(CONFIG_X86_64) || \
> (defined(CONFIG_X86_32) && defined(CONFIG_HIBERNATION))
> diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c
> index 294f26d..5fad626 100644
> --- a/arch/x86/kernel/e820.c
> +++ b/arch/x86/kernel/e820.c
> @@ -667,21 +667,15 @@ __init void e820_setup_gap(void)
> * boot_params.e820_map, others are passed via SETUP_E820_EXT node of
> * linked list of struct setup_data, which is parsed here.
> */
> -void __init parse_e820_ext(struct setup_data *sdata, unsigned long pa_data)
> +void __init parse_e820_ext(struct setup_data *sdata)
> {
> - u32 map_len;
> int entries;
> struct e820entry *extmap;
>
> entries = sdata->len / sizeof(struct e820entry);
> - map_len = sdata->len + sizeof(struct setup_data);
> - if (map_len > PAGE_SIZE)
> - sdata = early_ioremap(pa_data, map_len);
> extmap = (struct e820entry *)(sdata->data);
> __append_e820_map(extmap, entries);
> sanitize_e820_map(e820.map, ARRAY_SIZE(e820.map), &e820.nr_map);
> - if (map_len > PAGE_SIZE)
> - early_iounmap(sdata, map_len);
> printk(KERN_INFO "extended physical RAM map:\n");
> e820_print_map("extended");
> }
> diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
> index d3cfe26..f8e7152 100644
> --- a/arch/x86/kernel/setup.c
> +++ b/arch/x86/kernel/setup.c
> @@ -429,16 +429,28 @@ static void __init parse_setup_data(void)
> return;
> pa_data = boot_params.hdr.setup_data;
> while (pa_data) {
> - data = early_memremap(pa_data, PAGE_SIZE);
> + u32 data_len;
> + u32 map_len;
> +
> + map_len = max(PAGE_SIZE - (pa_data & ~PAGE_MASK),
> + (u64)sizeof(struct setup_data));
> + data = early_memremap(pa_data, map_len);
> + data_len = data->len + sizeof(struct setup_data);
> + if (data_len > map_len) {
> + early_iounmap(data, map_len);
> + data = early_memremap(pa_data, data_len);
> + map_len = data_len;
> + }
> +
> switch (data->type) {
> case SETUP_E820_EXT:
> - parse_e820_ext(data, pa_data);
> + parse_e820_ext(data);
> break;
> default:
> break;
> }
> pa_data = data->next;
> - early_iounmap(data, PAGE_SIZE);
> + early_iounmap(data, map_len);
> }
> }
>
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 03/14] x86/dtb: Add a device tree for CE4100
2011-01-27 9:11 ` Sebastian Andrzej Siewior
(?)
@ 2011-02-03 20:59 ` Grant Likely
2011-02-03 21:32 ` Mitch Bradley
-1 siblings, 1 reply; 94+ messages in thread
From: Grant Likely @ 2011-02-03 20:59 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: David Gibson, linux-kernel, sodaville, devicetree-discuss, x86
On Thu, Jan 27, 2011 at 02:41:47PM +0530, Sebastian Andrzej Siewior wrote:
> * David Gibson | 2011-01-27 15:00:27 [+1000]:
> >> + >;
> >> +
> >> + i2c-controller@15a00,0,0 {
> >
> >Uh.. that unit address does not look right. The encoding of PCI
> >3-cell addresses into a unit address string is not simply comma
> >separated cells. I forget the details, so you'll need to check the OF
> >PCI binding.
>
> Grant wrote [0]:
> |You'll also note that I added ',0,0' to the end of the address.
> |That's because the node address reflects the parent bus address format
> |which uses 3 cells in this case.
It is quite possible I was mistaken on this point. The PCI binding is
not my area of strength.
g.
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP v2 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-02-03 21:07 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-03 21:07 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: David Gibson, linux-kernel, sodaville, devicetree-discuss, x86
On Thu, Feb 03, 2011 at 12:28:41AM +0530, Sebastian Andrzej Siewior wrote:
> Cc: devicetree-discuss@lists.ozlabs.org
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
> ---
> - intel,ce4100-immr become intel,ce4100-cp. cp stands for core
> peripherals. The Atom data sheet talks here about ACPI devices. Since
> we don't have ACPI this does not apply here.
> - The interrupt map is gone. There are now plenty of device nodes.
> - The "unit address string" got fixed, it uses not DD,V format.
You can go ahead and keep the revision history above the s-o-b and ---
lines. It turns out that having the revision history in the commit
text is actually useful when trying to figure out what version of a
patch actually got applied.
> arch/x86/platform/ce4100/falconfalls.dts | 424 ++++++++++++++++++++++++++++++
> 1 files changed, 424 insertions(+), 0 deletions(-)
> create mode 100644 arch/x86/platform/ce4100/falconfalls.dts
>
> diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts
> new file mode 100644
> index 0000000..e888657
> --- /dev/null
> +++ b/arch/x86/platform/ce4100/falconfalls.dts
> @@ -0,0 +1,424 @@
> +/*
> + * CE4100 on Falcon Falls
> + *
> + * (c) Copyright 2010 Intel Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; version 2 of the License.
> + */
> +/dts-v1/;
> +/ {
> + model = "intel,falconfalls";
> + compatible = "intel,falconfalls";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "intel,ce4100";
> + reg = <0>;
> + lapic = <&lapic0>;
> + };
> + };
> +
> + soc@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "intel,ce4100-cp";
You'll need to add blurbs to Documentation/devicetree/bindings
(Documentation/powerpc/dts-bindings in Linus' tree; renamed in
linux-next) for each of these new compatible bindings to document the
part that they describe and any special properties that go with each
compatible value (if any). You can send it as a followup patch.
> + gpio@b,1 {
> + compatible = "pci8086,2e67.2",
> + "pci8086,2e67",
> + "pciclassff0000",
> + "pciclassff00";
> +
> + reg = <0x15900 0x0 0x0 0x0 0x0>;
> + interrupts = <15 1>;
> + };
You'll probably want to make use of the gpio-controller binding for
the gpio nodes so that other nodes can reference it. Not a
showstopper for this patch though.
Otherwise looks good to me.
g.
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP v2 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-02-03 21:07 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-03 21:07 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA
On Thu, Feb 03, 2011 at 12:28:41AM +0530, Sebastian Andrzej Siewior wrote:
> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
> Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> - intel,ce4100-immr become intel,ce4100-cp. cp stands for core
> peripherals. The Atom data sheet talks here about ACPI devices. Since
> we don't have ACPI this does not apply here.
> - The interrupt map is gone. There are now plenty of device nodes.
> - The "unit address string" got fixed, it uses not DD,V format.
You can go ahead and keep the revision history above the s-o-b and ---
lines. It turns out that having the revision history in the commit
text is actually useful when trying to figure out what version of a
patch actually got applied.
> arch/x86/platform/ce4100/falconfalls.dts | 424 ++++++++++++++++++++++++++++++
> 1 files changed, 424 insertions(+), 0 deletions(-)
> create mode 100644 arch/x86/platform/ce4100/falconfalls.dts
>
> diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts
> new file mode 100644
> index 0000000..e888657
> --- /dev/null
> +++ b/arch/x86/platform/ce4100/falconfalls.dts
> @@ -0,0 +1,424 @@
> +/*
> + * CE4100 on Falcon Falls
> + *
> + * (c) Copyright 2010 Intel Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; version 2 of the License.
> + */
> +/dts-v1/;
> +/ {
> + model = "intel,falconfalls";
> + compatible = "intel,falconfalls";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "intel,ce4100";
> + reg = <0>;
> + lapic = <&lapic0>;
> + };
> + };
> +
> + soc@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "intel,ce4100-cp";
You'll need to add blurbs to Documentation/devicetree/bindings
(Documentation/powerpc/dts-bindings in Linus' tree; renamed in
linux-next) for each of these new compatible bindings to document the
part that they describe and any special properties that go with each
compatible value (if any). You can send it as a followup patch.
> + gpio@b,1 {
> + compatible = "pci8086,2e67.2",
> + "pci8086,2e67",
> + "pciclassff0000",
> + "pciclassff00";
> +
> + reg = <0x15900 0x0 0x0 0x0 0x0>;
> + interrupts = <15 1>;
> + };
You'll probably want to make use of the gpio-controller binding for
the gpio nodes so that other nodes can reference it. Not a
showstopper for this patch though.
Otherwise looks good to me.
g.
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-02-03 21:32 ` Mitch Bradley
0 siblings, 0 replies; 94+ messages in thread
From: Mitch Bradley @ 2011-02-03 21:32 UTC (permalink / raw)
To: Grant Likely
Cc: Sebastian Andrzej Siewior, sodaville, devicetree-discuss, x86,
linux-kernel
On 2/3/2011 10:59 AM, Grant Likely wrote:
> On Thu, Jan 27, 2011 at 02:41:47PM +0530, Sebastian Andrzej Siewior wrote:
>> * David Gibson | 2011-01-27 15:00:27 [+1000]:
>>>> + >;
>>>> +
>>>> + i2c-controller@15a00,0,0 {
>>>
>>> Uh.. that unit address does not look right. The encoding of PCI
>>> 3-cell addresses into a unit address string is not simply comma
>>> separated cells. I forget the details, so you'll need to check the OF
>>> PCI binding.
>>
>> Grant wrote [0]:
>> |You'll also note that I added ',0,0' to the end of the address.
>> |That's because the node address reflects the parent bus address format
>> |which uses 3 cells in this case.
>
> It is quite possible I was mistaken on this point. The PCI binding is
> not my area of strength.
In real OF, the unit address of a PCI device is the first entry in the
reg property, which is the config space address. For the config space
address, only the most significant of the three cells is significant;
the other two must be 0.
The numerical representation of that cell in binary is
0000.0000.0000.0000.dddd.dfff.0000.0000, where d is the device number on
its bus segment and fff is the function number.
The text representation is "D,F" , where D is the hexadecimal ASCII
representation of the binary number ddddd and F is the hexadecimal ASCII
representation of the binary number fff . So "show-devs" will display
names like "/pci/ethernet@12,e" - device number 0x12, function number
0xe.
(In the general case, there are more fields in both the numerical and
text representations, but the unit address usage is restricted to just
the device and function numbers. Bus numbers are handled by the
hierarchy of PCI-to-PCI bridges.)
In real OF, there are "encode-unit" and "decode-unit" methods in the
parent (PCI bus) node to convert between the numerical and text
representations.
I don't know how this plays out in the flattened DT world, but the above
is a summary of what the PCI bus binding stipulates.
>
> g.
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
>
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-02-03 21:32 ` Mitch Bradley
0 siblings, 0 replies; 94+ messages in thread
From: Mitch Bradley @ 2011-02-03 21:32 UTC (permalink / raw)
To: Grant Likely
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ, Sebastian Andrzej Siewior,
x86-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
On 2/3/2011 10:59 AM, Grant Likely wrote:
> On Thu, Jan 27, 2011 at 02:41:47PM +0530, Sebastian Andrzej Siewior wrote:
>> * David Gibson | 2011-01-27 15:00:27 [+1000]:
>>>> + >;
>>>> +
>>>> + i2c-controller@15a00,0,0 {
>>>
>>> Uh.. that unit address does not look right. The encoding of PCI
>>> 3-cell addresses into a unit address string is not simply comma
>>> separated cells. I forget the details, so you'll need to check the OF
>>> PCI binding.
>>
>> Grant wrote [0]:
>> |You'll also note that I added ',0,0' to the end of the address.
>> |That's because the node address reflects the parent bus address format
>> |which uses 3 cells in this case.
>
> It is quite possible I was mistaken on this point. The PCI binding is
> not my area of strength.
In real OF, the unit address of a PCI device is the first entry in the
reg property, which is the config space address. For the config space
address, only the most significant of the three cells is significant;
the other two must be 0.
The numerical representation of that cell in binary is
0000.0000.0000.0000.dddd.dfff.0000.0000, where d is the device number on
its bus segment and fff is the function number.
The text representation is "D,F" , where D is the hexadecimal ASCII
representation of the binary number ddddd and F is the hexadecimal ASCII
representation of the binary number fff . So "show-devs" will display
names like "/pci/ethernet@12,e" - device number 0x12, function number
0xe.
(In the general case, there are more fields in both the numerical and
text representations, but the unit address usage is restricted to just
the device and function numbers. Bus numbers are handled by the
hierarchy of PCI-to-PCI bridges.)
In real OF, there are "encode-unit" and "decode-unit" methods in the
parent (PCI bus) node to convert between the numerical and text
representations.
I don't know how this plays out in the flattened DT world, but the above
is a summary of what the PCI bus binding stipulates.
>
> g.
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
>
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-02-04 9:40 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-04 9:40 UTC (permalink / raw)
To: Mitch Bradley
Cc: Grant Likely, sodaville, devicetree-discuss, x86, linux-kernel
Mitch Bradley wrote:
> The text representation is "D,F" , where D is the hexadecimal ASCII
> representation of the binary number ddddd and F is the hexadecimal ASCII
> representation of the binary number fff . So "show-devs" will display
> names like "/pci/ethernet@12,e" - device number 0x12, function number 0xe.
[snip more of it]
> I don't know how this plays out in the flattened DT world, but the above
> is a summary of what the PCI bus binding stipulates.
Thanks for clearing it up. After David pointed it out I looked it up in
the PCI spec and it seems to match what you saying here.
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-02-04 9:40 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-04 9:40 UTC (permalink / raw)
To: Mitch Bradley
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA
Mitch Bradley wrote:
> The text representation is "D,F" , where D is the hexadecimal ASCII
> representation of the binary number ddddd and F is the hexadecimal ASCII
> representation of the binary number fff . So "show-devs" will display
> names like "/pci/ethernet@12,e" - device number 0x12, function number 0xe.
[snip more of it]
> I don't know how this plays out in the flattened DT world, but the above
> is a summary of what the PCI bus binding stipulates.
Thanks for clearing it up. After David pointed it out I looked it up in
the PCI spec and it seems to match what you saying here.
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP v2 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-02-04 10:06 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-04 10:06 UTC (permalink / raw)
To: Grant Likely
Cc: David Gibson, linux-kernel, sodaville, devicetree-discuss, x86
Grant Likely wrote:
> You can go ahead and keep the revision history above the s-o-b and ---
> lines. It turns out that having the revision history in the commit
> text is actually useful when trying to figure out what version of a
> patch actually got applied.
Okay.
>> diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts
>> new file mode 100644
>> index 0000000..e888657
>> --- /dev/null
>> +++ b/arch/x86/platform/ce4100/falconfalls.dts
>> @@ -0,0 +1,424 @@
>> + soc@0 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "intel,ce4100-cp";
>
> You'll need to add blurbs to Documentation/devicetree/bindings
> (Documentation/powerpc/dts-bindings in Linus' tree; renamed in
> linux-next) for each of these new compatible bindings to document the
> part that they describe and any special properties that go with each
> compatible value (if any). You can send it as a followup patch.
Good point, will do.
>> + gpio@b,1 {
>> + compatible = "pci8086,2e67.2",
>> + "pci8086,2e67",
>> + "pciclassff0000",
>> + "pciclassff00";
>> +
>> + reg = <0x15900 0x0 0x0 0x0 0x0>;
>> + interrupts = <15 1>;
>> + };
>
> You'll probably want to make use of the gpio-controller binding for
> the gpio nodes so that other nodes can reference it. Not a
> showstopper for this patch though.
Right. I'll make it follow-up once I get to the gpio functionality.
> Otherwise looks good to me.
thanks.
> g.
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP v2 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-02-04 10:06 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-04 10:06 UTC (permalink / raw)
To: Grant Likely
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA
Grant Likely wrote:
> You can go ahead and keep the revision history above the s-o-b and ---
> lines. It turns out that having the revision history in the commit
> text is actually useful when trying to figure out what version of a
> patch actually got applied.
Okay.
>> diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts
>> new file mode 100644
>> index 0000000..e888657
>> --- /dev/null
>> +++ b/arch/x86/platform/ce4100/falconfalls.dts
>> @@ -0,0 +1,424 @@
>> + soc@0 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "intel,ce4100-cp";
>
> You'll need to add blurbs to Documentation/devicetree/bindings
> (Documentation/powerpc/dts-bindings in Linus' tree; renamed in
> linux-next) for each of these new compatible bindings to document the
> part that they describe and any special properties that go with each
> compatible value (if any). You can send it as a followup patch.
Good point, will do.
>> + gpio@b,1 {
>> + compatible = "pci8086,2e67.2",
>> + "pci8086,2e67",
>> + "pciclassff0000",
>> + "pciclassff00";
>> +
>> + reg = <0x15900 0x0 0x0 0x0 0x0>;
>> + interrupts = <15 1>;
>> + };
>
> You'll probably want to make use of the gpio-controller binding for
> the gpio nodes so that other nodes can reference it. Not a
> showstopper for this patch though.
Right. I'll make it follow-up once I get to the gpio functionality.
> Otherwise looks good to me.
thanks.
> g.
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* [PATCH v2 TIP 09/14] x86/dtb: Add generic bus probe
@ 2011-02-04 10:21 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-04 10:21 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: linux-kernel, sodaville, x86, devicetree-discuss, Dirk Brandewie
For now we probe these busses and we change is to board dependent probes
once we have to.
Cc: devicetree-discuss@lists.ozlabs.org
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
---
renamed -immr to -cp
arch/x86/kernel/prom.c | 19 +++++++++++++++++++
1 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
index 8525ca0..3eaab43 100644
--- a/arch/x86/kernel/prom.c
+++ b/arch/x86/kernel/prom.c
@@ -102,6 +102,25 @@ void __init add_dtb(u64 data)
initial_dtb = data + offsetof(struct setup_data, data);
}
+/*
+ * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
+ */
+static struct of_device_id __initdata ce4100_ids[] = {
+ { .compatible = "intel,ce4100-cp", },
+ { .compatible = "isa", },
+ { .compatible = "pci", },
+ {},
+};
+
+static int __init add_bus_probe(void)
+{
+ if (!initial_boot_params)
+ return 0;
+
+ return of_platform_bus_probe(NULL, ce4100_ids, NULL);
+}
+module_init(add_bus_probe);
+
#ifdef CONFIG_PCI
static int x86_of_pci_irq_enable(struct pci_dev *dev)
{
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* [PATCH v2 TIP 09/14] x86/dtb: Add generic bus probe
@ 2011-02-04 10:21 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-04 10:21 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA
For now we probe these busses and we change is to board dependent probes
once we have to.
Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
Acked-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
---
renamed -immr to -cp
arch/x86/kernel/prom.c | 19 +++++++++++++++++++
1 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
index 8525ca0..3eaab43 100644
--- a/arch/x86/kernel/prom.c
+++ b/arch/x86/kernel/prom.c
@@ -102,6 +102,25 @@ void __init add_dtb(u64 data)
initial_dtb = data + offsetof(struct setup_data, data);
}
+/*
+ * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
+ */
+static struct of_device_id __initdata ce4100_ids[] = {
+ { .compatible = "intel,ce4100-cp", },
+ { .compatible = "isa", },
+ { .compatible = "pci", },
+ {},
+};
+
+static int __init add_bus_probe(void)
+{
+ if (!initial_boot_params)
+ return 0;
+
+ return of_platform_bus_probe(NULL, ce4100_ids, NULL);
+}
+module_init(add_bus_probe);
+
#ifdef CONFIG_PCI
static int x86_of_pci_irq_enable(struct pci_dev *dev)
{
--
1.7.3.2
^ permalink raw reply related [flat|nested] 94+ messages in thread
* Re: [PATCH OF 07/14] of: move of_irq_map_pci() into generic code
2011-01-24 4:28 ` Sebastian Andrzej Siewior
(?)
@ 2011-02-10 13:57 ` Michal Simek
-1 siblings, 0 replies; 94+ messages in thread
From: Michal Simek @ 2011-02-10 13:57 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: linux-kernel, sodaville, x86, devicetree-discuss,
Sebastian Andrzej Siewior, Benjamin Herrenschmidt
Sebastian Andrzej Siewior wrote:
> From: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
>
> There is a tiny difference between PPC32 and PPC64. Microblaze uses the
> PPC32 variant.
>
> Cc: devicetree-discuss@lists.ozlabs.org
> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
> ---
> arch/microblaze/include/asm/pci-bridge.h | 12 ++++
> arch/microblaze/include/asm/prom.h | 15 -----
> arch/microblaze/kernel/prom_parse.c | 77 ---------------------------
> arch/microblaze/pci/pci-common.c | 1 +
Please always CC me for Microblaze changes. I want to at least compile it.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 02/14] x86: Add device tree support
2011-01-24 4:28 ` Sebastian Andrzej Siewior
(?)
(?)
@ 2011-02-16 21:26 ` Grant Likely
2011-02-17 11:03 ` Sebastian Andrzej Siewior
-1 siblings, 1 reply; 94+ messages in thread
From: Grant Likely @ 2011-02-16 21:26 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: linux-kernel, sodaville, devicetree-discuss, x86
On Mon, Jan 24, 2011 at 09:58:50AM +0530, Sebastian Andrzej Siewior wrote:
> This patch adds minimal support for device tree support on x86. It will
> be passed to the kernel via setup_data which requires atleast boot
> protocol 2.09.
> Memory size, restricted memory regions, boot arguments are gathered the
> traditional way so things like cmd_line are just here to let the code
> compile.
> The current plan is use the device tree as an extension and to gather
> informations from it which can not be enumerated and have to be
> hardcoded otherwise. This includes things like
> - which devices are on this I2C/ SPI bus?
> - how are the interrupts wired to IO APIC?
> - where could my hpet be?
>
> Cc: devicetree-discuss@lists.ozlabs.org
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Hi Sebastian,
Relatively minor comments below. You can go ahead and add the
following when you respin:
Acked-by: Grant Likely <grant.likely@secretlab.ca>
> ---
> Documentation/x86/boot_with_dtb.txt | 26 +++++++++++++++
> arch/x86/Kconfig | 7 ++++
> arch/x86/include/asm/bootparam.h | 1 +
> arch/x86/include/asm/irq.h | 3 --
> arch/x86/include/asm/prom.h | 60 ++++++++++++++++++++++++++++++++++-
> arch/x86/kernel/Makefile | 1 +
> arch/x86/kernel/irq.c | 9 -----
> arch/x86/kernel/irqinit.c | 1 +
> arch/x86/kernel/prom.c | 51 +++++++++++++++++++++++++++++
> arch/x86/kernel/setup.c | 4 ++
> 10 files changed, 150 insertions(+), 13 deletions(-)
> create mode 100644 Documentation/x86/boot_with_dtb.txt
> create mode 100644 arch/x86/kernel/prom.c
>
> diff --git a/Documentation/x86/boot_with_dtb.txt b/Documentation/x86/boot_with_dtb.txt
> new file mode 100644
> index 0000000..6a357aa
> --- /dev/null
> +++ b/Documentation/x86/boot_with_dtb.txt
> @@ -0,0 +1,26 @@
> + Booting x86 with device tree
> +=================================
> +
> +1. Introduction
> +~~~~~~~~~~~~~~~
> +This document contains device tree information which are specific to
> +the x86 platform. Generic informations as bindings can be found in
> +Documentation/powerpc/dts-bindings/
> +
> +2. Passing the device tree
> +~~~~~~~~~~~~~~~~~~~~~~~~~~
> +The pointer to the device tree block (dtb) is passed via setup_data
> +(see [0]) which requires at least boot protocol 2.09. The type filed is
> +defined as
> +
> +#define SETUP_DTB 2
> +
> +3. Purpose
> +~~~~~~~~~~~
> +The device tree is used as an extension to the "boot page". As such it does not
> +parse / consider data which are already covered by the boot page. This includes
> +memory size, command line arguments or initrd address.
> +It simply holds information which can not be retrieved otherwise like interrupt
> +routing or a list of devices behind an I2C bus.
> +
> +[0] Documentation/x86/boot.txt
Please also add a brief description to section I of
Documentation/devicetree/booting-without-of.txt
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index d5ed94d..5d21095 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -297,6 +297,13 @@ config X86_BIGSMP
> ---help---
> This option is needed for the systems that have more than 8 CPUs
>
> +config X86_OF
> + bool "Support for device tree"
> + select OF
> + select OF_EARLY_FLATTREE
> + ---help---
> + Device tree support on X86.
> +
> if X86_32
> config X86_EXTENDED_PLATFORM
> bool "Support for extended (non-PC) x86 platforms"
> diff --git a/arch/x86/include/asm/bootparam.h b/arch/x86/include/asm/bootparam.h
> index c8bfe63..e020d88 100644
> --- a/arch/x86/include/asm/bootparam.h
> +++ b/arch/x86/include/asm/bootparam.h
> @@ -12,6 +12,7 @@
> /* setup data types */
> #define SETUP_NONE 0
> #define SETUP_E820_EXT 1
> +#define SETUP_DTB 2
>
> /* extensible setup data list node */
> struct setup_data {
> diff --git a/arch/x86/include/asm/irq.h b/arch/x86/include/asm/irq.h
> index c704b38..ba870bb 100644
> --- a/arch/x86/include/asm/irq.h
> +++ b/arch/x86/include/asm/irq.h
> @@ -10,9 +10,6 @@
> #include <asm/apicdef.h>
> #include <asm/irq_vectors.h>
>
> -/* Even though we don't support this, supply it to appease OF */
> -static inline void irq_dispose_mapping(unsigned int virq) { }
> -
> static inline int irq_canonicalize(int irq)
> {
> return ((irq == 2) ? 9 : irq);
> diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
> index b4ec95f..b227ba7 100644
> --- a/arch/x86/include/asm/prom.h
> +++ b/arch/x86/include/asm/prom.h
> @@ -1 +1,59 @@
> -/* dummy prom.h; here to make linux/of.h's #includes happy */
> +/*
> + * Definitions for Device tree / OpenFirmware handling on X86
> + *
> + * based on arch/powerpc/include/asm/prom.h which is
> + * Copyright (C) 1996-2005 Paul Mackerras.
> + *
> + * This program is free software; you can redistribute it and/or
> + * modify it under the terms of the GNU General Public License
> + * as published by the Free Software Foundation; either version
> + * 2 of the License, or (at your option) any later version.
> + */
> +
> +#ifndef _ASM_X86_PROM_H
> +#define _ASM_X86_PROM_H
> +#ifndef __ASSEMBLY__
> +
> +#include <linux/of.h>
> +#include <linux/types.h>
> +#include <asm/irq.h>
> +#include <asm/atomic.h>
> +#include <asm/setup.h>
> +
> +#ifdef CONFIG_OF
> +extern void add_dtb(u64 data);
> +#else
> +static inline void add_dtb(u64 data) { }
> +#endif
> +
> +extern char cmd_line[COMMAND_LINE_SIZE];
> +/* This number is used when no interrupt has been assigned */
> +#define NO_IRQ (0)
This line should no longer be necessary. drivers/of/irq.c defines
NO_IRQ if it isn't already defined by the architecture. I'm trying to
limit the exposure of NO_IRQ in dt code.
> +
> +#define pci_address_to_pio pci_address_to_pio
> +unsigned long pci_address_to_pio(phys_addr_t addr);
> +
> +/**
> + * irq_dispose_mapping - Unmap an interrupt
> + * @virq: linux virq number of the interrupt to unmap
> + *
> + * FIXME: We really should implement proper virq handling like power,
> + * but that's going to be major surgery.
Lennert Buytenhek is working on this. It actually shouldn't be too
bad.
> + */
> +static inline void irq_dispose_mapping(unsigned int virq) { }
> +
> +#define HAVE_ARCH_DEVTREE_FIXUPS
> +
> +#endif /* __ASSEMBLY__ */
> +
> +/*
> + * These includes are put at the bottom because they may contain things
> + * that are overridden by this file. Ideally they shouldn't be included
> + * by this file, but there are a bunch of .c files that currently depend
> + * on it. Eventually they will be cleaned up.
> + */
> +#include <linux/of_fdt.h>
> +#include <linux/of_irq.h>
> +#include <linux/platform_device.h>
You should be able to remove these includes. The problems described
in the header are mostly with device drivers and architecture code.
You shouldn't run into any of those issue, and if you do they should
be fixed at the source.
> +
> +#endif
> diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile
> index 34244b2..50ff982 100644
> --- a/arch/x86/kernel/Makefile
> +++ b/arch/x86/kernel/Makefile
> @@ -109,6 +109,7 @@ obj-$(CONFIG_MICROCODE) += microcode.o
> obj-$(CONFIG_X86_CHECK_BIOS_CORRUPTION) += check.o
>
> obj-$(CONFIG_SWIOTLB) += pci-swiotlb.o
> +obj-$(CONFIG_X86_OF) += prom.o
>
> ###
> # 64 bit specific files
> diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
> index 52945da..45cdc62 100644
> --- a/arch/x86/kernel/irq.c
> +++ b/arch/x86/kernel/irq.c
> @@ -276,15 +276,6 @@ void smp_x86_platform_ipi(struct pt_regs *regs)
>
> EXPORT_SYMBOL_GPL(vector_used_by_percpu_irq);
>
> -#ifdef CONFIG_OF
> -unsigned int irq_create_of_mapping(struct device_node *controller,
> - const u32 *intspec, unsigned int intsize)
> -{
> - return intspec[0];
> -}
> -EXPORT_SYMBOL_GPL(irq_create_of_mapping);
> -#endif
> -
> #ifdef CONFIG_HOTPLUG_CPU
> /* A cpu has been removed from cpu_online_mask. Reset irq affinities. */
> void fixup_irqs(void)
> diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
> index c752e97..149c87f 100644
> --- a/arch/x86/kernel/irqinit.c
> +++ b/arch/x86/kernel/irqinit.c
> @@ -25,6 +25,7 @@
> #include <asm/setup.h>
> #include <asm/i8259.h>
> #include <asm/traps.h>
> +#include <asm/prom.h>
I'm probably missing something. I don't see any changes to irqinit.c
other than this. What symbol definition has been moved to prom.h that
irqinit.c needs?
>
> /*
> * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
> diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
> new file mode 100644
> index 0000000..4969ffa
> --- /dev/null
> +++ b/arch/x86/kernel/prom.c
You don't need to name this prom.c. devicetree.c would make more sense.
prom is a legacy name from when only Open Firmware systems were using
the dt code.
> @@ -0,0 +1,51 @@
> +/*
> + * Architecture specific OF callbacks.
> + */
> +#include <linux/bootmem.h>
> +#include <linux/io.h>
> +#include <linux/list.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
> +#include <linux/slab.h>
> +
> +char __initdata cmd_line[COMMAND_LINE_SIZE];
> +
> +unsigned int irq_create_of_mapping(struct device_node *controller,
> + const u32 *intspec, unsigned int intsize)
> +{
> + return intspec[0];
> +
> +}
> +EXPORT_SYMBOL_GPL(irq_create_of_mapping);
> +
> +unsigned long pci_address_to_pio(phys_addr_t address)
> +{
> + /*
> + * The ioport address can be directly used by inX / outX
> + */
> + BUG_ON(address >= (1 << 16));
> + return (unsigned long)address;
> +}
> +EXPORT_SYMBOL_GPL(pci_address_to_pio);
> +
> +void __init early_init_dt_scan_chosen_arch(unsigned long node)
> +{
> + BUG();
> +}
> +
> +void __init early_init_dt_add_memory_arch(u64 base, u64 size)
> +{
> + BUG();
> +}
> +
> +void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
> +{
> + return __alloc_bootmem(size, align, __pa(MAX_DMA_ADDRESS));
> +}
> +
> +void __init add_dtb(u64 data)
> +{
> + initial_boot_params = (struct boot_param_header *)
> + phys_to_virt((u64) (u32) data +
> + offsetof(struct setup_data, data));
(struct boot_param_header *) cast unnecessary since phys_to_virt
should return a void*.
> +}
> diff --git a/arch/x86/kernel/setup.c b/arch/x86/kernel/setup.c
> index f8e7152..87396d2 100644
> --- a/arch/x86/kernel/setup.c
> +++ b/arch/x86/kernel/setup.c
> @@ -113,6 +113,7 @@
> #endif
> #include <asm/mce.h>
> #include <asm/alternative.h>
> +#include <asm/prom.h>
>
> /*
> * end_pfn only includes RAM, while max_pfn_mapped includes all e820 entries.
> @@ -446,6 +447,9 @@ static void __init parse_setup_data(void)
> case SETUP_E820_EXT:
> parse_e820_ext(data);
> break;
> + case SETUP_DTB:
> + add_dtb(pa_data);
> + break;
> default:
> break;
> }
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 02/14] x86: Add device tree support
@ 2011-02-16 21:27 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 21:27 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: dilinger, sodaville, devicetree-discuss, x86, linux-kernel
On Mon, Jan 24, 2011 at 10:04:27AM +0530, Sebastian Andrzej Siewior wrote:
> * Sebastian Andrzej Siewior | 2011-01-24 09:58:50 [+0530]:
>
> >This patch adds minimal support for device tree support on x86. It will
> >be passed to the kernel via setup_data which requires atleast boot
> >protocol 2.09.
> >Memory size, restricted memory regions, boot arguments are gathered the
> >traditional way so things like cmd_line are just here to let the code
> >compile.
> >The current plan is use the device tree as an extension and to gather
> >informations from it which can not be enumerated and have to be
> >hardcoded otherwise. This includes things like
> >- which devices are on this I2C/ SPI bus?
> >- how are the interrupts wired to IO APIC?
> >- where could my hpet be?
> >
>
> Andres, this patch moves some of the OF defines you added for OLPC from
> irq.c to prom.c which requires CONFIG_X86_OF to be enabled. A later
Why not simply make prom.c depend on CONFIG_OF? There is no need to
have an x86 specific config value for enabling devicetree code.
> patch changes irq_create_of_mapping() from returning intspec[0] to
> actually doing something. Could you please check how of OLPC gets broken
> and what we could do about it? :)
>
> Sebastian
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 02/14] x86: Add device tree support
@ 2011-02-16 21:27 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 21:27 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
dilinger-pFFUokh25LWsTnJN9+BGXg
On Mon, Jan 24, 2011 at 10:04:27AM +0530, Sebastian Andrzej Siewior wrote:
> * Sebastian Andrzej Siewior | 2011-01-24 09:58:50 [+0530]:
>
> >This patch adds minimal support for device tree support on x86. It will
> >be passed to the kernel via setup_data which requires atleast boot
> >protocol 2.09.
> >Memory size, restricted memory regions, boot arguments are gathered the
> >traditional way so things like cmd_line are just here to let the code
> >compile.
> >The current plan is use the device tree as an extension and to gather
> >informations from it which can not be enumerated and have to be
> >hardcoded otherwise. This includes things like
> >- which devices are on this I2C/ SPI bus?
> >- how are the interrupts wired to IO APIC?
> >- where could my hpet be?
> >
>
> Andres, this patch moves some of the OF defines you added for OLPC from
> irq.c to prom.c which requires CONFIG_X86_OF to be enabled. A later
Why not simply make prom.c depend on CONFIG_OF? There is no need to
have an x86 specific config value for enabling devicetree code.
> patch changes irq_create_of_mapping() from returning intspec[0] to
> actually doing something. Could you please check how of OLPC gets broken
> and what we could do about it? :)
>
> Sebastian
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 02/14] x86: Add device tree support
@ 2011-02-16 21:31 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 21:31 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: linux-kernel, sodaville, devicetree-discuss, x86
On Mon, Jan 24, 2011 at 09:58:50AM +0530, Sebastian Andrzej Siewior wrote:
> This patch adds minimal support for device tree support on x86. It will
> be passed to the kernel via setup_data which requires atleast boot
> protocol 2.09.
> Memory size, restricted memory regions, boot arguments are gathered the
> traditional way so things like cmd_line are just here to let the code
> compile.
> The current plan is use the device tree as an extension and to gather
> informations from it which can not be enumerated and have to be
> hardcoded otherwise. This includes things like
> - which devices are on this I2C/ SPI bus?
> - how are the interrupts wired to IO APIC?
> - where could my hpet be?
>
> Cc: devicetree-discuss@lists.ozlabs.org
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
> ---
[...]
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index d5ed94d..5d21095 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -297,6 +297,13 @@ config X86_BIGSMP
> ---help---
> This option is needed for the systems that have more than 8 CPUs
>
> +config X86_OF
> + bool "Support for device tree"
> + select OF
> + select OF_EARLY_FLATTREE
> + ---help---
> + Device tree support on X86.
> +
On ARM and MIPS, this is called 'config USE_OF'. It would be nice to have
some commonality. Maybe I should move the user-visible option to
drivers/of/Kconfig. Or perhaps I should just make CONFIG_OF itself
user visible.
thoughts?
g.
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 02/14] x86: Add device tree support
@ 2011-02-16 21:31 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 21:31 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA
On Mon, Jan 24, 2011 at 09:58:50AM +0530, Sebastian Andrzej Siewior wrote:
> This patch adds minimal support for device tree support on x86. It will
> be passed to the kernel via setup_data which requires atleast boot
> protocol 2.09.
> Memory size, restricted memory regions, boot arguments are gathered the
> traditional way so things like cmd_line are just here to let the code
> compile.
> The current plan is use the device tree as an extension and to gather
> informations from it which can not be enumerated and have to be
> hardcoded otherwise. This includes things like
> - which devices are on this I2C/ SPI bus?
> - how are the interrupts wired to IO APIC?
> - where could my hpet be?
>
> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
> Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
[...]
> diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
> index d5ed94d..5d21095 100644
> --- a/arch/x86/Kconfig
> +++ b/arch/x86/Kconfig
> @@ -297,6 +297,13 @@ config X86_BIGSMP
> ---help---
> This option is needed for the systems that have more than 8 CPUs
>
> +config X86_OF
> + bool "Support for device tree"
> + select OF
> + select OF_EARLY_FLATTREE
> + ---help---
> + Device tree support on X86.
> +
On ARM and MIPS, this is called 'config USE_OF'. It would be nice to have
some commonality. Maybe I should move the user-visible option to
drivers/of/Kconfig. Or perhaps I should just make CONFIG_OF itself
user visible.
thoughts?
g.
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP v2 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-02-16 21:44 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 21:44 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: David Gibson, linux-kernel, sodaville, devicetree-discuss, x86
On Thu, Feb 03, 2011 at 12:28:41AM +0530, Sebastian Andrzej Siewior wrote:
> Cc: devicetree-discuss@lists.ozlabs.org
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
> ---
> - intel,ce4100-immr become intel,ce4100-cp. cp stands for core
> peripherals. The Atom data sheet talks here about ACPI devices. Since
> we don't have ACPI this does not apply here.
> - The interrupt map is gone. There are now plenty of device nodes.
> - The "unit address string" got fixed, it uses not DD,V format.
It's actually useful to have this revision history as part of the
patch description itself so that when it is committed we've got a
record of exactly which version got committed.
g.
>
> arch/x86/platform/ce4100/falconfalls.dts | 424 ++++++++++++++++++++++++++++++
> 1 files changed, 424 insertions(+), 0 deletions(-)
> create mode 100644 arch/x86/platform/ce4100/falconfalls.dts
>
> diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts
> new file mode 100644
> index 0000000..e888657
> --- /dev/null
> +++ b/arch/x86/platform/ce4100/falconfalls.dts
> @@ -0,0 +1,424 @@
> +/*
> + * CE4100 on Falcon Falls
> + *
> + * (c) Copyright 2010 Intel Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; version 2 of the License.
> + */
> +/dts-v1/;
> +/ {
> + model = "intel,falconfalls";
> + compatible = "intel,falconfalls";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "intel,ce4100";
> + reg = <0>;
> + lapic = <&lapic0>;
> + };
> + };
> +
> + soc@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "intel,ce4100-cp";
You *must* include documentation for each of these new compatible
values before merging this patch. At the very least it acts as a
placeholder and describes exactly what the string describes.
> + ranges;
> +
> + ioapic1: interrupt-controller@fec00000 {
> + #interrupt-cells = <2>;
> + compatible = "intel,ioapic-ce4100", "intel,ioapic";
"intel,ioapic" is probably too generic and can be dropped. Newer
devices can claim compatibility with "intel,ioapic-ce4100" if they are
indeed compatible so that device drivers don't need to be modified.
It is better to anchor compatible values to real implementations that
try to come up with 'generic' or wildcard strings. Ditto through the
rest of the file.
"intel,ce4100-ioapic" (instead of intel,ioapic-ce4100) would follow
current convention better of specifying the chip first, followed by
the on-chip device.
> + interrupt-controller;
> + reg = <0xfec00000 0x1000>;
> + };
> +
> + timer@fed00000 {
> + compatible = "intel,hpet-ce4100", "intel,hpet";
> + reg = <0xfed00000 0x200>;
> + };
> +
> + lapic0: interrupt-controller@fee00000 {
> + compatible = "intel,lapic-ce4100", "intel,lapic";
> + reg = <0xfee00000 0x1000>;
> + };
> +
> + pci@3fc {
> + #address-cells = <3>;
> + #interrupt-cells = <1>;
> + #size-cells = <2>;
> + compatible = "intel,ce4100-pci", "pci";
> + device_type = "pci";
> + bus-range = <0 0>;
> + ranges = <0x2000000 0 0xbffff000 0xbffff000 0 0x1000
> + 0x2000000 0 0xdffe0000 0xdffe0000 0 0x1000
> + 0x0000000 0 0x0 0x0 0 0x100>;
> +
> + /* Secondary IO-APIC */
> + ioapic2: interrupt-controller@0,1 {
> + #interrupt-cells = <2>;
> + compatible = "intel,ioapic-ce4100", "intel,ioapic";
> + interrupt-controller;
> + reg = <0x100 0x0 0x0 0x0 0x0>;
> + assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
> + };
> +
> + pci@1,0 {
> + #address-cells = <3>;
> + #interrupt-cells = <1>;
> + #size-cells = <2>;
> + compatible = "intel,ce4100-pci", "pci";
> + device_type = "pci";
> + bus-range = <1 1>;
> + ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
> +
> + interrupt-parent = <&ioapic2>;
> +
> + display@2,0 {
> + compatible = "pci8086,2e5b.2",
> + "pci8086,2e5b",
> + "pciclass038000",
> + "pciclass0380";
> +
> + reg = <0x11000 0x0 0x0 0x0 0x0>;
> + interrupts = <0 1>;
> + };
Here's where things get a little sticky for PCI child devices
(probably should have thought about this earlier, sorry). Are these
devices runtime detectable? ie. does reading the PCI BARs and irq
configuration registers reflect reality?
In general, if something can be *reliably* detected then it should not
be listed in the device tree. However, if there is some horrid gotcha
that prevents it being detected reliably, then it definitely should
appear here.
I cannot answer this question for you since I don't know the hardware.
It's a judgement call that you'll need to make on whether or not these
PCI (or pseudo pci?) devices should be listed in the dt.
One of the things that does need to be improved is partial probing of
PCI busses so that only the messy PCI devices get listed in the device
tree, and the rest of the devices can get detected in the normal
manner.
> +
> + multimedia@3,0 {
> + compatible = "pci8086,2e5c.2",
> + "pci8086,2e5c",
> + "pciclass048000",
> + "pciclass0480";
> +
> + reg = <0x11800 0x0 0x0 0x0 0x0>;
> + interrupts = <2 1>;
> + };
> +
> + multimedia@4,0 {
> + compatible = "pci8086,2e5d.2",
> + "pci8086,2e5d",
> + "pciclass048000",
> + "pciclass0480";
> +
> + reg = <0x12000 0x0 0x0 0x0 0x0>;
> + interrupts = <4 1>;
> + };
> +
> + multimedia@4,1 {
> + compatible = "pci8086,2e5e.2",
> + "pci8086,2e5e",
> + "pciclass048000",
> + "pciclass0480";
> +
> + reg = <0x12100 0x0 0x0 0x0 0x0>;
> + interrupts = <5 1>;
> + };
> +
> + sound@6,0 {
> + compatible = "pci8086,2e5f.2",
> + "pci8086,2e5f",
> + "pciclass040100",
> + "pciclass0401";
> +
> + reg = <0x13000 0x0 0x0 0x0 0x0>;
> + interrupts = <6 1>;
> + };
> +
> + sound@6,1 {
> + compatible = "pci8086,2e5f.2",
> + "pci8086,2e5f",
> + "pciclass040100",
> + "pciclass0401";
> +
> + reg = <0x13100 0x0 0x0 0x0 0x0>;
> + interrupts = <7 1>;
> + };
> +
> + sound@6,2 {
> + compatible = "pci8086,2e60.2",
> + "pci8086,2e60",
> + "pciclass040100",
> + "pciclass0401";
> +
> + reg = <0x13200 0x0 0x0 0x0 0x0>;
> + interrupts = <8 1>;
> + };
> +
> + display@8,0 {
> + compatible = "pci8086,2e61.2",
> + "pci8086,2e61",
> + "pciclass038000",
> + "pciclass0380";
> +
> + reg = <0x14000 0x0 0x0 0x0 0x0>;
> + interrupts = <9 1>;
> + };
> +
> + display@8,1 {
> + compatible = "pci8086,2e62.2",
> + "pci8086,2e62",
> + "pciclass038000",
> + "pciclass0380";
> +
> + reg = <0x14100 0x0 0x0 0x0 0x0>;
> + interrupts = <10 1>;
> + };
> +
> + multimedia@8,2 {
> + compatible = "pci8086,2e63.2",
> + "pci8086,2e63",
> + "pciclass048000",
> + "pciclass0480";
> +
> + reg = <0x14200 0x0 0x0 0x0 0x0>;
> + interrupts = <11 1>;
> + };
> +
> + entertainment-encryption@9,0 {
> + compatible = "pci8086,2e64.2",
> + "pci8086,2e64",
> + "pciclass101000",
> + "pciclass1010";
> +
> + reg = <0x14800 0x0 0x0 0x0 0x0>;
> + interrupts = <12 1>;
> + };
> +
> + localbus@a,0 {
> + compatible = "pci8086,2e65.2",
> + "pci8086,2e65",
> + "pciclassff0000",
> + "pciclassff00";
> +
> + reg = <0x15000 0x0 0x0 0x0 0x0>;
> + };
> +
> + serial@b,0 {
> + compatible = "pci8086,2e66.2",
> + "pci8086,2e66",
> + "pciclass070003",
> + "pciclass0700";
> +
> + reg = <0x15800 0x0 0x0 0x0 0x0>;
> + interrupts = <14 1>;
> + };
> +
> + gpio@b,1 {
> + compatible = "pci8086,2e67.2",
> + "pci8086,2e67",
> + "pciclassff0000",
> + "pciclassff00";
> +
> + reg = <0x15900 0x0 0x0 0x0 0x0>;
> + interrupts = <15 1>;
> + };
> +
> + i2c-controller@b,2 {
> + #address-cells = <2>;
> + #size-cells = <1>;
> + compatible = "pci8086,2e68.2",
> + "pci8086,2e68",
> + "pciclass,ff0000",
> + "pciclass,ff00";
> +
> + reg = <0x15a00 0x0 0x0 0x0 0x0>;
> + interrupts = <16 1>;
Yeah, this would be an example of a device which must appear in the dt
since there is no way to detect the set of child i2c devices.
> + ranges = <0 0 0x02000000 0 0xdffe0500 0x100
> + 1 0 0x02000000 0 0xdffe0600 0x100
> + 2 0 0x02000000 0 0xdffe0700 0x100>;
> +
> + i2c@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "intel,ce4100-i2c-controller";
> + reg = <0 0 0x100>;
> + };
> +
> + i2c@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "intel,ce4100-i2c-controller";
> + reg = <1 0 0x100>;
> +
> + gpio@26 {
> + compatible = "ti,pcf8575";
> + reg = <0x26>;
> + };
> + };
> +
> + i2c@2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "intel,ce4100-i2c-controller";
> + reg = <2 0 0x100>;
> +
> + gpio@26 {
> + compatible = "ti,pcf8575";
> + reg = <0x26>;
> + };
> + };
> + };
> +
> + smard-card@b,3 {
> + compatible = "pci8086,2e69.2",
> + "pci8086,2e69",
> + "pciclass070500",
> + "pciclass0705";
> +
> + reg = <0x15b00 0x0 0x0 0x0 0x0>;
> + interrupts = <15 1>;
> + };
> +
> + spi-controller@b,4 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible =
> + "pci8086,2e6a.2",
> + "pci8086,2e6a",
> + "pciclass,ff0000",
> + "pciclass,ff00";
> +
> + reg = <0x15c00 0x0 0x0 0x0 0x0>;
> + interrupts = <15 1>;
Ditto here.
> +
> + dac@0 {
> + compatible = "ti,pcm1755";
> + reg = <0>;
> + spi-max-frequency = <115200>;
> + };
> +
> + dac@1 {
> + compatible = "ti,pcm1609a";
> + reg = <1>;
> + spi-max-frequency = <115200>;
> + };
> +
> + eeprom@2 {
> + compatible = "atmel,at93c46";
> + reg = <2>;
> + spi-max-frequency = <115200>;
> + };
> + };
> +
> + multimedia@b,7 {
> + compatible = "pci8086,2e6d.2",
> + "pci8086,2e6d",
> + "pciclassff0000",
> + "pciclassff00";
> +
> + reg = <0x15f00 0x0 0x0 0x0 0x0>;
> + };
> +
> + ethernet@c,0 {
> + compatible = "pci8086,2e6e.2",
> + "pci8086,2e6e",
> + "pciclass020000",
> + "pciclass0200";
> +
> + reg = <0x16000 0x0 0x0 0x0 0x0>;
> + interrupts = <21 1>;
> + };
> +
> + clock@c,1 {
> + compatible = "pci8086,2e6f.2",
> + "pci8086,2e6f",
> + "pciclassff0000",
> + "pciclassff00";
> +
> + reg = <0x16100 0x0 0x0 0x0 0x0>;
> + interrupts = <3 1>;
> + };
> +
> + usb@d,0 {
> + compatible = "pci8086,2e70.2",
> + "pci8086,2e70",
> + "pciclass0c0320",
> + "pciclass0c03";
> +
> + reg = <0x16800 0x0 0x0 0x0 0x0>;
> + interrupts = <22 3>;
> + };
> +
> + usb@d,1 {
> + compatible = "pci8086,2e70.2",
> + "pci8086,2e70",
> + "pciclass0c0320",
> + "pciclass0c03";
> +
> + reg = <0x16900 0x0 0x0 0x0 0x0>;
> + interrupts = <22 3>;
> + };
> +
> + sata@e,0 {
> + compatible = "pci8086,2e71.0",
> + "pci8086,2e71",
> + "pciclass010601",
> + "pciclass0106";
> +
> + reg = <0x17000 0x0 0x0 0x0 0x0>;
> + interrupts = <23 3>;
> + };
> +
> + flash@f,0 {
> + compatible = "pci8086,701.1",
> + "pci8086,701",
> + "pciclass050100",
> + "pciclass0501";
> +
> + reg = <0x17800 0x0 0x0 0x0 0x0>;
> + interrupts = <13 1>;
> + };
> +
> + entertainment-encryption@10,0 {
> + compatible = "pci8086,702.1",
> + "pci8086,702",
> + "pciclass101000",
> + "pciclass1010";
> +
> + reg = <0x18000 0x0 0x0 0x0 0x0>;
> + };
> +
> + co-processor@11,0 {
> + compatible = "pci8086,703.1",
> + "pci8086,703",
> + "pciclass0b4000",
> + "pciclass0b40";
> +
> + reg = <0x18800 0x0 0x0 0x0 0x0>;
> + interrupts = <1 1>;
> + };
> +
> + multimedia@12,0 {
> + compatible = "pci8086,704.0",
> + "pci8086,704",
> + "pciclass048000",
> + "pciclass0480";
> +
> + reg = <0x19000 0x0 0x0 0x0 0x0>;
> + };
> + };
> +
> + isa@1f,0 {
> + #address-cells = <2>;
> + #size-cells = <1>;
> + compatible = "isa";
> + ranges = <1 0 0 0 0 0x100>;
> +
> + rtc@70 {
> + compatible = "intel,ce4100-rtc", "motorola,mc146818";
> + interrupts = <8 3>;
> + interrupt-parent = <&ioapic1>;
> + ctrl-reg = <2>;
> + freq-reg = <0x26>;
> + reg = <1 0x70 2>;
> + };
> + };
> + };
> + };
> +};
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP v2 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-02-16 21:44 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 21:44 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA
On Thu, Feb 03, 2011 at 12:28:41AM +0530, Sebastian Andrzej Siewior wrote:
> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
> Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> - intel,ce4100-immr become intel,ce4100-cp. cp stands for core
> peripherals. The Atom data sheet talks here about ACPI devices. Since
> we don't have ACPI this does not apply here.
> - The interrupt map is gone. There are now plenty of device nodes.
> - The "unit address string" got fixed, it uses not DD,V format.
It's actually useful to have this revision history as part of the
patch description itself so that when it is committed we've got a
record of exactly which version got committed.
g.
>
> arch/x86/platform/ce4100/falconfalls.dts | 424 ++++++++++++++++++++++++++++++
> 1 files changed, 424 insertions(+), 0 deletions(-)
> create mode 100644 arch/x86/platform/ce4100/falconfalls.dts
>
> diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts
> new file mode 100644
> index 0000000..e888657
> --- /dev/null
> +++ b/arch/x86/platform/ce4100/falconfalls.dts
> @@ -0,0 +1,424 @@
> +/*
> + * CE4100 on Falcon Falls
> + *
> + * (c) Copyright 2010 Intel Corporation
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
> + * Free Software Foundation; version 2 of the License.
> + */
> +/dts-v1/;
> +/ {
> + model = "intel,falconfalls";
> + compatible = "intel,falconfalls";
> + #address-cells = <1>;
> + #size-cells = <1>;
> +
> + cpus {
> + #address-cells = <1>;
> + #size-cells = <0>;
> +
> + cpu@0 {
> + device_type = "cpu";
> + compatible = "intel,ce4100";
> + reg = <0>;
> + lapic = <&lapic0>;
> + };
> + };
> +
> + soc@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + compatible = "intel,ce4100-cp";
You *must* include documentation for each of these new compatible
values before merging this patch. At the very least it acts as a
placeholder and describes exactly what the string describes.
> + ranges;
> +
> + ioapic1: interrupt-controller@fec00000 {
> + #interrupt-cells = <2>;
> + compatible = "intel,ioapic-ce4100", "intel,ioapic";
"intel,ioapic" is probably too generic and can be dropped. Newer
devices can claim compatibility with "intel,ioapic-ce4100" if they are
indeed compatible so that device drivers don't need to be modified.
It is better to anchor compatible values to real implementations that
try to come up with 'generic' or wildcard strings. Ditto through the
rest of the file.
"intel,ce4100-ioapic" (instead of intel,ioapic-ce4100) would follow
current convention better of specifying the chip first, followed by
the on-chip device.
> + interrupt-controller;
> + reg = <0xfec00000 0x1000>;
> + };
> +
> + timer@fed00000 {
> + compatible = "intel,hpet-ce4100", "intel,hpet";
> + reg = <0xfed00000 0x200>;
> + };
> +
> + lapic0: interrupt-controller@fee00000 {
> + compatible = "intel,lapic-ce4100", "intel,lapic";
> + reg = <0xfee00000 0x1000>;
> + };
> +
> + pci@3fc {
> + #address-cells = <3>;
> + #interrupt-cells = <1>;
> + #size-cells = <2>;
> + compatible = "intel,ce4100-pci", "pci";
> + device_type = "pci";
> + bus-range = <0 0>;
> + ranges = <0x2000000 0 0xbffff000 0xbffff000 0 0x1000
> + 0x2000000 0 0xdffe0000 0xdffe0000 0 0x1000
> + 0x0000000 0 0x0 0x0 0 0x100>;
> +
> + /* Secondary IO-APIC */
> + ioapic2: interrupt-controller@0,1 {
> + #interrupt-cells = <2>;
> + compatible = "intel,ioapic-ce4100", "intel,ioapic";
> + interrupt-controller;
> + reg = <0x100 0x0 0x0 0x0 0x0>;
> + assigned-addresses = <0x02000000 0x0 0xbffff000 0x0 0x1000>;
> + };
> +
> + pci@1,0 {
> + #address-cells = <3>;
> + #interrupt-cells = <1>;
> + #size-cells = <2>;
> + compatible = "intel,ce4100-pci", "pci";
> + device_type = "pci";
> + bus-range = <1 1>;
> + ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
> +
> + interrupt-parent = <&ioapic2>;
> +
> + display@2,0 {
> + compatible = "pci8086,2e5b.2",
> + "pci8086,2e5b",
> + "pciclass038000",
> + "pciclass0380";
> +
> + reg = <0x11000 0x0 0x0 0x0 0x0>;
> + interrupts = <0 1>;
> + };
Here's where things get a little sticky for PCI child devices
(probably should have thought about this earlier, sorry). Are these
devices runtime detectable? ie. does reading the PCI BARs and irq
configuration registers reflect reality?
In general, if something can be *reliably* detected then it should not
be listed in the device tree. However, if there is some horrid gotcha
that prevents it being detected reliably, then it definitely should
appear here.
I cannot answer this question for you since I don't know the hardware.
It's a judgement call that you'll need to make on whether or not these
PCI (or pseudo pci?) devices should be listed in the dt.
One of the things that does need to be improved is partial probing of
PCI busses so that only the messy PCI devices get listed in the device
tree, and the rest of the devices can get detected in the normal
manner.
> +
> + multimedia@3,0 {
> + compatible = "pci8086,2e5c.2",
> + "pci8086,2e5c",
> + "pciclass048000",
> + "pciclass0480";
> +
> + reg = <0x11800 0x0 0x0 0x0 0x0>;
> + interrupts = <2 1>;
> + };
> +
> + multimedia@4,0 {
> + compatible = "pci8086,2e5d.2",
> + "pci8086,2e5d",
> + "pciclass048000",
> + "pciclass0480";
> +
> + reg = <0x12000 0x0 0x0 0x0 0x0>;
> + interrupts = <4 1>;
> + };
> +
> + multimedia@4,1 {
> + compatible = "pci8086,2e5e.2",
> + "pci8086,2e5e",
> + "pciclass048000",
> + "pciclass0480";
> +
> + reg = <0x12100 0x0 0x0 0x0 0x0>;
> + interrupts = <5 1>;
> + };
> +
> + sound@6,0 {
> + compatible = "pci8086,2e5f.2",
> + "pci8086,2e5f",
> + "pciclass040100",
> + "pciclass0401";
> +
> + reg = <0x13000 0x0 0x0 0x0 0x0>;
> + interrupts = <6 1>;
> + };
> +
> + sound@6,1 {
> + compatible = "pci8086,2e5f.2",
> + "pci8086,2e5f",
> + "pciclass040100",
> + "pciclass0401";
> +
> + reg = <0x13100 0x0 0x0 0x0 0x0>;
> + interrupts = <7 1>;
> + };
> +
> + sound@6,2 {
> + compatible = "pci8086,2e60.2",
> + "pci8086,2e60",
> + "pciclass040100",
> + "pciclass0401";
> +
> + reg = <0x13200 0x0 0x0 0x0 0x0>;
> + interrupts = <8 1>;
> + };
> +
> + display@8,0 {
> + compatible = "pci8086,2e61.2",
> + "pci8086,2e61",
> + "pciclass038000",
> + "pciclass0380";
> +
> + reg = <0x14000 0x0 0x0 0x0 0x0>;
> + interrupts = <9 1>;
> + };
> +
> + display@8,1 {
> + compatible = "pci8086,2e62.2",
> + "pci8086,2e62",
> + "pciclass038000",
> + "pciclass0380";
> +
> + reg = <0x14100 0x0 0x0 0x0 0x0>;
> + interrupts = <10 1>;
> + };
> +
> + multimedia@8,2 {
> + compatible = "pci8086,2e63.2",
> + "pci8086,2e63",
> + "pciclass048000",
> + "pciclass0480";
> +
> + reg = <0x14200 0x0 0x0 0x0 0x0>;
> + interrupts = <11 1>;
> + };
> +
> + entertainment-encryption@9,0 {
> + compatible = "pci8086,2e64.2",
> + "pci8086,2e64",
> + "pciclass101000",
> + "pciclass1010";
> +
> + reg = <0x14800 0x0 0x0 0x0 0x0>;
> + interrupts = <12 1>;
> + };
> +
> + localbus@a,0 {
> + compatible = "pci8086,2e65.2",
> + "pci8086,2e65",
> + "pciclassff0000",
> + "pciclassff00";
> +
> + reg = <0x15000 0x0 0x0 0x0 0x0>;
> + };
> +
> + serial@b,0 {
> + compatible = "pci8086,2e66.2",
> + "pci8086,2e66",
> + "pciclass070003",
> + "pciclass0700";
> +
> + reg = <0x15800 0x0 0x0 0x0 0x0>;
> + interrupts = <14 1>;
> + };
> +
> + gpio@b,1 {
> + compatible = "pci8086,2e67.2",
> + "pci8086,2e67",
> + "pciclassff0000",
> + "pciclassff00";
> +
> + reg = <0x15900 0x0 0x0 0x0 0x0>;
> + interrupts = <15 1>;
> + };
> +
> + i2c-controller@b,2 {
> + #address-cells = <2>;
> + #size-cells = <1>;
> + compatible = "pci8086,2e68.2",
> + "pci8086,2e68",
> + "pciclass,ff0000",
> + "pciclass,ff00";
> +
> + reg = <0x15a00 0x0 0x0 0x0 0x0>;
> + interrupts = <16 1>;
Yeah, this would be an example of a device which must appear in the dt
since there is no way to detect the set of child i2c devices.
> + ranges = <0 0 0x02000000 0 0xdffe0500 0x100
> + 1 0 0x02000000 0 0xdffe0600 0x100
> + 2 0 0x02000000 0 0xdffe0700 0x100>;
> +
> + i2c@0 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "intel,ce4100-i2c-controller";
> + reg = <0 0 0x100>;
> + };
> +
> + i2c@1 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "intel,ce4100-i2c-controller";
> + reg = <1 0 0x100>;
> +
> + gpio@26 {
> + compatible = "ti,pcf8575";
> + reg = <0x26>;
> + };
> + };
> +
> + i2c@2 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible = "intel,ce4100-i2c-controller";
> + reg = <2 0 0x100>;
> +
> + gpio@26 {
> + compatible = "ti,pcf8575";
> + reg = <0x26>;
> + };
> + };
> + };
> +
> + smard-card@b,3 {
> + compatible = "pci8086,2e69.2",
> + "pci8086,2e69",
> + "pciclass070500",
> + "pciclass0705";
> +
> + reg = <0x15b00 0x0 0x0 0x0 0x0>;
> + interrupts = <15 1>;
> + };
> +
> + spi-controller@b,4 {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + compatible =
> + "pci8086,2e6a.2",
> + "pci8086,2e6a",
> + "pciclass,ff0000",
> + "pciclass,ff00";
> +
> + reg = <0x15c00 0x0 0x0 0x0 0x0>;
> + interrupts = <15 1>;
Ditto here.
> +
> + dac@0 {
> + compatible = "ti,pcm1755";
> + reg = <0>;
> + spi-max-frequency = <115200>;
> + };
> +
> + dac@1 {
> + compatible = "ti,pcm1609a";
> + reg = <1>;
> + spi-max-frequency = <115200>;
> + };
> +
> + eeprom@2 {
> + compatible = "atmel,at93c46";
> + reg = <2>;
> + spi-max-frequency = <115200>;
> + };
> + };
> +
> + multimedia@b,7 {
> + compatible = "pci8086,2e6d.2",
> + "pci8086,2e6d",
> + "pciclassff0000",
> + "pciclassff00";
> +
> + reg = <0x15f00 0x0 0x0 0x0 0x0>;
> + };
> +
> + ethernet@c,0 {
> + compatible = "pci8086,2e6e.2",
> + "pci8086,2e6e",
> + "pciclass020000",
> + "pciclass0200";
> +
> + reg = <0x16000 0x0 0x0 0x0 0x0>;
> + interrupts = <21 1>;
> + };
> +
> + clock@c,1 {
> + compatible = "pci8086,2e6f.2",
> + "pci8086,2e6f",
> + "pciclassff0000",
> + "pciclassff00";
> +
> + reg = <0x16100 0x0 0x0 0x0 0x0>;
> + interrupts = <3 1>;
> + };
> +
> + usb@d,0 {
> + compatible = "pci8086,2e70.2",
> + "pci8086,2e70",
> + "pciclass0c0320",
> + "pciclass0c03";
> +
> + reg = <0x16800 0x0 0x0 0x0 0x0>;
> + interrupts = <22 3>;
> + };
> +
> + usb@d,1 {
> + compatible = "pci8086,2e70.2",
> + "pci8086,2e70",
> + "pciclass0c0320",
> + "pciclass0c03";
> +
> + reg = <0x16900 0x0 0x0 0x0 0x0>;
> + interrupts = <22 3>;
> + };
> +
> + sata@e,0 {
> + compatible = "pci8086,2e71.0",
> + "pci8086,2e71",
> + "pciclass010601",
> + "pciclass0106";
> +
> + reg = <0x17000 0x0 0x0 0x0 0x0>;
> + interrupts = <23 3>;
> + };
> +
> + flash@f,0 {
> + compatible = "pci8086,701.1",
> + "pci8086,701",
> + "pciclass050100",
> + "pciclass0501";
> +
> + reg = <0x17800 0x0 0x0 0x0 0x0>;
> + interrupts = <13 1>;
> + };
> +
> + entertainment-encryption@10,0 {
> + compatible = "pci8086,702.1",
> + "pci8086,702",
> + "pciclass101000",
> + "pciclass1010";
> +
> + reg = <0x18000 0x0 0x0 0x0 0x0>;
> + };
> +
> + co-processor@11,0 {
> + compatible = "pci8086,703.1",
> + "pci8086,703",
> + "pciclass0b4000",
> + "pciclass0b40";
> +
> + reg = <0x18800 0x0 0x0 0x0 0x0>;
> + interrupts = <1 1>;
> + };
> +
> + multimedia@12,0 {
> + compatible = "pci8086,704.0",
> + "pci8086,704",
> + "pciclass048000",
> + "pciclass0480";
> +
> + reg = <0x19000 0x0 0x0 0x0 0x0>;
> + };
> + };
> +
> + isa@1f,0 {
> + #address-cells = <2>;
> + #size-cells = <1>;
> + compatible = "isa";
> + ranges = <1 0 0 0 0 0x100>;
> +
> + rtc@70 {
> + compatible = "intel,ce4100-rtc", "motorola,mc146818";
> + interrupts = <8 3>;
> + interrupt-parent = <&ioapic1>;
> + ctrl-reg = <2>;
> + freq-reg = <0x26>;
> + reg = <1 0x70 2>;
> + };
> + };
> + };
> + };
> +};
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 05/14] x86/dtb: add early parsing of APIC and IO APIC
@ 2011-02-16 21:47 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 21:47 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: linux-kernel, sodaville, devicetree-discuss, x86
On Mon, Jan 24, 2011 at 09:58:53AM +0530, Sebastian Andrzej Siewior wrote:
> The apic & ioapic have to be added to system early because
> native_init_IRQ() requires it. In order to obtain the address of the
> ioapic the device tree has to be unflattened because
> of_address_to_resource() has to work.
There is some work being done to provide a flattree version of of_address_to_resource, but that code isn't ready yet.
> The device tree is relocated to ensure it is always covered by the
> kernel and the boot loader does not have to make assumptions about
> kernel's memory layout.
>
> Cc: devicetree-discuss@lists.ozlabs.org
> Cc: Dirk Brandewie <dirk.brandewie@gmail.com>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Looks okay to me
Acked-by: Grant Likely <grant.likely@secretlab.ca>
> ---
> arch/x86/include/asm/prom.h | 7 +++
> arch/x86/kernel/irqinit.c | 2 +-
> arch/x86/kernel/prom.c | 112 +++++++++++++++++++++++++++++++++++++++++-
> 3 files changed, 117 insertions(+), 4 deletions(-)
>
> diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
> index ed7bb62..bd67ab2 100644
> --- a/arch/x86/include/asm/prom.h
> +++ b/arch/x86/include/asm/prom.h
> @@ -22,10 +22,17 @@
> #include <asm/irq_controller.h>
>
> #ifdef CONFIG_OF
> +extern int of_ioapic;
> +extern u64 initial_dtb;
> extern void add_dtb(u64 data);
> +void x86_dtb_find_config(void);
> +void x86_dtb_get_config(unsigned int unused);
> void add_interrupt_host(struct irq_domain *ih);
> #else
> static inline void add_dtb(u64 data) { }
> +#define x86_dtb_find_config x86_init_noop
> +#define x86_dtb_get_config x86_init_uint_noop
> +#define of_ioapic 0
> #endif
>
> extern char cmd_line[COMMAND_LINE_SIZE];
> diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
> index 149c87f..4cadf86 100644
> --- a/arch/x86/kernel/irqinit.c
> +++ b/arch/x86/kernel/irqinit.c
> @@ -244,7 +244,7 @@ void __init native_init_IRQ(void)
> set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]);
> }
>
> - if (!acpi_ioapic)
> + if (!acpi_ioapic && !of_ioapic)
> setup_irq(2, &irq2);
>
> #ifdef CONFIG_X86_32
> diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
> index 95f9551..e4d53bf 100644
> --- a/arch/x86/kernel/prom.c
> +++ b/arch/x86/kernel/prom.c
> @@ -6,15 +6,20 @@
> #include <linux/interrupt.h>
> #include <linux/list.h>
> #include <linux/of.h>
> +#include <linux/of_address.h>
> #include <linux/of_platform.h>
> #include <linux/slab.h>
>
> #include <asm/irq_controller.h>
> +#include <asm/io_apic.h>
>
> +__initdata u64 initial_dtb;
> char __initdata cmd_line[COMMAND_LINE_SIZE];
> static LIST_HEAD(irq_domains);
> static DEFINE_RAW_SPINLOCK(big_irq_lock);
>
> +int __initdata of_ioapic;
> +
> void add_interrupt_host(struct irq_domain *ih)
> {
> unsigned long flags;
> @@ -90,7 +95,108 @@ void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
>
> void __init add_dtb(u64 data)
> {
> - initial_boot_params = (struct boot_param_header *)
> - phys_to_virt((u64) (u32) data +
> - offsetof(struct setup_data, data));
> + initial_dtb = data + offsetof(struct setup_data, data);
> +}
> +
> +static void __init dtb_lapic_setup(void)
> +{
> +#ifdef CONFIG_X86_LOCAL_APIC
> + if (apic_force_enable())
> + return;
> +
> + smp_found_config = 1;
> + pic_mode = 1;
> + /* Required for ioapic registration */
> + set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
> + if (boot_cpu_physical_apicid == -1U)
> + boot_cpu_physical_apicid = read_apic_id();
> +
> + generic_processor_info(boot_cpu_physical_apicid,
> + GET_APIC_VERSION(apic_read(APIC_LVR)));
> +#endif
> +}
> +
> +#ifdef CONFIG_X86_IO_APIC
> +static unsigned int ioapic_id;
> +
> +static void __init dtb_add_ioapic(struct device_node *dn)
> +{
> + struct resource r;
> + int ret;
> +
> + ret = of_address_to_resource(dn, 0, &r);
> + if (ret) {
> + printk(KERN_ERR "Can't obtain address from node %s.\n",
> + dn->full_name);
> + return;
> + }
> + mp_register_ioapic(++ioapic_id, r.start, gsi_top);
> +}
> +
> +static void __init dtb_ioapic_setup(void)
> +{
> + struct device_node *dn;
> +
> + if (!smp_found_config)
> + return;
> +
> + for_each_compatible_node(dn, NULL, "intel,ioapic")
> + dtb_add_ioapic(dn);
> +
> + if (nr_ioapics) {
> + of_ioapic = 1;
> + return;
> + }
> + printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
> + smp_found_config = 0;
> +}
> +#else
> +static void __init dtb_ioapic_setup(void) {}
> +#endif
> +
> +static void __init dtb_apic_setup(void)
> +{
> + dtb_lapic_setup();
> + dtb_ioapic_setup();
> +}
> +
> +void __init x86_dtb_find_config(void)
> +{
> + if (initial_dtb)
> + smp_found_config = 1;
> + else
> + printk(KERN_ERR "Missing device tree!.\n");
> +}
> +
> +void __init x86_dtb_get_config(unsigned int unused)
> +{
> + u32 size;
> + u32 map_len;
> + void *new_dtb;
> +
> + if (!initial_dtb)
> + return;
> +
> + map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
> + (u64)sizeof(struct boot_param_header));
> +
> + initial_boot_params = early_memremap(initial_dtb, map_len);
> + size = be32_to_cpu(initial_boot_params->totalsize);
> + if (map_len < size) {
> + early_iounmap(initial_boot_params, map_len);
> + initial_boot_params = early_memremap(initial_dtb, size);
> + map_len = size;
> + }
> +
> + new_dtb = alloc_bootmem(size);
> + memcpy(new_dtb, initial_boot_params, size);
> + early_iounmap(initial_boot_params, map_len);
> +
> + initial_boot_params = new_dtb;
> +
> + /* root level address cells */
> + of_scan_flat_dt(early_init_dt_scan_root, NULL);
> +
> + unflatten_device_tree();
> + dtb_apic_setup();
> }
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 05/14] x86/dtb: add early parsing of APIC and IO APIC
@ 2011-02-16 21:47 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 21:47 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA
On Mon, Jan 24, 2011 at 09:58:53AM +0530, Sebastian Andrzej Siewior wrote:
> The apic & ioapic have to be added to system early because
> native_init_IRQ() requires it. In order to obtain the address of the
> ioapic the device tree has to be unflattened because
> of_address_to_resource() has to work.
There is some work being done to provide a flattree version of of_address_to_resource, but that code isn't ready yet.
> The device tree is relocated to ensure it is always covered by the
> kernel and the boot loader does not have to make assumptions about
> kernel's memory layout.
>
> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Cc: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Looks okay to me
Acked-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
> ---
> arch/x86/include/asm/prom.h | 7 +++
> arch/x86/kernel/irqinit.c | 2 +-
> arch/x86/kernel/prom.c | 112 +++++++++++++++++++++++++++++++++++++++++-
> 3 files changed, 117 insertions(+), 4 deletions(-)
>
> diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
> index ed7bb62..bd67ab2 100644
> --- a/arch/x86/include/asm/prom.h
> +++ b/arch/x86/include/asm/prom.h
> @@ -22,10 +22,17 @@
> #include <asm/irq_controller.h>
>
> #ifdef CONFIG_OF
> +extern int of_ioapic;
> +extern u64 initial_dtb;
> extern void add_dtb(u64 data);
> +void x86_dtb_find_config(void);
> +void x86_dtb_get_config(unsigned int unused);
> void add_interrupt_host(struct irq_domain *ih);
> #else
> static inline void add_dtb(u64 data) { }
> +#define x86_dtb_find_config x86_init_noop
> +#define x86_dtb_get_config x86_init_uint_noop
> +#define of_ioapic 0
> #endif
>
> extern char cmd_line[COMMAND_LINE_SIZE];
> diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
> index 149c87f..4cadf86 100644
> --- a/arch/x86/kernel/irqinit.c
> +++ b/arch/x86/kernel/irqinit.c
> @@ -244,7 +244,7 @@ void __init native_init_IRQ(void)
> set_intr_gate(i, interrupt[i-FIRST_EXTERNAL_VECTOR]);
> }
>
> - if (!acpi_ioapic)
> + if (!acpi_ioapic && !of_ioapic)
> setup_irq(2, &irq2);
>
> #ifdef CONFIG_X86_32
> diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
> index 95f9551..e4d53bf 100644
> --- a/arch/x86/kernel/prom.c
> +++ b/arch/x86/kernel/prom.c
> @@ -6,15 +6,20 @@
> #include <linux/interrupt.h>
> #include <linux/list.h>
> #include <linux/of.h>
> +#include <linux/of_address.h>
> #include <linux/of_platform.h>
> #include <linux/slab.h>
>
> #include <asm/irq_controller.h>
> +#include <asm/io_apic.h>
>
> +__initdata u64 initial_dtb;
> char __initdata cmd_line[COMMAND_LINE_SIZE];
> static LIST_HEAD(irq_domains);
> static DEFINE_RAW_SPINLOCK(big_irq_lock);
>
> +int __initdata of_ioapic;
> +
> void add_interrupt_host(struct irq_domain *ih)
> {
> unsigned long flags;
> @@ -90,7 +95,108 @@ void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
>
> void __init add_dtb(u64 data)
> {
> - initial_boot_params = (struct boot_param_header *)
> - phys_to_virt((u64) (u32) data +
> - offsetof(struct setup_data, data));
> + initial_dtb = data + offsetof(struct setup_data, data);
> +}
> +
> +static void __init dtb_lapic_setup(void)
> +{
> +#ifdef CONFIG_X86_LOCAL_APIC
> + if (apic_force_enable())
> + return;
> +
> + smp_found_config = 1;
> + pic_mode = 1;
> + /* Required for ioapic registration */
> + set_fixmap_nocache(FIX_APIC_BASE, mp_lapic_addr);
> + if (boot_cpu_physical_apicid == -1U)
> + boot_cpu_physical_apicid = read_apic_id();
> +
> + generic_processor_info(boot_cpu_physical_apicid,
> + GET_APIC_VERSION(apic_read(APIC_LVR)));
> +#endif
> +}
> +
> +#ifdef CONFIG_X86_IO_APIC
> +static unsigned int ioapic_id;
> +
> +static void __init dtb_add_ioapic(struct device_node *dn)
> +{
> + struct resource r;
> + int ret;
> +
> + ret = of_address_to_resource(dn, 0, &r);
> + if (ret) {
> + printk(KERN_ERR "Can't obtain address from node %s.\n",
> + dn->full_name);
> + return;
> + }
> + mp_register_ioapic(++ioapic_id, r.start, gsi_top);
> +}
> +
> +static void __init dtb_ioapic_setup(void)
> +{
> + struct device_node *dn;
> +
> + if (!smp_found_config)
> + return;
> +
> + for_each_compatible_node(dn, NULL, "intel,ioapic")
> + dtb_add_ioapic(dn);
> +
> + if (nr_ioapics) {
> + of_ioapic = 1;
> + return;
> + }
> + printk(KERN_ERR "Error: No information about IO-APIC in OF.\n");
> + smp_found_config = 0;
> +}
> +#else
> +static void __init dtb_ioapic_setup(void) {}
> +#endif
> +
> +static void __init dtb_apic_setup(void)
> +{
> + dtb_lapic_setup();
> + dtb_ioapic_setup();
> +}
> +
> +void __init x86_dtb_find_config(void)
> +{
> + if (initial_dtb)
> + smp_found_config = 1;
> + else
> + printk(KERN_ERR "Missing device tree!.\n");
> +}
> +
> +void __init x86_dtb_get_config(unsigned int unused)
> +{
> + u32 size;
> + u32 map_len;
> + void *new_dtb;
> +
> + if (!initial_dtb)
> + return;
> +
> + map_len = max(PAGE_SIZE - (initial_dtb & ~PAGE_MASK),
> + (u64)sizeof(struct boot_param_header));
> +
> + initial_boot_params = early_memremap(initial_dtb, map_len);
> + size = be32_to_cpu(initial_boot_params->totalsize);
> + if (map_len < size) {
> + early_iounmap(initial_boot_params, map_len);
> + initial_boot_params = early_memremap(initial_dtb, size);
> + map_len = size;
> + }
> +
> + new_dtb = alloc_bootmem(size);
> + memcpy(new_dtb, initial_boot_params, size);
> + early_iounmap(initial_boot_params, map_len);
> +
> + initial_boot_params = new_dtb;
> +
> + /* root level address cells */
> + of_scan_flat_dt(early_init_dt_scan_root, NULL);
> +
> + unflatten_device_tree();
> + dtb_apic_setup();
> }
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH OF 07/14] of: move of_irq_map_pci() into generic code
2011-01-24 4:28 ` Sebastian Andrzej Siewior
@ 2011-02-16 21:53 ` Grant Likely
-1 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 21:53 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: linux-kernel, sodaville, devicetree-discuss, x86,
Sebastian Andrzej Siewior, Michal Simek, linuxppc-dev,
microblaze-uclinux
On Sun, Jan 23, 2011 at 9:28 PM, Sebastian Andrzej Siewior
<bigeasy@linutronix.de> wrote:
> From: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
>
> There is a tiny difference between PPC32 and PPC64. Microblaze uses the
> PPC32 variant.
>
> Cc: devicetree-discuss@lists.ozlabs.org
> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
I've got this one in my devicetree/next branch which is pulled into
linux-next. I've not received an ack from Ben yet. Michal, is this
okay by you?
http://git.secretlab.ca/?p=linux-2.6.git;a=commit;h=04bea68b2f0eeebb089ecc67b618795925268b4a
g.
> ---
> arch/microblaze/include/asm/pci-bridge.h | 12 ++++
> arch/microblaze/include/asm/prom.h | 15 -----
> arch/microblaze/kernel/prom_parse.c | 77 ---------------------------
> arch/microblaze/pci/pci-common.c | 1 +
> arch/powerpc/include/asm/pci-bridge.h | 10 ++++
> arch/powerpc/include/asm/prom.h | 15 -----
> arch/powerpc/kernel/pci-common.c | 1 +
> arch/powerpc/kernel/prom_parse.c | 84 ------------------------------
> drivers/of/Kconfig | 6 ++
> drivers/of/Makefile | 1 +
> drivers/of/of_pci.c | 80 ++++++++++++++++++++++++++++
> include/linux/of_pci.h | 20 +++++++
> 12 files changed, 131 insertions(+), 191 deletions(-)
> create mode 100644 drivers/of/of_pci.c
> create mode 100644 include/linux/of_pci.h
>
> diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
> index 0c68764..c2a40a4 100644
> --- a/arch/microblaze/include/asm/pci-bridge.h
> +++ b/arch/microblaze/include/asm/pci-bridge.h
> @@ -104,11 +104,22 @@ struct pci_controller {
> int global_number; /* PCI domain number */
> };
>
> +#ifdef CONFIG_PCI
> static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
> {
> return bus->sysdata;
> }
>
> +static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
> +{
> + struct pci_controller *host;
> +
> + if (bus->self)
> + return pci_device_to_OF_node(bus->self);
> + host = pci_bus_to_host(bus);
> + return host ? host->dn : NULL;
> +}
> +
> static inline int isa_vaddr_is_ioport(void __iomem *address)
> {
> /* No specific ISA handling on ppc32 at this stage, it
> @@ -116,6 +127,7 @@ static inline int isa_vaddr_is_ioport(void __iomem *address)
> */
> return 0;
> }
> +#endif
>
> /* These are used for config access before all the PCI probing
> has been done. */
> diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include/asm/prom.h
> index 2e72af0..d0890d3 100644
> --- a/arch/microblaze/include/asm/prom.h
> +++ b/arch/microblaze/include/asm/prom.h
> @@ -64,21 +64,6 @@ extern void kdump_move_device_tree(void);
> /* CPU OF node matching */
> struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
>
> -/**
> - * of_irq_map_pci - Resolve the interrupt for a PCI device
> - * @pdev: the device whose interrupt is to be resolved
> - * @out_irq: structure of_irq filled by this function
> - *
> - * This function resolves the PCI interrupt for a given PCI device. If a
> - * device-node exists for a given pci_dev, it will use normal OF tree
> - * walking. If not, it will implement standard swizzling and walk up the
> - * PCI tree until an device-node is found, at which point it will finish
> - * resolving using the OF tree walking.
> - */
> -struct pci_dev;
> -struct of_irq;
> -extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
> -
> #endif /* __ASSEMBLY__ */
> #endif /* __KERNEL__ */
>
> diff --git a/arch/microblaze/kernel/prom_parse.c b/arch/microblaze/kernel/prom_parse.c
> index 9ae24f4..47187cc 100644
> --- a/arch/microblaze/kernel/prom_parse.c
> +++ b/arch/microblaze/kernel/prom_parse.c
> @@ -2,88 +2,11 @@
>
> #include <linux/kernel.h>
> #include <linux/string.h>
> -#include <linux/pci_regs.h>
> #include <linux/module.h>
> #include <linux/ioport.h>
> #include <linux/etherdevice.h>
> #include <linux/of_address.h>
> #include <asm/prom.h>
> -#include <asm/pci-bridge.h>
> -
> -#ifdef CONFIG_PCI
> -int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
> -{
> - struct device_node *dn, *ppnode;
> - struct pci_dev *ppdev;
> - u32 lspec;
> - u32 laddr[3];
> - u8 pin;
> - int rc;
> -
> - /* Check if we have a device node, if yes, fallback to standard OF
> - * parsing
> - */
> - dn = pci_device_to_OF_node(pdev);
> - if (dn)
> - return of_irq_map_one(dn, 0, out_irq);
> -
> - /* Ok, we don't, time to have fun. Let's start by building up an
> - * interrupt spec. we assume #interrupt-cells is 1, which is standard
> - * for PCI. If you do different, then don't use that routine.
> - */
> - rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
> - if (rc != 0)
> - return rc;
> - /* No pin, exit */
> - if (pin == 0)
> - return -ENODEV;
> -
> - /* Now we walk up the PCI tree */
> - lspec = pin;
> - for (;;) {
> - /* Get the pci_dev of our parent */
> - ppdev = pdev->bus->self;
> -
> - /* Ouch, it's a host bridge... */
> - if (ppdev == NULL) {
> - struct pci_controller *host;
> - host = pci_bus_to_host(pdev->bus);
> - ppnode = host ? host->dn : NULL;
> - /* No node for host bridge ? give up */
> - if (ppnode == NULL)
> - return -EINVAL;
> - } else
> - /* We found a P2P bridge, check if it has a node */
> - ppnode = pci_device_to_OF_node(ppdev);
> -
> - /* Ok, we have found a parent with a device-node, hand over to
> - * the OF parsing code.
> - * We build a unit address from the linux device to be used for
> - * resolution. Note that we use the linux bus number which may
> - * not match your firmware bus numbering.
> - * Fortunately, in most cases, interrupt-map-mask doesn't
> - * include the bus number as part of the matching.
> - * You should still be careful about that though if you intend
> - * to rely on this function (you ship a firmware that doesn't
> - * create device nodes for all PCI devices).
> - */
> - if (ppnode)
> - break;
> -
> - /* We can only get here if we hit a P2P bridge with no node,
> - * let's do standard swizzling and try again
> - */
> - lspec = pci_swizzle_interrupt_pin(pdev, lspec);
> - pdev = ppdev;
> - }
> -
> - laddr[0] = (pdev->bus->number << 16)
> - | (pdev->devfn << 8);
> - laddr[1] = laddr[2] = 0;
> - return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
> -}
> -EXPORT_SYMBOL_GPL(of_irq_map_pci);
> -#endif /* CONFIG_PCI */
>
> void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
> unsigned long *busno, unsigned long *phys, unsigned long *size)
> diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
> index e363615..1e01a12 100644
> --- a/arch/microblaze/pci/pci-common.c
> +++ b/arch/microblaze/pci/pci-common.c
> @@ -29,6 +29,7 @@
> #include <linux/slab.h>
> #include <linux/of.h>
> #include <linux/of_address.h>
> +#include <linux/of_pci.h>
>
> #include <asm/processor.h>
> #include <asm/io.h>
> diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
> index 51e9e6f..edeb80f 100644
> --- a/arch/powerpc/include/asm/pci-bridge.h
> +++ b/arch/powerpc/include/asm/pci-bridge.h
> @@ -171,6 +171,16 @@ static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
> return bus->sysdata;
> }
>
> +static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
> +{
> + struct pci_controller *host;
> +
> + if (bus->self)
> + return pci_device_to_OF_node(bus->self);
> + host = pci_bus_to_host(bus);
> + return host ? host->dn : NULL;
> +}
> +
> static inline int isa_vaddr_is_ioport(void __iomem *address)
> {
> /* No specific ISA handling on ppc32 at this stage, it
> diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h
> index d727575..c189aa5 100644
> --- a/arch/powerpc/include/asm/prom.h
> +++ b/arch/powerpc/include/asm/prom.h
> @@ -70,21 +70,6 @@ static inline int of_node_to_nid(struct device_node *device) { return 0; }
> #endif
> #define of_node_to_nid of_node_to_nid
>
> -/**
> - * of_irq_map_pci - Resolve the interrupt for a PCI device
> - * @pdev: the device whose interrupt is to be resolved
> - * @out_irq: structure of_irq filled by this function
> - *
> - * This function resolves the PCI interrupt for a given PCI device. If a
> - * device-node exists for a given pci_dev, it will use normal OF tree
> - * walking. If not, it will implement standard swizzling and walk up the
> - * PCI tree until an device-node is found, at which point it will finish
> - * resolving using the OF tree walking.
> - */
> -struct pci_dev;
> -struct of_irq;
> -extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
> -
> extern void of_instantiate_rtc(void);
>
> /* These includes are put at the bottom because they may contain things
> diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
> index 10a44e6..eb341be 100644
> --- a/arch/powerpc/kernel/pci-common.c
> +++ b/arch/powerpc/kernel/pci-common.c
> @@ -22,6 +22,7 @@
> #include <linux/init.h>
> #include <linux/bootmem.h>
> #include <linux/of_address.h>
> +#include <linux/of_pci.h>
> #include <linux/mm.h>
> #include <linux/list.h>
> #include <linux/syscalls.h>
> diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c
> index c2b7a07..47187cc 100644
> --- a/arch/powerpc/kernel/prom_parse.c
> +++ b/arch/powerpc/kernel/prom_parse.c
> @@ -2,95 +2,11 @@
>
> #include <linux/kernel.h>
> #include <linux/string.h>
> -#include <linux/pci_regs.h>
> #include <linux/module.h>
> #include <linux/ioport.h>
> #include <linux/etherdevice.h>
> #include <linux/of_address.h>
> #include <asm/prom.h>
> -#include <asm/pci-bridge.h>
> -
> -#ifdef CONFIG_PCI
> -int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
> -{
> - struct device_node *dn, *ppnode;
> - struct pci_dev *ppdev;
> - u32 lspec;
> - u32 laddr[3];
> - u8 pin;
> - int rc;
> -
> - /* Check if we have a device node, if yes, fallback to standard OF
> - * parsing
> - */
> - dn = pci_device_to_OF_node(pdev);
> - if (dn) {
> - rc = of_irq_map_one(dn, 0, out_irq);
> - if (!rc)
> - return rc;
> - }
> -
> - /* Ok, we don't, time to have fun. Let's start by building up an
> - * interrupt spec. we assume #interrupt-cells is 1, which is standard
> - * for PCI. If you do different, then don't use that routine.
> - */
> - rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
> - if (rc != 0)
> - return rc;
> - /* No pin, exit */
> - if (pin == 0)
> - return -ENODEV;
> -
> - /* Now we walk up the PCI tree */
> - lspec = pin;
> - for (;;) {
> - /* Get the pci_dev of our parent */
> - ppdev = pdev->bus->self;
> -
> - /* Ouch, it's a host bridge... */
> - if (ppdev == NULL) {
> -#ifdef CONFIG_PPC64
> - ppnode = pci_bus_to_OF_node(pdev->bus);
> -#else
> - struct pci_controller *host;
> - host = pci_bus_to_host(pdev->bus);
> - ppnode = host ? host->dn : NULL;
> -#endif
> - /* No node for host bridge ? give up */
> - if (ppnode == NULL)
> - return -EINVAL;
> - } else
> - /* We found a P2P bridge, check if it has a node */
> - ppnode = pci_device_to_OF_node(ppdev);
> -
> - /* Ok, we have found a parent with a device-node, hand over to
> - * the OF parsing code.
> - * We build a unit address from the linux device to be used for
> - * resolution. Note that we use the linux bus number which may
> - * not match your firmware bus numbering.
> - * Fortunately, in most cases, interrupt-map-mask doesn't include
> - * the bus number as part of the matching.
> - * You should still be careful about that though if you intend
> - * to rely on this function (you ship a firmware that doesn't
> - * create device nodes for all PCI devices).
> - */
> - if (ppnode)
> - break;
> -
> - /* We can only get here if we hit a P2P bridge with no node,
> - * let's do standard swizzling and try again
> - */
> - lspec = pci_swizzle_interrupt_pin(pdev, lspec);
> - pdev = ppdev;
> - }
> -
> - laddr[0] = (pdev->bus->number << 16)
> - | (pdev->devfn << 8);
> - laddr[1] = laddr[2] = 0;
> - return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
> -}
> -EXPORT_SYMBOL_GPL(of_irq_map_pci);
> -#endif /* CONFIG_PCI */
>
> void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
> unsigned long *busno, unsigned long *phys, unsigned long *size)
> diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
> index 3c6e100..c71cff1 100644
> --- a/drivers/of/Kconfig
> +++ b/drivers/of/Kconfig
> @@ -69,4 +69,10 @@ config OF_MDIO
> help
> OpenFirmware MDIO bus (Ethernet PHY) accessors
>
> +config OF_PCI
> + def_tristate PCI
> + depends on PCI && !SPARC
> + help
> + OpenFirmware PCI bus accessors
> +
> endmenu # OF
> diff --git a/drivers/of/Makefile b/drivers/of/Makefile
> index 3ab21a0..f7861ed 100644
> --- a/drivers/of/Makefile
> +++ b/drivers/of/Makefile
> @@ -9,3 +9,4 @@ obj-$(CONFIG_OF_I2C) += of_i2c.o
> obj-$(CONFIG_OF_NET) += of_net.o
> obj-$(CONFIG_OF_SPI) += of_spi.o
> obj-$(CONFIG_OF_MDIO) += of_mdio.o
> +obj-$(CONFIG_OF_PCI) += of_pci.o
> diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
> new file mode 100644
> index 0000000..dd862d2
> --- /dev/null
> +++ b/drivers/of/of_pci.c
> @@ -0,0 +1,80 @@
> +#include <linux/kernel.h>
> +#include <linux/of_pci.h>
> +#include <asm/prom.h>
> +
> +int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
> +{
> + struct device_node *dn, *ppnode;
> + struct pci_dev *ppdev;
> + u32 lspec;
> + __be32 lspec_be;
> + __be32 laddr[3];
> + u8 pin;
> + int rc;
> +
> + /* Check if we have a device node, if yes, fallback to standard OF
> + * parsing
> + */
> + dn = pci_device_to_OF_node(pdev);
> + if (dn) {
> + rc = of_irq_map_one(dn, 0, out_irq);
> + if (!rc)
> + return rc;
> + }
> +
> + /* Ok, we don't, time to have fun. Let's start by building up an
> + * interrupt spec. we assume #interrupt-cells is 1, which is standard
> + * for PCI. If you do different, then don't use that routine.
> + */
> + rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
> + if (rc != 0)
> + return rc;
> + /* No pin, exit */
> + if (pin == 0)
> + return -ENODEV;
> +
> + /* Now we walk up the PCI tree */
> + lspec = pin;
> + for (;;) {
> + /* Get the pci_dev of our parent */
> + ppdev = pdev->bus->self;
> +
> + /* Ouch, it's a host bridge... */
> + if (ppdev == NULL) {
> + ppnode = pci_bus_to_OF_node(pdev->bus);
> +
> + /* No node for host bridge ? give up */
> + if (ppnode == NULL)
> + return -EINVAL;
> + } else {
> + /* We found a P2P bridge, check if it has a node */
> + ppnode = pci_device_to_OF_node(ppdev);
> + }
> +
> + /* Ok, we have found a parent with a device-node, hand over to
> + * the OF parsing code.
> + * We build a unit address from the linux device to be used for
> + * resolution. Note that we use the linux bus number which may
> + * not match your firmware bus numbering.
> + * Fortunately, in most cases, interrupt-map-mask doesn't
> + * include the bus number as part of the matching.
> + * You should still be careful about that though if you intend
> + * to rely on this function (you ship a firmware that doesn't
> + * create device nodes for all PCI devices).
> + */
> + if (ppnode)
> + break;
> +
> + /* We can only get here if we hit a P2P bridge with no node,
> + * let's do standard swizzling and try again
> + */
> + lspec = pci_swizzle_interrupt_pin(pdev, lspec);
> + pdev = ppdev;
> + }
> +
> + lspec_be = cpu_to_be32(lspec);
> + laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
> + laddr[1] = laddr[2] = cpu_to_be32(0);
> + return of_irq_map_raw(ppnode, &lspec_be, 1, laddr, out_irq);
> +}
> +EXPORT_SYMBOL_GPL(of_irq_map_pci);
> diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
> new file mode 100644
> index 0000000..9b0ba67
> --- /dev/null
> +++ b/include/linux/of_pci.h
> @@ -0,0 +1,20 @@
> +#ifndef __OF_PCI_H
> +#define __OF_PCI_H
> +
> +#include <linux/pci.h>
> +
> +/**
> + * of_irq_map_pci - Resolve the interrupt for a PCI device
> + * @pdev: the device whose interrupt is to be resolved
> + * @out_irq: structure of_irq filled by this function
> + *
> + * This function resolves the PCI interrupt for a given PCI device. If a
> + * device-node exists for a given pci_dev, it will use normal OF tree
> + * walking. If not, it will implement standard swizzling and walk up the
> + * PCI tree until an device-node is found, at which point it will finish
> + * resolving using the OF tree walking.
> + */
> +struct pci_dev;
> +struct of_irq;
> +int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
> +#endif
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH OF 07/14] of: move of_irq_map_pci() into generic code
@ 2011-02-16 21:53 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 21:53 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: Michal Simek, microblaze-uclinux, devicetree-discuss, x86,
linux-kernel, sodaville, Sebastian Andrzej Siewior, linuxppc-dev
On Sun, Jan 23, 2011 at 9:28 PM, Sebastian Andrzej Siewior
<bigeasy@linutronix.de> wrote:
> From: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
>
> There is a tiny difference between PPC32 and PPC64. Microblaze uses the
> PPC32 variant.
>
> Cc: devicetree-discuss@lists.ozlabs.org
> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
> Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
I've got this one in my devicetree/next branch which is pulled into
linux-next. I've not received an ack from Ben yet. Michal, is this
okay by you?
http://git.secretlab.ca/?p=3Dlinux-2.6.git;a=3Dcommit;h=3D04bea68b2f0eeebb0=
89ecc67b618795925268b4a
g.
> ---
> =A0arch/microblaze/include/asm/pci-bridge.h | =A0 12 ++++
> =A0arch/microblaze/include/asm/prom.h =A0 =A0 =A0 | =A0 15 -----
> =A0arch/microblaze/kernel/prom_parse.c =A0 =A0 =A0| =A0 77 --------------=
-------------
> =A0arch/microblaze/pci/pci-common.c =A0 =A0 =A0 =A0 | =A0 =A01 +
> =A0arch/powerpc/include/asm/pci-bridge.h =A0 =A0| =A0 10 ++++
> =A0arch/powerpc/include/asm/prom.h =A0 =A0 =A0 =A0 =A0| =A0 15 -----
> =A0arch/powerpc/kernel/pci-common.c =A0 =A0 =A0 =A0 | =A0 =A01 +
> =A0arch/powerpc/kernel/prom_parse.c =A0 =A0 =A0 =A0 | =A0 84 ------------=
------------------
> =A0drivers/of/Kconfig =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 =
=A06 ++
> =A0drivers/of/Makefile =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0| =A0 =
=A01 +
> =A0drivers/of/of_pci.c =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0| =A0 8=
0 ++++++++++++++++++++++++++++
> =A0include/linux/of_pci.h =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 | =A0 20 ++=
+++++
> =A012 files changed, 131 insertions(+), 191 deletions(-)
> =A0create mode 100644 drivers/of/of_pci.c
> =A0create mode 100644 include/linux/of_pci.h
>
> diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/i=
nclude/asm/pci-bridge.h
> index 0c68764..c2a40a4 100644
> --- a/arch/microblaze/include/asm/pci-bridge.h
> +++ b/arch/microblaze/include/asm/pci-bridge.h
> @@ -104,11 +104,22 @@ struct pci_controller {
> =A0 =A0 =A0 =A0int global_number; =A0 =A0 =A0/* PCI domain number */
> =A0};
>
> +#ifdef CONFIG_PCI
> =A0static inline struct pci_controller *pci_bus_to_host(const struct pci_=
bus *bus)
> =A0{
> =A0 =A0 =A0 =A0return bus->sysdata;
> =A0}
>
> +static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus=
)
> +{
> + =A0 =A0 =A0 struct pci_controller *host;
> +
> + =A0 =A0 =A0 if (bus->self)
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 return pci_device_to_OF_node(bus->self);
> + =A0 =A0 =A0 host =3D pci_bus_to_host(bus);
> + =A0 =A0 =A0 return host ? host->dn : NULL;
> +}
> +
> =A0static inline int isa_vaddr_is_ioport(void __iomem *address)
> =A0{
> =A0 =A0 =A0 =A0/* No specific ISA handling on ppc32 at this stage, it
> @@ -116,6 +127,7 @@ static inline int isa_vaddr_is_ioport(void __iomem *a=
ddress)
> =A0 =A0 =A0 =A0 */
> =A0 =A0 =A0 =A0return 0;
> =A0}
> +#endif
>
> =A0/* These are used for config access before all the PCI probing
> =A0 =A0has been done. */
> diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include=
/asm/prom.h
> index 2e72af0..d0890d3 100644
> --- a/arch/microblaze/include/asm/prom.h
> +++ b/arch/microblaze/include/asm/prom.h
> @@ -64,21 +64,6 @@ extern void kdump_move_device_tree(void);
> =A0/* CPU OF node matching */
> =A0struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
>
> -/**
> - * of_irq_map_pci - Resolve the interrupt for a PCI device
> - * @pdev: =A0 =A0 =A0the device whose interrupt is to be resolved
> - * @out_irq: =A0 structure of_irq filled by this function
> - *
> - * This function resolves the PCI interrupt for a given PCI device. If a
> - * device-node exists for a given pci_dev, it will use normal OF tree
> - * walking. If not, it will implement standard swizzling and walk up the
> - * PCI tree until an device-node is found, at which point it will finish
> - * resolving using the OF tree walking.
> - */
> -struct pci_dev;
> -struct of_irq;
> -extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
> -
> =A0#endif /* __ASSEMBLY__ */
> =A0#endif /* __KERNEL__ */
>
> diff --git a/arch/microblaze/kernel/prom_parse.c b/arch/microblaze/kernel=
/prom_parse.c
> index 9ae24f4..47187cc 100644
> --- a/arch/microblaze/kernel/prom_parse.c
> +++ b/arch/microblaze/kernel/prom_parse.c
> @@ -2,88 +2,11 @@
>
> =A0#include <linux/kernel.h>
> =A0#include <linux/string.h>
> -#include <linux/pci_regs.h>
> =A0#include <linux/module.h>
> =A0#include <linux/ioport.h>
> =A0#include <linux/etherdevice.h>
> =A0#include <linux/of_address.h>
> =A0#include <asm/prom.h>
> -#include <asm/pci-bridge.h>
> -
> -#ifdef CONFIG_PCI
> -int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
> -{
> - =A0 =A0 =A0 struct device_node *dn, *ppnode;
> - =A0 =A0 =A0 struct pci_dev *ppdev;
> - =A0 =A0 =A0 u32 lspec;
> - =A0 =A0 =A0 u32 laddr[3];
> - =A0 =A0 =A0 u8 pin;
> - =A0 =A0 =A0 int rc;
> -
> - =A0 =A0 =A0 /* Check if we have a device node, if yes, fallback to stan=
dard OF
> - =A0 =A0 =A0 =A0* parsing
> - =A0 =A0 =A0 =A0*/
> - =A0 =A0 =A0 dn =3D pci_device_to_OF_node(pdev);
> - =A0 =A0 =A0 if (dn)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 return of_irq_map_one(dn, 0, out_irq);
> -
> - =A0 =A0 =A0 /* Ok, we don't, time to have fun. Let's start by building =
up an
> - =A0 =A0 =A0 =A0* interrupt spec. =A0we assume #interrupt-cells is 1, wh=
ich is standard
> - =A0 =A0 =A0 =A0* for PCI. If you do different, then don't use that rout=
ine.
> - =A0 =A0 =A0 =A0*/
> - =A0 =A0 =A0 rc =3D pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
> - =A0 =A0 =A0 if (rc !=3D 0)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 return rc;
> - =A0 =A0 =A0 /* No pin, exit */
> - =A0 =A0 =A0 if (pin =3D=3D 0)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -ENODEV;
> -
> - =A0 =A0 =A0 /* Now we walk up the PCI tree */
> - =A0 =A0 =A0 lspec =3D pin;
> - =A0 =A0 =A0 for (;;) {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* Get the pci_dev of our parent */
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 ppdev =3D pdev->bus->self;
> -
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* Ouch, it's a host bridge... */
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (ppdev =3D=3D NULL) {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 struct pci_controller *host=
;
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 host =3D pci_bus_to_host(pd=
ev->bus);
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ppnode =3D host ? host->dn =
: NULL;
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* No node for host bridge =
? give up */
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (ppnode =3D=3D NULL)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -EIN=
VAL;
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 } else
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* We found a P2P bridge, c=
heck if it has a node */
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ppnode =3D pci_device_to_OF=
_node(ppdev);
> -
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* Ok, we have found a parent with a device=
-node, hand over to
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* the OF parsing code.
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* We build a unit address from the linux=
device to be used for
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* resolution. Note that we use the linux=
bus number which may
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* not match your firmware bus numbering.
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* Fortunately, in most cases, interrupt-=
map-mask doesn't
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* include the bus number as part of the =
matching.
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* You should still be careful about that=
though if you intend
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* to rely on this function (you ship =A0=
a firmware that doesn't
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* create device nodes for all PCI device=
s).
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (ppnode)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 break;
> -
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* We can only get here if we hit a P2P bri=
dge with no node,
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* let's do standard swizzling and try ag=
ain
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 lspec =3D pci_swizzle_interrupt_pin(pdev, l=
spec);
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 pdev =3D ppdev;
> - =A0 =A0 =A0 }
> -
> - =A0 =A0 =A0 laddr[0] =3D (pdev->bus->number << 16)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 | (pdev->devfn << 8);
> - =A0 =A0 =A0 laddr[1] =A0=3D laddr[2] =3D 0;
> - =A0 =A0 =A0 return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
> -}
> -EXPORT_SYMBOL_GPL(of_irq_map_pci);
> -#endif /* CONFIG_PCI */
>
> =A0void of_parse_dma_window(struct device_node *dn, const void *dma_windo=
w_prop,
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0unsigned long *busno, unsigned long *phys,=
unsigned long *size)
> diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-c=
ommon.c
> index e363615..1e01a12 100644
> --- a/arch/microblaze/pci/pci-common.c
> +++ b/arch/microblaze/pci/pci-common.c
> @@ -29,6 +29,7 @@
> =A0#include <linux/slab.h>
> =A0#include <linux/of.h>
> =A0#include <linux/of_address.h>
> +#include <linux/of_pci.h>
>
> =A0#include <asm/processor.h>
> =A0#include <asm/io.h>
> diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include=
/asm/pci-bridge.h
> index 51e9e6f..edeb80f 100644
> --- a/arch/powerpc/include/asm/pci-bridge.h
> +++ b/arch/powerpc/include/asm/pci-bridge.h
> @@ -171,6 +171,16 @@ static inline struct pci_controller *pci_bus_to_host=
(const struct pci_bus *bus)
> =A0 =A0 =A0 =A0return bus->sysdata;
> =A0}
>
> +static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus=
)
> +{
> + =A0 =A0 =A0 struct pci_controller *host;
> +
> + =A0 =A0 =A0 if (bus->self)
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 return pci_device_to_OF_node(bus->self);
> + =A0 =A0 =A0 host =3D pci_bus_to_host(bus);
> + =A0 =A0 =A0 return host ? host->dn : NULL;
> +}
> +
> =A0static inline int isa_vaddr_is_ioport(void __iomem *address)
> =A0{
> =A0 =A0 =A0 =A0/* No specific ISA handling on ppc32 at this stage, it
> diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/p=
rom.h
> index d727575..c189aa5 100644
> --- a/arch/powerpc/include/asm/prom.h
> +++ b/arch/powerpc/include/asm/prom.h
> @@ -70,21 +70,6 @@ static inline int of_node_to_nid(struct device_node *d=
evice) { return 0; }
> =A0#endif
> =A0#define of_node_to_nid of_node_to_nid
>
> -/**
> - * of_irq_map_pci - Resolve the interrupt for a PCI device
> - * @pdev: =A0 =A0 =A0the device whose interrupt is to be resolved
> - * @out_irq: =A0 structure of_irq filled by this function
> - *
> - * This function resolves the PCI interrupt for a given PCI device. If a
> - * device-node exists for a given pci_dev, it will use normal OF tree
> - * walking. If not, it will implement standard swizzling and walk up the
> - * PCI tree until an device-node is found, at which point it will finish
> - * resolving using the OF tree walking.
> - */
> -struct pci_dev;
> -struct of_irq;
> -extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
> -
> =A0extern void of_instantiate_rtc(void);
>
> =A0/* These includes are put at the bottom because they may contain thing=
s
> diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-c=
ommon.c
> index 10a44e6..eb341be 100644
> --- a/arch/powerpc/kernel/pci-common.c
> +++ b/arch/powerpc/kernel/pci-common.c
> @@ -22,6 +22,7 @@
> =A0#include <linux/init.h>
> =A0#include <linux/bootmem.h>
> =A0#include <linux/of_address.h>
> +#include <linux/of_pci.h>
> =A0#include <linux/mm.h>
> =A0#include <linux/list.h>
> =A0#include <linux/syscalls.h>
> diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_=
parse.c
> index c2b7a07..47187cc 100644
> --- a/arch/powerpc/kernel/prom_parse.c
> +++ b/arch/powerpc/kernel/prom_parse.c
> @@ -2,95 +2,11 @@
>
> =A0#include <linux/kernel.h>
> =A0#include <linux/string.h>
> -#include <linux/pci_regs.h>
> =A0#include <linux/module.h>
> =A0#include <linux/ioport.h>
> =A0#include <linux/etherdevice.h>
> =A0#include <linux/of_address.h>
> =A0#include <asm/prom.h>
> -#include <asm/pci-bridge.h>
> -
> -#ifdef CONFIG_PCI
> -int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
> -{
> - =A0 =A0 =A0 struct device_node *dn, *ppnode;
> - =A0 =A0 =A0 struct pci_dev *ppdev;
> - =A0 =A0 =A0 u32 lspec;
> - =A0 =A0 =A0 u32 laddr[3];
> - =A0 =A0 =A0 u8 pin;
> - =A0 =A0 =A0 int rc;
> -
> - =A0 =A0 =A0 /* Check if we have a device node, if yes, fallback to stan=
dard OF
> - =A0 =A0 =A0 =A0* parsing
> - =A0 =A0 =A0 =A0*/
> - =A0 =A0 =A0 dn =3D pci_device_to_OF_node(pdev);
> - =A0 =A0 =A0 if (dn) {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 rc =3D of_irq_map_one(dn, 0, out_irq);
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (!rc)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 return rc;
> - =A0 =A0 =A0 }
> -
> - =A0 =A0 =A0 /* Ok, we don't, time to have fun. Let's start by building =
up an
> - =A0 =A0 =A0 =A0* interrupt spec. =A0we assume #interrupt-cells is 1, wh=
ich is standard
> - =A0 =A0 =A0 =A0* for PCI. If you do different, then don't use that rout=
ine.
> - =A0 =A0 =A0 =A0*/
> - =A0 =A0 =A0 rc =3D pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
> - =A0 =A0 =A0 if (rc !=3D 0)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 return rc;
> - =A0 =A0 =A0 /* No pin, exit */
> - =A0 =A0 =A0 if (pin =3D=3D 0)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -ENODEV;
> -
> - =A0 =A0 =A0 /* Now we walk up the PCI tree */
> - =A0 =A0 =A0 lspec =3D pin;
> - =A0 =A0 =A0 for (;;) {
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* Get the pci_dev of our parent */
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 ppdev =3D pdev->bus->self;
> -
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* Ouch, it's a host bridge... */
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (ppdev =3D=3D NULL) {
> -#ifdef CONFIG_PPC64
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ppnode =3D pci_bus_to_OF_no=
de(pdev->bus);
> -#else
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 struct pci_controller *host=
;
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 host =3D pci_bus_to_host(pd=
ev->bus);
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ppnode =3D host ? host->dn =
: NULL;
> -#endif
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* No node for host bridge =
? give up */
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (ppnode =3D=3D NULL)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -EIN=
VAL;
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 } else
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* We found a P2P bridge, c=
heck if it has a node */
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ppnode =3D pci_device_to_OF=
_node(ppdev);
> -
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* Ok, we have found a parent with a device=
-node, hand over to
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* the OF parsing code.
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* We build a unit address from the linux=
device to be used for
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* resolution. Note that we use the linux=
bus number which may
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* not match your firmware bus numbering.
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* Fortunately, in most cases, interrupt-=
map-mask doesn't include
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* the bus number as part of the matching=
.
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* You should still be careful about that=
though if you intend
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* to rely on this function (you ship =A0=
a firmware that doesn't
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* create device nodes for all PCI device=
s).
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (ppnode)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 break;
> -
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* We can only get here if we hit a P2P bri=
dge with no node,
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* let's do standard swizzling and try ag=
ain
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 lspec =3D pci_swizzle_interrupt_pin(pdev, l=
spec);
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 pdev =3D ppdev;
> - =A0 =A0 =A0 }
> -
> - =A0 =A0 =A0 laddr[0] =3D (pdev->bus->number << 16)
> - =A0 =A0 =A0 =A0 =A0 =A0 =A0 | (pdev->devfn << 8);
> - =A0 =A0 =A0 laddr[1] =A0=3D laddr[2] =3D 0;
> - =A0 =A0 =A0 return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
> -}
> -EXPORT_SYMBOL_GPL(of_irq_map_pci);
> -#endif /* CONFIG_PCI */
>
> =A0void of_parse_dma_window(struct device_node *dn, const void *dma_windo=
w_prop,
> =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0unsigned long *busno, unsigned long *phys,=
unsigned long *size)
> diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
> index 3c6e100..c71cff1 100644
> --- a/drivers/of/Kconfig
> +++ b/drivers/of/Kconfig
> @@ -69,4 +69,10 @@ config OF_MDIO
> =A0 =A0 =A0 =A0help
> =A0 =A0 =A0 =A0 =A0OpenFirmware MDIO bus (Ethernet PHY) accessors
>
> +config OF_PCI
> + =A0 =A0 =A0 def_tristate PCI
> + =A0 =A0 =A0 depends on PCI && !SPARC
> + =A0 =A0 =A0 help
> + =A0 =A0 =A0 =A0 OpenFirmware PCI bus accessors
> +
> =A0endmenu # OF
> diff --git a/drivers/of/Makefile b/drivers/of/Makefile
> index 3ab21a0..f7861ed 100644
> --- a/drivers/of/Makefile
> +++ b/drivers/of/Makefile
> @@ -9,3 +9,4 @@ obj-$(CONFIG_OF_I2C) =A0 =A0+=3D of_i2c.o
> =A0obj-$(CONFIG_OF_NET) =A0 +=3D of_net.o
> =A0obj-$(CONFIG_OF_SPI) =A0 +=3D of_spi.o
> =A0obj-$(CONFIG_OF_MDIO) =A0+=3D of_mdio.o
> +obj-$(CONFIG_OF_PCI) =A0 +=3D of_pci.o
> diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
> new file mode 100644
> index 0000000..dd862d2
> --- /dev/null
> +++ b/drivers/of/of_pci.c
> @@ -0,0 +1,80 @@
> +#include <linux/kernel.h>
> +#include <linux/of_pci.h>
> +#include <asm/prom.h>
> +
> +int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
> +{
> + =A0 =A0 =A0 struct device_node *dn, *ppnode;
> + =A0 =A0 =A0 struct pci_dev *ppdev;
> + =A0 =A0 =A0 u32 lspec;
> + =A0 =A0 =A0 __be32 lspec_be;
> + =A0 =A0 =A0 __be32 laddr[3];
> + =A0 =A0 =A0 u8 pin;
> + =A0 =A0 =A0 int rc;
> +
> + =A0 =A0 =A0 /* Check if we have a device node, if yes, fallback to stan=
dard OF
> + =A0 =A0 =A0 =A0* parsing
> + =A0 =A0 =A0 =A0*/
> + =A0 =A0 =A0 dn =3D pci_device_to_OF_node(pdev);
> + =A0 =A0 =A0 if (dn) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 rc =3D of_irq_map_one(dn, 0, out_irq);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (!rc)
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 return rc;
> + =A0 =A0 =A0 }
> +
> + =A0 =A0 =A0 /* Ok, we don't, time to have fun. Let's start by building =
up an
> + =A0 =A0 =A0 =A0* interrupt spec. =A0we assume #interrupt-cells is 1, wh=
ich is standard
> + =A0 =A0 =A0 =A0* for PCI. If you do different, then don't use that rout=
ine.
> + =A0 =A0 =A0 =A0*/
> + =A0 =A0 =A0 rc =3D pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
> + =A0 =A0 =A0 if (rc !=3D 0)
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 return rc;
> + =A0 =A0 =A0 /* No pin, exit */
> + =A0 =A0 =A0 if (pin =3D=3D 0)
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -ENODEV;
> +
> + =A0 =A0 =A0 /* Now we walk up the PCI tree */
> + =A0 =A0 =A0 lspec =3D pin;
> + =A0 =A0 =A0 for (;;) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* Get the pci_dev of our parent */
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 ppdev =3D pdev->bus->self;
> +
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* Ouch, it's a host bridge... */
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (ppdev =3D=3D NULL) {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ppnode =3D pci_bus_to_OF_no=
de(pdev->bus);
> +
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* No node for host bridge =
? give up */
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (ppnode =3D=3D NULL)
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 return -EIN=
VAL;
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 } else {
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* We found a P2P bridge, c=
heck if it has a node */
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 ppnode =3D pci_device_to_OF=
_node(ppdev);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 }
> +
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* Ok, we have found a parent with a device=
-node, hand over to
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* the OF parsing code.
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* We build a unit address from the linux=
device to be used for
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* resolution. Note that we use the linux=
bus number which may
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* not match your firmware bus numbering.
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* Fortunately, in most cases, interrupt-=
map-mask doesn't
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* include the bus number as part of the =
matching.
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* You should still be careful about that=
though if you intend
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* to rely on this function (you ship =A0=
a firmware that doesn't
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* create device nodes for all PCI device=
s).
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 if (ppnode)
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0 break;
> +
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 /* We can only get here if we hit a P2P bri=
dge with no node,
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0* let's do standard swizzling and try ag=
ain
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 =A0*/
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 lspec =3D pci_swizzle_interrupt_pin(pdev, l=
spec);
> + =A0 =A0 =A0 =A0 =A0 =A0 =A0 pdev =3D ppdev;
> + =A0 =A0 =A0 }
> +
> + =A0 =A0 =A0 lspec_be =3D cpu_to_be32(lspec);
> + =A0 =A0 =A0 laddr[0] =3D cpu_to_be32((pdev->bus->number << 16) | (pdev-=
>devfn << 8));
> + =A0 =A0 =A0 laddr[1] =A0=3D laddr[2] =3D cpu_to_be32(0);
> + =A0 =A0 =A0 return of_irq_map_raw(ppnode, &lspec_be, 1, laddr, out_irq)=
;
> +}
> +EXPORT_SYMBOL_GPL(of_irq_map_pci);
> diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
> new file mode 100644
> index 0000000..9b0ba67
> --- /dev/null
> +++ b/include/linux/of_pci.h
> @@ -0,0 +1,20 @@
> +#ifndef __OF_PCI_H
> +#define __OF_PCI_H
> +
> +#include <linux/pci.h>
> +
> +/**
> + * of_irq_map_pci - Resolve the interrupt for a PCI device
> + * @pdev: =A0 =A0 =A0 the device whose interrupt is to be resolved
> + * @out_irq: =A0 =A0structure of_irq filled by this function
> + *
> + * This function resolves the PCI interrupt for a given PCI device. If a
> + * device-node exists for a given pci_dev, it will use normal OF tree
> + * walking. If not, it will implement standard swizzling and walk up the
> + * PCI tree until an device-node is found, at which point it will finish
> + * resolving using the OF tree walking.
> + */
> +struct pci_dev;
> +struct of_irq;
> +int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
> +#endif
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
>
--=20
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 08/14] x86/dtb: add support for PCI devices backed by dtb nodes
@ 2011-02-16 21:59 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 21:59 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: linux-kernel, sodaville, devicetree-discuss, x86
On Sun, Jan 23, 2011 at 9:28 PM, Sebastian Andrzej Siewior
<bigeasy@linutronix.de> wrote:
> x86_of_pci_init() does two things:
> - it provides a generic irq enable and disable function. enable queries
> the device tree for the interrupt information, calls ->xlate on the
> irq host and updates the pci->irq information for the device.
>
> - it walks through PCI buss(es) in the device tree and adds its children
> (devices) nodes to appropriate pci_dev nodes in kernel. So the dtb
> node information is available at probe time of the PCI device.
>
> Adding a PCI bus based on the information in the device tree is
> currently not supported. Right now direct access via ioports is used.
>
> Cc: devicetree-discuss@lists.ozlabs.org
> Tested-by: Dirk Brandewie <dirk.brandewie@gmail.com>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
> ---
> arch/x86/include/asm/prom.h | 17 +++++++++
> arch/x86/kernel/prom.c | 82 +++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 99 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
> index bd67ab2..3ed0bd6 100644
> --- a/arch/x86/include/asm/prom.h
> +++ b/arch/x86/include/asm/prom.h
> @@ -16,6 +16,7 @@
>
> #include <linux/of.h>
> #include <linux/types.h>
> +#include <linux/pci.h>
> #include <asm/irq.h>
> #include <asm/atomic.h>
> #include <asm/setup.h>
> @@ -28,8 +29,24 @@ extern void add_dtb(u64 data);
> void x86_dtb_find_config(void);
> void x86_dtb_get_config(unsigned int unused);
> void add_interrupt_host(struct irq_domain *ih);
> +void __cpuinit x86_of_pci_init(void);
> +
> +static inline struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
> +{
> + return pdev->dev.of_node;
> +}
> +
> +static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
> +{
> + if (bus->self)
> + return pci_device_to_OF_node(bus->self);
> + else
> + return NULL;
> +}
Nit: could simply be:
static inline struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
{
return pdev ? pdev->dev.of_node : NULL;
}
static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
{
return pci_device_to_OF_node(bus->self);
}
> +
> #else
> static inline void add_dtb(u64 data) { }
> +static inline void x86_of_pci_init(void) { }
> #define x86_dtb_find_config x86_init_noop
> #define x86_dtb_get_config x86_init_uint_noop
> #define of_ioapic 0
> diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
> index 16c124e..8525ca0 100644
> --- a/arch/x86/kernel/prom.c
> +++ b/arch/x86/kernel/prom.c
> @@ -9,10 +9,13 @@
> #include <linux/of_address.h>
> #include <linux/of_platform.h>
> #include <linux/slab.h>
> +#include <linux/pci.h>
> +#include <linux/of_pci.h>
>
> #include <asm/hpet.h>
> #include <asm/irq_controller.h>
> #include <asm/io_apic.h>
> +#include <asm/pci_x86.h>
>
> __initdata u64 initial_dtb;
> char __initdata cmd_line[COMMAND_LINE_SIZE];
> @@ -99,6 +102,85 @@ void __init add_dtb(u64 data)
> initial_dtb = data + offsetof(struct setup_data, data);
> }
>
> +#ifdef CONFIG_PCI
> +static int x86_of_pci_irq_enable(struct pci_dev *dev)
> +{
> + struct of_irq oirq;
> + u32 virq;
> + int ret;
> + u8 pin;
> +
> + ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
> + if (ret)
> + return ret;
> + if (!pin)
> + return 0;
> +
> + ret = of_irq_map_pci(dev, &oirq);
> + if (ret)
> + return ret;
> +
> + virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
> + oirq.size);
> + if (virq == 0)
> + return -EINVAL;
> + dev->irq = virq;
> + return 0;
> +}
> +
> +static void x86_of_pci_irq_disable(struct pci_dev *dev)
> +{
> +}
> +
> +void __cpuinit x86_of_pci_init(void)
> +{
> + struct device_node *np;
> +
> + pcibios_enable_irq = x86_of_pci_irq_enable;
> + pcibios_disable_irq = x86_of_pci_irq_disable;
> +
> + for_each_node_by_type(np, "pci") {
> + const void *prop;
> + struct pci_bus *bus;
> + unsigned int bus_min;
> + struct device_node *child;
> +
> + prop = of_get_property(np, "bus-range", NULL);
> + if (!prop)
> + continue;
> + bus_min = be32_to_cpup(prop);
> +
> + bus = pci_find_bus(0, bus_min);
> + if (!bus) {
> + printk(KERN_ERR "Can't find a node for bus %s.\n",
> + np->full_name);
> + continue;
> + }
> +
> + if (bus->self)
> + bus->self->dev.of_node = np;
> + else
> + bus->dev.of_node = np;
> +
> + for_each_child_of_node(np, child) {
> + struct pci_dev *dev;
> + u32 devfn;
> +
> + prop = of_get_property(child, "reg", NULL);
> + if (!prop)
> + continue;
> +
> + devfn = (be32_to_cpup(prop) >> 8) & 0xff;
> + dev = pci_get_slot(bus, devfn);
> + if (!dev)
> + continue;
> + dev->dev.of_node = child;
> + pci_dev_put(dev);
> + }
> + }
> +}
> +#endif
> +
> static void __init dtb_setup_hpet(void)
> {
> struct device_node *dn;
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 08/14] x86/dtb: add support for PCI devices backed by dtb nodes
@ 2011-02-16 21:59 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 21:59 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA
On Sun, Jan 23, 2011 at 9:28 PM, Sebastian Andrzej Siewior
<bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org> wrote:
> x86_of_pci_init() does two things:
> - it provides a generic irq enable and disable function. enable queries
> the device tree for the interrupt information, calls ->xlate on the
> irq host and updates the pci->irq information for the device.
>
> - it walks through PCI buss(es) in the device tree and adds its children
> (devices) nodes to appropriate pci_dev nodes in kernel. So the dtb
> node information is available at probe time of the PCI device.
>
> Adding a PCI bus based on the information in the device tree is
> currently not supported. Right now direct access via ioports is used.
>
> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Tested-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
> ---
> arch/x86/include/asm/prom.h | 17 +++++++++
> arch/x86/kernel/prom.c | 82 +++++++++++++++++++++++++++++++++++++++++++
> 2 files changed, 99 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
> index bd67ab2..3ed0bd6 100644
> --- a/arch/x86/include/asm/prom.h
> +++ b/arch/x86/include/asm/prom.h
> @@ -16,6 +16,7 @@
>
> #include <linux/of.h>
> #include <linux/types.h>
> +#include <linux/pci.h>
> #include <asm/irq.h>
> #include <asm/atomic.h>
> #include <asm/setup.h>
> @@ -28,8 +29,24 @@ extern void add_dtb(u64 data);
> void x86_dtb_find_config(void);
> void x86_dtb_get_config(unsigned int unused);
> void add_interrupt_host(struct irq_domain *ih);
> +void __cpuinit x86_of_pci_init(void);
> +
> +static inline struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
> +{
> + return pdev->dev.of_node;
> +}
> +
> +static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
> +{
> + if (bus->self)
> + return pci_device_to_OF_node(bus->self);
> + else
> + return NULL;
> +}
Nit: could simply be:
static inline struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
{
return pdev ? pdev->dev.of_node : NULL;
}
static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
{
return pci_device_to_OF_node(bus->self);
}
> +
> #else
> static inline void add_dtb(u64 data) { }
> +static inline void x86_of_pci_init(void) { }
> #define x86_dtb_find_config x86_init_noop
> #define x86_dtb_get_config x86_init_uint_noop
> #define of_ioapic 0
> diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
> index 16c124e..8525ca0 100644
> --- a/arch/x86/kernel/prom.c
> +++ b/arch/x86/kernel/prom.c
> @@ -9,10 +9,13 @@
> #include <linux/of_address.h>
> #include <linux/of_platform.h>
> #include <linux/slab.h>
> +#include <linux/pci.h>
> +#include <linux/of_pci.h>
>
> #include <asm/hpet.h>
> #include <asm/irq_controller.h>
> #include <asm/io_apic.h>
> +#include <asm/pci_x86.h>
>
> __initdata u64 initial_dtb;
> char __initdata cmd_line[COMMAND_LINE_SIZE];
> @@ -99,6 +102,85 @@ void __init add_dtb(u64 data)
> initial_dtb = data + offsetof(struct setup_data, data);
> }
>
> +#ifdef CONFIG_PCI
> +static int x86_of_pci_irq_enable(struct pci_dev *dev)
> +{
> + struct of_irq oirq;
> + u32 virq;
> + int ret;
> + u8 pin;
> +
> + ret = pci_read_config_byte(dev, PCI_INTERRUPT_PIN, &pin);
> + if (ret)
> + return ret;
> + if (!pin)
> + return 0;
> +
> + ret = of_irq_map_pci(dev, &oirq);
> + if (ret)
> + return ret;
> +
> + virq = irq_create_of_mapping(oirq.controller, oirq.specifier,
> + oirq.size);
> + if (virq == 0)
> + return -EINVAL;
> + dev->irq = virq;
> + return 0;
> +}
> +
> +static void x86_of_pci_irq_disable(struct pci_dev *dev)
> +{
> +}
> +
> +void __cpuinit x86_of_pci_init(void)
> +{
> + struct device_node *np;
> +
> + pcibios_enable_irq = x86_of_pci_irq_enable;
> + pcibios_disable_irq = x86_of_pci_irq_disable;
> +
> + for_each_node_by_type(np, "pci") {
> + const void *prop;
> + struct pci_bus *bus;
> + unsigned int bus_min;
> + struct device_node *child;
> +
> + prop = of_get_property(np, "bus-range", NULL);
> + if (!prop)
> + continue;
> + bus_min = be32_to_cpup(prop);
> +
> + bus = pci_find_bus(0, bus_min);
> + if (!bus) {
> + printk(KERN_ERR "Can't find a node for bus %s.\n",
> + np->full_name);
> + continue;
> + }
> +
> + if (bus->self)
> + bus->self->dev.of_node = np;
> + else
> + bus->dev.of_node = np;
> +
> + for_each_child_of_node(np, child) {
> + struct pci_dev *dev;
> + u32 devfn;
> +
> + prop = of_get_property(child, "reg", NULL);
> + if (!prop)
> + continue;
> +
> + devfn = (be32_to_cpup(prop) >> 8) & 0xff;
> + dev = pci_get_slot(bus, devfn);
> + if (!dev)
> + continue;
> + dev->dev.of_node = child;
> + pci_dev_put(dev);
> + }
> + }
> +}
> +#endif
> +
> static void __init dtb_setup_hpet(void)
> {
> struct device_node *dn;
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
>
--
Grant Likely, B.Sc., P.Eng.
Secret Lab Technologies Ltd.
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH v2 TIP 09/14] x86/dtb: Add generic bus probe
@ 2011-02-16 22:04 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 22:04 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: sodaville, devicetree-discuss, x86, linux-kernel
On Fri, Feb 04, 2011 at 11:21:52AM +0100, Sebastian Andrzej Siewior wrote:
> For now we probe these busses and we change is to board dependent probes
> once we have to.
>
> Cc: devicetree-discuss@lists.ozlabs.org
> Acked-by: Grant Likely <grant.likely@secretlab.ca>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
Historically for embedded platforms we leave calling
of_platform_bus_probe() to the bsp code so that weird boards can still
do weird stuff on the probe order. However, I'm all for making more
code common, so we can start with this and switch to per-board (or
per-SoC) calls only if it becomes necessary.
g.
> ---
>
> renamed -immr to -cp
>
> arch/x86/kernel/prom.c | 19 +++++++++++++++++++
> 1 files changed, 19 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
> index 8525ca0..3eaab43 100644
> --- a/arch/x86/kernel/prom.c
> +++ b/arch/x86/kernel/prom.c
> @@ -102,6 +102,25 @@ void __init add_dtb(u64 data)
> initial_dtb = data + offsetof(struct setup_data, data);
> }
>
> +/*
> + * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
> + */
> +static struct of_device_id __initdata ce4100_ids[] = {
> + { .compatible = "intel,ce4100-cp", },
> + { .compatible = "isa", },
> + { .compatible = "pci", },
> + {},
> +};
> +
> +static int __init add_bus_probe(void)
> +{
> + if (!initial_boot_params)
> + return 0;
> +
> + return of_platform_bus_probe(NULL, ce4100_ids, NULL);
> +}
> +module_init(add_bus_probe);
> +
> #ifdef CONFIG_PCI
> static int x86_of_pci_irq_enable(struct pci_dev *dev)
> {
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH v2 TIP 09/14] x86/dtb: Add generic bus probe
@ 2011-02-16 22:04 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 22:04 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA
On Fri, Feb 04, 2011 at 11:21:52AM +0100, Sebastian Andrzej Siewior wrote:
> For now we probe these busses and we change is to board dependent probes
> once we have to.
>
> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Acked-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
> Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Acked-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Historically for embedded platforms we leave calling
of_platform_bus_probe() to the bsp code so that weird boards can still
do weird stuff on the probe order. However, I'm all for making more
code common, so we can start with this and switch to per-board (or
per-SoC) calls only if it becomes necessary.
g.
> ---
>
> renamed -immr to -cp
>
> arch/x86/kernel/prom.c | 19 +++++++++++++++++++
> 1 files changed, 19 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
> index 8525ca0..3eaab43 100644
> --- a/arch/x86/kernel/prom.c
> +++ b/arch/x86/kernel/prom.c
> @@ -102,6 +102,25 @@ void __init add_dtb(u64 data)
> initial_dtb = data + offsetof(struct setup_data, data);
> }
>
> +/*
> + * CE4100 ids. Will be moved to machine_device_initcall() once we have it.
> + */
> +static struct of_device_id __initdata ce4100_ids[] = {
> + { .compatible = "intel,ce4100-cp", },
> + { .compatible = "isa", },
> + { .compatible = "pci", },
> + {},
> +};
> +
> +static int __init add_bus_probe(void)
> +{
> + if (!initial_boot_params)
> + return 0;
> +
> + return of_platform_bus_probe(NULL, ce4100_ids, NULL);
> +}
> +module_init(add_bus_probe);
> +
> #ifdef CONFIG_PCI
> static int x86_of_pci_irq_enable(struct pci_dev *dev)
> {
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 10/14] x86/ioapic: Add OF bindings for IO-APIC
2011-01-24 4:28 ` Sebastian Andrzej Siewior
(?)
@ 2011-02-16 22:04 ` Grant Likely
-1 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 22:04 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: linux-kernel, sodaville, devicetree-discuss, x86
On Mon, Jan 24, 2011 at 09:58:58AM +0530, Sebastian Andrzej Siewior wrote:
> ioapic_xlate provides a translation from the information in device tree
> to ioapic related informations. This includes
> - obtaining hw irq which is the vector number "=> pin number + gsi"
> - obtaining type (level/edge/..)
> - programming this information into ioapic
>
> ioapic_add_ofnode adds an irq_domain based on informations from the device
> tree. This information (irq_domain) is required in order to map a device to
> its proper interrupt controller.
>
> Cc: devicetree-discuss@lists.ozlabs.org
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
Looks fine to me.
g.
> ---
> arch/x86/include/asm/io_apic.h | 7 +++
> arch/x86/include/asm/prom.h | 2 +
> arch/x86/kernel/apic/io_apic.c | 99 ++++++++++++++++++++++++++++++++++++++++
> arch/x86/kernel/irqinit.c | 6 ++
> arch/x86/kernel/prom.c | 15 ++++++
> 5 files changed, 129 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/include/asm/io_apic.h b/arch/x86/include/asm/io_apic.h
> index f327d38..5a8b950 100644
> --- a/arch/x86/include/asm/io_apic.h
> +++ b/arch/x86/include/asm/io_apic.h
> @@ -177,6 +177,13 @@ struct mp_ioapic_gsi{
> u32 gsi_base;
> u32 gsi_end;
> };
> +#ifdef CONFIG_X86_OF
> +struct mp_of_ioapic {
> + struct device_node *node;
> +};
> +extern struct mp_of_ioapic mp_of_ioapic[MAX_IO_APICS];
> +void __init ioapic_add_ofnode(struct device_node *np);
> +#endif
> extern struct mp_ioapic_gsi mp_gsi_routing[];
> extern u32 gsi_top;
> int mp_find_ioapic(u32 gsi);
> diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
> index 3ed0bd6..eea2839 100644
> --- a/arch/x86/include/asm/prom.h
> +++ b/arch/x86/include/asm/prom.h
> @@ -26,6 +26,7 @@
> extern int of_ioapic;
> extern u64 initial_dtb;
> extern void add_dtb(u64 data);
> +extern void x86_add_irq_domains(void);
> void x86_dtb_find_config(void);
> void x86_dtb_get_config(unsigned int unused);
> void add_interrupt_host(struct irq_domain *ih);
> @@ -46,6 +47,7 @@ static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
>
> #else
> static inline void add_dtb(u64 data) { }
> +static inline void x86_add_irq_domains(void) { }
> static inline void x86_of_pci_init(void) { }
> #define x86_dtb_find_config x86_init_noop
> #define x86_dtb_get_config x86_init_uint_noop
> diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c
> index 697dc34..be7417f 100644
> --- a/arch/x86/kernel/apic/io_apic.c
> +++ b/arch/x86/kernel/apic/io_apic.c
> @@ -43,6 +43,7 @@
> #include <linux/bootmem.h>
> #include <linux/dmar.h>
> #include <linux/hpet.h>
> +#include <linux/of_address.h>
>
> #include <asm/idle.h>
> #include <asm/io.h>
> @@ -60,6 +61,7 @@
> #include <asm/irq_remapping.h>
> #include <asm/hpet.h>
> #include <asm/hw_irq.h>
> +#include <asm/irq_controller.h>
>
> #include <asm/apic.h>
>
> @@ -88,6 +90,10 @@ int nr_ioapics;
> /* IO APIC gsi routing info */
> struct mp_ioapic_gsi mp_gsi_routing[MAX_IO_APICS];
>
> +#ifdef CONFIG_X86_OF
> +/* OF -> IO APIC lookup */
> +struct mp_of_ioapic mp_of_ioapic[MAX_IO_APICS];
> +#endif
> /* The one past the highest gsi number used */
> u32 gsi_top;
>
> @@ -4080,6 +4086,99 @@ void __init mp_register_ioapic(int id, u32 address, u32 gsi_base)
> nr_ioapics++;
> }
>
> +#ifdef CONFIG_X86_OF
> +static int ioapic_xlate(struct irq_domain *id, const u32 *intspec, u32 intsize,
> + u32 *out_hwirq, u32 *out_type)
> +{
> + u32 line;
> + u32 idx;
> + u32 type;
> + u32 trigger;
> + u32 polarity;
> + struct irq_cfg *cfg;
> + struct irq_desc *desc;
> +
> + if (intsize < 1)
> + return -EINVAL;
> +
> + line = *intspec;
> + idx = (u32) id->priv;
> + *out_hwirq = line + mp_gsi_routing[idx].gsi_base;
> + if (intsize > 1) {
> + intspec++;
> + type = *intspec;
> + switch (type) {
> + case 0:
> + *out_type = IRQ_TYPE_EDGE_RISING;
> + trigger = IOAPIC_EDGE;
> + polarity = 1;
> + break;
> + case 1:
> + *out_type = IRQ_TYPE_LEVEL_LOW;
> + trigger = IOAPIC_LEVEL;
> + polarity = 0;
> + break;
> + case 2:
> + *out_type = IRQ_TYPE_LEVEL_HIGH;
> + trigger = IOAPIC_LEVEL;
> + polarity = 1;
> + break;
> + case 3:
> + *out_type = IRQ_TYPE_EDGE_FALLING;
> + trigger = IOAPIC_EDGE;
> + polarity = 0;
> + break;
> + default:
> + *out_type = IRQ_TYPE_NONE;
> + trigger = IOAPIC_AUTO;
> + polarity = 0;
> + break;
> + };
> + } else {
> + *out_type = IRQ_TYPE_NONE;
> + trigger = IOAPIC_AUTO;
> + polarity = 0;
> + }
> + /* And now tell the IO APIC to make the line ready */
> + desc = irq_to_desc_alloc_node(*out_hwirq, 0);
> + cfg = irq_cfg(*out_hwirq);
> + add_pin_to_irq_node(cfg, 0, idx, line);
> + /* make it edge by default, settype will update it */
> + setup_ioapic_irq(idx, line, *out_hwirq, cfg, trigger, polarity);
> + return 0;
> +}
> +
> +void __init ioapic_add_ofnode(struct device_node *np)
> +{
> + int i;
> + int ret;
> + struct resource r;
> +
> + ret = of_address_to_resource(np, 0, &r);
> + if (ret) {
> + printk(KERN_ERR "Failed to obtain address for %s\n",
> + np->full_name);
> + return;
> + }
> +
> + for (i = 0; i < nr_ioapics; i++) {
> + if (r.start == mp_ioapics[i].apicaddr) {
> + struct irq_domain *id;
> +
> + mp_of_ioapic[i].node = np;
> + id = kzalloc(sizeof(*id), GFP_KERNEL);
> + BUG_ON(!id);
> + id->controller = np;
> + id->xlate = ioapic_xlate;
> + id->priv = (void *)i;
> + add_interrupt_host(id);
> + return;
> + }
> + }
> + printk(KERN_ERR "IOxAPIC at %s is not registered.\n", np->full_name);
> +}
> +#endif
> +
> /* Enable IOAPIC early just for system timer */
> void __init pre_init_apic_IRQ0(void)
> {
> diff --git a/arch/x86/kernel/irqinit.c b/arch/x86/kernel/irqinit.c
> index 4cadf86..9f76f89 100644
> --- a/arch/x86/kernel/irqinit.c
> +++ b/arch/x86/kernel/irqinit.c
> @@ -119,6 +119,12 @@ void __init init_IRQ(void)
> int i;
>
> /*
> + * We probably need a better place for this, but it works for
> + * now ...
> + */
> + x86_add_irq_domains();
> +
> + /*
> * On cpu 0, Assign IRQ0_VECTOR..IRQ15_VECTOR's to IRQ 0..15.
> * If these IRQ's are handled by legacy interrupt-controllers like PIC,
> * then this configuration will likely be static after the boot. If
> diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
> index 8215e8a..83ab00a 100644
> --- a/arch/x86/kernel/prom.c
> +++ b/arch/x86/kernel/prom.c
> @@ -11,9 +11,11 @@
> #include <linux/slab.h>
> #include <linux/pci.h>
> #include <linux/of_pci.h>
> +#include <linux/of_fdt.h>
>
> #include <asm/hpet.h>
> #include <asm/irq_controller.h>
> +#include <asm/apic.h>
> #include <asm/io_apic.h>
> #include <asm/pci_x86.h>
>
> @@ -320,3 +322,16 @@ void __init x86_dtb_get_config(unsigned int unused)
> dtb_setup_hpet();
> dtb_apic_setup();
> }
> +
> +void __init x86_add_irq_domains(void)
> +{
> + struct device_node *dp;
> +
> + if (!initial_boot_params)
> + return;
> +
> + for_each_node_with_property(dp, "interrupt-controller") {
> + if (of_device_is_compatible(dp, "intel,ioapic"))
> + ioapic_add_ofnode(dp);
> + }
> +}
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH OF 12/14] x86/rtc: don't register rtc if we the DT blob
@ 2011-02-16 22:08 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 22:08 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: linux-kernel, sodaville, devicetree-discuss, x86, Andres Salomon
On Mon, Jan 24, 2011 at 09:59:00AM +0530, Sebastian Andrzej Siewior wrote:
> or we might end up with two device nodes for the same hardware.
>
> Cc: Andres Salomon <dilinger@queued.net>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Acked-by: Grant Likely <grant.likely@secretlab.ca>
I'm okay with this one being merged via the x86 tree.
> ---
> arch/x86/kernel/rtc.c | 3 +++
> include/linux/of.h | 12 ++++++++++++
> 2 files changed, 15 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
> index 6f39cab..3f2ad26 100644
> --- a/arch/x86/kernel/rtc.c
> +++ b/arch/x86/kernel/rtc.c
> @@ -6,6 +6,7 @@
> #include <linux/acpi.h>
> #include <linux/bcd.h>
> #include <linux/pnp.h>
> +#include <linux/of.h>
>
> #include <asm/vsyscall.h>
> #include <asm/x86_init.h>
> @@ -236,6 +237,8 @@ static __init int add_rtc_cmos(void)
> }
> }
> #endif
> + if (of_have_populated_dt())
> + return 0;
>
> platform_device_register(&rtc_device);
> dev_info(&rtc_device.dev,
> diff --git a/include/linux/of.h b/include/linux/of.h
> index cad7cf0..016968d 100644
> --- a/include/linux/of.h
> +++ b/include/linux/of.h
> @@ -70,6 +70,11 @@ extern struct device_node *allnodes;
> extern struct device_node *of_chosen;
> extern rwlock_t devtree_lock;
>
> +static inline int of_have_populated_dt(void)
> +{
> + return allnodes != NULL;
> +}
> +
> static inline bool of_node_is_root(const struct device_node *node)
> {
> return node && (node->parent == NULL);
> @@ -222,5 +227,12 @@ extern void of_attach_node(struct device_node *);
> extern void of_detach_node(struct device_node *);
> #endif
>
> +#else
> +
> +static inline int of_have_populated_dt(void)
> +{
> + return 0;
> +}
> +
> #endif /* CONFIG_OF */
> #endif /* _LINUX_OF_H */
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH OF 12/14] x86/rtc: don't register rtc if we the DT blob
@ 2011-02-16 22:08 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 22:08 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
Andres Salomon
On Mon, Jan 24, 2011 at 09:59:00AM +0530, Sebastian Andrzej Siewior wrote:
> or we might end up with two device nodes for the same hardware.
>
> Cc: Andres Salomon <dilinger-pFFUokh25LWsTnJN9+BGXg@public.gmane.org>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
Acked-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
I'm okay with this one being merged via the x86 tree.
> ---
> arch/x86/kernel/rtc.c | 3 +++
> include/linux/of.h | 12 ++++++++++++
> 2 files changed, 15 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
> index 6f39cab..3f2ad26 100644
> --- a/arch/x86/kernel/rtc.c
> +++ b/arch/x86/kernel/rtc.c
> @@ -6,6 +6,7 @@
> #include <linux/acpi.h>
> #include <linux/bcd.h>
> #include <linux/pnp.h>
> +#include <linux/of.h>
>
> #include <asm/vsyscall.h>
> #include <asm/x86_init.h>
> @@ -236,6 +237,8 @@ static __init int add_rtc_cmos(void)
> }
> }
> #endif
> + if (of_have_populated_dt())
> + return 0;
>
> platform_device_register(&rtc_device);
> dev_info(&rtc_device.dev,
> diff --git a/include/linux/of.h b/include/linux/of.h
> index cad7cf0..016968d 100644
> --- a/include/linux/of.h
> +++ b/include/linux/of.h
> @@ -70,6 +70,11 @@ extern struct device_node *allnodes;
> extern struct device_node *of_chosen;
> extern rwlock_t devtree_lock;
>
> +static inline int of_have_populated_dt(void)
> +{
> + return allnodes != NULL;
> +}
> +
> static inline bool of_node_is_root(const struct device_node *node)
> {
> return node && (node->parent == NULL);
> @@ -222,5 +227,12 @@ extern void of_attach_node(struct device_node *);
> extern void of_detach_node(struct device_node *);
> #endif
>
> +#else
> +
> +static inline int of_have_populated_dt(void)
> +{
> + return 0;
> +}
> +
> #endif /* CONFIG_OF */
> #endif /* _LINUX_OF_H */
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH OF 12/14] x86/rtc: don't register rtc if we the DT blob
@ 2011-02-16 22:09 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 22:09 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: linux-kernel, sodaville, devicetree-discuss, x86, Andres Salomon
On Mon, Jan 24, 2011 at 09:59:00AM +0530, Sebastian Andrzej Siewior wrote:
> or we might end up with two device nodes for the same hardware.
>
> Cc: Andres Salomon <dilinger@queued.net>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
> ---
> arch/x86/kernel/rtc.c | 3 +++
> include/linux/of.h | 12 ++++++++++++
> 2 files changed, 15 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
> index 6f39cab..3f2ad26 100644
> --- a/arch/x86/kernel/rtc.c
> +++ b/arch/x86/kernel/rtc.c
> @@ -6,6 +6,7 @@
> #include <linux/acpi.h>
> #include <linux/bcd.h>
> #include <linux/pnp.h>
> +#include <linux/of.h>
>
> #include <asm/vsyscall.h>
> #include <asm/x86_init.h>
> @@ -236,6 +237,8 @@ static __init int add_rtc_cmos(void)
> }
> }
> #endif
> + if (of_have_populated_dt())
> + return 0;
Hmmm, should this hunk be moved to the next patch to preserve bisectability?
g.
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH OF 12/14] x86/rtc: don't register rtc if we the DT blob
@ 2011-02-16 22:09 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 22:09 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
Andres Salomon
On Mon, Jan 24, 2011 at 09:59:00AM +0530, Sebastian Andrzej Siewior wrote:
> or we might end up with two device nodes for the same hardware.
>
> Cc: Andres Salomon <dilinger-pFFUokh25LWsTnJN9+BGXg@public.gmane.org>
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
> ---
> arch/x86/kernel/rtc.c | 3 +++
> include/linux/of.h | 12 ++++++++++++
> 2 files changed, 15 insertions(+), 0 deletions(-)
>
> diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
> index 6f39cab..3f2ad26 100644
> --- a/arch/x86/kernel/rtc.c
> +++ b/arch/x86/kernel/rtc.c
> @@ -6,6 +6,7 @@
> #include <linux/acpi.h>
> #include <linux/bcd.h>
> #include <linux/pnp.h>
> +#include <linux/of.h>
>
> #include <asm/vsyscall.h>
> #include <asm/x86_init.h>
> @@ -236,6 +237,8 @@ static __init int add_rtc_cmos(void)
> }
> }
> #endif
> + if (of_have_populated_dt())
> + return 0;
Hmmm, should this hunk be moved to the next patch to preserve bisectability?
g.
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH OF 13/14] rtc/cmos: add OF bindings
@ 2011-02-16 22:11 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 22:11 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: linux-kernel, Alessandro Zummo, rtc-linux, devicetree-discuss,
x86, sodaville
On Mon, Jan 24, 2011 at 09:59:01AM +0530, Sebastian Andrzej Siewior wrote:
> This allows to load the OF driver based informations from the device
> tree. Systems without BIOS may need to perform some initialization.
> PowerPC creates a PNP device from the OF information and performs this
> kind of initialization in their private PCI quirk. This looks more
> generic.
>
> Cc: rtc-linux@googlegroups.com
> Cc: Alessandro Zummo <a.zummo@towertech.it>
> Cc: devicetree-discuss@lists.ozlabs.org
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
> Signed-off-by: Dirk Brandewie <dirk.brandewie@gmail.com>
> ---
> Documentation/powerpc/dts-bindings/rtc-cmos.txt | 28 ++++++++++++++
> drivers/rtc/rtc-cmos.c | 46 +++++++++++++++++++++++
> 2 files changed, 74 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/powerpc/dts-bindings/rtc-cmos.txt
>
> diff --git a/Documentation/powerpc/dts-bindings/rtc-cmos.txt b/Documentation/powerpc/dts-bindings/rtc-cmos.txt
> new file mode 100644
> index 0000000..7382989
> --- /dev/null
> +++ b/Documentation/powerpc/dts-bindings/rtc-cmos.txt
Move to Documentation/devicetree/bindings/rtc/
> @@ -0,0 +1,28 @@
> + Motorola mc146818 compatible RTC
> +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> +
> +Required properties:
> + - compatible : "motorola,mc146818"
> + - reg : should contain registers location and length.
> +
> +Optional properties:
> + - interrupts : should contain interrupt.
> + - interrupt-parent : interrupt source phandle.
> + - ctrl-reg : Contains the initial value of the control register also
> + called "Register B".
> + - freq-reg : Contains the initial value of the frequency register also
> + called "Regsiter A".
> +
> +"Register A" and "B" are usually initialized by the firmware (BIOS for
> +instance). If this is not done, it can be performed by the driver.
> +
> +ISA Example:
> +
> + rtc@70 {
> + compatible = "motorola,mc146818";
> + interrupts = <8 3>;
> + interrupt-parent = <&ioapic1>;
> + ctrl-reg = <2>;
> + freq-reg = <0x26>;
> + reg = <1 0x70 2>;
> + };
> diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
> index c7ff8df..2709e00 100644
> --- a/drivers/rtc/rtc-cmos.c
> +++ b/drivers/rtc/rtc-cmos.c
> @@ -37,6 +37,8 @@
> #include <linux/mod_devicetable.h>
> #include <linux/log2.h>
> #include <linux/pm.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
>
> /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
> #include <asm-generic/rtc.h>
> @@ -1123,6 +1125,46 @@ static struct pnp_driver cmos_pnp_driver = {
>
> #endif /* CONFIG_PNP */
>
> +#ifdef CONFIG_OF
> +static const struct of_device_id of_cmos_match[] = {
> + {
> + .compatible = "motorola,mc146818",
> + },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, of_cmos_match);
> +
> +static __init void cmos_of_init(struct platform_device *pdev)
> +{
> + struct device_node *node = pdev->dev.of_node;
> + struct rtc_time time;
> + int ret;
> + const __be32 *val;
> +
> + if (!node)
> + return;
> +
> + val = of_get_property(node, "ctrl-reg", NULL);
> + if (val)
> + CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
> +
> + val = of_get_property(node, "freq-reg", NULL);
> + if (val)
> + CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
> +
> + get_rtc_time(&time);
> + ret = rtc_valid_tm(&time);
> + if (ret) {
> + struct rtc_time def_time = {
> + .tm_year = 1,
> + .tm_mday = 1,
> + };
> + set_rtc_time(&def_time);
> + }
> +}
> +#else
> +static inline void cmos_of_init(struct platform_device *pdev) {}
> +#endif
> /*----------------------------------------------------------------*/
>
> /* Platform setup should have set up an RTC device, when PNP is
> @@ -1131,6 +1173,7 @@ static struct pnp_driver cmos_pnp_driver = {
>
> static int __init cmos_platform_probe(struct platform_device *pdev)
> {
> + cmos_of_init(pdev);
> cmos_wake_setup(&pdev->dev);
> return cmos_do_probe(&pdev->dev,
> platform_get_resource(pdev, IORESOURCE_IO, 0),
> @@ -1162,6 +1205,9 @@ static struct platform_driver cmos_platform_driver = {
> #ifdef CONFIG_PM
> .pm = &cmos_pm_ops,
> #endif
> +#if defined(CONFIG_OF)
> + .of_match_table = of_cmos_match,
> +#endif
The #if defined(CONFIG_OF) is no longer necessary around
.of_match_table, particularly if you have a #else above that #defines
of_cmos_match to NULL.
> }
> };
>
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss@lists.ozlabs.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH OF 13/14] rtc/cmos: add OF bindings
@ 2011-02-16 22:11 ` Grant Likely
0 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-16 22:11 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: Alessandro Zummo, rtc-linux-/JYPxA39Uh5TLH3MbocFFw,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
sodaville-hfZtesqFncYOwBW4kG4KsQ
On Mon, Jan 24, 2011 at 09:59:01AM +0530, Sebastian Andrzej Siewior wrote:
> This allows to load the OF driver based informations from the device
> tree. Systems without BIOS may need to perform some initialization.
> PowerPC creates a PNP device from the OF information and performs this
> kind of initialization in their private PCI quirk. This looks more
> generic.
>
> Cc: rtc-linux-/JYPxA39Uh5TLH3MbocFFw@public.gmane.org
> Cc: Alessandro Zummo <a.zummo-BfzFCNDTiLLj+vYz1yj4TQ@public.gmane.org>
> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> Signed-off-by: Sebastian Andrzej Siewior <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org>
> Signed-off-by: Dirk Brandewie <dirk.brandewie-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
> ---
> Documentation/powerpc/dts-bindings/rtc-cmos.txt | 28 ++++++++++++++
> drivers/rtc/rtc-cmos.c | 46 +++++++++++++++++++++++
> 2 files changed, 74 insertions(+), 0 deletions(-)
> create mode 100644 Documentation/powerpc/dts-bindings/rtc-cmos.txt
>
> diff --git a/Documentation/powerpc/dts-bindings/rtc-cmos.txt b/Documentation/powerpc/dts-bindings/rtc-cmos.txt
> new file mode 100644
> index 0000000..7382989
> --- /dev/null
> +++ b/Documentation/powerpc/dts-bindings/rtc-cmos.txt
Move to Documentation/devicetree/bindings/rtc/
> @@ -0,0 +1,28 @@
> + Motorola mc146818 compatible RTC
> +~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
> +
> +Required properties:
> + - compatible : "motorola,mc146818"
> + - reg : should contain registers location and length.
> +
> +Optional properties:
> + - interrupts : should contain interrupt.
> + - interrupt-parent : interrupt source phandle.
> + - ctrl-reg : Contains the initial value of the control register also
> + called "Register B".
> + - freq-reg : Contains the initial value of the frequency register also
> + called "Regsiter A".
> +
> +"Register A" and "B" are usually initialized by the firmware (BIOS for
> +instance). If this is not done, it can be performed by the driver.
> +
> +ISA Example:
> +
> + rtc@70 {
> + compatible = "motorola,mc146818";
> + interrupts = <8 3>;
> + interrupt-parent = <&ioapic1>;
> + ctrl-reg = <2>;
> + freq-reg = <0x26>;
> + reg = <1 0x70 2>;
> + };
> diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
> index c7ff8df..2709e00 100644
> --- a/drivers/rtc/rtc-cmos.c
> +++ b/drivers/rtc/rtc-cmos.c
> @@ -37,6 +37,8 @@
> #include <linux/mod_devicetable.h>
> #include <linux/log2.h>
> #include <linux/pm.h>
> +#include <linux/of.h>
> +#include <linux/of_platform.h>
>
> /* this is for "generic access to PC-style RTC" using CMOS_READ/CMOS_WRITE */
> #include <asm-generic/rtc.h>
> @@ -1123,6 +1125,46 @@ static struct pnp_driver cmos_pnp_driver = {
>
> #endif /* CONFIG_PNP */
>
> +#ifdef CONFIG_OF
> +static const struct of_device_id of_cmos_match[] = {
> + {
> + .compatible = "motorola,mc146818",
> + },
> + { },
> +};
> +MODULE_DEVICE_TABLE(of, of_cmos_match);
> +
> +static __init void cmos_of_init(struct platform_device *pdev)
> +{
> + struct device_node *node = pdev->dev.of_node;
> + struct rtc_time time;
> + int ret;
> + const __be32 *val;
> +
> + if (!node)
> + return;
> +
> + val = of_get_property(node, "ctrl-reg", NULL);
> + if (val)
> + CMOS_WRITE(be32_to_cpup(val), RTC_CONTROL);
> +
> + val = of_get_property(node, "freq-reg", NULL);
> + if (val)
> + CMOS_WRITE(be32_to_cpup(val), RTC_FREQ_SELECT);
> +
> + get_rtc_time(&time);
> + ret = rtc_valid_tm(&time);
> + if (ret) {
> + struct rtc_time def_time = {
> + .tm_year = 1,
> + .tm_mday = 1,
> + };
> + set_rtc_time(&def_time);
> + }
> +}
> +#else
> +static inline void cmos_of_init(struct platform_device *pdev) {}
> +#endif
> /*----------------------------------------------------------------*/
>
> /* Platform setup should have set up an RTC device, when PNP is
> @@ -1131,6 +1173,7 @@ static struct pnp_driver cmos_pnp_driver = {
>
> static int __init cmos_platform_probe(struct platform_device *pdev)
> {
> + cmos_of_init(pdev);
> cmos_wake_setup(&pdev->dev);
> return cmos_do_probe(&pdev->dev,
> platform_get_resource(pdev, IORESOURCE_IO, 0),
> @@ -1162,6 +1205,9 @@ static struct platform_driver cmos_platform_driver = {
> #ifdef CONFIG_PM
> .pm = &cmos_pm_ops,
> #endif
> +#if defined(CONFIG_OF)
> + .of_match_table = of_cmos_match,
> +#endif
The #if defined(CONFIG_OF) is no longer necessary around
.of_match_table, particularly if you have a #else above that #defines
of_cmos_match to NULL.
> }
> };
>
> --
> 1.7.3.2
>
> _______________________________________________
> devicetree-discuss mailing list
> devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
> https://lists.ozlabs.org/listinfo/devicetree-discuss
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH OF 07/14] of: move of_irq_map_pci() into generic code
@ 2011-02-17 7:49 ` Michal Simek
0 siblings, 0 replies; 94+ messages in thread
From: Michal Simek @ 2011-02-17 7:49 UTC (permalink / raw)
To: Grant Likely
Cc: Sebastian Andrzej Siewior, linux-kernel, sodaville,
devicetree-discuss, x86, Sebastian Andrzej Siewior, Michal Simek,
linuxppc-dev, microblaze-uclinux
Grant Likely wrote:
> On Sun, Jan 23, 2011 at 9:28 PM, Sebastian Andrzej Siewior
> <bigeasy@linutronix.de> wrote:
>> From: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
>>
>> There is a tiny difference between PPC32 and PPC64. Microblaze uses the
>> PPC32 variant.
>>
>> Cc: devicetree-discuss@lists.ozlabs.org
>> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>> Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
>
> I've got this one in my devicetree/next branch which is pulled into
> linux-next. I've not received an ack from Ben yet. Michal, is this
> okay by you?
yep. No problem. I don't have pci hw for testing but compilation is fine.
If you like:
Acked-by: Michal Simek <monstr@monstr.eu>
Thanks,
Michal
>
> http://git.secretlab.ca/?p=linux-2.6.git;a=commit;h=04bea68b2f0eeebb089ecc67b618795925268b4a
>
> g.
>
>> ---
>> arch/microblaze/include/asm/pci-bridge.h | 12 ++++
>> arch/microblaze/include/asm/prom.h | 15 -----
>> arch/microblaze/kernel/prom_parse.c | 77 ---------------------------
>> arch/microblaze/pci/pci-common.c | 1 +
>> arch/powerpc/include/asm/pci-bridge.h | 10 ++++
>> arch/powerpc/include/asm/prom.h | 15 -----
>> arch/powerpc/kernel/pci-common.c | 1 +
>> arch/powerpc/kernel/prom_parse.c | 84 ------------------------------
>> drivers/of/Kconfig | 6 ++
>> drivers/of/Makefile | 1 +
>> drivers/of/of_pci.c | 80 ++++++++++++++++++++++++++++
>> include/linux/of_pci.h | 20 +++++++
>> 12 files changed, 131 insertions(+), 191 deletions(-)
>> create mode 100644 drivers/of/of_pci.c
>> create mode 100644 include/linux/of_pci.h
>>
>> diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
>> index 0c68764..c2a40a4 100644
>> --- a/arch/microblaze/include/asm/pci-bridge.h
>> +++ b/arch/microblaze/include/asm/pci-bridge.h
>> @@ -104,11 +104,22 @@ struct pci_controller {
>> int global_number; /* PCI domain number */
>> };
>>
>> +#ifdef CONFIG_PCI
>> static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
>> {
>> return bus->sysdata;
>> }
>>
>> +static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
>> +{
>> + struct pci_controller *host;
>> +
>> + if (bus->self)
>> + return pci_device_to_OF_node(bus->self);
>> + host = pci_bus_to_host(bus);
>> + return host ? host->dn : NULL;
>> +}
>> +
>> static inline int isa_vaddr_is_ioport(void __iomem *address)
>> {
>> /* No specific ISA handling on ppc32 at this stage, it
>> @@ -116,6 +127,7 @@ static inline int isa_vaddr_is_ioport(void __iomem *address)
>> */
>> return 0;
>> }
>> +#endif
>>
>> /* These are used for config access before all the PCI probing
>> has been done. */
>> diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include/asm/prom.h
>> index 2e72af0..d0890d3 100644
>> --- a/arch/microblaze/include/asm/prom.h
>> +++ b/arch/microblaze/include/asm/prom.h
>> @@ -64,21 +64,6 @@ extern void kdump_move_device_tree(void);
>> /* CPU OF node matching */
>> struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
>>
>> -/**
>> - * of_irq_map_pci - Resolve the interrupt for a PCI device
>> - * @pdev: the device whose interrupt is to be resolved
>> - * @out_irq: structure of_irq filled by this function
>> - *
>> - * This function resolves the PCI interrupt for a given PCI device. If a
>> - * device-node exists for a given pci_dev, it will use normal OF tree
>> - * walking. If not, it will implement standard swizzling and walk up the
>> - * PCI tree until an device-node is found, at which point it will finish
>> - * resolving using the OF tree walking.
>> - */
>> -struct pci_dev;
>> -struct of_irq;
>> -extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
>> -
>> #endif /* __ASSEMBLY__ */
>> #endif /* __KERNEL__ */
>>
>> diff --git a/arch/microblaze/kernel/prom_parse.c b/arch/microblaze/kernel/prom_parse.c
>> index 9ae24f4..47187cc 100644
>> --- a/arch/microblaze/kernel/prom_parse.c
>> +++ b/arch/microblaze/kernel/prom_parse.c
>> @@ -2,88 +2,11 @@
>>
>> #include <linux/kernel.h>
>> #include <linux/string.h>
>> -#include <linux/pci_regs.h>
>> #include <linux/module.h>
>> #include <linux/ioport.h>
>> #include <linux/etherdevice.h>
>> #include <linux/of_address.h>
>> #include <asm/prom.h>
>> -#include <asm/pci-bridge.h>
>> -
>> -#ifdef CONFIG_PCI
>> -int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
>> -{
>> - struct device_node *dn, *ppnode;
>> - struct pci_dev *ppdev;
>> - u32 lspec;
>> - u32 laddr[3];
>> - u8 pin;
>> - int rc;
>> -
>> - /* Check if we have a device node, if yes, fallback to standard OF
>> - * parsing
>> - */
>> - dn = pci_device_to_OF_node(pdev);
>> - if (dn)
>> - return of_irq_map_one(dn, 0, out_irq);
>> -
>> - /* Ok, we don't, time to have fun. Let's start by building up an
>> - * interrupt spec. we assume #interrupt-cells is 1, which is standard
>> - * for PCI. If you do different, then don't use that routine.
>> - */
>> - rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
>> - if (rc != 0)
>> - return rc;
>> - /* No pin, exit */
>> - if (pin == 0)
>> - return -ENODEV;
>> -
>> - /* Now we walk up the PCI tree */
>> - lspec = pin;
>> - for (;;) {
>> - /* Get the pci_dev of our parent */
>> - ppdev = pdev->bus->self;
>> -
>> - /* Ouch, it's a host bridge... */
>> - if (ppdev == NULL) {
>> - struct pci_controller *host;
>> - host = pci_bus_to_host(pdev->bus);
>> - ppnode = host ? host->dn : NULL;
>> - /* No node for host bridge ? give up */
>> - if (ppnode == NULL)
>> - return -EINVAL;
>> - } else
>> - /* We found a P2P bridge, check if it has a node */
>> - ppnode = pci_device_to_OF_node(ppdev);
>> -
>> - /* Ok, we have found a parent with a device-node, hand over to
>> - * the OF parsing code.
>> - * We build a unit address from the linux device to be used for
>> - * resolution. Note that we use the linux bus number which may
>> - * not match your firmware bus numbering.
>> - * Fortunately, in most cases, interrupt-map-mask doesn't
>> - * include the bus number as part of the matching.
>> - * You should still be careful about that though if you intend
>> - * to rely on this function (you ship a firmware that doesn't
>> - * create device nodes for all PCI devices).
>> - */
>> - if (ppnode)
>> - break;
>> -
>> - /* We can only get here if we hit a P2P bridge with no node,
>> - * let's do standard swizzling and try again
>> - */
>> - lspec = pci_swizzle_interrupt_pin(pdev, lspec);
>> - pdev = ppdev;
>> - }
>> -
>> - laddr[0] = (pdev->bus->number << 16)
>> - | (pdev->devfn << 8);
>> - laddr[1] = laddr[2] = 0;
>> - return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
>> -}
>> -EXPORT_SYMBOL_GPL(of_irq_map_pci);
>> -#endif /* CONFIG_PCI */
>>
>> void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
>> unsigned long *busno, unsigned long *phys, unsigned long *size)
>> diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
>> index e363615..1e01a12 100644
>> --- a/arch/microblaze/pci/pci-common.c
>> +++ b/arch/microblaze/pci/pci-common.c
>> @@ -29,6 +29,7 @@
>> #include <linux/slab.h>
>> #include <linux/of.h>
>> #include <linux/of_address.h>
>> +#include <linux/of_pci.h>
>>
>> #include <asm/processor.h>
>> #include <asm/io.h>
>> diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
>> index 51e9e6f..edeb80f 100644
>> --- a/arch/powerpc/include/asm/pci-bridge.h
>> +++ b/arch/powerpc/include/asm/pci-bridge.h
>> @@ -171,6 +171,16 @@ static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
>> return bus->sysdata;
>> }
>>
>> +static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
>> +{
>> + struct pci_controller *host;
>> +
>> + if (bus->self)
>> + return pci_device_to_OF_node(bus->self);
>> + host = pci_bus_to_host(bus);
>> + return host ? host->dn : NULL;
>> +}
>> +
>> static inline int isa_vaddr_is_ioport(void __iomem *address)
>> {
>> /* No specific ISA handling on ppc32 at this stage, it
>> diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h
>> index d727575..c189aa5 100644
>> --- a/arch/powerpc/include/asm/prom.h
>> +++ b/arch/powerpc/include/asm/prom.h
>> @@ -70,21 +70,6 @@ static inline int of_node_to_nid(struct device_node *device) { return 0; }
>> #endif
>> #define of_node_to_nid of_node_to_nid
>>
>> -/**
>> - * of_irq_map_pci - Resolve the interrupt for a PCI device
>> - * @pdev: the device whose interrupt is to be resolved
>> - * @out_irq: structure of_irq filled by this function
>> - *
>> - * This function resolves the PCI interrupt for a given PCI device. If a
>> - * device-node exists for a given pci_dev, it will use normal OF tree
>> - * walking. If not, it will implement standard swizzling and walk up the
>> - * PCI tree until an device-node is found, at which point it will finish
>> - * resolving using the OF tree walking.
>> - */
>> -struct pci_dev;
>> -struct of_irq;
>> -extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
>> -
>> extern void of_instantiate_rtc(void);
>>
>> /* These includes are put at the bottom because they may contain things
>> diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
>> index 10a44e6..eb341be 100644
>> --- a/arch/powerpc/kernel/pci-common.c
>> +++ b/arch/powerpc/kernel/pci-common.c
>> @@ -22,6 +22,7 @@
>> #include <linux/init.h>
>> #include <linux/bootmem.h>
>> #include <linux/of_address.h>
>> +#include <linux/of_pci.h>
>> #include <linux/mm.h>
>> #include <linux/list.h>
>> #include <linux/syscalls.h>
>> diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c
>> index c2b7a07..47187cc 100644
>> --- a/arch/powerpc/kernel/prom_parse.c
>> +++ b/arch/powerpc/kernel/prom_parse.c
>> @@ -2,95 +2,11 @@
>>
>> #include <linux/kernel.h>
>> #include <linux/string.h>
>> -#include <linux/pci_regs.h>
>> #include <linux/module.h>
>> #include <linux/ioport.h>
>> #include <linux/etherdevice.h>
>> #include <linux/of_address.h>
>> #include <asm/prom.h>
>> -#include <asm/pci-bridge.h>
>> -
>> -#ifdef CONFIG_PCI
>> -int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
>> -{
>> - struct device_node *dn, *ppnode;
>> - struct pci_dev *ppdev;
>> - u32 lspec;
>> - u32 laddr[3];
>> - u8 pin;
>> - int rc;
>> -
>> - /* Check if we have a device node, if yes, fallback to standard OF
>> - * parsing
>> - */
>> - dn = pci_device_to_OF_node(pdev);
>> - if (dn) {
>> - rc = of_irq_map_one(dn, 0, out_irq);
>> - if (!rc)
>> - return rc;
>> - }
>> -
>> - /* Ok, we don't, time to have fun. Let's start by building up an
>> - * interrupt spec. we assume #interrupt-cells is 1, which is standard
>> - * for PCI. If you do different, then don't use that routine.
>> - */
>> - rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
>> - if (rc != 0)
>> - return rc;
>> - /* No pin, exit */
>> - if (pin == 0)
>> - return -ENODEV;
>> -
>> - /* Now we walk up the PCI tree */
>> - lspec = pin;
>> - for (;;) {
>> - /* Get the pci_dev of our parent */
>> - ppdev = pdev->bus->self;
>> -
>> - /* Ouch, it's a host bridge... */
>> - if (ppdev == NULL) {
>> -#ifdef CONFIG_PPC64
>> - ppnode = pci_bus_to_OF_node(pdev->bus);
>> -#else
>> - struct pci_controller *host;
>> - host = pci_bus_to_host(pdev->bus);
>> - ppnode = host ? host->dn : NULL;
>> -#endif
>> - /* No node for host bridge ? give up */
>> - if (ppnode == NULL)
>> - return -EINVAL;
>> - } else
>> - /* We found a P2P bridge, check if it has a node */
>> - ppnode = pci_device_to_OF_node(ppdev);
>> -
>> - /* Ok, we have found a parent with a device-node, hand over to
>> - * the OF parsing code.
>> - * We build a unit address from the linux device to be used for
>> - * resolution. Note that we use the linux bus number which may
>> - * not match your firmware bus numbering.
>> - * Fortunately, in most cases, interrupt-map-mask doesn't include
>> - * the bus number as part of the matching.
>> - * You should still be careful about that though if you intend
>> - * to rely on this function (you ship a firmware that doesn't
>> - * create device nodes for all PCI devices).
>> - */
>> - if (ppnode)
>> - break;
>> -
>> - /* We can only get here if we hit a P2P bridge with no node,
>> - * let's do standard swizzling and try again
>> - */
>> - lspec = pci_swizzle_interrupt_pin(pdev, lspec);
>> - pdev = ppdev;
>> - }
>> -
>> - laddr[0] = (pdev->bus->number << 16)
>> - | (pdev->devfn << 8);
>> - laddr[1] = laddr[2] = 0;
>> - return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
>> -}
>> -EXPORT_SYMBOL_GPL(of_irq_map_pci);
>> -#endif /* CONFIG_PCI */
>>
>> void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
>> unsigned long *busno, unsigned long *phys, unsigned long *size)
>> diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
>> index 3c6e100..c71cff1 100644
>> --- a/drivers/of/Kconfig
>> +++ b/drivers/of/Kconfig
>> @@ -69,4 +69,10 @@ config OF_MDIO
>> help
>> OpenFirmware MDIO bus (Ethernet PHY) accessors
>>
>> +config OF_PCI
>> + def_tristate PCI
>> + depends on PCI && !SPARC
>> + help
>> + OpenFirmware PCI bus accessors
>> +
>> endmenu # OF
>> diff --git a/drivers/of/Makefile b/drivers/of/Makefile
>> index 3ab21a0..f7861ed 100644
>> --- a/drivers/of/Makefile
>> +++ b/drivers/of/Makefile
>> @@ -9,3 +9,4 @@ obj-$(CONFIG_OF_I2C) += of_i2c.o
>> obj-$(CONFIG_OF_NET) += of_net.o
>> obj-$(CONFIG_OF_SPI) += of_spi.o
>> obj-$(CONFIG_OF_MDIO) += of_mdio.o
>> +obj-$(CONFIG_OF_PCI) += of_pci.o
>> diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
>> new file mode 100644
>> index 0000000..dd862d2
>> --- /dev/null
>> +++ b/drivers/of/of_pci.c
>> @@ -0,0 +1,80 @@
>> +#include <linux/kernel.h>
>> +#include <linux/of_pci.h>
>> +#include <asm/prom.h>
>> +
>> +int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
>> +{
>> + struct device_node *dn, *ppnode;
>> + struct pci_dev *ppdev;
>> + u32 lspec;
>> + __be32 lspec_be;
>> + __be32 laddr[3];
>> + u8 pin;
>> + int rc;
>> +
>> + /* Check if we have a device node, if yes, fallback to standard OF
>> + * parsing
>> + */
>> + dn = pci_device_to_OF_node(pdev);
>> + if (dn) {
>> + rc = of_irq_map_one(dn, 0, out_irq);
>> + if (!rc)
>> + return rc;
>> + }
>> +
>> + /* Ok, we don't, time to have fun. Let's start by building up an
>> + * interrupt spec. we assume #interrupt-cells is 1, which is standard
>> + * for PCI. If you do different, then don't use that routine.
>> + */
>> + rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
>> + if (rc != 0)
>> + return rc;
>> + /* No pin, exit */
>> + if (pin == 0)
>> + return -ENODEV;
>> +
>> + /* Now we walk up the PCI tree */
>> + lspec = pin;
>> + for (;;) {
>> + /* Get the pci_dev of our parent */
>> + ppdev = pdev->bus->self;
>> +
>> + /* Ouch, it's a host bridge... */
>> + if (ppdev == NULL) {
>> + ppnode = pci_bus_to_OF_node(pdev->bus);
>> +
>> + /* No node for host bridge ? give up */
>> + if (ppnode == NULL)
>> + return -EINVAL;
>> + } else {
>> + /* We found a P2P bridge, check if it has a node */
>> + ppnode = pci_device_to_OF_node(ppdev);
>> + }
>> +
>> + /* Ok, we have found a parent with a device-node, hand over to
>> + * the OF parsing code.
>> + * We build a unit address from the linux device to be used for
>> + * resolution. Note that we use the linux bus number which may
>> + * not match your firmware bus numbering.
>> + * Fortunately, in most cases, interrupt-map-mask doesn't
>> + * include the bus number as part of the matching.
>> + * You should still be careful about that though if you intend
>> + * to rely on this function (you ship a firmware that doesn't
>> + * create device nodes for all PCI devices).
>> + */
>> + if (ppnode)
>> + break;
>> +
>> + /* We can only get here if we hit a P2P bridge with no node,
>> + * let's do standard swizzling and try again
>> + */
>> + lspec = pci_swizzle_interrupt_pin(pdev, lspec);
>> + pdev = ppdev;
>> + }
>> +
>> + lspec_be = cpu_to_be32(lspec);
>> + laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
>> + laddr[1] = laddr[2] = cpu_to_be32(0);
>> + return of_irq_map_raw(ppnode, &lspec_be, 1, laddr, out_irq);
>> +}
>> +EXPORT_SYMBOL_GPL(of_irq_map_pci);
>> diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
>> new file mode 100644
>> index 0000000..9b0ba67
>> --- /dev/null
>> +++ b/include/linux/of_pci.h
>> @@ -0,0 +1,20 @@
>> +#ifndef __OF_PCI_H
>> +#define __OF_PCI_H
>> +
>> +#include <linux/pci.h>
>> +
>> +/**
>> + * of_irq_map_pci - Resolve the interrupt for a PCI device
>> + * @pdev: the device whose interrupt is to be resolved
>> + * @out_irq: structure of_irq filled by this function
>> + *
>> + * This function resolves the PCI interrupt for a given PCI device. If a
>> + * device-node exists for a given pci_dev, it will use normal OF tree
>> + * walking. If not, it will implement standard swizzling and walk up the
>> + * PCI tree until an device-node is found, at which point it will finish
>> + * resolving using the OF tree walking.
>> + */
>> +struct pci_dev;
>> +struct of_irq;
>> +int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
>> +#endif
>> --
>> 1.7.3.2
>>
>> _______________________________________________
>> devicetree-discuss mailing list
>> devicetree-discuss@lists.ozlabs.org
>> https://lists.ozlabs.org/listinfo/devicetree-discuss
>>
>
>
>
--
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH OF 07/14] of: move of_irq_map_pci() into generic code
@ 2011-02-17 7:49 ` Michal Simek
0 siblings, 0 replies; 94+ messages in thread
From: Michal Simek @ 2011-02-17 7:49 UTC (permalink / raw)
To: Grant Likely
Cc: microblaze-uclinux-rVRm/Wmeqae7NGdpmJTKYQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA,
sodaville-hfZtesqFncYOwBW4kG4KsQ, Sebastian Andrzej Siewior,
linuxppc-dev-uLR06cmDAlY/bJ5BZ2RsiQ, Sebastian Andrzej Siewior
Grant Likely wrote:
> On Sun, Jan 23, 2011 at 9:28 PM, Sebastian Andrzej Siewior
> <bigeasy-hfZtesqFncYOwBW4kG4KsQ@public.gmane.org> wrote:
>> From: Sebastian Andrzej Siewior <sebastian-E0PNVn5OA6ohrxcnuTQ+TQ@public.gmane.org>
>>
>> There is a tiny difference between PPC32 and PPC64. Microblaze uses the
>> PPC32 variant.
>>
>> Cc: devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
>> Cc: Benjamin Herrenschmidt <benh-XVmvHMARGAS8U2dJNN8I7kB+6BGkLq7r@public.gmane.org>
>> Signed-off-by: Sebastian Andrzej Siewior <sebastian-E0PNVn5OA6ohrxcnuTQ+TQ@public.gmane.org>
>
> I've got this one in my devicetree/next branch which is pulled into
> linux-next. I've not received an ack from Ben yet. Michal, is this
> okay by you?
yep. No problem. I don't have pci hw for testing but compilation is fine.
If you like:
Acked-by: Michal Simek <monstr-pSz03upnqPeHXe+LvDLADg@public.gmane.org>
Thanks,
Michal
>
> http://git.secretlab.ca/?p=linux-2.6.git;a=commit;h=04bea68b2f0eeebb089ecc67b618795925268b4a
>
> g.
>
>> ---
>> arch/microblaze/include/asm/pci-bridge.h | 12 ++++
>> arch/microblaze/include/asm/prom.h | 15 -----
>> arch/microblaze/kernel/prom_parse.c | 77 ---------------------------
>> arch/microblaze/pci/pci-common.c | 1 +
>> arch/powerpc/include/asm/pci-bridge.h | 10 ++++
>> arch/powerpc/include/asm/prom.h | 15 -----
>> arch/powerpc/kernel/pci-common.c | 1 +
>> arch/powerpc/kernel/prom_parse.c | 84 ------------------------------
>> drivers/of/Kconfig | 6 ++
>> drivers/of/Makefile | 1 +
>> drivers/of/of_pci.c | 80 ++++++++++++++++++++++++++++
>> include/linux/of_pci.h | 20 +++++++
>> 12 files changed, 131 insertions(+), 191 deletions(-)
>> create mode 100644 drivers/of/of_pci.c
>> create mode 100644 include/linux/of_pci.h
>>
>> diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
>> index 0c68764..c2a40a4 100644
>> --- a/arch/microblaze/include/asm/pci-bridge.h
>> +++ b/arch/microblaze/include/asm/pci-bridge.h
>> @@ -104,11 +104,22 @@ struct pci_controller {
>> int global_number; /* PCI domain number */
>> };
>>
>> +#ifdef CONFIG_PCI
>> static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
>> {
>> return bus->sysdata;
>> }
>>
>> +static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
>> +{
>> + struct pci_controller *host;
>> +
>> + if (bus->self)
>> + return pci_device_to_OF_node(bus->self);
>> + host = pci_bus_to_host(bus);
>> + return host ? host->dn : NULL;
>> +}
>> +
>> static inline int isa_vaddr_is_ioport(void __iomem *address)
>> {
>> /* No specific ISA handling on ppc32 at this stage, it
>> @@ -116,6 +127,7 @@ static inline int isa_vaddr_is_ioport(void __iomem *address)
>> */
>> return 0;
>> }
>> +#endif
>>
>> /* These are used for config access before all the PCI probing
>> has been done. */
>> diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include/asm/prom.h
>> index 2e72af0..d0890d3 100644
>> --- a/arch/microblaze/include/asm/prom.h
>> +++ b/arch/microblaze/include/asm/prom.h
>> @@ -64,21 +64,6 @@ extern void kdump_move_device_tree(void);
>> /* CPU OF node matching */
>> struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
>>
>> -/**
>> - * of_irq_map_pci - Resolve the interrupt for a PCI device
>> - * @pdev: the device whose interrupt is to be resolved
>> - * @out_irq: structure of_irq filled by this function
>> - *
>> - * This function resolves the PCI interrupt for a given PCI device. If a
>> - * device-node exists for a given pci_dev, it will use normal OF tree
>> - * walking. If not, it will implement standard swizzling and walk up the
>> - * PCI tree until an device-node is found, at which point it will finish
>> - * resolving using the OF tree walking.
>> - */
>> -struct pci_dev;
>> -struct of_irq;
>> -extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
>> -
>> #endif /* __ASSEMBLY__ */
>> #endif /* __KERNEL__ */
>>
>> diff --git a/arch/microblaze/kernel/prom_parse.c b/arch/microblaze/kernel/prom_parse.c
>> index 9ae24f4..47187cc 100644
>> --- a/arch/microblaze/kernel/prom_parse.c
>> +++ b/arch/microblaze/kernel/prom_parse.c
>> @@ -2,88 +2,11 @@
>>
>> #include <linux/kernel.h>
>> #include <linux/string.h>
>> -#include <linux/pci_regs.h>
>> #include <linux/module.h>
>> #include <linux/ioport.h>
>> #include <linux/etherdevice.h>
>> #include <linux/of_address.h>
>> #include <asm/prom.h>
>> -#include <asm/pci-bridge.h>
>> -
>> -#ifdef CONFIG_PCI
>> -int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
>> -{
>> - struct device_node *dn, *ppnode;
>> - struct pci_dev *ppdev;
>> - u32 lspec;
>> - u32 laddr[3];
>> - u8 pin;
>> - int rc;
>> -
>> - /* Check if we have a device node, if yes, fallback to standard OF
>> - * parsing
>> - */
>> - dn = pci_device_to_OF_node(pdev);
>> - if (dn)
>> - return of_irq_map_one(dn, 0, out_irq);
>> -
>> - /* Ok, we don't, time to have fun. Let's start by building up an
>> - * interrupt spec. we assume #interrupt-cells is 1, which is standard
>> - * for PCI. If you do different, then don't use that routine.
>> - */
>> - rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
>> - if (rc != 0)
>> - return rc;
>> - /* No pin, exit */
>> - if (pin == 0)
>> - return -ENODEV;
>> -
>> - /* Now we walk up the PCI tree */
>> - lspec = pin;
>> - for (;;) {
>> - /* Get the pci_dev of our parent */
>> - ppdev = pdev->bus->self;
>> -
>> - /* Ouch, it's a host bridge... */
>> - if (ppdev == NULL) {
>> - struct pci_controller *host;
>> - host = pci_bus_to_host(pdev->bus);
>> - ppnode = host ? host->dn : NULL;
>> - /* No node for host bridge ? give up */
>> - if (ppnode == NULL)
>> - return -EINVAL;
>> - } else
>> - /* We found a P2P bridge, check if it has a node */
>> - ppnode = pci_device_to_OF_node(ppdev);
>> -
>> - /* Ok, we have found a parent with a device-node, hand over to
>> - * the OF parsing code.
>> - * We build a unit address from the linux device to be used for
>> - * resolution. Note that we use the linux bus number which may
>> - * not match your firmware bus numbering.
>> - * Fortunately, in most cases, interrupt-map-mask doesn't
>> - * include the bus number as part of the matching.
>> - * You should still be careful about that though if you intend
>> - * to rely on this function (you ship a firmware that doesn't
>> - * create device nodes for all PCI devices).
>> - */
>> - if (ppnode)
>> - break;
>> -
>> - /* We can only get here if we hit a P2P bridge with no node,
>> - * let's do standard swizzling and try again
>> - */
>> - lspec = pci_swizzle_interrupt_pin(pdev, lspec);
>> - pdev = ppdev;
>> - }
>> -
>> - laddr[0] = (pdev->bus->number << 16)
>> - | (pdev->devfn << 8);
>> - laddr[1] = laddr[2] = 0;
>> - return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
>> -}
>> -EXPORT_SYMBOL_GPL(of_irq_map_pci);
>> -#endif /* CONFIG_PCI */
>>
>> void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
>> unsigned long *busno, unsigned long *phys, unsigned long *size)
>> diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
>> index e363615..1e01a12 100644
>> --- a/arch/microblaze/pci/pci-common.c
>> +++ b/arch/microblaze/pci/pci-common.c
>> @@ -29,6 +29,7 @@
>> #include <linux/slab.h>
>> #include <linux/of.h>
>> #include <linux/of_address.h>
>> +#include <linux/of_pci.h>
>>
>> #include <asm/processor.h>
>> #include <asm/io.h>
>> diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
>> index 51e9e6f..edeb80f 100644
>> --- a/arch/powerpc/include/asm/pci-bridge.h
>> +++ b/arch/powerpc/include/asm/pci-bridge.h
>> @@ -171,6 +171,16 @@ static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
>> return bus->sysdata;
>> }
>>
>> +static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
>> +{
>> + struct pci_controller *host;
>> +
>> + if (bus->self)
>> + return pci_device_to_OF_node(bus->self);
>> + host = pci_bus_to_host(bus);
>> + return host ? host->dn : NULL;
>> +}
>> +
>> static inline int isa_vaddr_is_ioport(void __iomem *address)
>> {
>> /* No specific ISA handling on ppc32 at this stage, it
>> diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h
>> index d727575..c189aa5 100644
>> --- a/arch/powerpc/include/asm/prom.h
>> +++ b/arch/powerpc/include/asm/prom.h
>> @@ -70,21 +70,6 @@ static inline int of_node_to_nid(struct device_node *device) { return 0; }
>> #endif
>> #define of_node_to_nid of_node_to_nid
>>
>> -/**
>> - * of_irq_map_pci - Resolve the interrupt for a PCI device
>> - * @pdev: the device whose interrupt is to be resolved
>> - * @out_irq: structure of_irq filled by this function
>> - *
>> - * This function resolves the PCI interrupt for a given PCI device. If a
>> - * device-node exists for a given pci_dev, it will use normal OF tree
>> - * walking. If not, it will implement standard swizzling and walk up the
>> - * PCI tree until an device-node is found, at which point it will finish
>> - * resolving using the OF tree walking.
>> - */
>> -struct pci_dev;
>> -struct of_irq;
>> -extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
>> -
>> extern void of_instantiate_rtc(void);
>>
>> /* These includes are put at the bottom because they may contain things
>> diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
>> index 10a44e6..eb341be 100644
>> --- a/arch/powerpc/kernel/pci-common.c
>> +++ b/arch/powerpc/kernel/pci-common.c
>> @@ -22,6 +22,7 @@
>> #include <linux/init.h>
>> #include <linux/bootmem.h>
>> #include <linux/of_address.h>
>> +#include <linux/of_pci.h>
>> #include <linux/mm.h>
>> #include <linux/list.h>
>> #include <linux/syscalls.h>
>> diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c
>> index c2b7a07..47187cc 100644
>> --- a/arch/powerpc/kernel/prom_parse.c
>> +++ b/arch/powerpc/kernel/prom_parse.c
>> @@ -2,95 +2,11 @@
>>
>> #include <linux/kernel.h>
>> #include <linux/string.h>
>> -#include <linux/pci_regs.h>
>> #include <linux/module.h>
>> #include <linux/ioport.h>
>> #include <linux/etherdevice.h>
>> #include <linux/of_address.h>
>> #include <asm/prom.h>
>> -#include <asm/pci-bridge.h>
>> -
>> -#ifdef CONFIG_PCI
>> -int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
>> -{
>> - struct device_node *dn, *ppnode;
>> - struct pci_dev *ppdev;
>> - u32 lspec;
>> - u32 laddr[3];
>> - u8 pin;
>> - int rc;
>> -
>> - /* Check if we have a device node, if yes, fallback to standard OF
>> - * parsing
>> - */
>> - dn = pci_device_to_OF_node(pdev);
>> - if (dn) {
>> - rc = of_irq_map_one(dn, 0, out_irq);
>> - if (!rc)
>> - return rc;
>> - }
>> -
>> - /* Ok, we don't, time to have fun. Let's start by building up an
>> - * interrupt spec. we assume #interrupt-cells is 1, which is standard
>> - * for PCI. If you do different, then don't use that routine.
>> - */
>> - rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
>> - if (rc != 0)
>> - return rc;
>> - /* No pin, exit */
>> - if (pin == 0)
>> - return -ENODEV;
>> -
>> - /* Now we walk up the PCI tree */
>> - lspec = pin;
>> - for (;;) {
>> - /* Get the pci_dev of our parent */
>> - ppdev = pdev->bus->self;
>> -
>> - /* Ouch, it's a host bridge... */
>> - if (ppdev == NULL) {
>> -#ifdef CONFIG_PPC64
>> - ppnode = pci_bus_to_OF_node(pdev->bus);
>> -#else
>> - struct pci_controller *host;
>> - host = pci_bus_to_host(pdev->bus);
>> - ppnode = host ? host->dn : NULL;
>> -#endif
>> - /* No node for host bridge ? give up */
>> - if (ppnode == NULL)
>> - return -EINVAL;
>> - } else
>> - /* We found a P2P bridge, check if it has a node */
>> - ppnode = pci_device_to_OF_node(ppdev);
>> -
>> - /* Ok, we have found a parent with a device-node, hand over to
>> - * the OF parsing code.
>> - * We build a unit address from the linux device to be used for
>> - * resolution. Note that we use the linux bus number which may
>> - * not match your firmware bus numbering.
>> - * Fortunately, in most cases, interrupt-map-mask doesn't include
>> - * the bus number as part of the matching.
>> - * You should still be careful about that though if you intend
>> - * to rely on this function (you ship a firmware that doesn't
>> - * create device nodes for all PCI devices).
>> - */
>> - if (ppnode)
>> - break;
>> -
>> - /* We can only get here if we hit a P2P bridge with no node,
>> - * let's do standard swizzling and try again
>> - */
>> - lspec = pci_swizzle_interrupt_pin(pdev, lspec);
>> - pdev = ppdev;
>> - }
>> -
>> - laddr[0] = (pdev->bus->number << 16)
>> - | (pdev->devfn << 8);
>> - laddr[1] = laddr[2] = 0;
>> - return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
>> -}
>> -EXPORT_SYMBOL_GPL(of_irq_map_pci);
>> -#endif /* CONFIG_PCI */
>>
>> void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
>> unsigned long *busno, unsigned long *phys, unsigned long *size)
>> diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
>> index 3c6e100..c71cff1 100644
>> --- a/drivers/of/Kconfig
>> +++ b/drivers/of/Kconfig
>> @@ -69,4 +69,10 @@ config OF_MDIO
>> help
>> OpenFirmware MDIO bus (Ethernet PHY) accessors
>>
>> +config OF_PCI
>> + def_tristate PCI
>> + depends on PCI && !SPARC
>> + help
>> + OpenFirmware PCI bus accessors
>> +
>> endmenu # OF
>> diff --git a/drivers/of/Makefile b/drivers/of/Makefile
>> index 3ab21a0..f7861ed 100644
>> --- a/drivers/of/Makefile
>> +++ b/drivers/of/Makefile
>> @@ -9,3 +9,4 @@ obj-$(CONFIG_OF_I2C) += of_i2c.o
>> obj-$(CONFIG_OF_NET) += of_net.o
>> obj-$(CONFIG_OF_SPI) += of_spi.o
>> obj-$(CONFIG_OF_MDIO) += of_mdio.o
>> +obj-$(CONFIG_OF_PCI) += of_pci.o
>> diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
>> new file mode 100644
>> index 0000000..dd862d2
>> --- /dev/null
>> +++ b/drivers/of/of_pci.c
>> @@ -0,0 +1,80 @@
>> +#include <linux/kernel.h>
>> +#include <linux/of_pci.h>
>> +#include <asm/prom.h>
>> +
>> +int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
>> +{
>> + struct device_node *dn, *ppnode;
>> + struct pci_dev *ppdev;
>> + u32 lspec;
>> + __be32 lspec_be;
>> + __be32 laddr[3];
>> + u8 pin;
>> + int rc;
>> +
>> + /* Check if we have a device node, if yes, fallback to standard OF
>> + * parsing
>> + */
>> + dn = pci_device_to_OF_node(pdev);
>> + if (dn) {
>> + rc = of_irq_map_one(dn, 0, out_irq);
>> + if (!rc)
>> + return rc;
>> + }
>> +
>> + /* Ok, we don't, time to have fun. Let's start by building up an
>> + * interrupt spec. we assume #interrupt-cells is 1, which is standard
>> + * for PCI. If you do different, then don't use that routine.
>> + */
>> + rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
>> + if (rc != 0)
>> + return rc;
>> + /* No pin, exit */
>> + if (pin == 0)
>> + return -ENODEV;
>> +
>> + /* Now we walk up the PCI tree */
>> + lspec = pin;
>> + for (;;) {
>> + /* Get the pci_dev of our parent */
>> + ppdev = pdev->bus->self;
>> +
>> + /* Ouch, it's a host bridge... */
>> + if (ppdev == NULL) {
>> + ppnode = pci_bus_to_OF_node(pdev->bus);
>> +
>> + /* No node for host bridge ? give up */
>> + if (ppnode == NULL)
>> + return -EINVAL;
>> + } else {
>> + /* We found a P2P bridge, check if it has a node */
>> + ppnode = pci_device_to_OF_node(ppdev);
>> + }
>> +
>> + /* Ok, we have found a parent with a device-node, hand over to
>> + * the OF parsing code.
>> + * We build a unit address from the linux device to be used for
>> + * resolution. Note that we use the linux bus number which may
>> + * not match your firmware bus numbering.
>> + * Fortunately, in most cases, interrupt-map-mask doesn't
>> + * include the bus number as part of the matching.
>> + * You should still be careful about that though if you intend
>> + * to rely on this function (you ship a firmware that doesn't
>> + * create device nodes for all PCI devices).
>> + */
>> + if (ppnode)
>> + break;
>> +
>> + /* We can only get here if we hit a P2P bridge with no node,
>> + * let's do standard swizzling and try again
>> + */
>> + lspec = pci_swizzle_interrupt_pin(pdev, lspec);
>> + pdev = ppdev;
>> + }
>> +
>> + lspec_be = cpu_to_be32(lspec);
>> + laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
>> + laddr[1] = laddr[2] = cpu_to_be32(0);
>> + return of_irq_map_raw(ppnode, &lspec_be, 1, laddr, out_irq);
>> +}
>> +EXPORT_SYMBOL_GPL(of_irq_map_pci);
>> diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
>> new file mode 100644
>> index 0000000..9b0ba67
>> --- /dev/null
>> +++ b/include/linux/of_pci.h
>> @@ -0,0 +1,20 @@
>> +#ifndef __OF_PCI_H
>> +#define __OF_PCI_H
>> +
>> +#include <linux/pci.h>
>> +
>> +/**
>> + * of_irq_map_pci - Resolve the interrupt for a PCI device
>> + * @pdev: the device whose interrupt is to be resolved
>> + * @out_irq: structure of_irq filled by this function
>> + *
>> + * This function resolves the PCI interrupt for a given PCI device. If a
>> + * device-node exists for a given pci_dev, it will use normal OF tree
>> + * walking. If not, it will implement standard swizzling and walk up the
>> + * PCI tree until an device-node is found, at which point it will finish
>> + * resolving using the OF tree walking.
>> + */
>> +struct pci_dev;
>> +struct of_irq;
>> +int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
>> +#endif
>> --
>> 1.7.3.2
>>
>> _______________________________________________
>> devicetree-discuss mailing list
>> devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ@public.gmane.org
>> https://lists.ozlabs.org/listinfo/devicetree-discuss
>>
>
>
>
--
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH OF 07/14] of: move of_irq_map_pci() into generic code
@ 2011-02-17 7:49 ` Michal Simek
0 siblings, 0 replies; 94+ messages in thread
From: Michal Simek @ 2011-02-17 7:49 UTC (permalink / raw)
To: Grant Likely
Cc: Michal Simek, microblaze-uclinux, devicetree-discuss, x86,
linux-kernel, sodaville, Sebastian Andrzej Siewior, linuxppc-dev,
Sebastian Andrzej Siewior
Grant Likely wrote:
> On Sun, Jan 23, 2011 at 9:28 PM, Sebastian Andrzej Siewior
> <bigeasy@linutronix.de> wrote:
>> From: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
>>
>> There is a tiny difference between PPC32 and PPC64. Microblaze uses the
>> PPC32 variant.
>>
>> Cc: devicetree-discuss@lists.ozlabs.org
>> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
>> Signed-off-by: Sebastian Andrzej Siewior <sebastian@breakpoint.cc>
>
> I've got this one in my devicetree/next branch which is pulled into
> linux-next. I've not received an ack from Ben yet. Michal, is this
> okay by you?
yep. No problem. I don't have pci hw for testing but compilation is fine.
If you like:
Acked-by: Michal Simek <monstr@monstr.eu>
Thanks,
Michal
>
> http://git.secretlab.ca/?p=linux-2.6.git;a=commit;h=04bea68b2f0eeebb089ecc67b618795925268b4a
>
> g.
>
>> ---
>> arch/microblaze/include/asm/pci-bridge.h | 12 ++++
>> arch/microblaze/include/asm/prom.h | 15 -----
>> arch/microblaze/kernel/prom_parse.c | 77 ---------------------------
>> arch/microblaze/pci/pci-common.c | 1 +
>> arch/powerpc/include/asm/pci-bridge.h | 10 ++++
>> arch/powerpc/include/asm/prom.h | 15 -----
>> arch/powerpc/kernel/pci-common.c | 1 +
>> arch/powerpc/kernel/prom_parse.c | 84 ------------------------------
>> drivers/of/Kconfig | 6 ++
>> drivers/of/Makefile | 1 +
>> drivers/of/of_pci.c | 80 ++++++++++++++++++++++++++++
>> include/linux/of_pci.h | 20 +++++++
>> 12 files changed, 131 insertions(+), 191 deletions(-)
>> create mode 100644 drivers/of/of_pci.c
>> create mode 100644 include/linux/of_pci.h
>>
>> diff --git a/arch/microblaze/include/asm/pci-bridge.h b/arch/microblaze/include/asm/pci-bridge.h
>> index 0c68764..c2a40a4 100644
>> --- a/arch/microblaze/include/asm/pci-bridge.h
>> +++ b/arch/microblaze/include/asm/pci-bridge.h
>> @@ -104,11 +104,22 @@ struct pci_controller {
>> int global_number; /* PCI domain number */
>> };
>>
>> +#ifdef CONFIG_PCI
>> static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
>> {
>> return bus->sysdata;
>> }
>>
>> +static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
>> +{
>> + struct pci_controller *host;
>> +
>> + if (bus->self)
>> + return pci_device_to_OF_node(bus->self);
>> + host = pci_bus_to_host(bus);
>> + return host ? host->dn : NULL;
>> +}
>> +
>> static inline int isa_vaddr_is_ioport(void __iomem *address)
>> {
>> /* No specific ISA handling on ppc32 at this stage, it
>> @@ -116,6 +127,7 @@ static inline int isa_vaddr_is_ioport(void __iomem *address)
>> */
>> return 0;
>> }
>> +#endif
>>
>> /* These are used for config access before all the PCI probing
>> has been done. */
>> diff --git a/arch/microblaze/include/asm/prom.h b/arch/microblaze/include/asm/prom.h
>> index 2e72af0..d0890d3 100644
>> --- a/arch/microblaze/include/asm/prom.h
>> +++ b/arch/microblaze/include/asm/prom.h
>> @@ -64,21 +64,6 @@ extern void kdump_move_device_tree(void);
>> /* CPU OF node matching */
>> struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
>>
>> -/**
>> - * of_irq_map_pci - Resolve the interrupt for a PCI device
>> - * @pdev: the device whose interrupt is to be resolved
>> - * @out_irq: structure of_irq filled by this function
>> - *
>> - * This function resolves the PCI interrupt for a given PCI device. If a
>> - * device-node exists for a given pci_dev, it will use normal OF tree
>> - * walking. If not, it will implement standard swizzling and walk up the
>> - * PCI tree until an device-node is found, at which point it will finish
>> - * resolving using the OF tree walking.
>> - */
>> -struct pci_dev;
>> -struct of_irq;
>> -extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
>> -
>> #endif /* __ASSEMBLY__ */
>> #endif /* __KERNEL__ */
>>
>> diff --git a/arch/microblaze/kernel/prom_parse.c b/arch/microblaze/kernel/prom_parse.c
>> index 9ae24f4..47187cc 100644
>> --- a/arch/microblaze/kernel/prom_parse.c
>> +++ b/arch/microblaze/kernel/prom_parse.c
>> @@ -2,88 +2,11 @@
>>
>> #include <linux/kernel.h>
>> #include <linux/string.h>
>> -#include <linux/pci_regs.h>
>> #include <linux/module.h>
>> #include <linux/ioport.h>
>> #include <linux/etherdevice.h>
>> #include <linux/of_address.h>
>> #include <asm/prom.h>
>> -#include <asm/pci-bridge.h>
>> -
>> -#ifdef CONFIG_PCI
>> -int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
>> -{
>> - struct device_node *dn, *ppnode;
>> - struct pci_dev *ppdev;
>> - u32 lspec;
>> - u32 laddr[3];
>> - u8 pin;
>> - int rc;
>> -
>> - /* Check if we have a device node, if yes, fallback to standard OF
>> - * parsing
>> - */
>> - dn = pci_device_to_OF_node(pdev);
>> - if (dn)
>> - return of_irq_map_one(dn, 0, out_irq);
>> -
>> - /* Ok, we don't, time to have fun. Let's start by building up an
>> - * interrupt spec. we assume #interrupt-cells is 1, which is standard
>> - * for PCI. If you do different, then don't use that routine.
>> - */
>> - rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
>> - if (rc != 0)
>> - return rc;
>> - /* No pin, exit */
>> - if (pin == 0)
>> - return -ENODEV;
>> -
>> - /* Now we walk up the PCI tree */
>> - lspec = pin;
>> - for (;;) {
>> - /* Get the pci_dev of our parent */
>> - ppdev = pdev->bus->self;
>> -
>> - /* Ouch, it's a host bridge... */
>> - if (ppdev == NULL) {
>> - struct pci_controller *host;
>> - host = pci_bus_to_host(pdev->bus);
>> - ppnode = host ? host->dn : NULL;
>> - /* No node for host bridge ? give up */
>> - if (ppnode == NULL)
>> - return -EINVAL;
>> - } else
>> - /* We found a P2P bridge, check if it has a node */
>> - ppnode = pci_device_to_OF_node(ppdev);
>> -
>> - /* Ok, we have found a parent with a device-node, hand over to
>> - * the OF parsing code.
>> - * We build a unit address from the linux device to be used for
>> - * resolution. Note that we use the linux bus number which may
>> - * not match your firmware bus numbering.
>> - * Fortunately, in most cases, interrupt-map-mask doesn't
>> - * include the bus number as part of the matching.
>> - * You should still be careful about that though if you intend
>> - * to rely on this function (you ship a firmware that doesn't
>> - * create device nodes for all PCI devices).
>> - */
>> - if (ppnode)
>> - break;
>> -
>> - /* We can only get here if we hit a P2P bridge with no node,
>> - * let's do standard swizzling and try again
>> - */
>> - lspec = pci_swizzle_interrupt_pin(pdev, lspec);
>> - pdev = ppdev;
>> - }
>> -
>> - laddr[0] = (pdev->bus->number << 16)
>> - | (pdev->devfn << 8);
>> - laddr[1] = laddr[2] = 0;
>> - return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
>> -}
>> -EXPORT_SYMBOL_GPL(of_irq_map_pci);
>> -#endif /* CONFIG_PCI */
>>
>> void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
>> unsigned long *busno, unsigned long *phys, unsigned long *size)
>> diff --git a/arch/microblaze/pci/pci-common.c b/arch/microblaze/pci/pci-common.c
>> index e363615..1e01a12 100644
>> --- a/arch/microblaze/pci/pci-common.c
>> +++ b/arch/microblaze/pci/pci-common.c
>> @@ -29,6 +29,7 @@
>> #include <linux/slab.h>
>> #include <linux/of.h>
>> #include <linux/of_address.h>
>> +#include <linux/of_pci.h>
>>
>> #include <asm/processor.h>
>> #include <asm/io.h>
>> diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
>> index 51e9e6f..edeb80f 100644
>> --- a/arch/powerpc/include/asm/pci-bridge.h
>> +++ b/arch/powerpc/include/asm/pci-bridge.h
>> @@ -171,6 +171,16 @@ static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
>> return bus->sysdata;
>> }
>>
>> +static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
>> +{
>> + struct pci_controller *host;
>> +
>> + if (bus->self)
>> + return pci_device_to_OF_node(bus->self);
>> + host = pci_bus_to_host(bus);
>> + return host ? host->dn : NULL;
>> +}
>> +
>> static inline int isa_vaddr_is_ioport(void __iomem *address)
>> {
>> /* No specific ISA handling on ppc32 at this stage, it
>> diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h
>> index d727575..c189aa5 100644
>> --- a/arch/powerpc/include/asm/prom.h
>> +++ b/arch/powerpc/include/asm/prom.h
>> @@ -70,21 +70,6 @@ static inline int of_node_to_nid(struct device_node *device) { return 0; }
>> #endif
>> #define of_node_to_nid of_node_to_nid
>>
>> -/**
>> - * of_irq_map_pci - Resolve the interrupt for a PCI device
>> - * @pdev: the device whose interrupt is to be resolved
>> - * @out_irq: structure of_irq filled by this function
>> - *
>> - * This function resolves the PCI interrupt for a given PCI device. If a
>> - * device-node exists for a given pci_dev, it will use normal OF tree
>> - * walking. If not, it will implement standard swizzling and walk up the
>> - * PCI tree until an device-node is found, at which point it will finish
>> - * resolving using the OF tree walking.
>> - */
>> -struct pci_dev;
>> -struct of_irq;
>> -extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
>> -
>> extern void of_instantiate_rtc(void);
>>
>> /* These includes are put at the bottom because they may contain things
>> diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
>> index 10a44e6..eb341be 100644
>> --- a/arch/powerpc/kernel/pci-common.c
>> +++ b/arch/powerpc/kernel/pci-common.c
>> @@ -22,6 +22,7 @@
>> #include <linux/init.h>
>> #include <linux/bootmem.h>
>> #include <linux/of_address.h>
>> +#include <linux/of_pci.h>
>> #include <linux/mm.h>
>> #include <linux/list.h>
>> #include <linux/syscalls.h>
>> diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c
>> index c2b7a07..47187cc 100644
>> --- a/arch/powerpc/kernel/prom_parse.c
>> +++ b/arch/powerpc/kernel/prom_parse.c
>> @@ -2,95 +2,11 @@
>>
>> #include <linux/kernel.h>
>> #include <linux/string.h>
>> -#include <linux/pci_regs.h>
>> #include <linux/module.h>
>> #include <linux/ioport.h>
>> #include <linux/etherdevice.h>
>> #include <linux/of_address.h>
>> #include <asm/prom.h>
>> -#include <asm/pci-bridge.h>
>> -
>> -#ifdef CONFIG_PCI
>> -int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
>> -{
>> - struct device_node *dn, *ppnode;
>> - struct pci_dev *ppdev;
>> - u32 lspec;
>> - u32 laddr[3];
>> - u8 pin;
>> - int rc;
>> -
>> - /* Check if we have a device node, if yes, fallback to standard OF
>> - * parsing
>> - */
>> - dn = pci_device_to_OF_node(pdev);
>> - if (dn) {
>> - rc = of_irq_map_one(dn, 0, out_irq);
>> - if (!rc)
>> - return rc;
>> - }
>> -
>> - /* Ok, we don't, time to have fun. Let's start by building up an
>> - * interrupt spec. we assume #interrupt-cells is 1, which is standard
>> - * for PCI. If you do different, then don't use that routine.
>> - */
>> - rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
>> - if (rc != 0)
>> - return rc;
>> - /* No pin, exit */
>> - if (pin == 0)
>> - return -ENODEV;
>> -
>> - /* Now we walk up the PCI tree */
>> - lspec = pin;
>> - for (;;) {
>> - /* Get the pci_dev of our parent */
>> - ppdev = pdev->bus->self;
>> -
>> - /* Ouch, it's a host bridge... */
>> - if (ppdev == NULL) {
>> -#ifdef CONFIG_PPC64
>> - ppnode = pci_bus_to_OF_node(pdev->bus);
>> -#else
>> - struct pci_controller *host;
>> - host = pci_bus_to_host(pdev->bus);
>> - ppnode = host ? host->dn : NULL;
>> -#endif
>> - /* No node for host bridge ? give up */
>> - if (ppnode == NULL)
>> - return -EINVAL;
>> - } else
>> - /* We found a P2P bridge, check if it has a node */
>> - ppnode = pci_device_to_OF_node(ppdev);
>> -
>> - /* Ok, we have found a parent with a device-node, hand over to
>> - * the OF parsing code.
>> - * We build a unit address from the linux device to be used for
>> - * resolution. Note that we use the linux bus number which may
>> - * not match your firmware bus numbering.
>> - * Fortunately, in most cases, interrupt-map-mask doesn't include
>> - * the bus number as part of the matching.
>> - * You should still be careful about that though if you intend
>> - * to rely on this function (you ship a firmware that doesn't
>> - * create device nodes for all PCI devices).
>> - */
>> - if (ppnode)
>> - break;
>> -
>> - /* We can only get here if we hit a P2P bridge with no node,
>> - * let's do standard swizzling and try again
>> - */
>> - lspec = pci_swizzle_interrupt_pin(pdev, lspec);
>> - pdev = ppdev;
>> - }
>> -
>> - laddr[0] = (pdev->bus->number << 16)
>> - | (pdev->devfn << 8);
>> - laddr[1] = laddr[2] = 0;
>> - return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
>> -}
>> -EXPORT_SYMBOL_GPL(of_irq_map_pci);
>> -#endif /* CONFIG_PCI */
>>
>> void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
>> unsigned long *busno, unsigned long *phys, unsigned long *size)
>> diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
>> index 3c6e100..c71cff1 100644
>> --- a/drivers/of/Kconfig
>> +++ b/drivers/of/Kconfig
>> @@ -69,4 +69,10 @@ config OF_MDIO
>> help
>> OpenFirmware MDIO bus (Ethernet PHY) accessors
>>
>> +config OF_PCI
>> + def_tristate PCI
>> + depends on PCI && !SPARC
>> + help
>> + OpenFirmware PCI bus accessors
>> +
>> endmenu # OF
>> diff --git a/drivers/of/Makefile b/drivers/of/Makefile
>> index 3ab21a0..f7861ed 100644
>> --- a/drivers/of/Makefile
>> +++ b/drivers/of/Makefile
>> @@ -9,3 +9,4 @@ obj-$(CONFIG_OF_I2C) += of_i2c.o
>> obj-$(CONFIG_OF_NET) += of_net.o
>> obj-$(CONFIG_OF_SPI) += of_spi.o
>> obj-$(CONFIG_OF_MDIO) += of_mdio.o
>> +obj-$(CONFIG_OF_PCI) += of_pci.o
>> diff --git a/drivers/of/of_pci.c b/drivers/of/of_pci.c
>> new file mode 100644
>> index 0000000..dd862d2
>> --- /dev/null
>> +++ b/drivers/of/of_pci.c
>> @@ -0,0 +1,80 @@
>> +#include <linux/kernel.h>
>> +#include <linux/of_pci.h>
>> +#include <asm/prom.h>
>> +
>> +int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
>> +{
>> + struct device_node *dn, *ppnode;
>> + struct pci_dev *ppdev;
>> + u32 lspec;
>> + __be32 lspec_be;
>> + __be32 laddr[3];
>> + u8 pin;
>> + int rc;
>> +
>> + /* Check if we have a device node, if yes, fallback to standard OF
>> + * parsing
>> + */
>> + dn = pci_device_to_OF_node(pdev);
>> + if (dn) {
>> + rc = of_irq_map_one(dn, 0, out_irq);
>> + if (!rc)
>> + return rc;
>> + }
>> +
>> + /* Ok, we don't, time to have fun. Let's start by building up an
>> + * interrupt spec. we assume #interrupt-cells is 1, which is standard
>> + * for PCI. If you do different, then don't use that routine.
>> + */
>> + rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
>> + if (rc != 0)
>> + return rc;
>> + /* No pin, exit */
>> + if (pin == 0)
>> + return -ENODEV;
>> +
>> + /* Now we walk up the PCI tree */
>> + lspec = pin;
>> + for (;;) {
>> + /* Get the pci_dev of our parent */
>> + ppdev = pdev->bus->self;
>> +
>> + /* Ouch, it's a host bridge... */
>> + if (ppdev == NULL) {
>> + ppnode = pci_bus_to_OF_node(pdev->bus);
>> +
>> + /* No node for host bridge ? give up */
>> + if (ppnode == NULL)
>> + return -EINVAL;
>> + } else {
>> + /* We found a P2P bridge, check if it has a node */
>> + ppnode = pci_device_to_OF_node(ppdev);
>> + }
>> +
>> + /* Ok, we have found a parent with a device-node, hand over to
>> + * the OF parsing code.
>> + * We build a unit address from the linux device to be used for
>> + * resolution. Note that we use the linux bus number which may
>> + * not match your firmware bus numbering.
>> + * Fortunately, in most cases, interrupt-map-mask doesn't
>> + * include the bus number as part of the matching.
>> + * You should still be careful about that though if you intend
>> + * to rely on this function (you ship a firmware that doesn't
>> + * create device nodes for all PCI devices).
>> + */
>> + if (ppnode)
>> + break;
>> +
>> + /* We can only get here if we hit a P2P bridge with no node,
>> + * let's do standard swizzling and try again
>> + */
>> + lspec = pci_swizzle_interrupt_pin(pdev, lspec);
>> + pdev = ppdev;
>> + }
>> +
>> + lspec_be = cpu_to_be32(lspec);
>> + laddr[0] = cpu_to_be32((pdev->bus->number << 16) | (pdev->devfn << 8));
>> + laddr[1] = laddr[2] = cpu_to_be32(0);
>> + return of_irq_map_raw(ppnode, &lspec_be, 1, laddr, out_irq);
>> +}
>> +EXPORT_SYMBOL_GPL(of_irq_map_pci);
>> diff --git a/include/linux/of_pci.h b/include/linux/of_pci.h
>> new file mode 100644
>> index 0000000..9b0ba67
>> --- /dev/null
>> +++ b/include/linux/of_pci.h
>> @@ -0,0 +1,20 @@
>> +#ifndef __OF_PCI_H
>> +#define __OF_PCI_H
>> +
>> +#include <linux/pci.h>
>> +
>> +/**
>> + * of_irq_map_pci - Resolve the interrupt for a PCI device
>> + * @pdev: the device whose interrupt is to be resolved
>> + * @out_irq: structure of_irq filled by this function
>> + *
>> + * This function resolves the PCI interrupt for a given PCI device. If a
>> + * device-node exists for a given pci_dev, it will use normal OF tree
>> + * walking. If not, it will implement standard swizzling and walk up the
>> + * PCI tree until an device-node is found, at which point it will finish
>> + * resolving using the OF tree walking.
>> + */
>> +struct pci_dev;
>> +struct of_irq;
>> +int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
>> +#endif
>> --
>> 1.7.3.2
>>
>> _______________________________________________
>> devicetree-discuss mailing list
>> devicetree-discuss@lists.ozlabs.org
>> https://lists.ozlabs.org/listinfo/devicetree-discuss
>>
>
>
>
--
Michal Simek, Ing. (M.Eng)
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel 2.6 Microblaze Linux - http://www.monstr.eu/fdt/
Microblaze U-BOOT custodian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 02/14] x86: Add device tree support
@ 2011-02-17 11:03 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-17 11:03 UTC (permalink / raw)
To: Grant Likely; +Cc: linux-kernel, sodaville, devicetree-discuss, x86
Grant Likely wrote:
> Hi Sebastian,
Hi Grant,
>
> Relatively minor comments below. You can go ahead and add the
> following when you respin:
>
> Acked-by: Grant Likely <grant.likely@secretlab.ca>
Cool.
>> diff --git a/Documentation/x86/boot_with_dtb.txt b/Documentation/x86/boot_with_dtb.txt
>> new file mode 100644
>> index 0000000..6a357aa
>> --- /dev/null
>> +++ b/Documentation/x86/boot_with_dtb.txt
>> @@ -0,0 +1,26 @@
>> + Booting x86 with device tree
>> +=================================
>> +
>> +1. Introduction
>> +~~~~~~~~~~~~~~~
>> +This document contains device tree information which are specific to
>> +the x86 platform. Generic informations as bindings can be found in
>> +Documentation/powerpc/dts-bindings/
>> +
>> +2. Passing the device tree
>> +~~~~~~~~~~~~~~~~~~~~~~~~~~
>> +The pointer to the device tree block (dtb) is passed via setup_data
>> +(see [0]) which requires at least boot protocol 2.09. The type filed is
>> +defined as
>> +
>> +#define SETUP_DTB 2
>> +
>> +3. Purpose
>> +~~~~~~~~~~~
>> +The device tree is used as an extension to the "boot page". As such it does not
>> +parse / consider data which are already covered by the boot page. This includes
>> +memory size, command line arguments or initrd address.
>> +It simply holds information which can not be retrieved otherwise like interrupt
>> +routing or a list of devices behind an I2C bus.
>> +
>> +[0] Documentation/x86/boot.txt
>
> Please also add a brief description to section I of
> Documentation/devicetree/booting-without-of.txt
I assumed this file is powerpc only. Since you added arm there I have no
problem to move this content there.
>> diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
>> index b4ec95f..b227ba7 100644
>> --- a/arch/x86/include/asm/prom.h
>> +++ b/arch/x86/include/asm/prom.h
>> @@ -1 +1,59 @@
>> -/* dummy prom.h; here to make linux/of.h's #includes happy */
>> +/*
>> + * Definitions for Device tree / OpenFirmware handling on X86
>> + *
>> + * based on arch/powerpc/include/asm/prom.h which is
>> + * Copyright (C) 1996-2005 Paul Mackerras.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>> + * as published by the Free Software Foundation; either version
>> + * 2 of the License, or (at your option) any later version.
>> + */
>> +
>> +#ifndef _ASM_X86_PROM_H
>> +#define _ASM_X86_PROM_H
>> +#ifndef __ASSEMBLY__
>> +
>> +#include <linux/of.h>
>> +#include <linux/types.h>
>> +#include <asm/irq.h>
>> +#include <asm/atomic.h>
>> +#include <asm/setup.h>
>> +
>> +#ifdef CONFIG_OF
>> +extern void add_dtb(u64 data);
>> +#else
>> +static inline void add_dtb(u64 data) { }
>> +#endif
>> +
>> +extern char cmd_line[COMMAND_LINE_SIZE];
>> +/* This number is used when no interrupt has been assigned */
>> +#define NO_IRQ (0)
>
> This line should no longer be necessary. drivers/of/irq.c defines
> NO_IRQ if it isn't already defined by the architecture. I'm trying to
> limit the exposure of NO_IRQ in dt code.
okay, I will to remove that.
>> +#endif /* __ASSEMBLY__ */
>> +
>> +/*
>> + * These includes are put at the bottom because they may contain things
>> + * that are overridden by this file. Ideally they shouldn't be included
>> + * by this file, but there are a bunch of .c files that currently depend
>> + * on it. Eventually they will be cleaned up.
>> + */
>> +#include <linux/of_fdt.h>
>> +#include <linux/of_irq.h>
>> +#include <linux/platform_device.h>
>
> You should be able to remove these includes. The problems described
> in the header are mostly with device drivers and architecture code.
> You shouldn't run into any of those issue, and if you do they should
> be fixed at the source.
okay.
>> index c752e97..149c87f 100644
>> --- a/arch/x86/kernel/irqinit.c
>> +++ b/arch/x86/kernel/irqinit.c
>> @@ -25,6 +25,7 @@
>> #include <asm/setup.h>
>> #include <asm/i8259.h>
>> #include <asm/traps.h>
>> +#include <asm/prom.h>
>
> I'm probably missing something. I don't see any changes to irqinit.c
> other than this. What symbol definition has been moved to prom.h that
> irqinit.c needs?
This hunk was folded into the wrong patch. It should been folded into
"x86/ioapic: Add OF bindings for IO-APIC".
>> /*
>> * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
>> diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
>> new file mode 100644
>> index 0000000..4969ffa
>> --- /dev/null
>> +++ b/arch/x86/kernel/prom.c
>
> You don't need to name this prom.c. devicetree.c would make more sense.
> prom is a legacy name from when only Open Firmware systems were using
> the dt code.
okay.
>> @@ -0,0 +1,51 @@
>> +
>> +void __init add_dtb(u64 data)
>> +{
>> + initial_boot_params = (struct boot_param_header *)
>> + phys_to_virt((u64) (u32) data +
>> + offsetof(struct setup_data, data));
>
> (struct boot_param_header *) cast unnecessary since phys_to_virt
> should return a void*.
removed.
>> +}
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [PATCH TIP 02/14] x86: Add device tree support
@ 2011-02-17 11:03 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-17 11:03 UTC (permalink / raw)
To: Grant Likely
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
x86-DgEjT+Ai2ygdnm+yROfE0A, linux-kernel-u79uwXL29TY76Z2rM5mHXA
Grant Likely wrote:
> Hi Sebastian,
Hi Grant,
>
> Relatively minor comments below. You can go ahead and add the
> following when you respin:
>
> Acked-by: Grant Likely <grant.likely-s3s/WqlpOiPyB63q8FvJNQ@public.gmane.org>
Cool.
>> diff --git a/Documentation/x86/boot_with_dtb.txt b/Documentation/x86/boot_with_dtb.txt
>> new file mode 100644
>> index 0000000..6a357aa
>> --- /dev/null
>> +++ b/Documentation/x86/boot_with_dtb.txt
>> @@ -0,0 +1,26 @@
>> + Booting x86 with device tree
>> +=================================
>> +
>> +1. Introduction
>> +~~~~~~~~~~~~~~~
>> +This document contains device tree information which are specific to
>> +the x86 platform. Generic informations as bindings can be found in
>> +Documentation/powerpc/dts-bindings/
>> +
>> +2. Passing the device tree
>> +~~~~~~~~~~~~~~~~~~~~~~~~~~
>> +The pointer to the device tree block (dtb) is passed via setup_data
>> +(see [0]) which requires at least boot protocol 2.09. The type filed is
>> +defined as
>> +
>> +#define SETUP_DTB 2
>> +
>> +3. Purpose
>> +~~~~~~~~~~~
>> +The device tree is used as an extension to the "boot page". As such it does not
>> +parse / consider data which are already covered by the boot page. This includes
>> +memory size, command line arguments or initrd address.
>> +It simply holds information which can not be retrieved otherwise like interrupt
>> +routing or a list of devices behind an I2C bus.
>> +
>> +[0] Documentation/x86/boot.txt
>
> Please also add a brief description to section I of
> Documentation/devicetree/booting-without-of.txt
I assumed this file is powerpc only. Since you added arm there I have no
problem to move this content there.
>> diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
>> index b4ec95f..b227ba7 100644
>> --- a/arch/x86/include/asm/prom.h
>> +++ b/arch/x86/include/asm/prom.h
>> @@ -1 +1,59 @@
>> -/* dummy prom.h; here to make linux/of.h's #includes happy */
>> +/*
>> + * Definitions for Device tree / OpenFirmware handling on X86
>> + *
>> + * based on arch/powerpc/include/asm/prom.h which is
>> + * Copyright (C) 1996-2005 Paul Mackerras.
>> + *
>> + * This program is free software; you can redistribute it and/or
>> + * modify it under the terms of the GNU General Public License
>> + * as published by the Free Software Foundation; either version
>> + * 2 of the License, or (at your option) any later version.
>> + */
>> +
>> +#ifndef _ASM_X86_PROM_H
>> +#define _ASM_X86_PROM_H
>> +#ifndef __ASSEMBLY__
>> +
>> +#include <linux/of.h>
>> +#include <linux/types.h>
>> +#include <asm/irq.h>
>> +#include <asm/atomic.h>
>> +#include <asm/setup.h>
>> +
>> +#ifdef CONFIG_OF
>> +extern void add_dtb(u64 data);
>> +#else
>> +static inline void add_dtb(u64 data) { }
>> +#endif
>> +
>> +extern char cmd_line[COMMAND_LINE_SIZE];
>> +/* This number is used when no interrupt has been assigned */
>> +#define NO_IRQ (0)
>
> This line should no longer be necessary. drivers/of/irq.c defines
> NO_IRQ if it isn't already defined by the architecture. I'm trying to
> limit the exposure of NO_IRQ in dt code.
okay, I will to remove that.
>> +#endif /* __ASSEMBLY__ */
>> +
>> +/*
>> + * These includes are put at the bottom because they may contain things
>> + * that are overridden by this file. Ideally they shouldn't be included
>> + * by this file, but there are a bunch of .c files that currently depend
>> + * on it. Eventually they will be cleaned up.
>> + */
>> +#include <linux/of_fdt.h>
>> +#include <linux/of_irq.h>
>> +#include <linux/platform_device.h>
>
> You should be able to remove these includes. The problems described
> in the header are mostly with device drivers and architecture code.
> You shouldn't run into any of those issue, and if you do they should
> be fixed at the source.
okay.
>> index c752e97..149c87f 100644
>> --- a/arch/x86/kernel/irqinit.c
>> +++ b/arch/x86/kernel/irqinit.c
>> @@ -25,6 +25,7 @@
>> #include <asm/setup.h>
>> #include <asm/i8259.h>
>> #include <asm/traps.h>
>> +#include <asm/prom.h>
>
> I'm probably missing something. I don't see any changes to irqinit.c
> other than this. What symbol definition has been moved to prom.h that
> irqinit.c needs?
This hunk was folded into the wrong patch. It should been folded into
"x86/ioapic: Add OF bindings for IO-APIC".
>> /*
>> * ISA PIC or low IO-APIC triggered (INTA-cycle or APIC) interrupts:
>> diff --git a/arch/x86/kernel/prom.c b/arch/x86/kernel/prom.c
>> new file mode 100644
>> index 0000000..4969ffa
>> --- /dev/null
>> +++ b/arch/x86/kernel/prom.c
>
> You don't need to name this prom.c. devicetree.c would make more sense.
> prom is a legacy name from when only Open Firmware systems were using
> the dt code.
okay.
>> @@ -0,0 +1,51 @@
>> +
>> +void __init add_dtb(u64 data)
>> +{
>> + initial_boot_params = (struct boot_param_header *)
>> + phys_to_virt((u64) (u32) data +
>> + offsetof(struct setup_data, data));
>
> (struct boot_param_header *) cast unnecessary since phys_to_virt
> should return a void*.
removed.
>> +}
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [sodaville] [PATCH TIP 02/14] x86: Add device tree support
@ 2011-02-17 11:05 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-17 11:05 UTC (permalink / raw)
To: Grant Likely
Cc: Sebastian Andrzej Siewior, sodaville, devicetree-discuss, x86,
linux-kernel, dilinger
* Grant Likely | 2011-02-16 14:27:46 [-0700]:
>> Andres, this patch moves some of the OF defines you added for OLPC from
>> irq.c to prom.c which requires CONFIG_X86_OF to be enabled. A later
>
>Why not simply make prom.c depend on CONFIG_OF? There is no need to
>have an x86 specific config value for enabling devicetree code.
renamed it to CONFIG_OF
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [sodaville] [PATCH TIP 02/14] x86: Add device tree support
@ 2011-02-17 11:05 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-17 11:05 UTC (permalink / raw)
To: Grant Likely
Cc: Sebastian Andrzej Siewior, x86-DgEjT+Ai2ygdnm+yROfE0A,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
sodaville-hfZtesqFncYOwBW4kG4KsQ,
dilinger-pFFUokh25LWsTnJN9+BGXg,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
* Grant Likely | 2011-02-16 14:27:46 [-0700]:
>> Andres, this patch moves some of the OF defines you added for OLPC from
>> irq.c to prom.c which requires CONFIG_X86_OF to be enabled. A later
>
>Why not simply make prom.c depend on CONFIG_OF? There is no need to
>have an x86 specific config value for enabling devicetree code.
renamed it to CONFIG_OF
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [sodaville] [PATCH TIP 02/14] x86: Add device tree support
@ 2011-02-17 11:31 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-17 11:31 UTC (permalink / raw)
To: Grant Likely
Cc: Sebastian Andrzej Siewior, sodaville, devicetree-discuss, x86,
linux-kernel
* Grant Likely | 2011-02-16 14:31:26 [-0700]:
>> +config X86_OF
>> + bool "Support for device tree"
>> + select OF
>> + select OF_EARLY_FLATTREE
>> + ---help---
>> + Device tree support on X86.
>> +
>
>On ARM and MIPS, this is called 'config USE_OF'. It would be nice to have
>some commonality. Maybe I should move the user-visible option to
>drivers/of/Kconfig. Or perhaps I should just make CONFIG_OF itself
>user visible.
>
>thoughts?
We could make CONFIG_OF depend on CONFIG_HAVE_OF_SUPPORT and let OF
select OF_EARLY_FLATTREE if ARCH_WANT_EARLY_FLATTREE for instance. So
that part would work in a generic way.
For OF-only platforms you would have to go to drivers/of
before you can enable the specific SoC/board. So it could lead to
something like "first enable scsi disk before you can enable usb
storage".
I like it :) For now I rename to USE_OF.
>
>g.
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [sodaville] [PATCH TIP 02/14] x86: Add device tree support
@ 2011-02-17 11:31 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-17 11:31 UTC (permalink / raw)
To: Grant Likely
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ, Sebastian Andrzej Siewior,
x86-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
* Grant Likely | 2011-02-16 14:31:26 [-0700]:
>> +config X86_OF
>> + bool "Support for device tree"
>> + select OF
>> + select OF_EARLY_FLATTREE
>> + ---help---
>> + Device tree support on X86.
>> +
>
>On ARM and MIPS, this is called 'config USE_OF'. It would be nice to have
>some commonality. Maybe I should move the user-visible option to
>drivers/of/Kconfig. Or perhaps I should just make CONFIG_OF itself
>user visible.
>
>thoughts?
We could make CONFIG_OF depend on CONFIG_HAVE_OF_SUPPORT and let OF
select OF_EARLY_FLATTREE if ARCH_WANT_EARLY_FLATTREE for instance. So
that part would work in a generic way.
For OF-only platforms you would have to go to drivers/of
before you can enable the specific SoC/board. So it could lead to
something like "first enable scsi disk before you can enable usb
storage".
I like it :) For now I rename to USE_OF.
>
>g.
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [sodaville] [PATCH OF 12/14] x86/rtc: don't register rtc if we the DT blob
@ 2011-02-17 13:13 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-17 13:13 UTC (permalink / raw)
To: Grant Likely
Cc: Sebastian Andrzej Siewior, sodaville, devicetree-discuss, x86,
linux-kernel, Andres Salomon
* Grant Likely | 2011-02-16 15:09:21 [-0700]:
>> @@ -236,6 +237,8 @@ static __init int add_rtc_cmos(void)
>> }
>> }
>> #endif
>> + if (of_have_populated_dt())
>> + return 0;
>
>Hmmm, should this hunk be moved to the next patch to preserve bisectability?
Makes sense. Without this chunk it is simply adding
of_have_populated_dt(). So I merge with the next patch.
>g.
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [sodaville] [PATCH OF 12/14] x86/rtc: don't register rtc if we the DT blob
@ 2011-02-17 13:13 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-17 13:13 UTC (permalink / raw)
To: Grant Likely
Cc: Sebastian Andrzej Siewior, x86-DgEjT+Ai2ygdnm+yROfE0A,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
sodaville-hfZtesqFncYOwBW4kG4KsQ, Andres Salomon,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
* Grant Likely | 2011-02-16 15:09:21 [-0700]:
>> @@ -236,6 +237,8 @@ static __init int add_rtc_cmos(void)
>> }
>> }
>> #endif
>> + if (of_have_populated_dt())
>> + return 0;
>
>Hmmm, should this hunk be moved to the next patch to preserve bisectability?
Makes sense. Without this chunk it is simply adding
of_have_populated_dt(). So I merge with the next patch.
>g.
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [sodaville] [PATCH OF 13/14] rtc/cmos: add OF bindings
@ 2011-02-17 13:26 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-17 13:26 UTC (permalink / raw)
To: Grant Likely
Cc: Sebastian Andrzej Siewior, Alessandro Zummo, rtc-linux,
devicetree-discuss, x86, linux-kernel, sodaville
* Grant Likely | 2011-02-16 15:11:08 [-0700]:
>> diff --git a/Documentation/powerpc/dts-bindings/rtc-cmos.txt b/Documentation/powerpc/dts-bindings/rtc-cmos.txt
>> new file mode 100644
>> index 0000000..7382989
>> --- /dev/null
>> +++ b/Documentation/powerpc/dts-bindings/rtc-cmos.txt
>
>Move to Documentation/devicetree/bindings/rtc/
moved.
>> diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
>> index c7ff8df..2709e00 100644
>> --- a/drivers/rtc/rtc-cmos.c
>> +++ b/drivers/rtc/rtc-cmos.c
>> @@ -1162,6 +1205,9 @@ static struct platform_driver cmos_platform_driver = {
>> #ifdef CONFIG_PM
>> .pm = &cmos_pm_ops,
>> #endif
>> +#if defined(CONFIG_OF)
>> + .of_match_table = of_cmos_match,
>> +#endif
>
>The #if defined(CONFIG_OF) is no longer necessary around
>.of_match_table, particularly if you have a #else above that #defines
>of_cmos_match to NULL.
Kinda does not work. I get here:
|drivers/rtc/rtc-cmos.c:1209:3: error: unknown field ‘of_match_table’ specified in initializer
I rebased on top of -rc5. Is this something new you describing?
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [sodaville] [PATCH OF 13/14] rtc/cmos: add OF bindings
@ 2011-02-17 13:26 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-17 13:26 UTC (permalink / raw)
To: Grant Likely
Cc: Alessandro Zummo, rtc-linux-/JYPxA39Uh5TLH3MbocFFw,
Sebastian Andrzej Siewior, x86-DgEjT+Ai2ygdnm+yROfE0A,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
* Grant Likely | 2011-02-16 15:11:08 [-0700]:
>> diff --git a/Documentation/powerpc/dts-bindings/rtc-cmos.txt b/Documentation/powerpc/dts-bindings/rtc-cmos.txt
>> new file mode 100644
>> index 0000000..7382989
>> --- /dev/null
>> +++ b/Documentation/powerpc/dts-bindings/rtc-cmos.txt
>
>Move to Documentation/devicetree/bindings/rtc/
moved.
>> diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
>> index c7ff8df..2709e00 100644
>> --- a/drivers/rtc/rtc-cmos.c
>> +++ b/drivers/rtc/rtc-cmos.c
>> @@ -1162,6 +1205,9 @@ static struct platform_driver cmos_platform_driver = {
>> #ifdef CONFIG_PM
>> .pm = &cmos_pm_ops,
>> #endif
>> +#if defined(CONFIG_OF)
>> + .of_match_table = of_cmos_match,
>> +#endif
>
>The #if defined(CONFIG_OF) is no longer necessary around
>.of_match_table, particularly if you have a #else above that #defines
>of_cmos_match to NULL.
Kinda does not work. I get here:
|drivers/rtc/rtc-cmos.c:1209:3: error: unknown field ‘of_match_table’ specified in initializer
I rebased on top of -rc5. Is this something new you describing?
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [sodaville] [PATCH OF 13/14] rtc/cmos: add OF bindings
2011-02-17 13:26 ` Sebastian Andrzej Siewior
(?)
@ 2011-02-17 16:46 ` Grant Likely
-1 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-17 16:46 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: Alessandro Zummo, rtc-linux, devicetree-discuss, x86,
linux-kernel, sodaville, Thomas Gleixner
On Thu, Feb 17, 2011 at 6:26 AM, Sebastian Andrzej Siewior
<bigeasy@linutronix.de> wrote:
> * Grant Likely | 2011-02-16 15:11:08 [-0700]:
>
>>> diff --git a/Documentation/powerpc/dts-bindings/rtc-cmos.txt b/Documentation/powerpc/dts-bindings/rtc-cmos.txt
>>> new file mode 100644
>>> index 0000000..7382989
>>> --- /dev/null
>>> +++ b/Documentation/powerpc/dts-bindings/rtc-cmos.txt
>>
>>Move to Documentation/devicetree/bindings/rtc/
> moved.
>
>>> diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c
>>> index c7ff8df..2709e00 100644
>>> --- a/drivers/rtc/rtc-cmos.c
>>> +++ b/drivers/rtc/rtc-cmos.c
>>> @@ -1162,6 +1205,9 @@ static struct platform_driver cmos_platform_driver = {
>>> #ifdef CONFIG_PM
>>> .pm = &cmos_pm_ops,
>>> #endif
>>> +#if defined(CONFIG_OF)
>>> + .of_match_table = of_cmos_match,
>>> +#endif
>>
>>The #if defined(CONFIG_OF) is no longer necessary around
>>.of_match_table, particularly if you have a #else above that #defines
>>of_cmos_match to NULL.
>
> Kinda does not work. I get here:
> |drivers/rtc/rtc-cmos.c:1209:3: error: unknown field â of_match_tableâ specified in initializer
>
> I rebased on top of -rc5. Is this something new you describing?
Base your patch on top of my devicetree/next branch. That's the
branch that tglx will be applying them on top of them to get your
changes to generic pci dt support code.
g.
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [sodaville] [PATCH TIP 02/14] x86: Add device tree support
2011-02-17 11:31 ` Sebastian Andrzej Siewior
(?)
@ 2011-02-17 17:02 ` Grant Likely
-1 siblings, 0 replies; 94+ messages in thread
From: Grant Likely @ 2011-02-17 17:02 UTC (permalink / raw)
To: Sebastian Andrzej Siewior
Cc: sodaville, devicetree-discuss, x86, linux-kernel
On Thu, Feb 17, 2011 at 4:31 AM, Sebastian Andrzej Siewior
<bigeasy@linutronix.de> wrote:
> * Grant Likely | 2011-02-16 14:31:26 [-0700]:
>
>>> +config X86_OF
>>> + bool "Support for device tree"
>>> + select OF
>>> + select OF_EARLY_FLATTREE
>>> + ---help---
>>> + Device tree support on X86.
>>> +
>>
>>On ARM and MIPS, this is called 'config USE_OF'. It would be nice to have
>>some commonality. Maybe I should move the user-visible option to
>>drivers/of/Kconfig. Or perhaps I should just make CONFIG_OF itself
>>user visible.
>>
>>thoughts?
>
> We could make CONFIG_OF depend on CONFIG_HAVE_OF_SUPPORT and let OF
> select OF_EARLY_FLATTREE if ARCH_WANT_EARLY_FLATTREE for instance. So
> that part would work in a generic way.
>
> For OF-only platforms you would have to go to drivers/of
> before you can enable the specific SoC/board. So it could lead to
> something like "first enable scsi disk before you can enable usb
> storage".
That's definitely not desirable. Currently ARM and MIPS boards that
need it are force-selecting USE_OF which pretty much solves the
problem. The option is always user-
>
> I like it :) For now I rename to USE_OF.
okay.
g.
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [sodaville] [PATCH TIP v2 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-02-22 11:21 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-22 11:21 UTC (permalink / raw)
To: Grant Likely
Cc: Sebastian Andrzej Siewior, sodaville, devicetree-discuss, x86,
linux-kernel, David Gibson
* Grant Likely | 2011-02-16 14:44:28 [-0700]:
>> diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts
>> new file mode 100644
>> index 0000000..e888657
>> --- /dev/null
>> +++ b/arch/x86/platform/ce4100/falconfalls.dts
>> @@ -0,0 +1,424 @@
>> + soc@0 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "intel,ce4100-cp";
>
>You *must* include documentation for each of these new compatible
>values before merging this patch. At the very least it acts as a
>placeholder and describes exactly what the string describes.
I added something.
>> + ranges;
>> +
>> + ioapic1: interrupt-controller@fec00000 {
>> + #interrupt-cells = <2>;
>> + compatible = "intel,ioapic-ce4100", "intel,ioapic";
>
>"intel,ioapic" is probably too generic and can be dropped. Newer
>devices can claim compatibility with "intel,ioapic-ce4100" if they are
>indeed compatible so that device drivers don't need to be modified.
>It is better to anchor compatible values to real implementations that
>try to come up with 'generic' or wildcard strings. Ditto through the
>rest of the file.
>
>"intel,ce4100-ioapic" (instead of intel,ioapic-ce4100) would follow
>current convention better of specifying the chip first, followed by
>the on-chip device.
>
Done.
>> + pci@1,0 {
>> + #address-cells = <3>;
>> + #interrupt-cells = <1>;
>> + #size-cells = <2>;
>> + compatible = "intel,ce4100-pci", "pci";
>> + device_type = "pci";
>> + bus-range = <1 1>;
>> + ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
>> +
>> + interrupt-parent = <&ioapic2>;
>> +
>> + display@2,0 {
>> + compatible = "pci8086,2e5b.2",
>> + "pci8086,2e5b",
>> + "pciclass038000",
>> + "pciclass0380";
>> +
>> + reg = <0x11000 0x0 0x0 0x0 0x0>;
>> + interrupts = <0 1>;
>> + };
>
>Here's where things get a little sticky for PCI child devices
>(probably should have thought about this earlier, sorry). Are these
>devices runtime detectable? ie. does reading the PCI BARs and irq
>configuration registers reflect reality?
Bar yes (no assigned-property here), IRQ no.
This devices are runtime detectable via the PCI bus. However the
interrupt number is no longer correct. The PCI bus reports the legacy
number which is irq 4 (if I remember correctly) for all devices here.
Which is correct for the legacy mode. Those interrupts are routed to the
legacy interrupt controller. Once we activate the IO APIC for interrupt
routing the legacy controller is no longer in use. With the IO APIC
there is a different interrupt routing which is described here by the
interrupt property.
On systems with ACPI this kind of information is read fron there. You
see during boot-up "PCI->APIC IRQ transform: ...".
>In general, if something can be *reliably* detected then it should not
>be listed in the device tree. However, if there is some horrid gotcha
>that prevents it being detected reliably, then it definitely should
>appear here.
The first edition used the interrupt-map property to describe this
mapping. David Gibson [0] recommended then to create device nodes
because the PCI INTA..D lines were not used.
>I cannot answer this question for you since I don't know the hardware.
>It's a judgement call that you'll need to make on whether or not these
>PCI (or pseudo pci?) devices should be listed in the dt.
Most of the devices can be detected reliably. I2C and SPI need some
additional information. I believe more of this things will pop up once
someone adds the GPIO wires which are not there yet. I know that the
smartcard thingy uses one GPIO for card detect. So I would need to
extend the device property later for that :)
>One of the things that does need to be improved is partial probing of
>PCI busses so that only the messy PCI devices get listed in the device
>tree, and the rest of the devices can get detected in the normal
>manner.
I did not add any "special" compatible properties just the pci ids. So
they should not be probed via DT just PCI unless one adds this to the
driver.
[0] http://lists.ozlabs.org/pipermail/devicetree-discuss/2011-January/004137.html
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [sodaville] [PATCH TIP v2 03/14] x86/dtb: Add a device tree for CE4100
@ 2011-02-22 11:21 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-22 11:21 UTC (permalink / raw)
To: Grant Likely
Cc: Sebastian Andrzej Siewior, x86-DgEjT+Ai2ygdnm+yROfE0A,
linux-kernel-u79uwXL29TY76Z2rM5mHXA,
sodaville-hfZtesqFncYOwBW4kG4KsQ,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ
* Grant Likely | 2011-02-16 14:44:28 [-0700]:
>> diff --git a/arch/x86/platform/ce4100/falconfalls.dts b/arch/x86/platform/ce4100/falconfalls.dts
>> new file mode 100644
>> index 0000000..e888657
>> --- /dev/null
>> +++ b/arch/x86/platform/ce4100/falconfalls.dts
>> @@ -0,0 +1,424 @@
>> + soc@0 {
>> + #address-cells = <1>;
>> + #size-cells = <1>;
>> + compatible = "intel,ce4100-cp";
>
>You *must* include documentation for each of these new compatible
>values before merging this patch. At the very least it acts as a
>placeholder and describes exactly what the string describes.
I added something.
>> + ranges;
>> +
>> + ioapic1: interrupt-controller@fec00000 {
>> + #interrupt-cells = <2>;
>> + compatible = "intel,ioapic-ce4100", "intel,ioapic";
>
>"intel,ioapic" is probably too generic and can be dropped. Newer
>devices can claim compatibility with "intel,ioapic-ce4100" if they are
>indeed compatible so that device drivers don't need to be modified.
>It is better to anchor compatible values to real implementations that
>try to come up with 'generic' or wildcard strings. Ditto through the
>rest of the file.
>
>"intel,ce4100-ioapic" (instead of intel,ioapic-ce4100) would follow
>current convention better of specifying the chip first, followed by
>the on-chip device.
>
Done.
>> + pci@1,0 {
>> + #address-cells = <3>;
>> + #interrupt-cells = <1>;
>> + #size-cells = <2>;
>> + compatible = "intel,ce4100-pci", "pci";
>> + device_type = "pci";
>> + bus-range = <1 1>;
>> + ranges = <0x2000000 0 0xdffe0000 0x2000000 0 0xdffe0000 0 0x1000>;
>> +
>> + interrupt-parent = <&ioapic2>;
>> +
>> + display@2,0 {
>> + compatible = "pci8086,2e5b.2",
>> + "pci8086,2e5b",
>> + "pciclass038000",
>> + "pciclass0380";
>> +
>> + reg = <0x11000 0x0 0x0 0x0 0x0>;
>> + interrupts = <0 1>;
>> + };
>
>Here's where things get a little sticky for PCI child devices
>(probably should have thought about this earlier, sorry). Are these
>devices runtime detectable? ie. does reading the PCI BARs and irq
>configuration registers reflect reality?
Bar yes (no assigned-property here), IRQ no.
This devices are runtime detectable via the PCI bus. However the
interrupt number is no longer correct. The PCI bus reports the legacy
number which is irq 4 (if I remember correctly) for all devices here.
Which is correct for the legacy mode. Those interrupts are routed to the
legacy interrupt controller. Once we activate the IO APIC for interrupt
routing the legacy controller is no longer in use. With the IO APIC
there is a different interrupt routing which is described here by the
interrupt property.
On systems with ACPI this kind of information is read fron there. You
see during boot-up "PCI->APIC IRQ transform: ...".
>In general, if something can be *reliably* detected then it should not
>be listed in the device tree. However, if there is some horrid gotcha
>that prevents it being detected reliably, then it definitely should
>appear here.
The first edition used the interrupt-map property to describe this
mapping. David Gibson [0] recommended then to create device nodes
because the PCI INTA..D lines were not used.
>I cannot answer this question for you since I don't know the hardware.
>It's a judgement call that you'll need to make on whether or not these
>PCI (or pseudo pci?) devices should be listed in the dt.
Most of the devices can be detected reliably. I2C and SPI need some
additional information. I believe more of this things will pop up once
someone adds the GPIO wires which are not there yet. I know that the
smartcard thingy uses one GPIO for card detect. So I would need to
extend the device property later for that :)
>One of the things that does need to be improved is partial probing of
>PCI busses so that only the messy PCI devices get listed in the device
>tree, and the rest of the devices can get detected in the normal
>manner.
I did not add any "special" compatible properties just the pci ids. So
they should not be probed via DT just PCI unless one adds this to the
driver.
[0] http://lists.ozlabs.org/pipermail/devicetree-discuss/2011-January/004137.html
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [sodaville] [PATCH TIP 08/14] x86/dtb: add support for PCI devices backed by dtb nodes
@ 2011-02-22 11:21 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-22 11:21 UTC (permalink / raw)
To: Grant Likely
Cc: Sebastian Andrzej Siewior, sodaville, devicetree-discuss, x86,
linux-kernel
* Grant Likely | 2011-02-16 14:59:15 [-0700]:
>> diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
>> index bd67ab2..3ed0bd6 100644
>> --- a/arch/x86/include/asm/prom.h
>> +++ b/arch/x86/include/asm/prom.h
>> @@ -28,8 +29,24 @@ extern void add_dtb(u64 data);
>> void x86_dtb_find_config(void);
>> void x86_dtb_get_config(unsigned int unused);
>> void add_interrupt_host(struct irq_domain *ih);
>> +void __cpuinit x86_of_pci_init(void);
>> +
>> +static inline struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
>> +{
>> + return pdev->dev.of_node;
>> +}
>> +
>> +static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
>> +{
>> + if (bus->self)
>> + return pci_device_to_OF_node(bus->self);
>> + else
>> + return NULL;
>> +}
>
>Nit: could simply be:
>
>static inline struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
>{
> return pdev ? pdev->dev.of_node : NULL;
>}
>
>static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
>{
> return pci_device_to_OF_node(bus->self);
>}
>
done.
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
* Re: [sodaville] [PATCH TIP 08/14] x86/dtb: add support for PCI devices backed by dtb nodes
@ 2011-02-22 11:21 ` Sebastian Andrzej Siewior
0 siblings, 0 replies; 94+ messages in thread
From: Sebastian Andrzej Siewior @ 2011-02-22 11:21 UTC (permalink / raw)
To: Grant Likely
Cc: sodaville-hfZtesqFncYOwBW4kG4KsQ, Sebastian Andrzej Siewior,
x86-DgEjT+Ai2ygdnm+yROfE0A,
devicetree-discuss-uLR06cmDAlY/bJ5BZ2RsiQ,
linux-kernel-u79uwXL29TY76Z2rM5mHXA
* Grant Likely | 2011-02-16 14:59:15 [-0700]:
>> diff --git a/arch/x86/include/asm/prom.h b/arch/x86/include/asm/prom.h
>> index bd67ab2..3ed0bd6 100644
>> --- a/arch/x86/include/asm/prom.h
>> +++ b/arch/x86/include/asm/prom.h
>> @@ -28,8 +29,24 @@ extern void add_dtb(u64 data);
>> void x86_dtb_find_config(void);
>> void x86_dtb_get_config(unsigned int unused);
>> void add_interrupt_host(struct irq_domain *ih);
>> +void __cpuinit x86_of_pci_init(void);
>> +
>> +static inline struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
>> +{
>> + return pdev->dev.of_node;
>> +}
>> +
>> +static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
>> +{
>> + if (bus->self)
>> + return pci_device_to_OF_node(bus->self);
>> + else
>> + return NULL;
>> +}
>
>Nit: could simply be:
>
>static inline struct device_node *pci_device_to_OF_node(struct pci_dev *pdev)
>{
> return pdev ? pdev->dev.of_node : NULL;
>}
>
>static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
>{
> return pci_device_to_OF_node(bus->self);
>}
>
done.
Sebastian
^ permalink raw reply [flat|nested] 94+ messages in thread
end of thread, other threads:[~2011-02-22 11:21 UTC | newest]
Thread overview: 94+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2011-01-24 4:28 Device tree on x86, part v3 Sebastian Andrzej Siewior
2011-01-24 4:28 ` Sebastian Andrzej Siewior
2011-01-24 4:28 ` [PATCH TIP 01/14] x86/e820: remove conditional early mapping in parse_e820_ext Sebastian Andrzej Siewior
2011-01-24 4:28 ` Sebastian Andrzej Siewior
2011-02-03 20:57 ` Grant Likely
2011-01-24 4:28 ` [PATCH TIP 02/14] x86: Add device tree support Sebastian Andrzej Siewior
2011-01-24 4:28 ` Sebastian Andrzej Siewior
2011-01-24 4:34 ` Sebastian Andrzej Siewior
2011-01-24 4:34 ` Sebastian Andrzej Siewior
2011-02-16 21:27 ` Grant Likely
2011-02-16 21:27 ` Grant Likely
2011-02-17 11:05 ` [sodaville] " Sebastian Andrzej Siewior
2011-02-17 11:05 ` Sebastian Andrzej Siewior
2011-02-16 21:26 ` Grant Likely
2011-02-17 11:03 ` Sebastian Andrzej Siewior
2011-02-17 11:03 ` Sebastian Andrzej Siewior
2011-02-16 21:31 ` Grant Likely
2011-02-16 21:31 ` Grant Likely
2011-02-17 11:31 ` [sodaville] " Sebastian Andrzej Siewior
2011-02-17 11:31 ` Sebastian Andrzej Siewior
2011-02-17 17:02 ` Grant Likely
2011-01-24 4:28 ` [PATCH TIP 03/14] x86/dtb: Add a device tree for CE4100 Sebastian Andrzej Siewior
2011-01-24 4:28 ` Sebastian Andrzej Siewior
2011-01-27 5:00 ` David Gibson
2011-01-27 5:00 ` David Gibson
2011-01-27 9:11 ` Sebastian Andrzej Siewior
2011-01-27 9:11 ` Sebastian Andrzej Siewior
2011-02-03 20:59 ` Grant Likely
2011-02-03 21:32 ` Mitch Bradley
2011-02-03 21:32 ` Mitch Bradley
2011-02-04 9:40 ` Sebastian Andrzej Siewior
2011-02-04 9:40 ` Sebastian Andrzej Siewior
2011-02-02 18:58 ` [PATCH TIP v2 " Sebastian Andrzej Siewior
2011-02-02 18:58 ` Sebastian Andrzej Siewior
2011-02-03 21:07 ` Grant Likely
2011-02-03 21:07 ` Grant Likely
2011-02-04 10:06 ` Sebastian Andrzej Siewior
2011-02-04 10:06 ` Sebastian Andrzej Siewior
2011-02-16 21:44 ` Grant Likely
2011-02-16 21:44 ` Grant Likely
2011-02-22 11:21 ` [sodaville] " Sebastian Andrzej Siewior
2011-02-22 11:21 ` Sebastian Andrzej Siewior
2011-01-24 4:28 ` [PATCH TIP 04/14] x86/dtb: add irq domain abstraction Sebastian Andrzej Siewior
2011-01-24 4:28 ` Sebastian Andrzej Siewior
2011-01-24 4:28 ` [PATCH TIP 05/14] x86/dtb: add early parsing of APIC and IO APIC Sebastian Andrzej Siewior
2011-01-24 4:28 ` Sebastian Andrzej Siewior
2011-02-16 21:47 ` Grant Likely
2011-02-16 21:47 ` Grant Likely
2011-01-24 4:28 ` [PATCH TIP 06/14] x86/dtb: add support hpet Sebastian Andrzej Siewior
2011-01-24 4:28 ` Sebastian Andrzej Siewior
2011-01-24 4:28 ` [PATCH OF 07/14] of: move of_irq_map_pci() into generic code Sebastian Andrzej Siewior
2011-01-24 4:28 ` Sebastian Andrzej Siewior
2011-02-10 13:57 ` Michal Simek
2011-02-16 21:53 ` Grant Likely
2011-02-16 21:53 ` Grant Likely
2011-02-17 7:49 ` Michal Simek
2011-02-17 7:49 ` Michal Simek
2011-02-17 7:49 ` Michal Simek
2011-01-24 4:28 ` [PATCH TIP 08/14] x86/dtb: add support for PCI devices backed by dtb nodes Sebastian Andrzej Siewior
2011-01-24 4:28 ` Sebastian Andrzej Siewior
2011-02-16 21:59 ` Grant Likely
2011-02-16 21:59 ` Grant Likely
2011-02-22 11:21 ` [sodaville] " Sebastian Andrzej Siewior
2011-02-22 11:21 ` Sebastian Andrzej Siewior
2011-01-24 4:28 ` [PATCH TIP 09/14] x86/dtb: Add generic bus probe Sebastian Andrzej Siewior
2011-01-24 4:28 ` Sebastian Andrzej Siewior
2011-02-04 10:21 ` [PATCH v2 " Sebastian Andrzej Siewior
2011-02-04 10:21 ` Sebastian Andrzej Siewior
2011-02-16 22:04 ` Grant Likely
2011-02-16 22:04 ` Grant Likely
2011-01-24 4:28 ` [PATCH TIP 10/14] x86/ioapic: Add OF bindings for IO-APIC Sebastian Andrzej Siewior
2011-01-24 4:28 ` Sebastian Andrzej Siewior
2011-02-16 22:04 ` Grant Likely
2011-01-24 4:28 ` [PATCH TIP 11/14] x86/ce4100: use OF for ioapic Sebastian Andrzej Siewior
2011-01-24 4:28 ` Sebastian Andrzej Siewior
2011-01-24 4:29 ` [PATCH OF 12/14] x86/rtc: don't register rtc if we the DT blob Sebastian Andrzej Siewior
2011-01-24 4:29 ` Sebastian Andrzej Siewior
2011-02-16 22:08 ` Grant Likely
2011-02-16 22:08 ` Grant Likely
2011-02-16 22:09 ` Grant Likely
2011-02-16 22:09 ` Grant Likely
2011-02-17 13:13 ` [sodaville] " Sebastian Andrzej Siewior
2011-02-17 13:13 ` Sebastian Andrzej Siewior
2011-01-24 4:29 ` [PATCH OF 13/14] rtc/cmos: add OF bindings Sebastian Andrzej Siewior
2011-01-24 4:29 ` Sebastian Andrzej Siewior
2011-01-24 4:38 ` Sebastian Andrzej Siewior
2011-01-24 4:38 ` Sebastian Andrzej Siewior
2011-02-16 22:11 ` Grant Likely
2011-02-16 22:11 ` Grant Likely
2011-02-17 13:26 ` [sodaville] " Sebastian Andrzej Siewior
2011-02-17 13:26 ` Sebastian Andrzej Siewior
2011-02-17 16:46 ` Grant Likely
2011-01-24 4:29 ` [PATCH TIP 14/14] x86/pci: remove warning Sebastian Andrzej Siewior
2011-01-24 4:29 ` Sebastian Andrzej Siewior
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