From: LiuShuo <b35362@freescale.com>
To: Scott Wood <scottwood@freescale.com>
Cc: Li Yang-R58472 <r58472@freescale.com>,
Artem Bityutskiy <dedekind1@gmail.com>,
Matthieu CASTET <matthieu.castet@parrot.com>,
"linuxppc-dev@ozlabs.org" <linuxppc-dev@ozlabs.org>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
Ivan Djelic <ivan.djelic@parrot.com>,
"dwmw2@infradead.org" <dwmw2@infradead.org>
Subject: Re: [PATCH v3] mtd/nand : workaround for Freescale FCM to support large-page Nand chip
Date: Tue, 23 Aug 2011 11:09:28 +0800 [thread overview]
Message-ID: <4E5319E8.50903@freescale.com> (raw)
In-Reply-To: <4E52819C.8080204@freescale.com>
=E4=BA=8E 2011=E5=B9=B408=E6=9C=8823=E6=97=A5 00:19, Scott Wood =E5=86=99=
=E9=81=93:
> On 08/22/2011 11:13 AM, Matthieu CASTET wrote:
>> Scott Wood a =C3=A9crit :
>>> To eliminate it we'd need to do an extra data transfer without reissu=
ing
>>> the command, which Shuo was unable to get to work.
>>>
>> That's weird because our controller seems quite flexible [1].
>>
>> Something like that should work ?
>>
>> out_be32(&lbc->fir,
>> (FIR_OP_CM2<< FIR_OP0_SHIFT) |
>> (FIR_OP_CA<< FIR_OP1_SHIFT) |
>> (FIR_OP_PA<< FIR_OP2_SHIFT) |
>> (FIR_OP_WB<< FIR_OP3_SHIFT));
>> refill FCM buffer with next 2k data
>>
>> out_be32(&lbc->fir,
>> (FIR_OP_WB<< FIR_OP3_SHIFT) |
>> (FIR_OP_CM3<< FIR_OP4_SHIFT) |
>> (FIR_OP_CW1<< FIR_OP5_SHIFT) |
>> (FIR_OP_RS<< FIR_OP6_SHIFT));
> Something like that is what I originally suggested, but Shuo said it
> didn't work (even in theory, it requires a CE-don't-care NAND chip,
> since bus atomicity is broken).
>
> Shuo, what specifically did you try, and what did you see happen?
>
> -Scott
First, if we want to read 4K data with once command issuing, we can't=20
use HW_ECC.
Even if we use SW_ECC, we always get lots of weird '0xFF's between 1st=20
2k and 2nd 2k data.
They will cover the data in the head of 2nd 2K.
-----------------------------------------------------------------------=
--------------
| xxxxxx ... 1st 2k xxxxxxx ... | ff ff ff ... ff xxxxxx 2nd 2k xxxxxxx |
-----------------------------------------------------------------------=
--------------
It is worse to write 4k data with once command issuing. It can't write=20
the 2nd data correctly.
-Liu Shuo
WARNING: multiple messages have this Message-ID (diff)
From: LiuShuo <b35362@freescale.com>
To: Scott Wood <scottwood@freescale.com>
Cc: Li Yang-R58472 <r58472@freescale.com>,
Artem Bityutskiy <dedekind1@gmail.com>,
Matthieu CASTET <matthieu.castet@parrot.com>,
"linuxppc-dev@ozlabs.org" <linuxppc-dev@ozlabs.org>,
"linux-mtd@lists.infradead.org" <linux-mtd@lists.infradead.org>,
Ivan Djelic <ivan.djelic@parrot.com>,
"dwmw2@infradead.org" <dwmw2@infradead.org>
Subject: Re: [PATCH v3] mtd/nand : workaround for Freescale FCM to support large-page Nand chip
Date: Tue, 23 Aug 2011 11:09:28 +0800 [thread overview]
Message-ID: <4E5319E8.50903@freescale.com> (raw)
In-Reply-To: <4E52819C.8080204@freescale.com>
于 2011年08月23日 00:19, Scott Wood 写道:
> On 08/22/2011 11:13 AM, Matthieu CASTET wrote:
>> Scott Wood a écrit :
>>> To eliminate it we'd need to do an extra data transfer without reissuing
>>> the command, which Shuo was unable to get to work.
>>>
>> That's weird because our controller seems quite flexible [1].
>>
>> Something like that should work ?
>>
>> out_be32(&lbc->fir,
>> (FIR_OP_CM2<< FIR_OP0_SHIFT) |
>> (FIR_OP_CA<< FIR_OP1_SHIFT) |
>> (FIR_OP_PA<< FIR_OP2_SHIFT) |
>> (FIR_OP_WB<< FIR_OP3_SHIFT));
>> refill FCM buffer with next 2k data
>>
>> out_be32(&lbc->fir,
>> (FIR_OP_WB<< FIR_OP3_SHIFT) |
>> (FIR_OP_CM3<< FIR_OP4_SHIFT) |
>> (FIR_OP_CW1<< FIR_OP5_SHIFT) |
>> (FIR_OP_RS<< FIR_OP6_SHIFT));
> Something like that is what I originally suggested, but Shuo said it
> didn't work (even in theory, it requires a CE-don't-care NAND chip,
> since bus atomicity is broken).
>
> Shuo, what specifically did you try, and what did you see happen?
>
> -Scott
First, if we want to read 4K data with once command issuing, we can't
use HW_ECC.
Even if we use SW_ECC, we always get lots of weird '0xFF's between 1st
2k and 2nd 2k data.
They will cover the data in the head of 2nd 2K.
-------------------------------------------------------------------------------------
| xxxxxx ... 1st 2k xxxxxxx ... | ff ff ff ... ff xxxxxx 2nd 2k xxxxxxx |
-------------------------------------------------------------------------------------
It is worse to write 4k data with once command issuing. It can't write
the 2nd data correctly.
-Liu Shuo
next prev parent reply other threads:[~2011-08-23 3:03 UTC|newest]
Thread overview: 43+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-08-18 2:33 [PATCH v3] mtd/nand : workaround for Freescale FCM to support large-page Nand chip b35362
2011-08-18 2:33 ` b35362
2011-08-18 16:25 ` Scott Wood
2011-08-18 18:27 ` Scott Wood
2011-08-23 8:37 ` LiuShuo
2011-08-23 8:37 ` LiuShuo
2011-08-23 10:02 ` Matthieu CASTET
2011-08-23 16:12 ` Scott Wood
2011-08-23 16:12 ` Scott Wood
2011-08-25 11:18 ` Artem Bityutskiy
2011-08-24 2:48 ` LiuShuo
2011-08-24 2:48 ` LiuShuo
2011-08-25 11:25 ` Matthieu CASTET
2011-09-01 9:41 ` LiuShuo
2011-09-01 9:41 ` LiuShuo
2011-09-01 22:30 ` Scott Wood
2011-08-18 17:00 ` Matthieu CASTET
2011-08-18 17:00 ` Matthieu CASTET
2011-08-18 18:24 ` Scott Wood
2011-08-18 18:24 ` Scott Wood
2011-08-19 3:20 ` LiuShuo
2011-08-19 3:20 ` LiuShuo
2011-08-19 8:57 ` Matthieu CASTET
2011-08-19 8:57 ` Matthieu CASTET
2011-08-19 18:10 ` Scott Wood
2011-08-19 18:10 ` Scott Wood
2011-08-22 10:58 ` Artem Bityutskiy
2011-08-22 15:25 ` Ivan Djelic
2011-08-22 16:04 ` Scott Wood
2011-08-22 16:13 ` Matthieu CASTET
2011-08-22 16:19 ` Scott Wood
2011-08-22 16:19 ` Scott Wood
2011-08-22 17:05 ` Matthieu CASTET
2011-08-23 3:09 ` LiuShuo [this message]
2011-08-23 3:09 ` LiuShuo
2011-08-23 8:14 ` Matthieu CASTET
2011-08-23 9:57 ` LiuShuo
2011-08-23 9:57 ` LiuShuo
2011-08-23 10:13 ` Matthieu CASTET
2011-08-22 15:58 ` Scott Wood
2011-08-25 11:06 ` Artem Bityutskiy
2011-08-22 10:53 ` Artem Bityutskiy
2011-08-22 10:53 ` Artem Bityutskiy
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